Beyond RISC: The Post-RISC Architecture - http://www.cse.msu.edu/~enbody/postrisc/postrisc2.htm
Today's RISC processors are so far from RISC roots that they are no longer truly RISC. Michigan State University, Department of Computer Science. |
High Performance Computing: CISC vs. RISC - http://www.ccs.neu.edu/groups/honors-program/freshsem/19951996/utopia/risc.html
Brief introduction, gives general idea of what CISC and RISC are. |
Hyperstone Electronics GmbH - http://www.hyperstone-electronics.com/
RISC/DSP processors, flash memory controllers and cards (and compact cards), ASIC design, IP hardware, biometric devices, digital still cameras. |
John Mashey on RISC/CISC - http://userpages.umbc.edu/~vijay/mashey.on.risc.html
From comp.arch debates, in one text document for easier reading, original text and formats preserved, mostly. |
Reduced Instruction Set Computer - http://foldoc.org/index.cgi?Reduced+Instruction+Set+Computer
Brief, very clear definition, with links to related issues and processors. FOLDOC. |
RISC Architecture - http://cse.stanford.edu/class/sophomore-college/projects-00/risc/
Sophomore college project. Basic clear explanations of: What is RISC, MIPS processors, Pipelining, RISC vs. CISC, some recent developments, readings. |
RISC vs. CISC - http://stromeko.synth.net/comp_arch/RISC_vs_CISC.html
Document based on John Mashey (SGI) compilation of comp.arch debates, in one HTML document for easier reading, more so tables; original text and formats preserved where possible. |
RISC vs. CISC: The Post-RISC Era - http://arstechnica.com/cpu/4q99/risc-cisc/rvc-1.html
Detailed, balanced, historical analysis. [Ars Technica] |
RISC: Reduced Instruction Set Computer - http://www.auditmypc.com/acronym/risc.asp
Acronym finder, has several similar, complementary definitions. |
What is RISC? - http://www.webopedia.com/term/r/risc.html
Defines term, lists other webpages. Webopedia. |