CA1114010A - Copy production machines having job separation capabilities - Google Patents

Copy production machines having job separation capabilities

Info

Publication number
CA1114010A
CA1114010A CA305,243A CA305243A CA1114010A CA 1114010 A CA1114010 A CA 1114010A CA 305243 A CA305243 A CA 305243A CA 1114010 A CA1114010 A CA 1114010A
Authority
CA
Canada
Prior art keywords
copy
copies
separation
sheets
production
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA305,243A
Other languages
French (fr)
Inventor
Anthony J. Botte
James H. Hubbard
Paul R. Spivey
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Priority to CA000377012A priority Critical patent/CA1141815A/en
Application granted granted Critical
Publication of CA1114010A publication Critical patent/CA1114010A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03GELECTROGRAPHY; ELECTROPHOTOGRAPHY; MAGNETOGRAPHY
    • G03G15/00Apparatus for electrographic processes using a charge pattern
    • G03G15/65Apparatus which relate to the handling of copy material
    • G03G15/6538Devices for collating sheet copy material, e.g. sorters, control, copies in staples form
    • G03G15/655Placing job divider sheet between set of sheets
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03GELECTROGRAPHY; ELECTROPHOTOGRAPHY; MAGNETOGRAPHY
    • G03G2215/00Apparatus for electrophotographic processes
    • G03G2215/00362Apparatus for electrophotographic processes relating to the copy medium handling
    • G03G2215/00886Sorting or discharging
    • G03G2215/00894Placing job divider sheet
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03GELECTROGRAPHY; ELECTROPHOTOGRAPHY; MAGNETOGRAPHY
    • G03G2215/00Apparatus for electrophotographic processes
    • G03G2215/00362Apparatus for electrophotographic processes relating to the copy medium handling
    • G03G2215/00919Special copy medium handling apparatus
    • G03G2215/00928Copies and originals use a common part of the copy medium handling apparatus

Abstract

Abstract A copy production machine selectively inter-leaves copy separation sheets between successive copy jobs, subjobs or job portions. The copy separation sheets can be from the same copy sheet supply source or from an alternate source. The supplied copy separation sheets need not be operated upon by the copy production machines for receiving an image. Such sheets may have been preimaged under certain situations. When copy sheet supply means have diverse size copy sheets the separation mode may be inhibited. The number of separa-tion sheets supplied is a predetermined relationship between the number of copy receiving bins in an output portion receiving the copy separation sheets as well as the number of copies produced from a single image. The effective capacity of a collator is extended by such interleaving plus a programmable control that tallies copies made versus copies selected greater than the capacity of a collator such that the collator job is automatically segmented.

Description

1 Background of the Invention
2 The present invention relates to copy pro-
3 duction machines, particularly of the convenience
4 copier t~pe, having the capability of producing a succession of copy jobs Iwhich may be unrelated) in a 6 succession of copy runs and of controlling a succession 7 of such copy runs as a single copy job.
8 Transfer electrographic copy production 9 machines as well as other copy production machines of diverse types, employ various forms of image transforma-11 tion for putting an image on a sheet of copy paper.
12 Usually an image in latent form is generated and trans-13 ferred to a copy sheet. In some convenience copier 14 types of copy production machines only one run of copies can be produced automatically; i.e., an original 16 document containing a single image is placed on a 17 document glass. Upon actuation of a start button, or 18 suitable document sensing apparatus, the copy production 19 machine produces a given number of copies in accordance with the operator-inserted number in a control panel of 21 the copier. Upon completion of the copies automatically 22 produced, the copy prod7ction machine would stop. -23 However, in some instances a semiautomatic document 24 feed (SADF) enables an operator to provide a succession ~ -of original documents in a semiautomatic mode to a 26 document glass. In such instances the copy production 27 machine senses the presence of an additional original 28 document and then automatically restarts for making a ' Bo976023 - 2 -1 second run. A succession of related original documents 2 can be conveniently termed as a copy job; i.e., an 3 operator wants to produce a given number of copies of 4 a given number of original documents. Accordingly, each copy job is characterized by one or more copy 6 runs.
7 Some copy production machines have what is 8 termed automatic document feed; i.e., the machine will 9 automatically handle original documents for providing collated sets without collating the produced copies.
11 In such a situation a copy job includes a plurality of 12 successive runs producing a plurality of sets of docu-13 ments. As used herein the term set of documents is 14 referred to as a subjob to be separated by a separation sheet, for example. Accordingly, when an automatic 16 document feed handles original documents on the behalf 17 of a copy production machine, a sub~ob is considered as 18 a complete job for the copy production machine. The 19 automatic document feed th~n ties a succession of these copy production machine jobs into a complete copy 21 producing job as defined in the automatic document 22 feed.
23 Further copy production machines have usually 24 a plurality of copy paper sources. Such plurality of copy paper sources are usually referred to as the main 26 supply and as the auxiliary supply. Generally the main 27 supply has a capability of storing greater number of 28 copy sheets than the auxiliary supply. By operator BO976023 _ 3 _ 1 selection the copy production machine will select copy 2 sheets from either of the copy sheet supplies. In some 3 machines a roll of paper provides a source of copy 4 sheets. Along these lines, a plurality of rolls may be provided or combination of rolls and precut sheets of 6 copy paper may be utilized as a plurality of sources of 7 copy paper.
8 One feature of copy production machines is g that collators for collating produced copies can be attached to such machines. Such collating apparatus is 11 usually quite expensive. Accordingly, it is desired in 12 order to control cost, to minimize the size of the 13 attached collator. When the collator has reduced size, 14 the copy producing capability of the copy production lS machine may be limited by the collator capacity. Also, 16 it may be desired to not have a collator, which often 17 occurs in a relatively small office where the number of 18 collated copies is a minor requirement.
19 What is desired for operator convenience is 20 to enable the copy production machine to produce as 21 many copy jobs as possible without intervention by the 22 ~ operator; i.e., the operator removes produced copies 23 from the output portion of the copy production machine.
24 Summary of the Invention - . .
?5 It is an object of the invention to provide an enhanced separation mode for use in copy production 27 machines.

' '.
B0976023 - 4 _ ~

., 1 It is another object to provide means for 2 extending collator capacity by using automatic controls 3 in connection with separation mode.
4 A copy production machine is constructed in accordance with the present invention includes means 6 for indicating a standby or copy producing mode, means 7 indicating a desired end of run indicator and means 8 responsive to the two indicators to initiate a separation 9 mode run. Separation mode run is characterized by placing a single copy separation sheet in each copy 11 receiving bin which receives a produced copy during 12 either the immediately preceding copy run or the 13 immediately following copy run. When a collator is 14 employed, the number of bins selected in the collator for receiving separation sheets is in accordance with 16 the numbar of copies selected for production by the 17 operator.
18 When the copy production machine has a plural- ;
19 ity of copy paper suppiy sources it is preferred that -the copy be produced from one source and the copy 21 separation sheets be acquired from a second source. By 22 proper selection of the copy production machine both 23 the copy paper for producing copies and the copy separa-24 tion sheets may be selected from the same source.
In copy production machines having a plurality 26 of copy paper sources, each source may have a different 27 size copy paper. Control means monitor the diversity 28 of paper sizes. If predetermined paper size differences 2~ occur the separation mode is inhibited.

sos760:23 -- s --1 The arrangement is preferably such that 2 either one separation sheet may be provided between two 3 successive jobs or a plurality of separation sheets may 4 be provided. Fully automatic means can be utilized for programming the operation of the copy production machines 6 in accordance with the invention.
7 Copy jobs requiring a greater capacity of a 8 connected collator are performed by segmenting the job 9 into segments related to the capacity of the collator.
Then by repeating the segments separated by a separation 11 sheet an entire collate copy production ]ob is performed 12 with a minimal operator inconvenience.
13 For efficient collation, a number of separator 14 sheets equal to the number of sets yet to be collated in the next succeeding collating segments are supplied, 16 one to each of predetermined bins. Subsequently, 17 collated sets are directed to those predetermined bins 18 on top of such separator sheets.
l9 The foregoing and other objects, features and 20 advantages of the invention will be apparent from the 21 following more particular description of preferred 22 embodiments of the invention, as illustrated in the 23 accompanying drawings.
24 The Drawin~s FIGURE 1 is a combined schematic and diagram-26 matic showing of a copy production machine employing 27 the present invention and accentuating certain control 28 circuits for implementing the invention.

1 FIGURE 2 is a diagrammatic showing of control 2 circuits and associated hardware for implementing the 3 separation mode of the present invention in one embodi-4 ment.
FIGURE 3 is a dia~rammatic showing of a last 6 copy detector usable with the present invention for 7 indicating a change between copy producing and standby 8 machine modes.
9 FIGURE 4 is a block diagram of a control 10 system employing a programmable processor usable in 11 connection with the present invention.
12 FIGURE 5 is a diagrammatic showing of the bus 13 control connections for the FIGURE 4 illustrated processor 14 control system.
FIGURE 6 is a diagrammatic showing of a 1~ programmable processor data flow usable in the FIGURE 4 17 illustrated processor control system.
18 FIGURES 7 and ~ are charts showing instruction 19 execution sequencing of the FIGURE 6 illustrated program~
20 mable processor.
21 FIGURE 9 is a block diagram of a memory 22 addressing system for use with the FIGURE 4 illustrated 23 processor control system.
FIGURE 10 is a diagrammatic showing of regis-ter space assignments of the FIGURE 4 illustrated 26 processor control system.
27 FIGURE 11 diagramatically shows a preferred 28 embodiment of the present invention.

BO976023 7 _ 1 FIGURE 12 diagramatically illustrates program 2 segment calls for implementing the present invention in 3 a best mode.
4 FIGVRE 13 is a flow chart showing separation mode control procedures.
6 FIGURE 14 is a flow chart showing checking 7 paper sizes for copy production and separation.
8 FIGURES 15, 16 and 18 are flow charts showing 9 certain start procedures related to separation mode.
FIGURE 17 is a flow chart showing SADF checking 11 inhibits related to separation mode.
12 FIGURES 19 and 20 are flow charts showing 13 actions at EC0 time of a copy production machine relating 14 to separation mode.
FIGURES 21-23 are flow charts showing timed 16 machine actions relating to separation mode.
17 FIGURE 24 is a flow chart showing certain 18 counting actions related to the separation mode at EC10 19 tima of the copy production machine.
FIGURE 25 is a flow chart showing certain 21 copy count controls related to separation mode imple-22 mented at EC16 time of the copy production machine.
23 FIGURE 26 is a flow chart showing certain 24 separation mode related functions performed after an end of a copy production run.
26 FIGURE 27 is a flow chart showing certain run 27 tie together functions which in combination with other 28 functions shown in other figures relate to doing a , .

-1 complete separation mode job by logically extending 2 collator capacity.
3 FIGURE 28 is a flow chart showing exhibiting 4 billing for separation and flush copy operations.
FIGURE 29 is a flow chart showing inhibiting ~ -6 edge controls during an auxiliary ~peration.
7 Detailed Description General g Referring now more particularly to the drawings, like numerals indlcate like parts and structural features 11 in the various diagrams. A copy production machine 10 12 employing a first version of the present invention 13 includes a semiautomatic document feed (SADF) 11 for 14 feeding manually inserted original documents to be copied. The document glass (not shown) in SADF 11 is 16 scanned by known optical scanners in original input 17 optics 12 to provide an illuminated image over path 23 18 to a later described copy production portion 13. Copy 19 production portion 13 transfers the line 23 indicated optical image to copy paper as will be later described, 21 and supplies the produced copies to output portion 14 22 for pick up by an operator or for automatic transfer to 23 other utilization apparatus (not shown~. In a constructed 24 version of the invention output portion 14 includes a copy output tray 14A which receives all produced copies ~6 in a so-called noncollate mode. When the copy production 27 machine 10 is to be used in an environment requiring 28 automatic collation, a collator 14B is included in BO976023 - 9 _ 1 output portion 14. When th~ number of copies to be 2 collated become relatively large, a second collator 14C
3 is connected to the first collator 14B in tandem for - 4 receiving copies to be collated.
In accordance with the present invention, 6 control means are provided in the copy production 7 machine 10 for automatically or semiautomatically 8 inserting copy separation sheets from copy production 9 portion 13 and inserting same between copies of success-ive jobs in output portion 14. This action includes 11 selectively supplying copy separation sheets to copy 12 exit tray 14A and to a selected number of copy receiving 13 bins in collators 14B, 14C. In the latter regard, if 14 ten copies are being made of each image then ten separa-tion sheets are provided to collator 14B. Similarly, 16 if 15 copies are being made then 15 copy separation 17 sheets are supplied. If it is desired to have a 18 plurality of copy separation sheets between two 19 successive copy jobs then the copy production portion 13 is actuated to supply some plurality of copy separa-~1 tion sheets in the manner described for the single copy 22 separation sheet per copy bin. Further, if more copies 23 are to be produced than collator bins, then sequence 24 control circuits 53 keep a tally of copies produced for a given copy production job, as later detailed in the 26 section "LOGICAL EXTENSION OF COLLATOR CAPACITY USING
27 THE SEPARATION MODE."

BO~76023 - 10 -k~r L`V

1 The copy production machine 10 includes an 2 operator's control panel 52 having a plurality of 3 manually actuable switches for introducing copy produc-4 tion parameters to copy production portion 13. Such parameters are well known and are not detailed except 6 for those parameters arbitrarily having an operative 7 and direct relationship with a first constructed embodi-ment of the present invention.
g Before procesding further with the description of the invention, the operation of copy production 11 portion (CPP) 13 is described as a constructed embodiment 12 of a so-called xerographic copy production machine 10.
13 Photoconductor drum member 20 rotates in the direction 14 of the arrow past a plurality of xerographic processing stations. The first station 21 imposes either a positive lÇ or negative electrostatic charge on the surface of 17 photoconductor member 20. It is preferred that this 18 charge be a uniform elec~rostatic charge over a uniform 19 photoconductor surface. Such charging is done in the absence of light such that projected optical images, 21 indicated by dash line arrow 23, alter the electrostatic 22 charge on the photoconductor member in preparation for 23 image developing and transferring. The projected 24 optical image from original input optics 12 exposes the photoconductor surface in area 22. Light in the projected 26 image electrically discharges the surface areas of 27 photoconductor member 20 in accordance with lightness.
28 With minimal light reflected from the dark or printed 1 areas of an original document, for example, there is no 2 corresponding electrical discharge. As a result, an 3 electrostatic charge remains in those areas of the 4 photoconductive surface of member 20 corresponding to
-5 the dark or printed areas of an original document in
6 SADF 11 (semiautomatic document feed). This charge
7 pattern is termed a "latent" image on the photoconductor
8 surface. Interimage erase lamp 30E discharges photocon-
9 ductor member 20 outside defined image areas.
The next xerographic station is developer 24 11 which receives toner (ink) from toner supply 25 for 12 being deposited and retained on the photoconductive 13 surface still having an electrical charge. The developer 14 station receives the toner with an electrostatic charge of polarity opposite to that of the charged areas of 16 the photoconductive surface. Accordingly, the toner 17 particles adhere electrostatically to the charged 18 areas, but do not adhere to the discharged areas.
19 Hence, the photoconductive surace, after leaving station 24, has a toned image corresponding to the dark 21 and light areas of an original document in SADF 11.
22 Next, the latent image is transferred to copy 23 paper (not shown) in transfer station 26. The paper is 24 brought to the station 26 from an input paper path portion 27 via synchronizing input gate 28. In station 26 26, the copy paper (not shown) is brought into contact 27 with the toned image on the photoconductive surface 28 resulting in a transfer of the toner to the copy paper.

B~976023 - 12 - -3~4~

1 After such transfer, the sheet of image bearing copy 2 paper is stripped from the photoconductive surface for 3 transport along path 29. N~xt, the copy paper has the 4 electrostatically carried image fused thereon in fusing station 31 for creating a permanent image on the copy 6 paper. During such processing, the copy paper receives 7 electrostatic charges which can have an adverse affect 8 on copy handling. Accordingly, the copy paper after 9 fusing is electrically discharged at station 32 before transfer to output portion 14.
11 Returning now to the photoconductor member 12 20, after the image area on member 20 leaves transfer 13 station 26, there is a certain amount of residual toner 14 on the photoconductive surfa~e. Accordingly, cleaner station 30 has a rotating cleaning brush (not shown) to 16 remove the residual toner for cleaning the image area 17 in preparation for receiving the next image projected 18 by original input optics 12. The cycle then repeats by 19 charging the just-cleaned image area by charging station 2021.
21 The production of simplex copies or the first 22 side of duplexing copies by portion 13 includes trans-23 ferring a blank sheet of paper from blank paper supply 35, thence to transfer station 26, fuser 31, and, when in the simplex mode, directly to the output copy portion 26 14. Blank paper supply 35 has an empty sensing switch 27 36 which inhibits operation of portion 13 in a known 28 manner whenever supply 35 is out of paper.

-hiD

1 When in the duplex mode, duplex diversion 2 gate 42 is actuated by sequence control circuits 53 to 3 the upward position for deflecting single image copies 4 to travel over path 43 to the interim storage unit 40.
Here, the partially produced duplex copies (image on 6 one side only) reside waiting for the next subsequent 7 single image copy producing run in which the copies 8 receive the second image. Copies residing in interim g storage unit 40 constitute an intermediate copy produc-tion state. Instead of gate 42, the paper path portion 11 at 42 can be moved for directing sheets to interim 12 storage unit 40. ~ -13 In the next successive single image run, 14 initiated by inserting a document into SADF 11, the copies are removed one at a time from the interim 16 storage unit 40, transported over path 44, thence to 17 input path 27 for receiving a second image, as previously 18 described. The two image duplex copies are then trans- ~ -19 ferred into output copy por~ion 14. Switch 41 of interim storage unit 40 detects whether or not there 21 are any copies or paper in interim storage unit 40. If 22 so, an intermediate copy production state signal is 23 supplied over line 45 to later described sequence 24 control- circuits 53.
The copy production machine 10 control panel 26 52 having a plurality of lights and switches (most not 27 shown) is connected to sequence control circuits 53 28 which operate the entire copy production machine 10 , :, - - ' 1 synchronously with respect to the movement of the photo-2 conductor member 20. Billing meter M counts images pro-3 cessed for billing purposes. For example, paper release 4 gate 28 is actuated synchronously with the image areas moving past developer station 24. Such controls are well 6 known in the art and are not detailed here for purposes of 7 brevity.
8 CPP 13 also has second or alternate copy paper 9 supply 54 which supplies copy paper to input path 27 via paper path 55. Selection of paper supply 35 or 54 as a copy 11 paper source is controlled from panel 52 by actuation of 12 switches 56 labelled FIRST or SECOND paper supply. Selection 13 is mutually exclusive. Control circuits 53 respond to 14 switches 56 to actuate paper picker (not shown) in the respective copy paper supplies 35, 54 in a usual manner.
16 Separation Mode Basic Operations 17 EIGURE 1 also includes circuits brought out for 18 accentuation, showing inc~rporation of a separation 19 mode control in the illustrated copy production machine
10. Control panel 52 includes separation mode selection 21 switch 57 which, when depressed, actuates separation 22 mode SM trigger 58 to an opposite state from its present 23 state. Normally SM 58 is in the reset state indicating 24 no separation sheets are to be provided at the end or beginning of a copy producing run. In addition to 26 switch 57 SM 58 may be set by computerized control ~not 27 shown) at its set input S via line 58A. When SM 58 is l se~ to the separation indicating state, it supplies an 2 activating signal to AO circuit 59 for actuating cPP 13 3 to supply one or more copy separation sheets to output 4 portion 14. In this regard, the Al input portion of AO
59 responds to SM 58 being set to the active condition, 6 to a noncollate indicating signal received from sequence 7 control circuits 53 over a line 53E indicating end of a 8 copy run (last copy), and to a compare equal signal 9 from compare circuit 60 to supply a separation mode initiating signal over line 62 to AND circuits 63, 64.
ll Therefore, the Al input portion initiates a separation 12 mode run at the end of a copy run. In a similar manner, 13 the A2 input portion of AO 59 responds to a start or 14 beginning of run signal received over line 53S from control circuits 53, to the SM 58 signal and the compare 16 circuit 60 signal to supply a separation mode actuating 17 signal over line 62. This latter A2 signal starts a 18 separation mode at the beginning of a copy run.
19 AND circuit 63 supplies a noncollate, separa-tion mode actuating signal to control circuits 53 over 21 line 63A. Whenever AND circuit 63 is receiving a 22 noncollate indicating signal over line 53N from control 23 circuit 53 AND 63 responds to the line 62 signal to 24 initiate the separation mode. Similarly, AND circuit 64 responds to a collate indicating signal received 26 over line 53C from control circuits 53 and the line 62 27 signal to supply a collate type separation mode actuating 28 signal over line 64A to control circuits 53. OR

g~ :
:
1 circuit 65 combines the separation mode actuating 2 signals to reset SM 58 via AND circuit 65A at the end 3 of each separation mode run; i.e., deselect separation 4 mode. OR circuit 65B combines the just described reset signal with a later described inhibit signal. In this 6 particular arrangement, the operator selects one separa-7 tion sheet per actuation of separation mode switch 57.
8 Further, SM 58 is reset by signals from control circuits 9 53, such as by a timeout timer actuated when the copy production machine is in a standby mode, the stop
11 button is depressed, reset button is depressed, and the
12 like. The separation mode is indicated on panel 52 by
13 a light integral with switch 57 and actuated by a
14 separation mode indicating signal from SM 58.
Line 63A signal, noncollate separa~ion mode, 16 actuates se~uence control circuits 53 to cause CPP 13 17 to supply one copy separation sheet without image 18 transfer to copy exit tray 14A. Upon completion of 19 such transfer copy production machine 10 is ready for the next copy producing run. Similarly, line 64A
21 signals actuate sequence control circuits 53 to have 22 CPP 13 provide a plurality of copy separation sheets to 23 collators 14B, 14C in accordance with the number of 24 copies selected to be produced; i.e., each bin in the collators 14B, 14C having received produced copies or 26 which will receive produced copies from CPP 13 will 27 receive each one copy separation sheet per actuation of `~ 28 separation mode button 57.
~ .

~ ~ J

1 When copy production machine 10 is producing 2 copies, while button 57 is depressed, as machine 10 3 detects last copy a separation mode run is automatically 4 invoked as above described. If, however, button 57 is not depressed until copy production machine 10 is in the standby mode (intermediate successive copy producing 7 runs) then upon starting a copy producing mode, as by 8 insertion of a document into SADF 11, CPP 13 will first 9 provide a copy separation sheet as above described before producing any copies from the original document 11 in SADF 11.
12 In certain areas of the world paper sizes 13 vary so substantially that a paper transport path 14 usually does not accommodate dif~erent sizes. In such situations separation mode is inhibited whenever the 16 alternate or second paper supply 54 has such a different 17 size but permitted when the sizes are compatible.
18 Compare circuit 60 indicates to AO 59 whether 19 or not the size of paper supplies 35 and 54 are compatible or have predetermined differences preventing paper path 21 operation. Copy production machine 10 may be used in 22 many nations which use these different size papers.
23 Within reason different sized copy paper can be used ~4 efficiently for copy separation sheets. For example, USA letter size 8.5 x 11.0 inches is similar to DIN A4 26 size paper such that they could be used interchangeably 27 for copy separation sheets and copy producing sheets.
28 Similarly, USA legal sizes 8.5 x 13.0 inches or 8.5 x 29 14.0 inches are similarly suited for interchange with -1 copy produclng and copy separation sheets. However, 2 DIN size B4 has a much greater width than the letter, 3 legal, and DIN A4 sizes; therefore, copy transport path 4 characteristics are usually substantially different and therefore copy separation sheets of B4 size would not 6 be suitable for separating A4 size paper in most copy 7 producing machines. Accordingly, if compare 60 senses 8 A4 paper in supply 35 and B4 paper in supply 54, the 9 separation mode is inhibited by a disable signal supplied to AO 59 by ~ompare 60. The compare output also resets 11 SM 58.
12 In a constructed embodiment, the copier 13 separation sheets were transported from second supply 14 54 via path 55, 27, 29 then to output portion 14. In -each such transfer, copy producti o~ operations of CPP
16 13 were inhibited during such transfers as will be 17 explained with respect to illustration of the separation 18 mode as incorporated in ~he copy production machine 10.
19 In a duplex mode of operation, separation sheets are never directed to interim storage unit 40.
21 Operation of a separation mode for copy 22 production machine 10 is best understood from FIGURE 2.
: 23 The separation mode signals on lines 63A, 64A respectively : 24 set GET ONE latch 70 or GET SELECT latch 71. Latch 70 actuates copy production machine 10 to transfer one 26 copy separation sheet from CPP 13 second paper supply 27 54 to output portion 14 while latch 71 actuates CPP 13 ~.
28 to supply a number o~ such copy separation sheets 1~14~1'~iD

1 indicated by copy select register 72 to output portion 2 14. Latches 70, 71 start copy production machine 10 3 via its usual starting circuits, including start latch 4 76. OR circuit 77 passes the latch 70, 71 active signals to the set input of start latch 76. OR circuit 6 77A receives this signal plus other signals for activating 7 start latch 76. Start latch 76, in addition to the functions performed in the illustrated figure, also 9 enables power to be applied to CPP 13 of the copy production machine 10. Repowering copy production 11 machine 10 includes activating power relay PR of U.S.
12 patent 3,588,242 which is relay 74 of this application, 13 for example. CPP 13 may be controlled as described in --14 3,588,242. For enabling repowering, an activating signal is supplied by start latch 76 over line 76A to 16 other portions 78 of the document reproduction ~achine 17 10. Other portions 78 represent the xerographic processing 18 stations 21, 24, 30, 30E and 26 of Fig. 1 and associated 19 with the photoconductor of copy drum 20, as described in U.S. patent 3,588,242. It is also to be understood 21 that other portions 78 may have interactions not described 22 herein or in patent 3,588,242.
23 Start latch 76 also supplies an activating 2~ signal over line 76B for setting run latch 73 to the active condition. Run latch 73, in turn, powers motor 26 control relay 74 (equivalent to PR of 3,588,242, supra) 27 to close a pair of normally open contacts 75. These 28 contacts 75 provide ground reference potential through * issued June 28, 1971 and assigned to International Business Machines Corporation.

1 other switches 75A, such as shown in FIGURE 9 of 3,588,242, 2 for energizing motor 20A to rotate copy drum 20 and 3 power other mechanical portions of the document reprodllc-4 tion machine 10. Other mechanical portions are included in the diagrammatic representation 78. Motor 20A of 6 the present application corresponds to motor 12 of FIGURE
7 9 of 3,588,242. Additionally, start latch 76 also 8 enables AND circuit 80 for passing copy cycle indicating 9 signals (later described) for inserting indicating signals into shift register 81 for controlling the copy 11 separation mode, as will become more apparent.
12 Timing circuits 82 provide synchronized and 13 nonsynchronized timing signals for operating the document 14 reproduction machine 10. These timing signals are provided to other portions 78, as well as the illustrated 16 circuits. The AC power supply, indicated by terminals 17 82A, actuates timing circuits 82 to generate a plurality 18 of timing signals in synchronism with the power frequency.
19 Terminals 82A also supply AC power to motor 20A.
Additionally, timing signals synchronous with the 21 reproduction process are derived from emitter wheel 46 22 on copy drum motor 46. Emitter wheel 20B fiducial 23 mark signals, i.e., representing image cycles o~ copy 4 drum 20, are supplied over line 83 to timing circuits 82. As a result, timing circuits 82 generate a copy 26 cycle initiating timing signal supplied over line 84.
27 In addition to synchronizing other portions 78 to the 28 copy drum 20 rotation, the image cycle indicating 1 signal passes through AND circuit 80 to synchronously 2 insert binary ones in the low-order digit position of 3 shift register 81. As such, each binary one in shift 4 register 81 signifies a copy cycle of the document reproduction machine 10. SUCh binary ones in register 6 81, as will be later expla~ned, are used to terminate 7 the copy separation mode. Additionally, the copy cycle 8 indicating signals on line 84 travel through AND circuit 9 85 for incrementing copy counter 72A whenever the lowest digit position 0 of shift register 81 has a 11 binary one. Copy counter 72A is an electronic equivalent 12 of the relay copy counter 140 of U.S. patent 3,588,242.
13 Accordingly, copy counter 72A signifies the number of 14 copy cycles, or machine cycles, elapsed since start latch 76 was set to the active condition. To determine lh when the desired number of cycles (copies produced or 17 copy separation sheets transferred) has been completed, 18 compare circuit 87 receives signals from select register 19 72 and copy counter 72A for detecting equality. -Select register 72 is responsive to operator 21 control panel 52 via AND circuits 52A to indicate the 22 number of copies to be made of a given image usually on 23 an original document. When there is an equality, 24 compare circuit 87 removes a noncompare active signal from line 88 thereby disabling AND circuit 80 and -- -26 setting stop latch 100. This action inhibits a further 27 introduction of binary ones in the low-order state of 28 shift register 81, while conditioning the illustrated B~976023 - 22 -1 li~4~

1 circuits to terminate the copy separation mode or a 2 copy production run.
3 When a binary zero occurs in the low-order 4 stage of shift register 81, AND circuit 85 is disabled S thereby inhibiting further counting action of copy 6 counter 72A. As will become apparent, the binary one 7 in the low-order stage of shift regi~t~r æl is then 8 shifted toward the most significant stage three.
9 Eventually, the binary one is shifted out leaving the signal contents of shift register 81 equal to zero.
11 When this occurs and the stop latch 100 has been set, 12 the separation mode has been completed; i.e., all 13 sheets have left CPP 13. Decode circuit 90 responds to 14 an all-zeros condition of shift register 81 to supply a stop signal over line 91 via AND circuit 101 to reset 16 run latch 73 via OR circuit 92, as well as resetting 17 both separation mode latches 70, 71 and start latch 76.
18 Stop latch 100 being set conditions AND circuit 101 to 19 pass the line 91 stop signal. At this time~ a new copy run can ba initiated from panel 52; and normal operations 21 of the document reproduction machine 10 can ensue.
22 ~he signal contents of shift register 81 are 23 shifted to the right, as viewed in the figure, once 24 each copy cycle of drum 20. In this regard, timing circuits 82 provide a time delayed image-indicating 26 pulse over line 95 which follows the linP 84 pulse.
27 The line 95 signal shifts the signal contents of shift 28 register 81 to the right once each copy cycle, i.e., 29 once each half rotation of copy drum 20.

,. ~

1 The signal contents of shift register 81 2 cooperate with other portions 78 for controlling the 3 reproduction processes. In this regard, cable 96 4 carries signals from shift register 81 to other portions 78 for purposes beyond the scope of the present descrip-6 tion. Additionally, other machine functions are selec-7 tively activated by the shift register 81 signals via 8 AND circuits 97. AND circuits 97 respond to the separa-9 tion mode signal from OR 77 to pass the control signals over cable 98 to other portions 78. These separation 11 mode control signals disable certain reproduction 12 processes during the separation mode to inhibit any 13 image transfer to copy separation sheets. Those repro-14 duction processes disabled during the separation mode include the panel 52 displays except for a standby 16 indicating signal (not shown). Billing meter ~ is 17 disabled such that the user will not be charged for 18 operations during the separation mode. Also disabled i9 are the edge erase lamps (not shown), a document scanning lamp (not shown) is not illuminated, and interimage erase 21 (not shown) is not timed (remains on at all times to 22 erase the drum 20 photoconductor surfaces). The latter 23 inhibited function prevents the erase lamp from turning 24 off between image cycles during the copy separation mode.
Certain apparatus in other portions 78 which respond to 26 control circuit 53 supplied signals over cable 96 are 27 also inhibited during the separation mode.

~14 ~''~

1 During the copy separation mode, the copy 2 production machine 10 may be subjected to interruptions 3 of operation caused by someone opening a panel on the 4 machine (not shown) or the machine being placed in a maintenance or CE mode. In spite of such intended or 6 unintended interruptions, the copy separation mode 7 should be completed as originally contemplated. Accord-8 ingly, the illustrated circuits restart the machine in 9 the copy separation mode upon occurrence of any of the above-described interruptions. The interruptions of 11 the machine processing are processed by circuits 105. -12 For example, if a panel (not shown) is opened on the 13 machine 10, exposing high voltage to an operator, 14 everything must stop. To this end, an interlock signal -~
on line 106 signifies that all panels and doors are 16 properly closed. If any panel or door is opened, the 17 line 106 interlock signal is removed. When active, the 18 line 106 interlock signal passes through OR circuit 19 107, thence to inverter circuit 108, thence to AND
circuit 109. AND circuit 109 responds to the inverse 21 of the OR circuit 107 signal to pass a power derived 22 timing signal received over line 82B from timing circuits 23 82 to reset run latch 73 and also provides a tùrnoff 24 procedure to other portions 78, such as removing high voltage, but maintaining low voltage such that machine 26 state indications of the document reproduction machine 27 can be maintained. In this regard, copy separation 28 mode latches 70, 71 are not altered during such inter-29 ruption.

~0976023 - 25 -1 A second source of interruption is the main-2 tenance or CE mode. AND circuit 110 respond~ to a 3 maintenance or CE (customer engineer) mode being selected 4 and to a momentary run switch (MRS) (not shown) being depressed, as signified by the signal on line 111, to 6 pass an active signal through OR circuits 77A and 107.
7 If, during the maintenance mode, the MRS is opened, AND -8 circuit 110 removes the enabling signal thereby activating 9 AND circuit 109 to prevent operation of the document reproduction machine 10. Upon restoration of the 11 enabling signal at AND circuit 110, start latch 76 is 12 again set to the active condition. It must be remembered 13 that one of the copy separation latches 70, 71 was in 14 the set condition, providing an A~D circuit enabling signal via OR circuit 77. Start latch 76 being set 16 again sets run latch 73 and all procedures of the copy 17 separation mode are restored to the conditions immediately 18 prior to interruption. Start latch 76 being set resets 19 stop latch 100.
When run latch 73 is reset during an interrup-21 tion, shift register 81 has to start out again from the 22 lowest order digit position zero. ~o this end, timing 23 circuits 82 supply an AC power synchronous timing 24 signal over line 82B to AND circuit 113, which is enabled by run latch 73 being reset. AND circuit 113 26 then resets all stages of shift register 81 to the zero 27 condition.

. .

1 Additionally, during a copy separation mode, 2 it is desired that no si.gnals from panel 52 travel 3 through AND circuits 52A to select register 72. In 4 this regard, the start latch 76 supplies an activating signal to a standby circuit (not shown) which supplies 6 a display indicating standby for operator observation.
7 It also supplies a disabling signal preventing AND
8 circuits 52A from transferring any operator initiated g signalling to select register 72. The stop signal is acknowledged by means not shown.
11 The above-described separation mode circuits 12 operate in response to the GET SELECT latch 71 set to 13 the active condition for initiating transfer of a 14 number of copy separation sheets equal to the number of copies to be made in a next succeeding copy production 16 run from paper supply 54 through the illustrated paper 17 paths of FIGURE 1 into output portion 14 for the collators ~-18 14B and 14C. Not shown ~ut assumed is that the collate 19 mode has been selected as indicated by the signal on line 53C. The collatè control circuits are of usual 21 design and are not described herein for purposes of 22 brevity.
23 Accordingly, the copy separation sheets will .
24 be equal to the number of copies to be made in the next succeeding run in accordance with select register 72.
26 It should be noted Lhat SM 58 of FIGURE 1 being set 27 activates AND circuit 64 in response to the last copy 28 signal supplied over line 53E. Similarly, if the start 1 button (not shown) is depressed the signal of line 53S
2 establishes the separation mode in copy production 3 machine 10 for transferring copy separation sheets to 4 collators 14s, 14c. Accordingly, if SM 58 is triggered to the set state by closing switch 57 during a run, one 6 copy separation sheet will be supplied to each bin of 7 the collators 14B, 14C at the end of the run (termed a 8 trailing separate run). Redepressing the switch 57 and ~-9 then pushing the start button causes a second separation sheet to be transferred to the same number of ~ins;
11 i.e., copy select register 72 has maintained the copy 12 count selection. ~
13 For collating efficiency it is desired that 14 the collators 14B, 14C collate in both directions.
Such operations are described in said U.S. patent number 16 4,114,871, issued September 19, 1978 and commonly 17 assigned. An example is that the next succeeding collate 18 run is to produce five sets. If the collator had 19 previously had twenty sets collated, the automatic control still puts five separator sheets, preferably 21 in the top five collator bins, no ~imitation thereto 22 intended. Then the five succeeding sets are bidirect-23 ionally collated into the five top bins. After the 24 five sets are collated, twenty separator sheets can be added. If such twenty additional separator sheets 26 are not desired, then the original five separator sheets 27 are a minimum number of separator sheets to achieve 28 collator set separation.

.

1 When exit tray 14A is receiving copies in a 2 noncollate mode only one copy separation sheet should 3 be supplied to exit tray 14A for each depression of 4 button 57 which coincides with either the end of a copy run or the beginning of a copy run. To this end 6 the GET ONE latch 70 of FIGURE 2 disables AND circuits 7 72B preventing the signals from select register 72 from 8 reaching compare circuits 87. Simultaneously, the GET
9 ONE latch 70 signal goes to compare circuits 87 forcing a one copy selected signal. Accordingly, when copy 11 counter 72A equals one, compare circuit 87 then emits a 12 complete signal over line 88 for stopping the copy run 13 as aforestated for a single copy run indicated by 14 select register 72.
The selection of the source of paper from 16 supply 35 or supply 54 (FIGURE 1) is achieved from 17 panel 52 as shown in FIGURE 2. AND circuit 115 supplies 18 an actuating signal over line 116 to paper supply 35 19 for supplying paper in response to a panel 52 selection supplied over line 117. When the separation mode is 21 incorporated into the document production machine 10 22 the OR circuit 77 signal is inverted by inverter 118 to 23 inhibit AND circuit 115 during the separation mode.
~ .
~: 24 Simultaneously, the OR circuit 77 signal is supplied through OR circuit 119 to activate second supply 54.

26 Panel 52 also includes a switch (not shown) for supplying : 27 a second paper supply 54 selection signal over line 28 120A through OR circuit 119. Accordingly, when copies :

BO976023 . - 29 - :

. ' , , ~ .

1 are produced from paper supplied from supply 35, copy 2 separation sheets are supplied automatically from 3 second supply 54. However, when copies are being 4 produced from second supply 54 the separation sheets are also supplied from second supply 54. It can be 6 easily envisioned that other combinations and contro~s 7 can be effected for selected copy separation sheet 8 sources while successfully practicing the present 9 invention.
If the separation mode is selected the CE
11 mode depression of the MRS button as signified by the 12 signal on line 111 of FIGURE 2 will also activate the 13 separation mode circuits. The line 53S (FIGURE 1) 14 signal is supplied from OR circuit 77A of FIGURE 2 which sets start latch 76 to the active condition. An 16 AND circuit (not shown) can be interleaved in line 53S
17 for being inhibited during the CE mode or upon a 18 restart of latch 76 not initiated by the start button 19 as received by a signal over line 76E. In the alterna-tive, line 53S may receive signals only from line 76E.
21 In a SADF 11 machine, the line 76E start signals will ~ .
22 be either from insertion of the document to be copied 23 in SADF 11 or by actuation of a start button (not 24 shown) on panel 52.

Prior to institution of a separation mode, 26 copies residing in ISU 40 are automatically transported 27 to the output portion 14 as completed copies. In this 28 regard, the empty interim latch 84 is set to the active .

1$~

1 condition when a separation mode has been requested as 2 indicated by AO59 over line 62 and copies are in the 3 interim storage unit 40. Copies in unit 40 are indicated 4 by switch 41 being closed for enabling AND circuit 86 via line 45'. Additionally, empty interim latch 84 is 6 set to the active condition when copies arP in the 7 interim storage unit 40 and selection switch 93 either 8 selects the duplex mode or deselects the duplex mode.
9 Such mode change is signaled through OR circuit 85 to AND circuit 86.
11 When set to the active condition, empty 12 interim latch 84 output active signal passes through 13 AND circuit 89 during a "not-jam" condition as indicated 14 by the FIGURE 3 illustrated circuits over line 123A.
From AND circuit 89 the empty interim signal goes to 16 sequence control circuits 53 which then automatically 17 select the interim storage unit 40 as a source of copy 18 sheets; controls other-portions 78, as described later 19 with respect to FIGURE 2, for preventing image transfer;
and then automatically transfers copy sheets from 21 interim storage unit 40 to output portion 14. Switch 22 41 opening, i.e., when interim storage unit 40 is 23 empty, resets empty interim latch 84. This action 24 removes the empty interim signal from AND circuit 89 which in turn removes the signal being supplied to 26 sequence control circuits 53. At this time, sequence 27 control aircuits 53 know that the separation mode can 28 ensue. This condition is signaled by the same line .

1 from sequence control circuits 53 that actuates the 2 line 45'; which line goes to AND circuit 62A for passing 3 the line 62 separation mode signals to the pair of AND
4 circuits 63, 64, as previously described, for actuating the separation mode.
6 Separation mode trigger (SM) 58 is reset from 7 the active condition to the inactive condition by signals passing through OR circuit 65B. A first reset 9 occurs when comparator 60 in a "B4" type machine signals .. . . .
that copy sheets in second paper supply 54 are incompat-11 ible with the copy sheets in first paper supply 35.
12 This signal inhibits the separation mode. The second 13 reset signal for SM 58 comes at the end of a separation 14 mode run. AND circuit 65A responds to the output of OR
circuit 65, as previously described, and an "end of run"
16 indication from ~equence control circuits 53 to supply the 17 second reset signal.
18 The last copy signal on line 53E is generated 19 by the FIGURE 3 illustrated circuits. Detection of last copy is based on monitoring the copy sheet path 21 120. Path 120 is also monitored for jamming by jam 22 detection circuits 121 in combination with the copy 23 tracking circuits 122. Details and interconnections of 24 these circuits are omitted for brevity. Jam detection circuits 121 normally indicate a nonjam condition on 26 line 123 to CPP 13 permitting document reproduction 27 machine 10 to operate. Upon detecting a jam, the 28 signal on line 123 is changed by circuits 122 to stop 1 machine 10 interrupting copy production, thereby inhib-2 iting detection of a last copy. When stopped, all 3 circuits remain static. In a preferred form, copy 4 tracking circuits 122 consist of a shift register which receives a copy cycle signal over line 125 from CPP 13.
6 The line 124 copy cycle signal sets a stage of the 7 shift register (not shown) in circuits 122 to the 8 active condition. The active condition is then shifted 9 by a shift signal received over line 125 from CPP 13.
If copy tracking circuits 122 include an eight-stage 11 shift register and five copies or copy separation 12 sheets are being transported from CPP 13, then five 13 stages will have the active condition with the five 14 active conditions being shifted synchronously with the actual transport of the copies in copy separation 16 sheets in paper path 120 toward the indicated exits in 17 output portion 14. The active conditions of the shift 18 register (not shown) of copy tracking circuits 122 19 signify a desired paper copy transport status within path 120. Toward the end of a multiple copy run, only 21 those stages of the shift register (not shown) in copy 22 tracking circuits 122 at the terminal end of the shift 23 register (not shown) will be in the active state. For 24 example, in an eight-stage shift register, when the last two stages are in the active state and the preceding 26 six stages are in the inactive state, decode circuit 27 126 supplies an active or watch signal over line 127 28 signifying that the last copy of a multiple copy run ~ 'J~ ~

1 should be watched for to ensure early starting time of 2 the next succeeding copy run ~or a separation mode 3 run). The line 127 si~nal sets last-copy detector 4 condition (LCC) latch 128 to the active condition memorizing the watch signal for the remainder of the 6 immediate copy run. Latch 128 being in the active 7 condition partially enables the last-copy detector AND
8 circuit 129.
9 The paper path monitor, which is up/down counter 130, is incremented in the positive count 11 direction by signals from paper path detecting switch 12 131. As the copies or copy separation sheets are 13 transferred along paper path 120, exit switch 132 14 responds to trailing edges of exiting copies to supply a signal over line 133 for decrementing paper path 16 counter 130. Accordingly, the count at any time within 17 counter 130 signifies the number of copies being trans-18 ferred at that instant t~rough paper path 120. Decode 19 circuit 135 responds to paper path counter 130 having a zero count, or any other reference count, to supply an 21 active signal over line 136 signifying that paper path 22 120 is clear of copies. The line 136 active signal 23 additionally provides an enabling signal to last-copy 24 detector AND circuit 129.
The last copy or copy separation sheet now is 26 being transferred along one of the paper path branches 27 toward one of the exits 14A, 14B, 14C, each branch has 28 a switch 132 and 132A. Since only one exit is used at BO976023 _ 34 _ 1 a given time then any copy exiting will indicate the 2 last copy has left the machine 10. To this end, the 3 respective copy exit sensing switch 132A detects -the 4 trailing edge of the exiting copy. The trailing edge indicating output signals from switch 132A on line 137 6 actuates AND circuit 129 to the active condition. of 7 course, if the signals on line 136 and latch 128 are inactive, AND circuit 129 does not respond. When 9 actuated, AND circuit 129 immediately sets last-copy latch 140 which, in turn, supplies the memorized last-11 copy signal over line 141 as a "go" signal to CPP 13 12 and over line 53E to the separation circuit 59 of 13 FIGURE 1. In the collators 14B, 14C a switch (not 14 shown) in the sheet distributing carriages 14D, 14E
signal last copy.
16 Job Segment Connections 17 Using the above-described separation mode in 18 conjunction with the now ~o be described control circuits, 19 greater facility for collating sets of copies are provided. For example, the number of copies to be 21 produced as selected via panel 52 may exceed the collating 22 capacity of output portion 14. Nevertheless, the total 23 number of copies may still be selected and produced by 24 segmenting the production job. On the first run of set production a number of copy sets equal to collator 26 capacity is produced. After the last sheet was produced 27 of the last page of the first group of collated copy 28 sets, the separation button 57 is actuated. Then upon BO976023 _ 35 _ ,, . ~ . .

1 completing the last copy run, copy production machine 2 10 automatically provides a separation run as above 3 described. If only five more additional sets are 4 needed, then the number of separator sheets supplied by copy production machine 10 is five sheets; i.e., the 6 number of copies to be produced in the next succeeding 7 runs. Further, the automatic control circuits provide 8 for automatically selecting five copies to be produced, 9 for example. This is achieved by adding a subtractive accumulator 112 to the FIGURE 2 illustrated circuits.
11 The panel 52 selections are supplied over cable 114 to 12 the subtractive accumulator. In the collate mode a 13 collate signal supplied over line 61 from panel 52 to 14 select register 72 limits the selection to the collating capacity of copy production machine 10. Accordingly, 16 without operator intervention copy production machine 17 10 produces the first forty copies of a forty-five copy 18 set. Then during the production of the last sheet of 19 the first group of 40 collated copy sets, the operator actuates button 57 for selecting the separate mode.
21 Since collate has been selected, the get select latch 22 71 is set to the active condition. At the end o~ the 23 last copy production run of the first group of collated 2~ sets, the get select latch 71 actuatQs copy counter memory CCM 112A to memorize the previous copy count of 26 forty and also remember that latch 71 had been set to 27 the active condition. Further, subtractive accumulator 28 112 is actuated by the get select latch 71 to subtract 1 forty from the initial selection of forty-five ~nd 2 transmit five over cable 117A to select register 72.
3 Then the operator can insert more copies in SADF 11 and 4 produce the last five copies as a second group of collated copy sets. All five sets will be separated 6 from the previous sets by separator sheets with a 7 minimal number of separator sheets used. Further, 8 memory CCM 112A indicates that forty sets had been 9 collated. Further, AND circuits 102 respond to the start signal from latch 76 to indicate to copy counter ll 72A for display on a panel 52 contents of CCM plus the 12 count of counter 72A. In this way the operator sees 13 copies 41-45 being produced during the second group of 14 collated sets. Alternatively, subtractive accumulator 112 may supply signals to panel 52 for indicating the 16 number of sets yet to be produced.
17 In the above-described manner all counting 18 and figuring is automatically performed by the copy 19 production machine adding to operator convenience. By limiting the number of separator sheets to the number 21 of copies in a next succeeding run or runs, collator 22 efficiency is enhancPd. That is, if the number of 23 copies produced in the preceding run were used to 2~ indicate the number of separator sheets, then twenty separator sheets will be used. This means the traveling 26 vane in the collator would have to travel the entire 27 height of each collator bin. On the other hand, if 28 less than collator capacity is to be produced, for 1 example five, then only five bins will be traversed.
2 On the next succeeding run, the traveling vane is 3 already at the fifth bin. It then can start collating 4 upwardly without having any wasted travel to the desired collating position. Further, the number of separator 6 sheets being keyed to the succeeding run will indicate 7 to the operator the number of sets that will be produced 8 in the next succeeding copy production runs.
g Copy production machine 10 may have several original document sources which can be automatically, 11 semiautomatically, or manually processed for copy 12 production. In the automatic and semiautomatic feed, 13 the "go" signal on line 141 (FIGURE 3) activates the 14 feeding mechanism (not shown) for moving the o~iginal to a copy-making position which then institutes the 16 next succeeding copy reproduction run. CPP 13, in 17 receiving the "go" signal on line 141, begins its next 18 run by preparing the FIGURE 3 illustrated detection 19 circuit for detecting the end of that next succeeding run. In this regard, an active signal from CPP 13 21 travels over line 142 resetting counter 130, copy 22 tracking circuits 122, and latches 128 and 140.
23 Copy tracking circuits 122 may include an 24 up/down counter in a manner similar to paper path counter 130. It is preferred that the methodology of 26 last copy detection, rather than being carried out by 27 the illustrated circuits, be carried out by a micropro-28 grammable processor as later described wherein the ~ f~ ~

1 paper path counter 130 is a programmed up/down count 2 field, copy tracking circuits 122 constitute a computer 3 program, and the latches 128 and 140 are stages either 4 in memory (local store) or special registers within a register group (not shown).
6 All of the above-described circuits show a 7 relatively simple application of the present invention.
8 The more productive and valuable aspects are best 9 achieved in a copy production machine 10 by a programmable controller wherein all logic decisions are computer 11 program determined rather than hardware logic circuit 12 determined. Before describing the programmable controller 13 embodiment of the present invention, a processor control 14 system usable as a programmable controller for sequence control circuits 53 is first described. It is understood 16 that the above-described circuits are replaced by a 17 computer program, as will become apparent.
18 Processor Control System . . . _ . . , 19 Sequence control circuits 53 preferably include a programmable computer control system as shown 21 in FIGURE 4. The programmable control 53A includes a 22 programmable single chip microprocessor CMP 170 operating based upon a set of control programs contained in ROS
24 control store 171, and uses working store or memory 172 as a ~ain or working store. CMP 170 communicates with 26 the other units of circuits 53A as well as CPP 13, SADF
27 11, output portion 14 and control panel 52, as later 28 discussed, via the input registers 173 and output BO976023 - 39 _ , ~
.".~ ~, . . .
. . .

1 registers 174. In a preferred constructed embodiment, 2 IO bus is eight bits wide (one character) plus parity.
3 Address signals selecting which units are to send or 4 receive signals with respect to CMP 170, as well as the other units, are provided by CMP 170 over 16 bit wide 6 address bus ADF. A nonvolatile store CMOS 175 is a 7 battery 175B powered semiconductor memory using CMOS
8 construction. A clock 176 supplies later described g timing signals to units 170-175.
Referring next to FIGURE 5, the logical 11 interconnections between microprocessor 170 with con-12 trolled units 171-175 are shown. All of the signals on the 13 busses and individual control lines go to all units 14 with the ADC signals selecting which controlled unit 171-175 is to respond for either receiving data signals 16 or supplying data signals, respectively, are bus IO.
17 Control line I/O indicates whether CMP 170 is supplying 18 or receiving signals in bus IO. When the I/O line has 19 a binary one indicating signal data or instruction signals are to be transferred to the microprocessor 170 21 over IO while when it is a binary zero microprocessor 22 170 supplies data signals over IO. Write line WRT
23 indicates to memory 172 that signals are to be recorded 24 in the memory. The IIP line, the signal IIP indicates interrupt in process, i.e., the microprocessor 170 26 program has been interrupted and microprocessor 170 is 27 handling that interrupt. I is interrupt, SDL (data 28 latch) is received from system clock 176, and means :

, 41~1~

1 data signals from IO are to be latched in microprocessor 2 170. The line SK means sliver-killer which is a control 3 signal for eliminating extraneous signals commonly 4 referred to as slivers. These so-called signals result in interaction between successively actuated bistable 6 circuits termed latches. Other timing signals for 7 coordinating operation of all of the units 171-175 are 8 received from system eloek 176. Additionally, power on g reset eircuit POR aetivates system clock 75 to send out timing signals and control signals for resetting all of 11 the units 170-175 to a reference state as is well known 12 in the computer arts.
13 The Mieroprocessor 170 14 Referring next to FIGURE 6, the data flow of mieroproeessor 170 is detailed. The sequence eontrol 16 eireuits 180 are those logie eireuits designed to 17 implement the now to be deseribed functions performable 18 in the timing context of t-he following description.
19 Sueh sequence eontrol circuits SCC 180 inelude instrue-tion deeoders, memory latehes and the like, for sequencing 21 the operation of the FIGURE 6 illustrated data-flow ` 22 eireuits, using a two-phase clock, 01, 02 from clock 23 176. The proeessor contains an eight-bit wide (one-24 eharaeter wide) arithmetie and logie unit ALU 181. ALU
181 receives signals to be combined during a 02 and 26 supplies statie output signals over ALU output bus 182 27 during eaeh phase 1. Operatively associated with ALU
`~ 28 181 is a 16-bit accumulator eonsisting of two registers, Bo976023 - 41 -~44~1~

1 a low register ACL 183 which has its output connections 2 over 8-bit wide bus 184 as one input to ALU 181. The 3 second register of the accumulator is ACH register 185.
4 When the microprocessor 170 operates with a two-character wide or two-byte wide word, the functions of ACL 183 6 and ACH 185 alternate. That is, in a first portion of 7 the operation, which requires two complete microprocessor 8 170 cycles, as later described, ACL 183 contains the 9 lower order eight bits of a 16-bit wide word, while ACH -185 contains the upper eight bits of the 16-bit wide 11 word. ALU 181 first operates on the lower eight bits 12 received over ACL bus 184 and supplies the result 13 signals over ALU output bus 182 to DB register 186.
14 During this same transferring action, ACH 185 is supply-ing the upper 8 bits through DO register 187, thence 16 over DO bus 188 to ACL 183. During the next ALU cycle, 17 the upper eight bits are operated upon. In the preferred 18 and constructed embodiment, ALU 181 operates with two's 19 complement notation and can perform either eight-bit wide or 16 bit-wide arithmetic as above described.
21 Eight-bit wide logical operations are also performed.
.
1 22 A$U 181 contains three indicating latches ¦~ 23 ~not shown) which memorize the results of arithmetic 24 and logical functions for use in later processor cycles, 'l 25 such as conditional jumps or branches, and so-called ¦ ~ 26 input carry instructions. These three indicators are 27 low, equal (EQ), and carry. Utilization of these 28 indicators will be better understood by continued ~Og76023 - 42 -V ~

1 reading of the specification. Processor sequence 2 control circuits 180 can entertain a single level of 3 interrupt and includes an internal interrupt mask 4 register (not shown) for disabling lnterrupts as is well known in the computer arts. The low order bits of 6 the address signals supplied to bus ADS by the ALH
7 register 190 (high order bits of the address) and ALL
8 register 191 (the low order eight bits of the address) 9 are denominated as work registers. These registers are divided into 16 groups of 16, two-byte wide, logical 11 registers. A portion of ALL register 191 supplies GP
12 signals for selecting which groups of registers are 13 accessible by microprocessor 170.
14 As will be later detailed, microprocessor 170 requires two processor cycles for processing an I/O
16 instruction. The first cycle is a set-up cycle while 17 the second cycle is a data transfer cycle. When an I/O
18 operation requires a transfer of a s~ccession of bytes, 19 then the first cycle sets up a unit 171-i75 for trans-ferring a plurality of bytes such that the I/O operation 21 appears as a set-up cycle followed by a plurality of 22 data transfer cycles. The microprocessor 170 is designed 23 to operate with a plurality of relatively slow acting 24 devices; i.e., copy production machine 10. The time -required for the microprocessor 170 to perform its ~6 f~nctions is relatively small compared to the time 27 required by the controlled devices. Accordingly, under .. . . . . . .

1~14~

1 clock 176 control, the microprocessor 170 can be effec-2 tively turned off to allow a controlled device to have 3 exclusive use of the IO bus.
4 From examination of FIGURE 6, it can be seen that all of the registers, being latches, will maintain 6 their respective signal states whenever the clock 7 phases, ~1 and ~2, are not supplied. Therefore, upon 8 an interruption of the microprocessor 170 functioning 9 by a controlled device 171-175, the signal state of the processor 170 enables it to begin operating again as if 11 there had been no interruption.
12 The other registers in the microprocessor 170 13 are described with the instructions set for facilitating 14 a better understanding of the interaction of these registers. The microprocessor employs instructions of 16 variable length, one, two or three bytes. The first 17 byte of any instruction always includes the operation 18 code, while succeeding bytes, numbered two or three, 19 contain address data or operand data, also referred to as immediate data.
21 The fastest instruction execution requires 22 one microprocesRor cycle while the longest instruction 23 requires six processor cycles. An interrupt requires 24 ten cycles to process. In all designations, bit 0 is the least significant bit.
26 Instruction Reperto_re 27 The instruction repertoire is described in 28 groups of instructions, all of which have defined BO976023 - 44 _ . ~ , ..

1 instruction word formats. The instructions are defined 2 by the title, mnemonic, number of cycles required by 3 the microprocessor to execute the instruction, number 4 of operands (oP) and the number of bytes in the instruction word. Additionally, breakdown of the command structure 6 of the first byte is given.

8 Instruction Mnemonic Cycles OP Bytes 12 STORE STR 3 , 1 1 The instruction byte is divided into two 16 portions. The most significant four bits indicate the 17 instruction code, while the lower four bits indicate a 18 register within a group of 16 registers as the operand 19 source. All operations are taken to the accumulator 20 register. The Register Arithmetic is two-byte wide 21 arithmetic.

BYTE ARITHMETIC
2 InstructionMnemonic Cycles OP Bytes XOR XB 3 . 1 2 11 The most significant five bits of byte one of 12 the instruction indicate the instruction command, while 13 the lowermost three bits indicate one of eight registers~
14 The second byte indicates one of 256 byte addresses in memory to be used in the arithmetic; i.e., a difference 16 between the register arithmetic and the byte arithmetic 17 is that a byte arithmetic obtains the operand from 18 memory.
19 I~D!5EDIATE ARITHMETIC
InstructionMnemonic Cycles OP Bytes BOg76023 - 46 -1 The byte one format is the same as for byte 2 arithmetic with the second byte being the operand data.
3 In the last instruction, GROUP GI, the immediate data 4 selects the registers in the register group as will become apparent.

7 InstructionMnemonicCycles OPBytes ~ -8 ADD 1 Al 2 0 All eight bits of byte one are used to denote 16 the function to be performed. All operations are 17 conducted within the accumulator. TRANSPOSE instruc-18 tion TRA, swaps the high~and low order register contents 19 of accumulator registers 83 and 85.
INDIRECTS
21 Instruction Mnemonic Cycles OP Bytes 2 3 LOAD LN 4 1 1 . .
24 This is an indirect addressing set of instruc-tions wherein the uppermost five bits indicate the 26 function, while the lowermost three bits signify which 77 of eight registers are to contain the address in memory 28 to be accessed.

~ ~4~

2 Instruction Mnemonic Cycles OP Bytes The upper five bits of the instruction byte 6 indicate the function, while the lower three bits 7 indicate a register to be accessed as a mask for testing 8 the accumulator register.
g INPUT/OUTPUT
10 Instruction Mnemonic Cycles OP Bytes 13 The two instructions use the first byte as a 14 command and the second byte to address one of the 256
15 addresses on the busses, MI, DI, or IO.
16 BRANCHES
17 Instruction Mnemonic Cycles OP Bytes
18 JUMP J - 3
19 JUMP NOT EQUAL JNE 3/1 1 1 -~

21 BRANCH B 3 1 2 ~ -26 RETU~J RTN 5 1 The first three JUMP instructions are the 2 three most significant bits for indicating the function, 3 a fourth bit for indicating JUMP on plus or minus, and 4 the four lower order bits for indicating one of 16 registers. In one notation, the plus indication is a 6 binary zero while the minus indication is a binary 7 one.
8 In the branch instructions, except for the g BRANCH AND LINK, firstmost significant bits together with the lower two significant bits indicate the func-11 tions. The middle two bits indicate plus or minus 256 12 address positions or ignore. The BRANCH AND LINK, a 13 three-byte instruction, selects one of four registers 14 with the lower two bits of the command or first byte and uses the uppermost six bits as a functlon indicator.
16 The two bytes are a 15-bit address for the address bus 17 with the second byte being the eight low significant 18 bits and the third byte b~ing the seven more significant 19 bits~ The RETURN instruction is merely a one-byte
20 instruction having the same format as the BRANCH AND ~ .
21 LINK command byte. The interrupt is not an instruction,
22 but a single signal received over interrupt line I.
23 ALU Condition Codes
24 The table below indicates the condition code in the ALU low, equal (EQ), or carry set as a result of 26 the executed class of instructions as set forth in the 27 table below.

~ o o R Q ~ ~ Q
O O ~
,C O
J--rl J ~ a a E~ ~ R
o o ~a ~rl rl ~ ~a ~ ~ ~ ~a o ~/
h h O S S ~ au a) aJ a3 0 h tJ~
h h h S ~ ~ ~ S ~ h G Q
h h h 0 3 a) 3 ~ U t~ t) h O,Y
C~ V ~ ~ 0 3 ~) U7 0s~
~1~1 0 o O O ~ ~ Y
o ~ ~ ~ O

O O ~ O ~ ~ ~ ~
o p; S~ ~ ~ O ~~ ~
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d ~ . a 0 ~ ~ h Ra) O O
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h ~
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rl tO ~ (~ rl a) 0R R M
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O
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~1 U 0l 0 0 0 rl O U O ~) ~ N rl ~I x ~ ~ X o Ql a u Il Q~ O ~ _I a) o .,, u~ ,4 ul u) u~ ~ u~0 0 co ~r u o E~ (a ~ h ~

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~ ~ ,~ 1 3 O ~ ~ ~ ~ h ~ O ~ h ~~J rl -IJ
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U ~ h ~ U ~1 0 a) U
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~J rl ~ ~1 ~I tJ~ O rl ~ O
1:: Q~ O ~ O tt H P~ m m u~ u~ * ~ ~ H H V

1 A JUMP instruction does not modify the accumu-2 lator 183, 185 or indicator bits whether taken or not.
3 The program counter has had one added to it since it 4 addressed the JUMP instruction. The program counter 192 includes PCL register 192A and PCH register 192B, 6 hereinafter referred to as counter 192. If taken, the 7 low four bits of the instruction first byte replace the 8 low four bits of the program counter 92 and the high 11 g bits are modified if necessary. The range of the instruction address change is -15 to +17 bytes measured 11 from the jump instruction address. If the destination 12 is within this range, it is only necessary to specify 13 the low four bits absolutely of the destination address 14 and a bit to describe which direction (zero for +2 to +17 or one for -15 to +0; the ~1 condition is not 16 realizable). The +l condition is not useful because -17 the processor goes to ~1 if the jump is not taken 18 (therefore, if it was va~id the processor would go to 19 +1 if the jump was taken or not).
In a BRANCH instruction, the program counter 21 192 has been incremented to point to the second byte of 22 the branch instruction word. The low eight bits absolute 23 of the destination program address are coded in the 24 data byte (second byte). A code which describes how to modify the high seven bits is coded into the instruction 26 byte to: leave the high seven bits the same, add one 27 to the high seven bits, or subtract one from the high 28 seven bits.

~~4~ ~

1 BRANCH EQUAL and BRANCH NOT EQUAL test only 2 the condition of the ALU 181 EQ indicator. sRANC~ NOT
3 LOW tests only the condition of the low indicator.
4 BRANCH HIG~ requires that bo~h the E~ and low indicators be off.
6 The BRANCH AND LINK instruction is an uncon-7 ditional branch that specifies the 16 bit absolute 8 branch address of the program destination and a two-bit 9 number indicating a register to be used. The address of the next executable instruction (following the BAL) -11 is stored in the register specified by the two byte 12 number.
13 INTERRUPT is not a programmable instruction 14 but is executed whenever the interrupt request line F
is activated by an external device and an interrupt 16 mask in STAT register 195 is equal to zero. Interrupt 17 stops the execution of the program between instructions, 18 reads the new status (register group, interrupt mask, 19 EQ, low, carry) from the high byte of Register 8, stores the old status in the low byte of Register 8, 21 stores the address of the next instruction to be performed 22 in Register 0, stores the accumulator in Register 23 (without altering the accumulator), and branches to the 24 address specified by the contents of Register 12. ThP
processor always specifies Register Group 0 for interrupt.
26 Interrupt requires ten processor cycles to complete.
27 Register groups will be later described.

~4~

1 RETURN iS an unconditional branch to a variable ; 2 address and can be used in conjunction with the BRANCH
3 AND LINK or to return to the main program after having 4 been interrupted. Two bytes are read from the register specified to define the absolute branch address. A
6 return using register 0 of register group 0 is defined 7 as a return from interrupt. In this case the new 8 status (EQ, low, carry, interrupt mask and register -9 group) is read from the low order byte of Register 8.
Arithmetic Group instructions operate with 11 the 16~bit accumulator 183, 185 ~nd eight-bit arithmetic-12 logic unit ALU 181 that are capable of performing 13 various arithmetic and logical operations. Three 14 condition indicators (low, EQ, carry) are set on the results of some operations. Two's complement 16-bit ~1 16 arithmetic is performed except for byte operations and 17 some immediate operations which are two's complement 18 eight-bit operations. ~.~he high order bit is the sign ~ 19 bit; negative numbers are indicated by a one in the l~ 20 sign bit position. Subtraction is accomplished by 21 two's complement addition. Any arithmetic operation 22 that results in a carry will set and carry latch even 23 though the accumulator may not be changed.
24 Double Byte Arlthmetic is performed with registers 0-15 of the current group for the ADD, SUBTRACT, ~ 26 LOAD and STORE instructions. LOAD/BUMP (add +l) uses ¦~1 27 registers 4-7 and registers 12-15. LOAD/DECREMENT uses 28 registers 0-3 and registers 8-11. In the ADD register BO976023 _ 53 _ , . . .

~ ...

1 and SUBTRACT register instructions, AR, SR, the 16 bits 2 of the addressed or specified register are added to or 3 subtracted from the accumulator and the result is 4 placed in the accumulator. EQ is set if the result is all zeroes. Low is set if the high order bit is a one.
6 LOAD register instruction LR loads 16 bit 7 signal contents of the specified register into the 8 accumulator 183, 185. The contents of the addressed g register are unchanged. The ALU 181 indicators are not altered. The STORE register instruction STR stores the 11 16-bit contents of the accumulator 183, 185 into the 12 specified register. The contents of the accumulator 13 183, 185 and the ALU 181 indicators are not altered.
14 In the LOAD/BUMP LRB, and LOAD/DECREMENT LRD
instructions, an absolute one is added to or subtracted 16 from the contents of the specified register, respectively.
17 The result is placed in the accumulator 183, 185 and the 18 specified register. The ~ndicators are updated as for 19 an add or subtract, AB, SB.
For the Byte Arithmetic instructions, bytes 21 0-511 of memory 64 are addressable by the Byte Arithmetic 22 instructions. The directly addressable memory 172 is 23 divided into two sections: bytes 0-255 are addressable when 24 register groups 0~7 are selected, while bytes 256-511 are addressable when register groups 8-15 are selected, 26 as will be later more fully described.

0976~23 _ 54 _ 1~4~V

1 In the instructions AB, SB, CB, LB and STB, the 2 eight-bit contents of the specified byte are added to, 3 subtracted from, compared wit~, loaded into, or stored from 4 the accumulator register AC~ 183, respectively. The high S order byte of the accumulator in ACH register 185 is not 6 disturbed. The ALU 181 condition indicators are set on the 7 result of the single byte arithmetic: add, subtract, and 8 compare. The results of all of the byte operations except 9 COMPARE CB and STORE STB are placed in the accumulator register 183. STORE alters the specified byte. COMPARE is 11 a subtract operation that does not alter the contents of the 12 accumulator 183, 185. ~yte arithmetic is eight-bit signed ~-13 arithmetic.
14 In the byte NB, OB and XB instructions, the specified byte is logically ANDed, ORed, or EXCLUSIVE-ORed 16 with the accumulator register 183 contents, respectively.
17 The result is kept in the accumulator register 183. The EQ
18 ALU 181 indicator is set:~
19 for the AND operation if the result of the AND
equals all zeros;
21 for the OR operation if the bits set by the OR
22 were all zeros;
23 for the EXCLUSIVE-OR operation if there is identity 24 between the byte and accumulator (result = all zeros). The low indicator is set:
26 for the AND operation if the preserved bits are 27 all ones;

~g~

1 for the EXCLUSIVE-OR operation if the byte 2 and accumulator are bit-for-bit opposites (result = all 3 ones). The logical AND can test the mask selected to 4 be all zeroes, all ones or mixed. The mask selected bits are indicated by ones in the corresponding positions 6 of the byte used as the mask. The logical AND tests 7 the bits that are preserved~ while the logical OR tests 8 the bits that are then set to one. If only one bit is g selected then the logical OR does a test bit and set.
The Immediate Arithmetic instructions AI, SI, 11 CI, LI, NI, OI and XI are the same as the byte operations 12 except that eight bits of immediate data are used ]3 instead of the contents of an addressed byte and the 14 ADD and SUBTRACT operations are 16-bit signed arithmetic rather than eight-bit signed.
16 The Immediate Arithmetic GROUP instruction GI
17 takes eight bits of immediate data to alter the contents 18 of the status indicator ~egister I95 to select register g groups and enable or inhibit interrupt. Low, EQ, and carry condition indicators in ALU 181 are not altered.
21 The immediate data (byte two) is divided into five 22 parts. Bits 0-3 are the new register group bits (new 23 register group i5 coded in binary). Bit 5 is the 24 command bit to put bits 0-3 into the internal register group buffer if the command bit is a zero. Bit 4 is 26 the new interrupt mask (a one masks out interrupts).
27 Bit 6 is the command bit to put bit 4 into the internal 28 interrupt mask if the aommand bit is a zero. Bit 7 is J~4~
1 an independent command bit causing the processor to 2 reset its interrupt request latch, if bit 7 is a zero.
3 The accumulator arithmetic instructions Al, 4 Sl, respectively add or subtract an absolute one to or from the contents of the accumulator 183, 185, and the 6 result is left in the accumulator 183, 185. This is 16-7 bit signed arithmetic and the ALU 181 condition indicators 8 are set on the result.
9 The accumulator instructions SHL and SHR
shift the signal contents of the accumulator 183, 185 11 left or right one digit position or binary place, 12 respectively. For SHIFT LEFT, the high order bit is 13 shifted into the carry latch (not shown) in ALU 181 and 14 a zero is shifted into the low order bit except when the previous instruction was an input carry. After an 16 input carry the carry latch condition before the shift 17 is shifted into the low order bit. For SHIFT RIGHT, 18 the low order bit is shifted into the carry latch, and 19 the state of the high order bit is maintained. When SHIFT RIGHT is preceded by input carry, the state of 21 the carry latch before the shift is shifted into accumu-22 lator 183, 185 bit 15. EQ condition indicator of ALU
23 181 is set if a zero is shifted to the carry latch.
24 Low condition indicator of ALU 181 is set if the resulting contents of the accumulator 183, 185 is all zeros.
26 The accumulatox instruction CLA clears the accumulator 183, 185 to all zeros. Transpose TRA
~8 exchanges the low order register 183 with the high .. .

1 order byte register 85 signal contents. The ALV 181 2 indicators are unchanged.
3 The accumulator instruction IC transfers the 4 signal state of signal contents of the carry latch to the low order bit of the arithmetic-logic unit 181 on 6 the next following instruction if the next instruction 7 is an ADD, SUBTRACT, LOAD/BUMP, LOAD/DECREMENT, SHIFT
8 LEFT, or COMPARE operation. Carry is inputted to bit 9 15 on a SHIFT RIGHT. Interrupt is inhibited by this instruction until the next instruction is performed.
11 The ALU 181 indicates low is reset and EQ is set if the 12 carry latch is a zero. If the input carry precedes any 13 instruction other than the ones mentioned above it will 14 have no effect on instruction execution. If the instruc-tion following the input carry changes the ALU 181 16 condition indicators, then the indicator information 17 from the input carry is destroyed.
18 The two indirect data transfer instructions 19 STN and LN can access registers 8-15. LOAD indirectly instruction accesses the specified reglster and uses 21 its contents as an addreas to fetch a byte of data and 22 load it into the low eight bits (register 183) of the 23 accumulator without disturbing the high eight bits 24 (register 185). STORE indirectly accesses the specified register and uses its contents as an address to store 26 the low eight bits of the accumulator register 183 into 27 the specified byte. The ALU 181 indicators are not 28 altered.

l The bit test or control instructions TR and 2 TP take a specified bit of the low order byte of the 3 accumulator register 183 for test. The ALU 181 condition 4 indicator EQ is set if the bit is a zero. Concurrently the bit is either reset or preserved in the accumulator, 6 respectively.
7 The INPUT/OUTPUT instructions, IN, OUT, 8 respectively transfer data to the accumulator register 9 183 from an I/O device (CPP 13, for example) and from the accumulator to an I/O device (CPP 13, for example).
ll These instructions are two cycle operations. The first 12 cycle puts the modified device code on the data out 13 lines, the second cycle is the actual data transfer 14 cycle; the low eight bits of the accumulator in register 183 are outputted to data in lines, and the device code 16 is outputted on the address lines ADC. An OUT instruc-17 tion does not change the ALU 181 indicators. On an IN
18 instruction, EQ is set~if the high order bit of the l9 - data inputted is a zero. Low is set if all other bits are zero. The INPUT/OUTPUT instructions can specify 21 256 devices each for data transfer. Generally, an I/O
22 device will require more than one device address to 23 specify different types of operations such as READ and . ~ :
24 TEST STATUS, etc.

-~ 25 A power on reset POR initialization places 26 the processor in the following state:

BO976023 - 59 _ 1~,3L~a~

1 Accumulator = 0 2 Registe~ Group = 0 3 Interrupt Mask = 1 4 Low, EQ, Carry = X (unknown) The microprocessor 170 will begin operation by reading 6 memory location 65,533.
7 Microprocessor Instruction Execution .
8 The processor 170 is pipelined to allow the memory 9 172 a full processor cycle for access time. To do this, the microprocessor 170 requests a read from 11 memory several cycles ahead of when it needs a data 12 byte. Several restrictions are maintained throughout 13 the instruction set.
14 1. Each instruction must fetch the same number of bytes as it uses.
16 2. Each instruction must ~eave the microprocessor 17 with the next instruction in the INSTRUCTION
18 BUFFER, I~ reglster 196.
19 3. At "Phase Two Time" at the beginning of Sequence Two, as later described, the TEMPORARY
21 BUFFER (TB) 197 must contain the byte following 22 the current instruction. (Note that this 23 byte was fetched by the previous ins~ruction.) 24 4. Each instruction decodes "TERM" (Terminate) as later described, which resets the instruc-26 tion sequence counter (not shown) in clock 27 176 for CMP 176 and a separate sequence clock 28 (not shown) for CMP 170 to Sequence one, ~4~

1 allows the next fetch to be done from the IB
2 196 and loads the next instruction into IR
3 198.
4 5~ At "Phase Two ~ime" at the beginning of instruction Sequence Two the low accumulator 6 register 183 and the high accumulator register 7 185 must contain the appropriate signals.
(Note that the previous instruction may have g had other data in these registers during its execution.) 11 Microprocessor 170 is built exclusively of 12 latch logic. 02 signals are the output of latches (or 13 static decodes using the output of latches) that are 14 strobed (sampled or transferred by a clock signal called a strobe) at 02 time. 01 signals are the outputs 16 of latches (or static decodes using the outputs of 17 latches) that are strobed at ~l time. 01 signals are 18 used as the inputs to ~2-latches and 02 signals are 19 used as the inputs to 01 latches.
The fetch decodes (memory references) are 21 done from the IB register 196 at Sequence 1 (SEQ 1), 22 because the IR register 198 is loaded at 01, SEQ 1 23 (FIGURES 7 and 8). At sequences other than SEQ 1, the 24 fetch decode is done rom IR register 198. The fetch decodes are 02 signals, and therefore are strobed at 26 01. The output of the fetch decodes are strobed into 27 regi~ters ALL 191, ALH 190, OL 200 and SCC 18G. The 28 program counter 192 is updated from registers AOL 201 ., 1 and AOH 202 at a 02 time. The execution and designation 2 decodes are 01 decodes off the IR 198. These decodes 3 are strobed at 02 time into SCC 180 to set up the ALU
4 181 and DESTINATION strobes which occur at 01 time.
The output signals of ALU 181 are strobed into DB 186, 6 DO 187 or AOH 202 in accordance with the instruction -7 being executed. Then ACL 183 and ACH 185 are updated 8 at 02 so another ALU 181 cycle can begin. It takes g three processor cycles from the start of a fetch decode to the time that the accumulator 183, 185 is updated.
11 A pipelined configuration means that in some cases a 12 processor can be executing three separate instructions 13 at the same time, as is known in the computer arts.
14 Instruction Sequences An instruction sequence chart in FIGURES 7 16 and 8 is a convenient shorthand catalog of the internal 17 operation of the processor 170 during each sequence of 18 each instruction. It ca~ be a very useful tool in ~-19 understanding the processor' B operation. This glossary of terms provides the information necessary for proper -21 interpretation of these charts.
22 General Information 23 The processor 170 is pipelined. While it is 24 executing one instruction, it reads the next two bytes from memory 172. The first byte is guaranteed in IB
26 196 at the beginning of SEQ 1 and is used during SEQ 1 27 to provide three SEQ 1 decodes in SCC 180. At 01, SEQ
28 1, IB+IR where it remains until the next 01, SEQ 1. - -29 All remaining instruction decodes are done from IR 198.
.

. .
. .

l The second byte is in TB 197 at the beginning 2 of SEQ 2. This byte may contain immediate data for the 3 current instruction or it ma~ be a next instruction 4 byte. If it is a next instruction byte, then the current instruction needs to read only one byte from 6 memory to provide the required two bytes. This two-7 byte read occurs for all one-byte instructions.
8 All memory 172 accesses begin at 01. The 9 memory data is guaranteed in the data latch register DL
205 via bus IO for CMP 170 by ~2, i.e., one and one-11 half instruction execution sequences later. In the 12 table below the memory timings for all instructions are 13 set out together with the register destination (DEST) 14 from data latch register 205. ` -~4~

CB AB SB ::.

12 NB 1 TB 2 TB, 3 TB -~
13 STB 1 TB 3 TB - - .
14 Al Sl SHL

4 TB :

.....
22 ~ IJO 1 TB 2 TB

24 9 TB lO TB

29 *A bar over a JUMP or BRANCH instruction indicates JUMP or BRANCH was not taken.

.:: . : ~ ~ ~:

1Code Operation ~Phase 2) Decode 2 TB DL~TB, ACL unchanged. None 3 ACL DL~ACL, TB unchanged. TACL* or ITAL
4 X None. ACL and TB are unchanged. NOTB* or TBNS
Data will be lost unless SDL on 6 line 206 is inhibited by DMA active 7 on line 207. - AND circuit 208 blocks 02 from generating SDL signals on 9 line 206. DMA means direct memory access as by registers 173, 174.

12If IR 198 still contains the current instruc-13 ~ion byte, the decodes are static. If the decode is 14 for the overlap cycle of SEQ 1 (with the next instruc-15tion byte in IR 198), the ALU 181 condition latches are 16 set during the last sequences (3-5) of the current 17 instruction execution. The designated register is 18 decoded by SCC 180. This special case is shown on the 19 instruction sequence charts, FIGURES 7 and 8, by the terms TBNS or ITAL in the ALU columns.
21The operation of the processor 170 in each 22 sequence is divided into two catagories: Control Logic (CL) of SCC 180 and ALU and Destination (ALU). The 24 position of these two bIocks within the seguence (i.e., left half or right half) has no meaning. Operations 26 can occur at 01 or ~2 in either catagory. ~1 occurs in 27 the middle of a sequence. The ~2 is always a sequence 28 boundary.

1 Control Logic Glossary This is a list of terms which appear in the 3 control logic CL columns.

.
Indicates that a write into memory is initiated at phase 6 1 rather than a read. A read is the default condition 7 and requires no decodes. The WRT output line tFIGURE
5) is active when WRT appears in the chart.
9 OUTPUT lST I/O - OUT lIO
lQ Indicates that the first cycle I/O code is placed on 11 the output lines IO at 01. Address lines AL9 and ALll 12 of ADC are driven by the decode IOCl. I/O line is 13 active (FIGURE 5).

Indicates that the second cycle I/O code is placed on 16 the output lines IO to 01. Address lines AL10 and ALll 17 of ADS are driven by IOC2. I/O line is active (FIGURE
18 5).
19 TB~IB
At each 02, SEQ 1 of every instruction, the signal 21 contents of TB register 197 are transferred to IB
22 register 196. The signal contents represent the next 23 successive instruction following the current instruc-24 tion.
IB SET
26 Same operation as TB>IB but the intent is to stop IB
27 196 from following TB 197 rather than save the contents 28 of the TB 197. It is followed at the next 01 by IB SET
29 TO "TRA".

.

.. , ~
.
.: ~ ' . '. .

1 IB SET TO "TRA"
2 Indicates that the reset inputs (not shown) on the IB
3 196 latches (not shown) are driven at 01. CNT OR PORX
4 drives an overlapping set on bits 0, 3 and 5 producing a "TRA" instruction code ~AL, POR then execute a TRA to 6 complete their respective operations.
7 (TERM) 8 Indicates the end of the instruction. SEQ 1 begins at 9 the doubled line 220 on the chart. The sequence counter (not shown Sl-S6) in clock 176 is re et by the decode 11 TERM*.

13 Indicates a read from memory and a Program Counter 14 Increment. This action is a default condition and no decodes are needed.
16 01: PC+l)AO
17 02: AO~PC

19 A "NO OP". Same as PCI except the PC 192 is not updated at 02. The next PCI reads the same location 21 again as though the first read did not occur. It is 22 used because the processor lines signify something 23 every 01 and some instructions have no Read/Write or 24 I/O requirements during sequence 1. SPC (Set PC) is inhibited for the jumps and branches, for the shift 26 instructions, and for Al and Sl instructions. ~ -i 27 , 28 . .
`309760~3 - 67 -4~V
1 IBL, IRL, IRH
2 Indicates a memory access (read or write) to a register.
3 IR (IB) means the register is specified by the low four 4 bits of IR (IB). IB must be used during SEQ 1. IR 198 is used during all other sequences. L means the access 6 is to the low byte of the register, H specifies the 7 high byte. The decode IRSL* (IR selected) controls the 8 formation of the address at 01.
9 Operation Control IB(0-3)~AO(0-3) IBX (SEQ 1 only) 11 IR(0-3) ~AO(0-3) IRX (all other sequences) 12 L=0, H=11AO(4) ILH
13 GP(0-2)~AO(5-7) RGX
14 GP(3)1AO(8) R3 0~AOt9-14) TBIR

17 Indicates a memory access using the contents of T~ 197 18 as the address. The decode TBSL* (TB selected) controls 19 the formation of the memory address at 01.
Operation Control 21 TB(0-71~AO(0-7) TBX
22 GP(3)'AO(8) R3 23 O~AO(9-14) TBIR
24 IRL+8 Same as IRL except l~AO(3). It is used only in the RTN
26 instruction to read the new status from memory. A one 27 is placed on ALt3).

~4~

1 CAL HIGH BITS, TB+AOL
. _ 2 Indicates a memory access to a location being branched 3 to. The decodes TBSL* and AOSL* control address forma-4 tion at phase 1. The high bits are calculated by the counter logic CL for PCH+l and PCH and by the ALU for 6 PCH-l.
7 Phase 1: -8 Operation - Control 9 TB(0-7)3AO(0-7) TBX
PCH+l~AO(8-14) AOSL*-l, BNF=l 11 PCH~AO(8-14) AOSL*=l, BNF=0 12 PCH-l)AO(8-14) AOSL*-0 13 Phase 2: AO~PC
14 CAL HIGH BITS, IR~AOL
SLmilar to TB+AOL above except only the low four bits 16 of the IR are used, and bits 4 through 7 are calculated 17 by the counter logic. The decodes IRSL* and AOSL*
18 control address formation by driving other control 19 lines.
Phase 1:
21 Operation- Control 22 IR(0-3)~AO(0-3) IRX
:23 CL(4-7)~AOt4-7) None (default) ~-24 PCH+l~AO(8-14) AOSL*=l, JF8=1 PCH)AO~8-14) AOSL*=l, JF8=0 26 PCH-l~AO(8-14) AOSL*=0 27 Phase 2: AO'PC

... .

L4~
1 OL, OH, 4L, 4H, 8L, 8H, 12L, 12H
2 Indicates a memory access to a register directly 3 specified by the control SCC 180. Occurs only during 4 interrupt. L indicates the low byte, H indicates the high byte.
6 Phase 1:
7 Operation Control Register~AO~0-3) CN2, CN3 9 L=0, H=l~AO(4) ILH
0~AO~5-13) TBIR
11 l~AO(14) R9 12 Update PC, ACL~AOH, TB~AOL
13 Indicates a memory 172 access to an address specified 14 by the contents of TB and ACL. The address is also placed in PC 192 at 02. The address formation is 1 16 controlled by AOTB* which drives other control lines.
17 ACL 182 signals go through ALU 181.
1 18 Phase 1:
19 Operation Control TB(0-7)~AO(0-7) TBX
21 ACL~0-6)~AO(8-14) SAO
22 Phase 2: AO~PC
23 ACL~AOH, TB~AOL
24 Same as above except PC 92 is not updated at phase 2.
De~tination ~Dest) Glossary 26 Items with boxes around them (e.g., ACL to DO~ACL~
27 do not always occur. On BRANCH or JUMP taken the boxed 28 destination occurs only when PCH 192B must be decremented ~ " "' .

1~L14~
1 to produce the proper address. The decrement occurs 2 always, it just isn't loaded ~hen it isn't needed. On 3 all other instructions the boxed destination occurs if 4 the instruction is also boxed~
Items in parentheses are "don't care" conditions 6 which occur but are not part of the desired operation.
7 There are 7 standard data transfers:
8Phase 1 Phase 2 Decodes 91. ALU~DO - None (default~
102. ALU~DO DO~ACL BF3 113. ALU~DB - D~DS*
12ACH~DO
134. ALU~DB DB~ACH BF2 14ACH'DO DO~ACL
155. ALU~AOH - AOTB*
16TB~AOL DB'ACH
17ACH~DO DO~ACL
86. PCL~DO - PCSL-PSX
197. STATUS)DO - STSL-PSX
20 Any variations of these are decoded separately as 21 exceptions.
22 Mi~cellaneous Operations 23 U~date Status 24 The new status (REG GROUP, EQ, CARRY, LOW, lNT MASK) which has been read from memory replaces the 26 old status.
27 Operation Decode 28(Phase 1) TB 'STATUS UPST*, CHST, CHST*
29 (Phase 2) 1 Clear ACL & ACH
2 ACL 182 and ACH 185 are reset to zero by driving the 3 reset inputs of the register ~atches (not shown).
4 Operation Decode (Phase 1) ~ (Phase 2) 0~ACL, 0~ACH CLAC
7 Processor Forced to Execute TRA
8 The IB 196 has been reset to a TRA instruction. The g sequence counter (not shown) in clock 176 is reset to SEQ 1 and the processor executes the TRA before the 11 next instruction from memory.
12 Interrupt is prevented from occurring until -13 after the TRA is completed.
14 Ac7*)EQ
The EQ indicator is set~by AC7* (used by I/O instruc-16 tion), the bit 7 of ACL 183.

18 The Input Carry instructi~n sets the IC latch (not 19 shown) in ALU 181.
"32"~DO
21 l~DO(5). Part of POR code.

23 This is a list of terms which appears in the ALU category. ~`

ALU NO-OP. No ALU decodes are provided. ALU 181 output 26 at 182 defaults to all ones.

28 ALU 181 output is either ACL plus TB 197 or ACL 183 29 minus TB 197 depending on whether instruction was an -4~
1 ADD or a SUBTRACT.
2 AcLx-TB
3 ALU output is some logical c~bination of ACL and TB
4 which is dependent on the actual instruction.
ACL
6 ALU output is ACL.

8 ALU output is TB.
9 (MODIF) ALU output is modified in some manner depending on the 11 instruction. Example: On an IN or OUT instruction, 12 TB~DO except for bits 5 and 6 which are modified to 13 reflect zero and OUT respectively. ALU output is shown 14 as TB (MODIF).
ACL INCR/DECR
16 -ALU output is ACL plus one or ACL minus one depending 17 on the instruction.
18 PCH-l 19 ALU output is PCH minus one.
PCH-l~CR
21 Same as PCH-l except carry is added.
22 TBNS, ITAL
23 ALU NO-OP. The destination of data signals entering 24 the processor at the end of sequence 1 via register 105 must be specified by the previous instruction (although 26 that instruction is no longer in the machine). To 27 accomplish this action ! two sets of latches are neces-28 sary. The ALU latches are used as the first set. The 29 ALU latches drive the second set, TBNS and ITAL.

BO976023 - 73 _ 1 ITAL specifies the ACL as the destination.
2 TBNS specifies no destination, The default condltion 3 ~no decodes) specifies the T~ as the destination.
4 Memor~ Addressin~
The memory addressing of CMP 170 is shown in ~ FIGURES 8 and 9. The address bus ADC goes to a plurality 7 of address decoders 250-253. Decoder 250 decodes the 8 indicated address bits for selecting external diagnostic g unit addresses. Such external diagnostic unit addresses are shown in FIGURE 8 as being respectively in groups 11 7, 15, 23 and 31 of the lower 1000 byte address base of 12 the processor address as shown in FIGURE 10. Each of 13 the groups include 32 byte addresses. For example, 14 group 0 in zone 0 includes addresses 0-31, and so forth. The address decoder 250 addresses external 16 diagnostic units 254 which are connected to copy produc-17 tion machine 10 via plug (not shown). Diagnostic units 18 254 are capable of exercis~ing the copy production machine 19 10 via processor control in a manner beyond the scope of the present description. Decoder 251 addresses the 21 ~ IO registers which inalude input registers 173 and 22 output registers 174. It wi}l be remembered tha~ input 23 registers 173 are input only such that CMP 170 can only 24 read the signal contents of such registers; it cannot record in such registers. In a similar manner, output 26 registers 174 can only receive signals from CMP 170 for 27 supplying control signals to CPP 13 and other units of 28 copy production machine 10. It should be noted that , .

1 the address space for the input/output registers is 2 repeated; i.e., the same address bits will access any I
3 of the input/output registers in all four zones of the 4 memory space. Accordingly, not all address bits are supplied to address decoder 251 in the same manner that 6 bits were eliminated from address decoder 250 for 7 enabling repeated diagnostic address space. This is 8 achieved because the characteristics of the address 9 selection circuits of CMP 170 are faster if all of the addressing for program execution is maintained within 11 the indicated FIGURE 8 address zones. Switching zones 12 delays processor action. Reasons for this delay are 13 beyond the scope of the present description.
14 Address decoder 252 also has the same bits eliminated from its address field for addressing the 16 nonvolatile store CMOS 175. CMOS address space is in 17 groups 4 and 5 of zone 0; 12 and 13 of zone 1; 20 and 18 21 of æone 2; and 28, 29-of zone 3.
19 Address decoder 253 addresses ROS control store 171 via address lines 171A and working store 21 memory 172 via address lines 172A to semiconductive 22 type memories. All of the address bits from ADC are 23 applied to decoder 253.
24 Returning now to FIGVRE 10, the remaining groups of registers (address space) in the lower 1000 26 byte address field of CMP 170 also are a part of working 27 store 172 to be addressed via address lines 172A. ~11 28 address bits are used to access these work registers BO976023 _ 75 _ . .. .

1 for uniquely maintaining the signals therein with 2 respect to various programs iP CMP 170.
3 CMP 170 operates within the above-described 4 addressing structures in the following manner. A
memory address zone is select~d with the work registers 6 in their respective address groups being used for 7 storing intermediate results. References to input/output, 8 diagnostics and the nonvolatile memory 175 are the same 9 for all of the zones, thereby improving efficiency of CMP 170 in avoiding zone switching for accessing such -~
11 universally used portions of the address space.
12 Detailed Descripti n of the Preferred Embodiment 13 - Referring to FIGURES 11 et seq, a microprocessor 14 controlled embodiment of the invention is shown and described. In FIGURE 11 control 53 is shown as a box 16 containing a plurality of indicators which are used, as 17 will become apparent, in the program control. The I8 program control operates Ln the computer system shown 19 in FIGURES 4-10, inclusive. The tables in the description :~ :
of the preferred embodiment contain source code operable 21 on the described computer and the FIGURE 11 indicators 22 to illustrate the invention. FIGURES 12-29 are flow . ~ .
23 charts to make it easier to follow the description.
24~ Returning to FIGURE 11, it is seen that copy ~ production machine lO is constructed as shown in FIGURE
26~ 1. In addition, sensing switches S2, S3, S4 are shown 27 at exit positions of output portion 14. Such sensing 28 switches indicate a copy is leaving the copy production , :

~$~

1 machine at its designated output port (termed a billing 2 port) and is suitable to be ~illed or not to be billed, 3 depending upon the status o~ copy production; i.e., 4 whether copies are actually peing produced or an auxil-iary mode such as flush or separate runs are being 6 performed. Switch Sl adjacent copy path 27 senses copy 7 sheets entering CPP 13. It should be noted that FIGURE
8 11 is diagrammatic in that the position of Sl and of g alternate paper supply 54 appear not to coincide;
however, the copy sheets selected from supply 54 actually 11 prooeed past Sl before reaching aligner gate 28. All 12 of the status indicators listed in FIGURE 11 are described 13 in the ensuing discussion. A pluggable billing meter 1~ PM may be installed in machine 10. It has a switch which signals to control 53 the fact the PM meter is 16 plugged in, allowing the machine to operate. If the PM
17 meter is removed, machine 10 cannot operate.
18 FIGURE 12 is a~simplified diagrammatic showing 19 of the various computer programs for the preferred embodiment. In general, the programs are divided into 21 two general catégories, asynchronous and synchronous.
22 This division eliminates the need for a ma~ter control 23 program or an executive program as is usually required 24 in the data processing and machine controller arts. In
25 - contrast to that type of control, the program control
26 of the present invention is slaved to the timing and
27 operation of copy production machine 10 such that the
28 electromechanical portions of copy production machine BO976023 - 77 _ . .

1 ~L~

1 10 synchronize the operation of program control 53. In 2 particular, power line zero crossovers are detected by 3 means not shown and are used to invoke the programs 4 indicated generally by numerals 260 and 261; i.e., the asynchronous programs, that is, asynchronous to the 6 copy production process. Even when copies are being 7 actively produced the asynchronous programs 260, 261 8 are executed on a power line frequency periodic basis 9 for monitoring the operation of copy production machine 10, including operator control panel 52. It is to be 11 understood that there are many more programs resident 12 for the aæynchronous programs, FIGURE 12 being limited 13 to those computer programs having a direct bearing for 14 practicing the present invention.
The second set of programs is termed synchronous 16 programs and are timed and instigated by timing signals 17 from emitter wheel 46 of photoconductor drum 20.
18 Emitter wheel 46 emits periodic pulses called emitter 19 control pulses ECs 0-16 for each image area. The photoconductor drum 20 preferably has two image areas, 21 hence there will be two sets of EC0-~C16 pulses for 22 each drum 20 rotation. The computer receives-the ECs 23 and counts same using software techniques. A fiducial 24 pulse (not shown), also termed a "sync" pulse, defines I

j 25 the image areas on the photoconductor drum 20. A
1~ 26 computer is programmed by programs not shown nor described ¦ 27 to reset the EC count upon the receipt of each fiducial ~ 28 pulse. Then for each image area being processed by CPP
.

1 13, the computer in control 53 responds to its own 2 software counting to invoke ~ne of the synchronous 3 programs to be executed by the computer. For example, 4 when ECO is received a plurality of programs are invoked because EC0 relates to a preparatory portion of each 6 image cycle. Some of the EC0 programs are not shown 7 for purposes of brevity. At EC2 certain resets are 8 employed in connection with practicing the separation 9 mode. At EC5 the inner image erase controls are illus-trated, while EC6 controls the document lamp. Then at 11 EC10, certain counts are effected for controlling the 12 copy production machine 10 using software architecture.
13 Finally, the last EC, EC16, resets the separation mode 14 upon the end of a separation mode run, as well as performing other functions not pertinent to the practice 16 of the present invention. Communication between the 17 synchronous programs, the EC0-EC16, and the asynchronous 18 programs 260, 261 are via the memory status registers 19 or indicators listed in FIGURE 11 in box 53 and denomi-nated in FIGURE 12 as registers 263. That is, when a 21 separate button 57 is closed, separate mode control 22 enables control 53 to sense closure, and to memorize 23 the closure in a given location of the memory status 24 registers 263. The computer also then invokes the B4 separation check program to ensure compatability of 26 separation sheets with copy sheets. Closure of the 27 start button 51 is sensed by the computer by executing 28 set STARTL (STARTL means start latch program). In BO976023 ~ 79 ~

.$~ ~

1 connection with starting copy production machine 10, 2 SADF 11 is checked for an o~iginal document at the 3 preentry station. Finally, if the copy production had 4 been interrupted or the sep~ration mode had been inter-rupted, the autostart program enables the computer to 6 restart automatically, as will become apparent.
7 The asynchronous programs 261 enable the 8 computer to logically extend-the capability of the 9 collator 14B, 14C by allowing more than one collated set per collator bin. Further, other functions are 11 performed by the computer in response to these stored 12 programs for maximizing the efficiency of copy production 13 machine 10. All of these will become apparent from a 14 continued reading of the specification.
Referring next to FIGURES 13-29, the flow 16 chart step designation corresponds to the "LOC" designa-17 tion of the source code in the corresponding tables 18 included in this description. The flow chart is first 19 described and then the table included in the specifica-tion. For example, in FIGURE 13 step 5468 corresponds 21 to an instruction of Table I at LOC 5468.
22 Referring first to FIGURE 13, the separate 23 mode controls are entered at 5468. First the computer 24 checks for inhibits at 546B, such as check paper path ~CPPIND) and the like. If any Table I listed inhibits 26 are present, the separation mode should not be performed.
27 With no such inhibits, at 547D the computer 28 checks whether or not the separation switch 57 (SEPSW) ,. . .

1 has been actuated. If so, the computer checks whether 2 or not a switch closure int~ration (software type) 3 indicates actuation is a true actuation or noise. Then 4 at 548A the computer checks to see whether or not the separate switch or button 57 had been previously success-6 fully integrated. If not, then at 548B separate indicatox 7 SEPARIND is toggled to its opposite signal state and 8 SEPARAT2 flag is set to a 1. SEPARIND is one bit of 9 memory 172 and is listed in FIGURE 11. Then at 5496 the computer calls the B4 separation check code shown Ll in FIGURE 14 and later described. At 5499 the computer 12 checks the separate indicator. If the separate indicator 13 is off, i.e., the toggling of the separate switch 14 deselected the separate indicator, then the computer at 54A9 resets the separate wait flag and resets the start 16 separate flag STARTSE. If the separate indicator was 17 on at 5499 then the computer checks at 549D whether or 18 not an original is at the document feed (ORAGTDF). If 19 there is an original at the document feed then the separate run must wait until after the copy production 2L run for such original document; i.e., one more copy 22 run. The operator by putting originals in SADF 11 ~3 inhibits the separation mode until the end of a set to 24 be collated or produced. As implemented, the choice is delay of one copy production run, no limitation thereto 26 intended. In any event, an original at the document 27 feed, the separate wait (SEPWAIT) flag or indicator may 2~ be set at 54Al. SEPWAIT inhibits the separation mode.

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1 From 54Al the computer steps the program to 54B3 to 2 determine whether or not a separation mode is now 3 active (SEPACTV). If separa~ion mode is active, then 4 the computer resets SEPACTV at 54B7 and sets ENABLED at 54B9. The flag enabled in s~atus registers 263 allows 6 the computer to sense the operator parameter selection 7 switches on control panel 52 and indicates all zeros in the numerical display indicating copies made/copies g selected. Finally, at 54BF the computer senses whether or not any button was activated and sensed being pushed 11 on panel 52. It should be noted that the computer 12 branches from several points in the separate control 13 program to 54BF. Next, the computer at 54D5 checks for 14 exit overflow. Exit overflow means that the number of copies being made exceeds the capacity of collator 14B, 16 14C and excess cOpies are being directed to the exit 17 tray 14A. In the preferred embodiment, this action 18 occurs only when collate~mode is selected after side 1 19 of a duplex job has occurred. Under other circumstances ; --separation mode of this invention is employed. If 21 there is no exit overflow, the computer exits the 22 program at 54EC to execute the next asynchronous program 23 in the line of executions.
24 In the event of exit overflow, the instruction at 54DD enables the computer to reset the separate 26 indicator (no separation is required or desir`ed), 27 separate wait and STARTSE flags. The computer then 28 exits at 54EC.

1 Returning to 546B, if there are inhibits then 2 the instruction at 54D5 is ~xecuted and all of the 3 above described intermediate instructions omitted. If 4 the separation switch 57 is sensed as not being pushed at 547D then at 54C9 SEPARATl is set to a one. This 6 flag indicates that the separate button had been previ-7 ously pushed and is not now being pushed. If the 8 SEPARATl is equal to zero this means that the separate 9 switch has not recently been pushed. Therefore, at 54D0 SEPART2 is equal to zero; i.e., separation mode 11 will not be honored. On the other hand, if SEPARATl 12 is equal to a one at 54C9, SEPARATl is reset at 54CF
13 with SEPARAT2 equal to a one allowed to stand for 14 enabling separation mode. At 5482 if the separation switch integration is still a zero, then at 54C6 the 16 above-mentioned SEPARTl is set to one.
17 With regard to the above description, it 18 should be noted that the program was executed at every 19 power line crossover. Therefore, in setting up the separation mode in the computerized embodiment of the 21 inv~ntion, asynchronous programs will be executed many 22 times during each set-up. Each pass through the program 23 by the computer will sense the immediate status of the 24 machine for enabling the machine to be set up in the separation mode as originally described for the hardware 26 representation of machine functions. The source code 27 for the separate mode control program is set forth 28 below in Table I. LOC means memory location, OBJ means $~

1 object, OPl is operand 1, OP2 is operand 2. The abbre-2 viations in the source state~ents are as used in the 3 flow charts or elsewhere. ~he symbols are those symbols 4 used for logic except a logieal "not" is "~". The "PSBs" are program status bits not pertinent to an 6 understanding of the invention, while SEP indicates 7 separation mode checkpoint.

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o ~ er ~r BO976023 - go -1 Referring next to FIGURE 14, the computer 2 execution of a program for checking proper separation 3 sheet size is described. A~ 54F8 the computer checks 4 whether or not the copy production machine is designed to handle so-called B4 sizes. If not, there is no need 6 to inhibit any size of separation sheet and a computer 7 exits the program at 554B, returning to the FIGURE 13 8 illustrated program.
9 When checking for proper sheet sizes for certain nations, the computer at 5508 fetches the 11 primary size; i.e., the size of copy sheets on which 12 images are being produced. During this checking inter-13 rupts are masked beginning at 550C. At 550E the second 14 paper supply or alternate paper bin 54 is selected.
The delay at 5514. allows the selection to be completed.
16 At 551A the alternate size, i.e., the size of copy I7 sheets in the second paper supply 54, is determined.
18 If the size of copy shee~s indicated for the primary 19 bin 35 is not the same as that indicated for second ;
paper supply 54, then the separation indicator is reset 21 at 5524; i.e., separation mode will not be allowed.
22 Then at 5529 SEPWAIT and STARTSE are also reset. Then 23 at 5533 SEPACTV is checked. If it is active it is 24 reset at 5537 and ENABLED is activated. Finally, at 553F alternate paper is reset with a deselection delay 26 at 5543 and the interrupts being unmasked. The computer 27 then returns to FIGURE 13 illustrated program as a 28 preparatory step for executing a separation mode run.

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1 How the computer sets start latch (STARTL) is 2 flow charted in FIGURE 15 with the source code being 3 shown in Table III. The pr~yram is invoked in response 4 to the actuation of the start button on panel 52 or the insertion of an original document into SADF 11. It is 6 to be understood that before a start latch in a copy 7 production machine is activated, several things must be 8 performed and achieved that are not pertinent to the g separation mode. For example, nonpertinent code is included at diverse memory locationsJ such as at 3CF7, 11 3E6~, 3FD4 and 4000. As to the pertinent code, the 12 computer checks at 3CFA for whether or not the copy 13 selection is equal to zero. If it is zero, then the 14 minimum run for copy production should be unity; there-fore, the computer sets the copy select to one at 3DOl.
lh The end flag, (signal stored in store 172) i.e., 17 signifying the end of a copy producing run, is checked 18 at 3D04. This indicates~whether or not a normal end 19 was achieved by the previous run. If so, the FIGURE 16 illustrated program STLEND identified as 3DOB is 21 executed, as later described.
22 Before permitting copy production to ensue, 23 the computer resets the enable flag at 3EDl. The 24 enable flag being reset tells the computer not to honor any celections from panel 52; the sole exception being 26 the stop button for stopping copy production machine 27 10. Then the computer checks for previous status at 28 3ED6; i.e., whether or not the flush flag is on. If BO976023 - 96 ~

1 the flush flag is on this means copies in ISU 40 must 2 be transported to the outpu~ portion 14 without receiving 3 any images. If this flag ia active then the computer 4 at 3EDB sets the flush standpy flag to unity, selects the ISU as the source of copy sheets for being transported 6 to output portion 14 and turns the document lamp off.
7 The document lamp (not shown) scans the original 8 document on the platen ~not shown) of SADF 11 for g transferring an optical image to photoconductor drum 20. After this step, the computer proceeds to sense at 11 3F4C whether or not the start latch is active. If the 12 start latch is already set, then at 3F51 the computer 13 sets the so-called copy register CR (not shown) within 14 the working memory 172 and looks for a first so-called sync and a first emit pulse from emitter wheel 46.
16 These pulses are timing pulses serving control 53 to 17 drum 20 rotation. The status of the CR register is not 18 pertinent to the operati~n of the separation mode but 9 i5 important in copy production. Since machine state registers are so well known in copy production machines, 21 further discussion lS dispensed with.
22 After the above steps and executing nonpertinent 23 code at 3FD4, the computer sets the button select time 24 indicator SLCTTM to zero; i.e., the time is reset such that a button depression timeout can be initiated.
26 Then at 3FDD the start button is sensed to whether or 27 not it is active. If so, the STARTH flag in memory 172 28 is set at 3FEl. Then the momentary run button MRB is 1 sensed at 3FE7 (MRB is not shown in the drawing). If 2 MRB is active then the flag MOMRUNH is set indicating 3 that the momentary run button has been actuated. Then 4 at 3FEF the computer resets all the recopy lights (not shown) which indicate to tho operator the number of G documents to be recopied for error recovery and then 7 resets the latch S~ARTS in memory 172. The various 8 start latches are "program flags" for synchronizing the 9 startup procedure and each occupies one bit position (latch) in a register within memory 172. Then the 11 computer can exit the program via the nonpertinent code 12 at 4000.
13 Turning to the instruction at 3ED6, if no 14 flush operation is to be performed, then the instruction at 3EF4 determines whether or not a separation mode is 16 to be started (STARTSE). If not, the instruction 3FlF
17 sets the enable flag for allowing the operator to 18 insert operator parameters via panel 52. Then at 3F25 19 the computer checks to see whether or not SADF 11 is busy. If it is not busy then the flag INHFDl is set at 21 3F29. INHFDl indicates that an operator has lifted the 22 lid (not shown) of SADF 11 and can manually place an 23 original to be copied on the platen (not shown) of SADF
24 11, i.e., the SADF 11 iS not used for transporting an original document in the ensuing copy production run. --~
26 Otherwise, the SADF is being used. In either case the 27 status of the main drive motor (not shown) for machine 28 10 is sensed at 3F2D. If the motor has been turned on, 1 then the document lamp (not shown) is turned on at 3F31 2 for scanning the original d~Gument which is in copying 3 position within SADF 11, whe~her manually inserted or 4 semiautomatically inserted.
If the drive is still off at 3F2D, then 6 the computer checks for a side 2 indicator at 3F3E. If 7 the side 2 is to be produced, i.e., ISU 40 is to be the 8 source of the copy sheets for duplex copy production, -9 then the computer at 3F42 selects ISU 40 as a source of copy sheets. If it is not side 2, then it must be side 11 1. The copies to be produced in an ensuing copy produc-12 tion run will either be the first portion of a simplex 13 run or be directed to the interim storage unit 40 as 14 partially completed duplex copies. In either event, the backup register of memory 172 is reset to all zeros 16 at 3F49 for indicating that the original document in 17 SADF 11 to be scanned by the document lamp turned on at 18 3F31 is the first image in a possible series of images 19 being copied. From 3F49 the computer executes the code beginning at 3F4C as previously described.
21 When separation mode flag indicates a separa-22 tion run is to be performed, then at 3EF9 the computer 23 sets SEPACTV to "1" for indicating separation mode is 24 active. The computer then checks at 3EFD to see whether or not the alternate paper supply 54 has been selected.
2~ If it has already been selected, then separation standby 27 flag SEPSDBY is set at 3F01. On the other hand, if the 28 alternate paper has not yet been selected, STARTSE is BO976023 _ 99 _ 1 reset at 3F08 requiring the alternate paper supply 54 2 to be selected before the separation mode can ensue.
3 At 3F12 the computer turns off the document lamp (not 4 shown) since no copy images are to be transferred.
Then the computer finally reaches 3F4C in the program, 6 as above described.
7 All of the above program execution is shown 8 below in Table III.

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o 1~ 4 h h h h h h h h h 1 FIGURE 16 flow charts the start-up from 2 normal end of a prior copy p~oduction run. As indicated 3 at 3DOB, programming not per~inent to the function of 4 the separation mode is execu~ed in starting up from a normal end. Then the separate wait flag is checked at 6 3D3B. If it is active, it is reset at 3D3F; i.e., the 7 computer now is conditioning copy production machine 10 8 to begin the separation mode. The SEPWAIT flag set at g this point indicates a trailing separator; that is, copies were being produced when the separate button 57 11 was actuated. From 3D3F the computer proceeds to 12 instructlon 3ElB for checking whether or not the collate 13 mode is active. If not, some nonpertinent code is 14 executed at 3E58 and the program exited. If collate had been selected, the computer checks at 3E20 whether 16 or not the selection for the number of separation 17 sheets is zero. If it is zero the progxam is exited.
18 If not-, then at 3E24 the-number of separator sheets is 19 limited to the selection of the next succeeding copy producing run provided the selection is not greater 21 than forty for a two collator setup in the output 22 portion 14 or greater than twenty for a single collator 23 setup. If the copy selection is greater than 40 or 20, 24 the selection for separate run iæ limited to the number of collator bins.
26 On the other hand, if SEPWAIT is not active 27 the computer checks the separate indicator at 3D43. If 28 SEPARIND=O, then at 3DF9 the computer resets the delay .. ~ , ,. . ,".,~, ~ , .

1 start latch; i.e., since there will be no separate run, 2 copy production can ensue i~ediately. If SEPARIND=l 3 at 3D43, then the computer ~t 3D48 checks to see whether 4 or not the start button had ~een actuated or whether or not a run had been initiated by starting SADF 11. If 6 yes, then at 3D4D all the start flags are reset and 7 delay start is set at 3D51. At 3D57 computer checks 8 for side 2 of a duplex mode production and checks g whether or not there are any copies in the paper path.
This is achieved by checking the ACR 1 and 2 registers 11 being equal to zero. ACR means automatic copy recovery 12 and is essentially a software up/down count field for 13 counting the transient copies in the copy path. If 14 ACRl=ACR2=0, then the paper path is clear of copy sheets. If neither of these indicators is true, then 16 at 3D7C separation mode start flag (STARTSE) is set to 17 one. Then at 3D82 the computer checks to see whether 18 or not the flush duplex ~ight of panel 52 has been 19 illuminated. At this point the computer knows that any ~lush was completed therefore a separation run can be 21 performed. The oomputer resets the FLDUPON indicator 22 at 3D86 and sets the duplex indicator to one at 3D88.
23 Then at 3D8E the computer checks whether or not alternate 24 paper has been selected. If not, alternate paper is selected at 3D97. Further, a flag SEPPRI indicates 26 that copies were being made from the first paper supply 27 or primary paper bin 35 as opposed from the alternate 28 paper bin 54. At the end of separation mode the computer 1 will sense for SEPPRI such that upon resumption of copy 2 production the copy sheets ~ill again be properly 3 selected from first paper su~ply 35. If alternate 4 paper indicator had already been selected, then at 3D9A
5 SEPPRI would be reset; i.e., the operator had selected 6 the copies to be made from sheets residing in second 7 paper supply 54. Then at 3D9D the computer checks for 8 collator selection. If not, i.e., the separation mode 9 will run as a noncollate mode, then the copy select is ` equal to unity such that one separator sheet will be 11 supplied from the alternate paper bin supply 54 to 12 output tray 14A. On the other hand, if the collator 13 indicator is active then at 3DA2 the computer checks to 14 see whether or not the separation mode selection is greater than zero. If not (SEPSLCT=0), no more needs 16 to be done and the instructions beginning at 3ElB are 17 executed, as above described. On the other hand, if 18 the separate select is greater than zero, then at 3DA6 -19 the computer checks to see whether or not the copy select, i.e., the selection made by the operator, is Zl equal to the separation select. If not, (CPYSLCT
22 SEPSLCT) at 3DB9 the previous separation select for the .:
23 separation mode is made equal to the copy selection.

24 Then at 3DBF the computer checks to see whether or not , there are two collators. If not, the copy select is 26 increased by twenty at 3DC4, if there are two collators - 27 then the copy select is increased by forty at 3DC7.

28 This action enables control 53 to display cumulative . .

1 copy production for a copy production job that i~
2 segmented via the separation mode. This cumulative 3 copy count indicates to an ~perator how far job execution 4 has progressed.
At 3DDC the computer checks to see whether or 6 not the separation mode selection is less than the copy 7 selection. If not~ the instruction at 3ElB, as mentioned 8 above, is executed. If so, the instruction at 3DE3 g enables the computer to make the copy selection equal to the separation mode selection. This action indicates 11 the last job segment has not yet been reached.
12 On the other hand, back at 3DA6 if the copy 13 select was equal to the separation mode select, the 14 instruction beginning at 3DAA enables the computer to reset the trailing separator flag to zero, sets the 16 separate select to zero, and sets the previous selection 17 for the separation mode to zero. This action indicates 18 the last segment of the copy job is to be performed -19 next.
All of the above-described functions are set 21 forth in-detail in Table IV below.

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.~

.
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1 A start from a machine 10 interruption, such 2 as by a copy sheet jam, is aehieved through the autostart 3 program shown in FIGURE 17. The first step in this 4 program i5 to check the paper path via a branch and link (BAL) instruction at 3540. The routine for checking 6 the paper path is not shown for brevity. It consists 7 of the control 53 computer scanning all of the sensing 8 switches in the paper path of copy production machine 9 10 to ensure that all the paper has been removed from the paper path. Then a second branch and link at 3543 11 calls the B4 SEPCHK routine described with respect to 12 FIGURE 14. Vpon return from the FIGURE 14 illustrated 13 code, the computer at 3546 determines whether or not 14 there are any outstanding machine errors, such as check paper path, check collator, and the like. If there are 16 no checks, the routine can be exited for entering SET
17 STARTL of FIGURE 16. If there are checks, the computer 18 must then determine why copy production cannot resume.
19 First the computer checks at 3554 to determine whether or not a photoconductor (PC) advance was interrupted.
21 A photoconductor advance is an auxiliary operation 22 ~ moving new photoconductor into an imaging location, 23 such as shown in U.S. patent 3,588,242. If there was a , ~24 PC advance, then at 3559 the computer checks to see whether or not a so-called secondary power relay (not 26 shown) is off or not. Such secondary power relay 27 provides power to the fuser 31 and the like. If it is ~; 28 off, a power indicator is set at 3560 for enabling the - ' .

:. -: . .--: . : , 1 computer to turn power back on by another program (not 2 shown). Then some nonperti~ent code beginning at 3568 3 is executed. At 357C. SEPA~TV is checked. If SEPACTV=l 4 when the abnormal end or interruption occurred, then the separation mode is restarted by setting the STARTSE
6 flag at 357E. Other programs to be described sense for 7 STARTSE for initiating separation mode. Techniques of 8 ensuring the right number of copies of separation 9 sheets are to be produced and transferred through output portion 14 is not a part of the present invention 11 and will not be described for that reason. ~ecause of 12 the diverse effects of starting from an abnormal end or 13 interruption, it is to be understood that most of the 14 code in the FIGURE 7 illustrated program is nonpertinent to separation mode. This nonpertinent code is indicated 16 by the arrow at 3575.
17 After the start latch has been set, the 18 FIGURE 18 illustrated asynchronous program relating to 19 control of SADF 11 checks for SEPWAIT in the inhibits checked at a routine called by a branch and link at 21 488C. Such inhibits, in addition to separation wait, 22 include some of the doors of copy production machine 10 23 are open, there was a flush occurring~ copy recovery i5 24 in progress, and the like. If SEPWAIT is not active (no inhibit), a branch instruction executed at 488F
26 causes nonpertinent SADF code to be executed beginning 27 either at 48DD: with SEPWAIT=1, nonpertinent SADF code 28 beginning at 490D is executed. This code illustrates ... ~ . . . : .
:

~14S~:LV

1 the close interaction of all the computer programs 2 illustrated for executing separation mode and the 3 effect of status registers a63 in pro~iding communications 4 between asynchronous progra~s and synchronous programs 262. Table V below lists the pertinent STLBND source 6 code instructions while Table VI lists the Figure 18 code.

lg 23 ~ .

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BO976023 - 130 - .

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w o o U ~, .
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' 1 The above-described programs illustrate the 2 preparatory steps in the asynchronous programs necessary 3 for starting a separation m~de. Up to this point in 4 time, the asynchronous programs have actually been executed several times, as conditions changed during 6 separation mode preparation, different branches of the 7 programs are correspondingly executed.
8 It should be noted that if a flush of interim 9 storage unit 40 is required that any separation mode run waits until interim storage unit 40 is empty. When 11 the start button has been pushed, sensed and honored, 12 the photoconductor drum 20 rotates supplying emitter EC
13 pulses from emitter wheel 46 as well as the fiducial or 14 sync pulses such pulsing is detected via computer programming such that synchronous programs now are 16 repetitively executed in synchronism with photoconductor 17 drum 20 rotation. It should be remembered that for 18 each rotation of photoconductor drum 20 each of the 19 synchronous programs 262 will be executed twice. As a result of those repetitive executions the copy production 21 machine 10 is synchronously operated while being simul-22 taneoulsy asynchronously monitored and prepared for 23 operation and stopping by the asynchronous programs 24 260, 261.
The synchronous programs 262 are executed in 26 the priority over (interrupt) the asynchronous programs;
27 i.e., when an EC pulse is received from emitter wheel 28 46 the respective synchronous program must be executed . ' : . ' '~
.

~14~1~

1 immediately for ensuring proper operation of copy 2 production machine 10. The control exercised by the 3 computer via the synchronou~ programs 262 is based upon 4 a machine state field CR co~tained in status registers 263 and the timing pulses EC0-EC16 supplied by emitter 6 wheel 46. In a constructed embodiment of the invention, 7 the CR field contained eight bits, CRl to CR8 plus some 8 other bits not pertinent to understanding the operation , g of the synchronous program 262. Generally,-the bit positions correspond to general functions of the copy 11 production machine 10 with respect to transport of copy 12 sheets through the paper. Other functions may be -13 performed in accordance with the bit pattern; however, 14 that is not important for the present discussion. In general, CRl when active indicates a copy sheet should ~-16 be picked from either the interim storage unit 40, . .
17 first paper supply 35, or second paper supply 54.
18~ Machine functions indicated by bit CR2 are primarily 19 preparatory steps to image transfer from photoconductor drum 20 to the copy sheet. Included in such preparatory 21 steps a~re lamp control,~magnetic brush checking, SADF
22 ~11 control, and the like. The bit position CR3~ CR4 are prlmarily concerned with image transfer controls 24 ~ such as fuser opening and closing, early exit arrivals, detach of copy~sheets from photoconductor drum 20 and 26 the like. CR5 bit indicates certain post image-27 transfer housekeeping chores. Bits CR6, CR7 and CR8 ,.. ~
~ 28~ are primarily related to collator controls. The computer .: :;
. .~ ~ - .
~ BO976023 - 133 -.

, ~'. ~ "' . , ' ' , ,, ' ,, ', ' :
: .
.

~L4'~

1 is programmed to maintain machine status with respect 2 to each copy sheet being tra~gferred through the machine 3 by inserting a binary one in ~he respective bit positions 4 such that the associated mac~ine functions can be appropriately performed. The meshing of the timing 6 pulses EC0-EC16 with the CR fields follows the same 7 timing control techniques used by prior relay control 8 machines, such as the IBM Copier II manufactured by g International Business Machines Corporation, Armonk, New York.
11 Turning now to the synchronous programs 262, 12 the EC0 programming (FIGURE 19) contains some the 13 preparatory steps necessary for beginning an image 14 cycle. As expected, many functions are performed during this particular synchronous program including 16 nonpertinent code represented by 6DE9. Further, because 17 of the extremely high speed of pxogram execution, ~he order 18 of execution of synchronous programs 262 in some instances 19 can be somewhat independent of the order in which the machine actually functions and are executed several times for 21 many individual functions of machine 10. For brevity 22 and avoiding describing the program repetitions, the 23 description will follow program execution rather than 24 machine functions.
At 6E25 the computer checks to see whether or 2~ not the CR2 bit is unity. If CR2=0, no pertinent 27 action need be taken so the program is exited via the 28 nonpertinent code at 6EBC. If CR2=1, certain pertinent .
- .

1~14~

1 preparatory steps have to be performed. Execution of 2 this program assumes that a copy sheet has already been -3 picked. After sensing CR2 active, the computer determines 4 whether or not preconditioning is occurring at branch instruction 6E29. The term "preconditioning" is 6 defined in U.S. patent number 4,036,556, issued July 7 19, 1977 and commonly assigned. If preconditioning is 8 occurring then no copy sheets will be transported and 9 the EC0 code can be exited via the nonpertinent code at 10 6EBC. Otherwise the computer at 6E2E increments the -11 copy-counter-save count field to be equal to the numerical 12 contents of the copy counter field plus one. Then at 13 6E3F the computer checks to see whether or not there is 14 a stop condition or an error condition. If there is, the program is exited via the nonpertinent code at 16 6EBC. If, on the other hand, the condition of the 17 machine 10 is error-free, then the computer at 6E53 -~
18 checks to see whether or not side 2 indicator is active, 19 i.e.,~whether or not the next image transfer will be a side 2 of a duplex copy production run. ~f it is, then 21 the computer must check at 6~58 to determine whether or 22 ~ not interim storage unit (ISU) 40 is not empty. If ISU
23 40 has copies in it, then the computer at 6E5D checks 24 to see whether or not separation mode is present in the machine and whether or not the copy select (CNT) is 26 greater than the collator capacity (COL). If those 27 conditions are satisfied, then the collator overflow ~:` :

~:

~ BO976023 - 135 - - ~

, ....... . : , : `

- - \

1 flag is set at 6E7A. This ~esults in action that the 2 copies being produced will pe produced from the duplex 3 tray with the excess copies ~ot insertable into the 4 collator being directed to ~opy output tray 14A. On the other hand, if the condition of branch 6E5D is not 6 true, then bit CR1 is set to a one at 6E7F in preparation 7 for picking a copy sheet from a designated paper supply 8 35 or 54. On the other hand, if interim storage unit 9 40 is empty as detected at branch instruction 6E58, then the end flag is set at 6E89. Finally, nonpertinent 11 code at 6E98 is executed before performing the branch 12 at 6EA9 for detecting whether or not the copy-counter 13 save-field is less than the copy select field. If it 14 is less this means copies are yet to be produced and CRl is set to one at 6EAD. On the other hand, if 16 counter save is not less than copy select the run is 17 over and end flag is set at 6EB2. The program is 18 exited via the nonperti~ent code beginning with 6EBC.
19 The source code for the above flow chart is set forth below in Table VII.

... .

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m E~ m ~ z u ~ u H U Z
p I - -~ ' O ~ ~ ~ ~ er lY U~
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m ~ m o o o ~ ~D
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l Referring next to FIGURE 20, the code EC0 CR1 2 i8 next described. In the ~quence of machine prepara-3 tion for copy production, Ea0-CRt code has an effect ; 4 before the FIGURE 19 illustrated EC0 code, it being understood that several repetitions of code execution 6 occur during each machine preparation. In EC0-CR1 the ' 7 computer checks at 7006 whether or not there are no-8 paper modes; i.e., the machine operation will not g require transport of copy sheets from any of the paper supplies. If it is a no-paper mode there is no need to ll pick paper, therefore the entire code element is bypassed.
12 If, on the other hand, a paper mode is indicated, the 13 computer checks for CR1 at 7011. If CR1 field bit is 14 not set there is no need to pick paper, the remaining code can be bypassed. If CR1=1, then the trucks are 16 set to zero at 7015. Such trucks are those mechanisms 17 in copy production machine 10 which reach into the 18 paper supply bins for removing a copy sheet for copy 19 production or for separation sheets. Such devices are shown in the IBM TECHNICAL DISCLOSVRE BULLETIN, February 21 1974 on pages 2966 and 2967. With the trucks being 22 reset to an out of supply bin a no-pick position, the 23 computer is in a better position to select which of the 24 supplies from which to pick a copy sheet.
At 701A the computer checks for the separate 26 standby (SEPSTBY) flag. If it is ac~ive it means the 27 separation mode is being performed; then the alternate 28 truck for supply 54 is selected at 701E. Nonpertinent .. .
,, , - . ..... - . : .

.

1~14~1~

1 code is executed beginning at 7028 and this synchronous 2 program i~ exited to other ~0 codes (not shown) not 3 pertinent to the present invention.

Bos76o23 - 143 -~14~1t) H
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., ~14~10 1 The next synchronpus program pertinent to 2 practicing the pre~ent inve~tion is the EC2 code shown 3 in FIGURE 21. Ignoring the nonpertinent code including 4 code location 7188, the computer checks via the branch instruction at 718A whether or not the separate indicator 6 (SEPARIND) i5 active plus other conditions as seen in 7 Table IX. If the separate indicator is not active and a the other conditions are met, the original on the 9 platen of SADF 11 is exited via output instruction 71B5. Otherwise, the remove original light (not 11 shown) on panel 52 is illuminated by the instruction at 12 71CO. Then at 71C6, the remove copy 1 flag is checked.
13 If it is active then at 71CB the indicated flags are 14 reset and the CR field is reset to all zeros. Nonperti-nent code is executed at 71DC and this synchronous 16 program is exited. The above code illustrates one 17 intimate relationship between the synchronous programs 18 and the asynchronous program control operations of SADF
19 11. The described code is shown below in source code form in Table IX.

.. . . .

.
- ~ 23 ~; 24 ;~ ~ 26 ' . .

.

W H
u~ r-m ~ u ~ W ~ . _ Z u~ H a~ m r-- o ~:
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z w 1~1 N ~ ~ ~
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" ~ o o o r~ o o l~ ~ o r~ o o o ~ o l~

a U 1` U ¢ m a ~ ~ m m ~D~ u ~t~l U ~N a ~ W1` C~Irl u a W ~ N ~ m u w ~ o~ ~ -. Bo9760i3 - 14 7 -.
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tq 8 C, g ~, ., U W W W :
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u~ er c~ ~ o In ~ U W ~ _ o U ~ u~ o ~D U7 ~ ~
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or- o 1` o o r~ 1` 1` o r~ o o 1` 1` 1` o o o o o r~
.
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H H tq ~ ~ ~ ; W
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m ~ m æc~ ~ Oo W P~H 1C C ) P~ W H ~ C,~ ~,) C,) C~
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o o o U~ ~ C,) . .
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p, _ O o O ~- O O ~ O O O O O O o O 1` 0 0 0 r~ o o 1` o o o o o o o U~ ~ W ~ U ~ ~D
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a,-z . " .
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o ~ m In ~ In ~ ooo o oOo m ~ .
n a u.
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, lThe computer responds to the EC5 code with 2 respect to the separation ma~e as shown in FIGURE 22.
3 First CR2 is checked at 7367 to determine whether or 4 not the inner image erase l~p should be turned off as the image area is just beginning to pass the interimage 6 erase lamp 30E. sranch instruction at 736C checks to 7 see if the next operation is not auxiliary to copy 8 production. During auxiliary operations (copies not 9 produced) such as the separation mode, the inner image erase lamp 30E is left on to erase the image area. A
ll flush, separate mode, a preconditioning or other auxil-12 iary functions of a copy production machine require no 13 image transfers. If copy productlon is to ensue (not 14 auxiliary) then the inner image erase lamp 30E is turned off at 737F to allow an image to be imposed upon 16 the image area of photoconductor drum 20. Nonpertinent 17code 7386 completes the EC5 code. Source code is in 18 Table X. ~
l9Similarly, the EC6 code shown in FIGURE 23 enables the computer to control the document lamp.
Again, nonpertinent code is omitted at 73E5. The 22 branch at 73E9 checks for CR2 and end; i.e., is this 23 the last time CR2 will be used in the particular copy 24 production run. If yes, then at 73F2 the computer checks for separation mode (SEPSTBY) and a delay start;
26 i.e., is this a leading separation mode run. That is, 27 a separation mode run followed by copy production run.
; 28 If so, then the document lamp is turned on at 73FA.
29 Otherwise, nonpertinent code at 7402 is executed.
: ' .
BO976023 - 151 - ~
.

. - ' . . .. .

Tables X and XI respectively for the EC5 and 2 ~C6 code are included below, ao976023 - 152 -. : , ~14~

U~
w E~
P~ U ~
m E~ O E~

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tq W
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o U~ ~ ~ P; W ~ P
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E~ ~ ` u~
u~m o m ~a u a ~ ~ Z 1~ ~ Z ~ ~
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~ ~; ~ ~ ~ u ~ - u a~ u u ~ s x ~ *
E~ O u~
O C~
U~
O ~ u æ ~ ~
u ~ Z U m ~ C~ æ H ~ ~ z m ~E z pm~ N ~ H
H a ~ ~ E~ m ~ E~ m ~ E~ m E~ z I ~ 7 H ~ ~
x pU ~m ' o U~
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N
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u~ o o co 11') o co ~ o ~ 1-~ o ~ o 1:4 o~) r`
p~ ~ O O ~ O O ~ O O ~ O O ~ O O t`-) : o ~ o o 1` o o r--o o 1` o o r~ o o i~ ~ -1~ o t~ r o co Is~ ~
m ~ ~D a ~g . u ~ h U ~ 'r~ ~ ~ m r ~ f:c O W ~ ~ ~ u~

... .

o l :

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m o ~ m r co co o~
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~: h H m E~ W ~ E~
W W ~ ~ U~
Z ~ W o w ~m c: ~ I
~ æ ~ ~ w w m o m~ o ~:~ m a m ~Dz m ~D o u ~ m E~ Z E~
cl æ w u~ ~ z o ~
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ID ~ Z ~ m Z~ ~ E~
tl~ N ~ N t~ ~ ~ N E~
l ~ h ~ E~ m E~ m ~ m O
H ~,) Z
X ~ . .. ..
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O
O o ~ o ~ u~ o o ~r o o r~ o 1` ~
p, o o ~ro o ~r o o ~ o o ~r o o o ~r O C~ O 1`0 0 1~ 0 O. I` O O 1` 0 0 0 1`
I

~ ~ ~ ~ ~ ~o~

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. .

l The EC10 code, among other things, provides 2 for incrementing certain counters. As seen in FIGURE
3 24, after executing the nonpertinent code 77CC which 4 verifies that the state of CR2 is unity and that paper has been picked satisfactorily, the copy counter field 6 (CPYCTR) is incremented at 77E4. This field is used in 7 counting the number of separation sheets used during 8 the separation mode, as well as counting copies in copy 9 production runs. Following more nonpertinent code at 77E6 which includes a series of branches and counting ll steps occur that are not directly pertinent to the 12 separation mode. The branch at 77EC senses whether or 13 not an auxiliary function is being performed; i.e., 14 separation, flush, etc. If an auxiliary function is not being performed (copies are being produced), the 16 ACR1 register is incremented at 781F. The ACR register 17 contains a count indicating the number of copies produced 18 from a given image and is used primarily for copy error l9 recovery. However, ACR1 is also a count field which keeps a tally of the number of copies in the paper path 2I when one image is being produced or if no images are 22 being transfe~red; i.e., counts separation sheets. The 23 code at 77F8 through 781A concerns counting steps 24 pertinent to copy production. Then more nonpertinent code at 7820 or from a branch of nonpertinent code at 26 77E2 is executed before the program is exited. The 27 Table XII below shows source code associated with the 28 FIGURE 24 flow chart. ~`

~ ~ ~o E~ Z
~ ~ o ~
W ^ H P:; lY;
1I m ~ zO ~¢ H ~4 o o~ , E~~.) H H ~ U~ H H
~ ~ O W E~ O ~ ~ O
OW W ~ u~ W W ~ ~ O W ~ a~

o ~ o ~ m PIO e~O ~ OO ~ O
~ Z ~ Z :E Z ~ m ~ ~ W ~ O Z
~ W ~ ~ C~ U W L4 14 W u~ W .¢ X W Z ~ W U t I W ~

C~ ~ Z ~ E-~ :
E~ . ,¢
P v~ . m H ~ ~q ~ Z ~ N :r; H ~ c~ ~ m z - ~ W ~ o m ~ E~ m E~ z m a ~ ~ m - O ~; . .. . . ..
. ~ o ~ U~ U. ~D
~ - U~ ~
H . ~ -~ N
: ~ O ~ .
~1 ~ o ~ 4 ~ oo W o ~4 a~ 1~ 1:4 - O O ~D O ~ ~r o o ~ o 1~4 ~ E4 --- ~ -~ O O O O C~ O ~ CO O 1`~ 0 0 0~ 1` 0 ~ .~ ' O O O O 01~ O 01~ 01~ O 01~ 1~ o 1 ,~ ~ ~ o 1 o w m ~ r w ~
W E4 ~ m C~ ~d ~ ~ ~ W ~ W

.

~4~1a) ,,.- .

H

Z
+
1 l 0 ¢ ~ ~ C.) ~4 U 1~ f~ 1~ .') a z z ~el' H " ~ E~ a U O 11l H OO C~ E-l E O O
m m z ~

Z
E~ . .. . .
~. . .
W - . .
m ~ ~ m z u~ o u~ C ~n a ~ u~ O U~

o ~ .
u~ a .
p, o ~o o ~ ~ o ~ ~o p~ . ~ O ~ O O OD ~ O
o o o o i` o o ~ o o o m m o ~r ~ m mo m D mmmm~ a~ mmmmr-~
a ~ o~ m ~ ~ ~ooooo oO Ooo o ~

l~hC~

~ .
E~
E~
H
E-~

:Z t` ~ H Z E~:l 1:~ H ~ ~ a ~ ~ ~;
5: m mz a 0~ ~ Z H l' ~ ~¢
Z Z Z H
. . - 1:-1 H li~
.. ... .
~: .. ,, . . æ

.. ... . ..
O ~
U~ :, V

', .
~ .
O
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p, o~ o o CO o O ~` o o 1` o u~ ~n a~ a ~
O ~ er - co~ a O co a) co c~
~ I` ~ I` I` I` r~

. . .

1 The last synchronous program portion to be 2 described is EC16 shown in ~IGURE 25. After executing 3 nonpertinent code at 7ACF, t~e status of the CR3 bit is 4 sensed at 7AD9. If it is aative (CR3=1) then the branch at 7ADD enables the computer to sense whether or 6 not separation mode is not active or if there is a 7 duplex mode. If yes, the instruction at 7AE9 moves the 8 duplex vane down so that copies will go to the interim 9 storage unit 40. On the other hand, if separate mode is active or it is not duplex then the instruction at 11 7AEE ena~les the computer to move the duplex vane up -12 for directing copy sheets to output portion 14.
13 At 7AF5 the computer checks CR2, separate 14 standby, and end; i.e., has the last separation sheet been already picked from the alternate paper bin 54?
16 If yes, then the instruction at 7B03 enables the computer 17 to reset separate standby, separate indicator and the 18 select primary paper bin~memory indicator.
19 Following 7B03 the computer checks at 7B03 whether or not the separation selection is greater than 21 zero. If it is, then at 7B15 the previous separation 22 select (PRVSLCT) is checked for equality with the 23 present separation seleot. The previous select is a 24 memory field for indicating to other programs the number of separation sheets transported during the last 26 previous separation mode run. Upon equality, the 27 computer at 7B1C makes separation select equal to 28 zero (end of the separation run).

~.

" :

l If, on the other hand, if the separation 2 select at 7BOF was not greater than zero, i.e., equal 3 to zero, then at 7B20 the copy select field is made 4 equal to the previous separ~tion select count. Then at S 7B26 the program paths join where the computer senses 6 whether or not there is an outstanding start request.
7 If so, the start latch request is set at 7B2A. Then at 8 7B30 the computer checks whether or not the copies 9 previously made used copy sheets from the primary paper bin 35. If the copies were made from the primary bin, ll which is the usual case, the alternate light is turned 12 off and the primary bin is selected at 7B35. After 13 executing nonpertinent code at 7B4C the program is 14 exited. Note that if the branch at 7AF5 indicates that the end of the separation run has not occurred or other 16 conditions outside of separation runs have occurred, 17 the program ls then exited via the nonpertinent code 18 7B4C. The source code for the above-described flow l9 chart is shown below in Table XIII.

1114~1~

E~ ~ .
tq ~ ~ . .
H ~ Q
~ O æ r ~ z ~ ~ z C,) H Q H H H U~ Z

~ E~ * X C ) ~ H * H . * ' ~ lc liil ' 1~`¢ X u~ . .
~ ~,W ~ X
:~ w . ~ mui ~o m Q~l ~ m C~ 1~ ~O ,0 ~ O ~ O X ~
x ~ ~ m ~ ~ m ~ g m O ~j - W ~ 1 r z ~ w W~ ~ W H p, Z~ m :r V~ W .H~ ~ ~ m E~
to u ~: ~ u ~ oP
I ~
H
X

,¢ :. O ~ ~ .
o o ~ ~ o ~ r--o ~ u~ o ~ ~ o p, o o ~¢ o o ~¢ o o ,¢ o O ~¢ O O .¢ f~
- o o o 1` o o r~ c~ o ~ ~ o r~ o o ~ 1`

~: m ~ w ~ w o ~ o~ O
m~ ~ o ~ m c~ . ~
9 ,9 Q Q C~ W .~-l W ~ W ~ ~ W

so976023 - 162 -... .

H
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W ~ ~;
W o ~ W
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O X u~ ~ ~D o ~ E~
~ ~ m ~ tn ~ . m u~ m ~K ~Y; U u~ O ~ li3 U E~
~ ~a~ o ~ ~ ~ z U U ~
z mum w~ w W ~ N ' E~
H
a ~u ~ -ommz ~ m zwmm m m~ ~a ~ m~w~
~a~ a z~m~ m~mm W . ~ H E~ -,) , p~ . . . . .
P ~ ~ .- _ ~ . .
o m uw W

. ~
o ~ I` O ~ I` U ~ o o ~r ~r o ~ u~ o ~ u~ ~ o r--~ 0O~ 0O ~ oom oomoom o 0OO
o oo~ oo r~. oor~ oor~oo1` o ooo o ~m ~ w~ m~ ~ ~m~
-wo _~ ~ ~muwo_ ~ ~r~ ~ `
t~ W ~ ~ ~ ~ , 14 0 0 0 0 0 o o ~ m ~ mmm .. .

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P~ ooo oOm oo oom o om ~:q o o o o o o 1` o o o o ~ o o 1` 1`
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z w m ~ u~ m z w m ~ ~
P; P ~ U H p~ ~J E~ W U H p~
cn a E~ m .. . . ..
; . . . . . . . . -j o ~ a p~ .
~ - o O ~ CO ~ ~ ~ ~ O ~ D O In ~ U
o U o ~ ~r o ~ ~ o ~ o ~
1: ~ oo oo m oom ooo m oom -: OO O O O ~` O o 1~ o o o r~ o o 1~
I

1:
O ~ ~ ~D O
a m a~ ~ cr a~ ~ o~ W ~ a O ~: ~
o ~ ~ ~ ~C U ~ ~ ~
'~ Q mm mm mmm mmmmmm I
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BO976023 - 165 - . ~

u~
~;

o U
XE~ H
~ ~O ~
H _ p, ~ ,.
a E-l ~ UlL1 K
~ K ~1~K ~_) f: ~ ~ H
E ~ H p~
N E~P:; ~ K
o ~ O C) m ~: m ~ ~: m H m H ~ m U ~:U~ P~U~-- ~9 U
~ ~ P~ ~ Pl P' H ~ ~ ~ ~- D U
m K P~
E~ H W E~ H
~3 m P~ S~ m u~ ~: o m m z H
W

o ~ ~ ~
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o r ~ o ~ ~4 o ~
. . . r~o~ 0~ 0 ~ ~a P~ ooo oooo oo o oo o o o o oo o o o o o o O

~D ~D ~~ O ~ O ~ ~- IC
r ~ o c~
m ~ D m ~ m ~ .
Q ~ m ~

U ~ O
o mmm m mmm mm m mm 1 Interleaved with execution of the synchronous 2 programs are the asynchronous programs 260, 261. The 3 asynchronous progxams 261 a~e directed toward job 4 control of copy production ~achine 10. That i9, these programs 261 tie the various copy production runs and 6 separation runs and flush runs together for completing 7 a job, particularly as to logically extending the 8 storage capacity of the collators in output portion 14.
9 A first of these job control asynchronous programs is shown in FIGURE 26 which is executed each time the 11 machine 10 stops. That is, photocon~uctor drum 20 has 12 stopped rotating. At this time many chores have to be 13 performed by the computer relating to the next startup 14 of copy production machine 10 so that job continuity can be preserved or a job can be terminated. As can be 16 expected programming at the end of such a run is quite 17 complex, having an effect on all operational features 18 of the copy production machine. Accordingly, nonpertinent 19 code indicated at 4256, 420B and 42~6 is substantial.
That portion of ACRCOAST that pertains to the separation 21 mode includes instruction 425C wherein the computer 22 senses whether or not the copy production machine is in 23 a separation mode run (SEPACTV). If it is in a separation 24 mode run, then at 4261 the computer resets the enable flag there~y disabling the computer from sensing inputted 26 operator parameters. Then at 4266 the computer determines 27 whether or not a copy recovery register termed ACR2 is 28 greater than zero. If it is greater than zero then an ", ~14~
1 ensuing copy production run will be overlapped with the 2 present separation run. Th1s overlap is indicated by 3 delaying the start at 426B ~ELAYSTL=l). This delayed 4 start memorizes that a star~ has been requested and will be used by other programs executed by the computer.
6 Then at 4271 the computer sets the separate indicate 7 flag SEPARIND which turns on the separate indicator 8 associated within switch 57 of panel 52. Also, the 9 alternate paper supply 54 is selected. Then at 427D
the computer determines whether or not the collate mode 11 has been selected by the operator. If so, the nonperti-12 nent code at 4286 is executed. On the other hand, if 13 collate was not selected then the copy select is equal 14 to one at 427F. That is, only one separation sheet will be supplied in a noncollate mode to exit tray 14A.
16 The source code associated with the FIGURE 26 illustrated 17 flow chart is listed in Table XIV below.

19 ' ~' ' Bo976023 - 168 -~q :
w o - H
. .
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H

1 z H
~U H ~
w ~ n ~ x E~ r~ ~ W ~ W - P~ U~ ~ `
U~ o U ~ K O U ~ o H O
~ m P; m m o P w P ~ m p m O ~ u~. U ~ U- u ~ tn ~ U
U E~ ,~ WZ ~ X ~ ~ ~

I E~ W W Z W H
il U~
~ 3 w m w ~ ~ H ~ . ~ 3 u~ m H U~ H @1 N E~ m H t~ ' O.` ~ U~
x w ~ m ~ ~ z ~ w E~
X~ : ' ~U

' '-.
I` ~ ~ ¢ ~ O _I r~ r~
_I ~roo~~DO~ 0~ ~ro~
~, o o ~o o o o o f~ o o o o o ~P. o o o o o ~P o o o . . .
~ ~ O ~ ~r 1~ ~ ~ ~ ~D O ~, ~r o a~ ~ ~ a~ D m o ~ m ~ 2 U W ~ m . .

.. :' . : , . : . . , . . , . : . .

p;
~ H
H

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O
--I 1~ o ~ o r~ o o~ O t,) p,, O O O O O O O N O O O
O 000 000 0~ oo o 1~ 1` 0 1` 1` 0 1~ C.) C.

o ~ ~ ~ ~ ~ ~

, -. . .
.
.. ,: . : . . .

1~14~

1 An important jo~ control asynchronous program 2 ACRDEC is shown in FIGURE 27. Before proceeding with 3 the details of the program, the ACR count fields are 4 divided into a plurality of ~ubfields. For example, ACRl is a count field indicating a number o copies of 6 a given image just entering a copy path of copy produc-7 tion machine 10. ACR2 is a count field of copies of a 8 single image different from the ACRl indicated image 9 which copies entered the copy path just prior to the ACRl counted copies. Similarly, ACR3, 4, 5 and so 11 forth indicate the number of copies of respective 12 images. As copies leave the copy path, as sensed and 13 indicated by switches S2 through S4 (FIGURE 1), the ACR
14 count field of the first inserted image, i.e., a nonzero ACR count field having the highest numeral, is decremented.
16 This ACR is designated as ACRX. Accordingly, as each 17 copy leaves the copy path the computer follows the 18 instruction at 451E to decrement ACRX. Accordingly, 19 the numerical content of the various ACR count fields indicate the number of copies of each respective image 21 currently in the copy production routine copy path.
22 After decrementing ACRX, the computer at 4558 23 determines whether or not ACR2 or 3 has just gone to 2~ zero. If either of these have gone to zero, the endrun bit is set at 4563. This bit indicates that the ccpy 26 path now contains the copies of the last image to be 27 reproduced. By way of explanation, when more than one 28 ACR count field is nonzero, the number of copies made 1~14~1~

1 from each image is less than that necessary to completely 2 fill the copy path. Accor~ingly, when the higher 3 numbered ACRs have all gone to zero, including ACR2 or 4 3, then the computer knows ~hat all of the copies of the last image are the only ones remaining in the copy 6 path. The ENDRUN bit is a cautioning bit indicating 7 the end of a run is imminent.
8 Then at 4569, the computer looks to see g whether or not ACR2 iS equal to zero and whether or not the STOP2 bit iS active. If so, then at 4572 the 11 computer can indicate that no copy recovery (NOACR and 12 ACRREQ=0) is required and that there is no requirement 13 for emptying interim storage unit 40 (AUTOFLSH=0).
14 Then some nonpertinent code 457A iS executed.
The branch at 4583 determines whether or not 16 an error recovery request has been made. If not, 17 nonpertinent code beginning at 4 5DE is executed. On 8 the other hand, if there-is an error recovery request 19 certain recovery code indicated by 4588 is executed.
After the recovery code which can cause a branah also 21 to 45DD, the computer resets the end indicator, sets 22 SIDE2 equal to one and resets the error recovery request.
23 Then after executing nonpertinent code 45A4, at 45C7 -24 the computer checks whether or not the interim storage unit 40 is to be emptied (AUTOFLSH). If it is to be 26 emptied, AUTOFLSH is reset, flush is set to unity 27 indicating the interim storage unit 40 Will be emptied, 28 a start latch F is set to one, and the duplex light on 1~4~1~

1 panel 52 is extinguished. ~fter the nonpertinent code 2 4sDD, the computer checks ~ 4600 whether or not the 3 flush indicator is active. If it is active, then at 4 4605 the computer checks whether the stop indicator i5 on or the interim storage unit 40 is empty. If either 6 one of those occur, then at 460E the flush bit is reset 7 and enabled is set indicating operator selections are 8 permitted as copv production machine 10 is stoppin~
9 At branch instruction 461E the computer checks whether or not interim storage unit 40 is empty. If unit 40 is 11 empty, at 461E the computer resets the SIDE2 indicator 12 at 462H. The program paths join again at 4631 where 13 the computer checks for the SIDE2 indicator. If it is ~-14 active, then at 4635 the computer again checks to see whether or not interim storage unit 40 is empty. If it 16 is empty, SIDE2 is reset at 4639. Thén at 4640 and 17 4645 the computer checks for the ENDRUN flag, i.e., the 18 end of the run is in sight, and whether or not separate 19 is active. If both conditions occure, then at 464A, the computer resets separate active, sets the enabled 21 flag for enabling operator input and resets the tra1ling 22 separator flag. From an operator view, when the separate 23 indicator at button 57 goes off, additional parameters 24 can be entered. When SEPTACTV iS reset, other programs, 25 as described, reset SEPARIND.
26 At 4657 the computer checks to see when any 27 ACR has gone to zero and whether or not the trailing 28 separator has been set to zero. If the conditions are 1 met, then at 4661 the copy ~elect field is made equal 2 to the separate select fiel~r i.e., the number of 3 copies to be produced will o~ual the number of separator 4 sheets provided. Also the t~o fields, separate select and previous separate select, are set to zero. At 4672 6 the computer checks whether or not interim storage unit 7 40 is empty. If not, it sets SIDE2 and sets ACRLOST
equal to zero at instruction 4676. ACRLOST is a register 9 in area 263 indicating the number of copies lost from ISU 40 in a copy transport error. Then nonpertinent 11 code is executed at 467F.
12 At 46A5 the computer checks to see whether or 13 not any ACR has gone to zero. If yes, at 46AA the 14 paper pick trucks are reset, i.e., returned to their inactive position. Nonpertinent code is executed at 16 46B6. The separate indicator is checked at 4606 to 17 determine whether or not a separation mode should be 18 started at 46E4. Otherw~se, nonpertinent code is 19 executed at 46EC. Source code for implementing the 2Q above-described flow chart is shown below in Table XV.

:

..
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O * ~ * O W r~ ~ O ~ U ~
w * m w ~
H * H * ~ Z U~
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w f C W W
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C~Z ~; * ~ * C~ W ~
H * ~El* O m_ H H HU H U O
E-~ ~ * ~ H ~ U ~ ` $ a~ 1` ~
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E-~ * U * WZ ~ lZ K K ~ K K K K K K ~ K K K
~ ~ Z * ~ 2 * HZ K U ~ ~ X lU¢ ~U¢ ~ CC X ~ U~ f¢
al Z u!~ * u~ * P;
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E-l * U~ * ~ ¢ N m m * o ~ * , ~ ~ m N H ~q Z '- E~ N H E-l H N m . .
W Hæ ** am* I w o~mzm~ nmmu~u~zmm~
U V * ~ *
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W 0~ O W 14 W oo U~ o W ~o Cl~ U~ O
u~ O In o o In O Ln U~ O O O U~ ~ O
o ~r o o ~r o er ~r o o o er ~ O
~ a~ o W W ~ ~ o ~ o ~ ~ W
m u ~r a m ~ a u ~ m a C~ er w ~ ~ m a ~
U ~ - ~ ~ N ~ ~ ~I

BO976023 - 175 _ .

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O~ o ~ o o ~o ~ o ~ o r~
O-- W O 1~1 O o ~ o ~ o 1~ o P; ~ ~ ~i ~ r~
no~a~;aao~oa~ ~ a c~r a P:;ao m o; x ~; ~ m ~ ~ ~ m X ~X
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1 Finally, in FIGURES 28 and 29 the billing and 2 edge erase programs are shown as they relate to the 3 separation mode. Only one instruction in each of the 4 programs is pertinent; in FIGURE 28 instruction 5DDD
and in FIGURE 29 instruction 7C5C are pertinent. Both 6 are identical in that the computer branches on whether 7 or not an auxiliary operation (separate, flush, etc.) 8 is being performed. These two instructions are identical 9 to the instruction 77EC of FIGURE 24 as detailed in source code in rable XII. - -11 In summary, the copy production machine 10 12 can either be hardware or software controlled for 13 effecting the separation mode which effects a logical 14 extension of the capability of collators in that plural sets of copies can be inserted into given collator bins 16 with a separator sheet and with a minimal operator 17 inconvenience. The automatic controls described above 18 can take any of a plurality of forms including program- -19 mable logic arrays, read only memories, hard logic as indicated in the first part of the application, or a 21 programmed computer as set forth in the preferred 22 embodiment. The form of technology involved in imple-menting the present invention is not pertinent to the 24 practice of the invention, the important features being the machine functions performed in implementing the 26 separation mode.
27 Inhibiting billing for separation sheets i9 intended 28 to include separately counting separation sheets. Then, 1~14~

1 the separate separation count can be used for a reduced 2 billing rate (regular copy billing rate inhibited) or 3 as a basis for relating copy billing. In the broad 4 method aspects, the billing meter could, in fact, be actuated and the separate separation count used to 6 adjust the total bill--this is still inhibiting billing.
7 While the invention has been particularly 8 shown and described with references to a preferred 9 embodiment thereof, it will be understood by those skilled in the art that various changes in form and 11 details may be made therein without departing from 12 the spirit and scope of the invention.

.. . . . . .
.
, ~' ~, " '

Claims (23)

    The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:
    1. A copy production machine having a copy pro-ducing portion, plural output portions for receiving pro-duced copies from said copy production portion, and an image input section for supplying images to said copy producing portion for use in producing copies of said supplied images on copy sheets, one of said output portions having a given capacity for receiving said produced copies, means indi-cating an end of a copy producing run, means storing copy sheets, said copy producing portion having copy producing and standby modes, the improvement including in combination:
    a control means having, a copy select register for indicating a first number of copies to be produced, said first number capable of indicating a number of copies greater than said given capacity, a copy count register for indicating the total number of copies of one image produced in a given copy production job; said copy production job being one or more copy producing runs of each image to be reproduced as said copies, separation initiating means indicating completion of a job segement, said job segment including one or more of said copy producing runs, separation sheet transporting means responsive to said separation initiating means to activate said copy production portion to transfer from said means for storing copy sheets as job segment separation sheets to said one output portion in accordance with a number of copies of each said image
  1. Claim 1 Continued produced in a given one of said job segments, and accumulating means operative in response to said separation indicating means indicating a job segment for accumulating a count from all prior job segments and sup-plying same to said copy count register whereby said total number of copies indicated is for all job segments produced.
  2. 2. The copy production machine set forth in Claim 1 further including means responsive to said separation sheet transporting means to inhibit said copy production portion from transferring an image to said transferred copy sheets during each said separation transfer.
  3. 3. The copy production machine set forth in Claim 1 wherein a second of said output portions has a single copy receiving bin and means in said control means responsive to said one output portion being selected to force transfer of but one copy sheet during each of said separation transfers.
  4. 4. The copy production machine set forth in Claim 1 wherein said one output portion has a plurality of copy bins and means in said control means to selectively transfer a number of separator sheets in each said separator transfer having a predetermined relation to said given number of copies such that one copy sheet is transferred to each of said copy receiving bins which receive predetermined ones of said copy sheets bearing images.
  5. 5. The copy production machine set forth in Claim 1 having first and second of said means to store copy sheets and wherein copies are to be made by said copy production portion from one of said copy sheet means and means to select said copy sheets from said second of said copy sheet means during each said separation transfer and transfer such sheets through said copy producing portion.
  6. 6. The copy production machine set forth in Claim 5 further including means for inhibiting said copy produc-tion portion from impressing images on said copy sheets during said separation transfer.
  7. 7. The copy production machine set forth in Claim 1 wherein said separation initiating means includes manually actuable means for indicating an end of a job segment, memory means in said job initiating means for memorizing a manual actuation thereof, irrespective of the copy production mode in said machine, and means responding to said memory means and said end of run means to actuate said separation sheet transporting means.
  8. 8. The copy production machine set forth in Claim 7 including means responsive to said separation sheet transporting means to reset said memory means.
  9. 9. The copy production machine set forth in Claim 8 wherein said control means is responsive to said change in mode from a producing mode to a standby mode to transfer a first copy sheet to each of said bins to receive said copy sheets and to a change in mode from said standby mode to said producing mode to transfer a second sheet to said bins receiving said copy sheets whereby two sheets are supplied to such bins intermediate to successive copy producing runs.
  10. 10. The copy production machine set forth in Claim 1 further including last copy detecting means, said last copy detecting means supplying a signal to said job initiating means to indicate a change from a copy producing mode to a standby mode in said copy producing portion and control means in said copy production machine to close down copy production and means in said control means for inhibiting said close down whereby said copy production machine transfers said copy sheets in said separation transfer without first stopping the machine.
  11. 11. The copy production machine set forth in Claim 1 further including interruption means for inter-rupting transfer of said copy sheets during said separation sheet transfer and further including means for restarting said copy production machine during said separation sheet transfer.
  12. 12. The copy production machine set forth in Claim 1 when said control means includes a programmed micro-computer having input registers and output registers, said separation initiating means supplying a separation indication signal to said input registers addressable memory means connected to said microcomputer and having said copy select register, said copy count register, and programs sensible by said microcomputer to respond thereto to perform a series of logic steps for program effecting said separation sheet transporting means and said cumulating means, and said copy production portion being connected to said output registers and including control circuits responsive to signals therein to activate transfer of copy sheets during said separation transfer.
  13. 13. The copy production machine set forth in Claim 1 wherein said image input section has an original document imaging location, includes an original document feed for transporting original documents to and from said imaging location, sensing means indicating an original document is ready to be transported to said imaging location and means responsive to said sensing means indication inhibiting said separation sheet transporting means whereby separation is delayed until after copy production based upon an image in said original document at said sensing means.
  14. 14. The copy production machine set forth in Claim 13 wherein said inhibiting means is operative to delay said separation by but one copy production run irrespective of a succession of original documents placed at said sensing means.
  15. 15. The copy production machine set forth in Claim 1 wherein said image input section includes a document feed and an imaging location, said document feed capable of transporting original documents to be copied to and from said imaging location, an input tray for receiving an original document to be copied and being positioned at said document feed for enabling a positioned original document to be transported by said document feed to said imaging location, an entry sensor adjacent to said tray for sensing and indicating an original document ready to be transported to said imaging location, and control means responsive to said entry sensor indication to delay operation of said separation sheet transporting means.
  16. 16. The copy production machine set forth in Claim 1 further including a plurality of sheet supply means, each capable of supplying sheets for copy production, means in predetermined ones of said copy sheet supply means indicating size of copy paper sheets in respective ones of said copy paper supply means;
    means comparing said copy paper size indicators and supplying a control signal in accordance with said comparison;
    means selecting a first one of said copy paper supply means as a source of copy paper to produce copies therewith;
    inhibit means responsive to said comparing means supplied control signal to inhibit said control means when said copy paper size comparison indicates predetermined differences in copy paper sizes in said copy paper supplies but permits selection of a separator sheet for differences in size other than said predetermined differences.
  17. 17. The copy production machine set forth in Claim 1 further including means enabling copy production requiring a plurality of image transfer passes to complete copying for one copy sheet, interim storage means for storing partially completed multi-pass copies, interim indicating means indicating copy sheets in said interim storage means, control means responsive to said interim indi-cating means indicating copy sheets to inhibit actuation of said separation sheet transporting means, and having means for transferring copy sheets from said interim storage means to said output portion whereby when said interim storage means is empty said inhibition is removed.
  18. 18. The method of operating a copy production machine operating in a succession of independent copy production runs, the steps of:
    (1) selecting a given number of copies to be produced of each of one or more images, (2) limiting copy production of each suc-cessive image being produced in each copy production run to a limited number greater than one and less than said given number, (3) indicating copy production of images produced to said limited number, (4) supplying separator sheets to identify job segments, and (5) producing a number of copies of the same images up to a total of said given number or said limited number, whichever is less, but indicating total copies produced of each image.
  19. 19. The method set forth in Claim 18 wherein in step (4) supplying only one separator sheet irrespective of the number of copies produced.
  20. 20. The method set forth in Claim 18 including the steps of (6) manually selecting an indication of a job segment while copies are being actively produced as indicated in step (3) in one of said copy production runs, (7) memorizing in said machine said manual selection, and (8) at the end of said one copy production run performing step (4).
  21. 21. The method set forth in Claim 20 further including the steps of (9) before the end of said one copy pro-duction run and while memorizing said manual selection in step (6), indicate one more image is to be produced before the end of a job segment, (10) producing copies of said one more image as in steps (2) and (3) and then performing step (4).
  22. 22. The method set forth in Claim 18 for pro-ducing sets of duplex copies, the steps of:
    (6) in copy production as in steps (2) and (3), producing duplex copies in two immediately successive copy production runs, (6A) in a first of said successive copy production runs producing a one-side partially-completed duplex copy as in steps (2) and (3);
    (6B) storing said partially completed copies in said machine, (6C) in a second of said successive copy production runs producing a second image on copies stored in the machine in step (6B), and (6D) supplying the step (6C) produced copies as completed copies, (7) indicating end of a copy job segment while partially completed copies are stored in said machine, (8) upon completing steps (6A, 6B) inhibit-ing steps (6C, 6D) and transport said partially-completed copies as completed copies and then perform step (4).
  23. 23 . The method set forth in Claim 18 including the steps of:
    (6) intermediate said succession of copy production runs indicating said given number, and (7) during any of said succession of inde-pendent copy production runs replacing the indication of (6) with the cumulative number of step (5).
CA305,243A 1977-10-13 1978-06-12 Copy production machines having job separation capabilities Expired CA1114010A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CA000377012A CA1141815A (en) 1977-10-13 1981-05-06 Copy production machines having job separation capabilities

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US841,623 1977-10-13
US05/841,623 US4201464A (en) 1977-10-13 1977-10-13 Copy production machines having job separation capabilities

Publications (1)

Publication Number Publication Date
CA1114010A true CA1114010A (en) 1981-12-08

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CA305,243A Expired CA1114010A (en) 1977-10-13 1978-06-12 Copy production machines having job separation capabilities

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US (1) US4201464A (en)
JP (2) JPS5916263B2 (en)
AR (1) AR241969A1 (en)
CA (1) CA1114010A (en)
DE (1) DE2844098B2 (en)
FR (1) FR2424819B1 (en)
GB (2) GB1588800A (en)
IT (1) IT1159139B (en)

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Also Published As

Publication number Publication date
AR241969A1 (en) 1993-01-29
JPS5465544A (en) 1979-05-26
JPS5916263B2 (en) 1984-04-14
FR2424819B1 (en) 1985-10-04
DE2844098A1 (en) 1979-04-26
GB1588799A (en) 1981-04-29
FR2424819A1 (en) 1979-11-30
DE2844098B2 (en) 1981-05-27
IT1159139B (en) 1987-02-25
JPS5912170B2 (en) 1984-03-21
GB1588800A (en) 1981-04-29
JPS5465543A (en) 1979-05-26
US4201464A (en) 1980-05-06
IT7828235A0 (en) 1978-09-29

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