CA1203921A - Diffusion method to produce semiconductor devices - Google Patents

Diffusion method to produce semiconductor devices

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Publication number
CA1203921A
CA1203921A CA000454727A CA454727A CA1203921A CA 1203921 A CA1203921 A CA 1203921A CA 000454727 A CA000454727 A CA 000454727A CA 454727 A CA454727 A CA 454727A CA 1203921 A CA1203921 A CA 1203921A
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Canada
Prior art keywords
dopants
predetermined
dopant
approximately
chamber
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000454727A
Other languages
French (fr)
Inventor
Laszlo Szolgyemy
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Microsemi Semiconductor ULC
Original Assignee
Laszlo Szolgyemy
Mitel Corporation
Zarlink Semiconductor Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Laszlo Szolgyemy, Mitel Corporation, Zarlink Semiconductor Inc. filed Critical Laszlo Szolgyemy
Priority to CA000454727A priority Critical patent/CA1203921A/en
Priority to IT8421688A priority patent/IT1234946B/en
Priority to DE3430009A priority patent/DE3430009C2/en
Priority to US06/655,439 priority patent/US4939103A/en
Priority to GB08426023A priority patent/GB2158992B/en
Priority to JP59251431A priority patent/JPS60245218A/en
Priority to FR8505917A priority patent/FR2565734A1/en
Application granted granted Critical
Publication of CA1203921A publication Critical patent/CA1203921A/en
Expired legal-status Critical Current

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    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B31/00Diffusion or doping processes for single crystals or homogeneous polycrystalline material with defined structure; Apparatus therefor
    • C30B31/06Diffusion or doping processes for single crystals or homogeneous polycrystalline material with defined structure; Apparatus therefor by contacting with diffusion material in the gaseous state
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/223Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a gaseous phase
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/935Gas flow control

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Chemical Vapour Deposition (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Die Bonding (AREA)
  • Cleaning Or Drying Semiconductors (AREA)

Abstract

ABSTRACT

This invention relates to the manufacture of semiconductor devices and more particularly to a method of diffusing an impurity layer into a substrate. The disclosed method comprises the steps of placing a body of semiconductor in a vacuum doping chamber, evacuating air from the chamber, subjecting the body to a dopant in the form of a gas or vapour while simultaneously heating the chamber to at least the diffusion temperature. The diffusion process is controlled by monitoring and controlling the pressure and the temperature of the dopant gas in the chamber.
The diffusion method can also be carried out with the further admittance of a reactive gas or with the further admittance of a second dopant gas and a reactive gas together.

Description

3~

0] This invention relates to -the manufacture of 02 semiconductor devices and more particularly relates to 03 a process for the deposition and diffusion of an 04 impurity into a semiconductor substrate.
05 One of -the most important steps in a process 06 for fabricating semiconductors is the di*fusion of 07 impurities into a semiconductor substrate. One of the 08 usual first steps ox this process is the deposition of 09 a controlled quantity of impurities into a surface film of the semiconductor. The impurities are then 11 distributed and driven into the semiconductor as a 12 result of high temperature solid state diffusion.
13 While the second step has in the past been reasonably 14 well defined and controlled, the first step has been subject to more variation.
16 One of the most widely used deposition 17 methods is known as hot wall open tube furnace 18 deposition. In this method, semiconductor 19 substrates are held on carriers and placed into a furnace which is purged by a controlled gas 21 composition. Dopant impurities in gas or vapor form 22 are mixed into the purging gas in a predetermined 23 concentration. A yenerally accepted explanation of 24 the process is that active dopant molecules rapidly react with -the semiconductor surface and as a result a 26 stagnant dopant-free gas ilm develops above the 27 semiconductor surface. Deposition of dopan-t molecules 28 into the surface occurs as a result of diffusion 29 through the stagnant gas film. The stagnant dopant free gas film impedes the diffusion process, and as a 31 result, doping speed is defined by a complicated 32 function of temperature, composition and fluid 33 properties of the gas, and surface properties of the 34 semiconductor. Simultaneous control over all of thesP
parameters is difficult. Consequently, control over 36 the entire doping process is rather poor. Also, 37 because of the generally very high concentration of /

39'~

01 dopant atoms on the surface of the semiconductor body, 02 lattice distor-tions tend Jo occur which detract from 03 the desired elec-tronic characteristics of the 04 resultan-t semiconductor body.
05 As an al-ternative to the aformentioned 06 diffusion process, a second deposition technique known 07 as the ion implantation method is commonly used. In 08 this method dopant atoms are ionized and are then 09 accelerated in the form of a high energy ion beam which is direc-ted onto the semiconductor surface. The 11 ions penetrate into the surface to a depth which is 12 proportional to the energy of the beam. Variation of 13 the ion beam intensity provides a means for precisely 14 controlling impurity depth dis-tribution and doping levels in the semiconductor.
16 The ion implan-ta-tion method has an 17 advantage over the above mentioned diffusion process 18 in that it is an externally controlled non-equilibrium 19 process, whereas the diffusion process is characterized by unchangeable physical conditions such 21 as the diffusion constant of -the impurity in -the 22 semiconductor material. Unfortunately, considerable 23 damage is done to the semiconductor crystal structure 24 by the high energy ion penetration, and the ion stream has been known to drag impurities from remnant gas and
2~ from the semiconductor surface into -the semiconductor.
27 A method known as sealed tube doping was in 28 frequent use during the early days of semiconductor 29 device fabrication. According to this method, the semiconductor substrate and a solid-state dopant are 31 sealed in an evacua-ted tube. The -tube is then heated 32 to a predetermined temperature whereby the solid state 33 dopant evaporates and diffuses into the semiconduc-tor 34 substrate. Control of the doping level by variation of temperature and dopant quanti-ties is possible but 36 this method is not applicable for mass produc-tion.
37 All prior art methods for diffusing active
3~

01 impurities into a semiconductor substrate suffer from 02 an inability to provide optimal dopant concen-trations 03 and distributions and to eliminate unwanted impurity 04 inclusion in the semiconductor substrate The prior 05 art methods also suffer from an inability to provide 06 precise and accurate control of simultaneous 07 deposition of two or more dopants. The simultaneous 08 deposition of two or more dopants is for example 09 necessary in the production of certain devices requiring semiconductor layers with very high dopant 11 concentrations and high carrier lifetimes. Bipolar 12 transistors with high efficiency emitters, and solar 13 cells are but two examples of such devices.
14 The instant invention is a method and apparatus for carrying out the method of diffusing 16 optimal dopant concentrations and distributions into a 17 semiconductor substrate while eliminating unwanted 18 impurity inclusion. The method further allows for 19 precise accurate control of simultaneous deposition of two or more dopants while guarding against latiice 21 distortions and damage to the semiconductor crystal 22 structure. In addition, the inventive method is 23 applicable to mass production techniques.
24 In general the invention is a method for diffusing one or more impurities into a semiconductor 26 body comprising the steps of placing the body in a 27 vacuum chamber, creating a vacuum in the chamber, and 28 admitting one or more continuous flows of gas or vapor 29 phase forms of dopants in predetermined proportions into the chamber. The one or more slows are 31 controlled so as to exert a predetermined pressure on 32 a surface of the body. The body is heated to a 33 predetermined temperature and for a predetermined 34 length of time which is sufficient to initiate one or more reactions between respective ones of the dopants 36 and the surface, such that predetermined amounts of 37 respectiv- ones of the dopants diffuse into the body 38 thus forming a layer having a depth which is 3~L

0~ proportional -to -the temperature and -time, and having 02 respective dopant concentra-tions which are proportional to 03 the predetermined proportions and the pressure.
04 The invention is also a me-thod of diffusing one 05 or more impurities into a semiconductor body comprising 06 the steps of placing the body in a vacuum chamber, 07 creating a vacuum in the chamber, admitting one or more 08 continuous flows of gas or vapor phase forms of dopant 09 compounds in predetermined propor-tions in-to the chamber, and admitting a continuous flow of a reactive gas into the 11 chamber, the continuous flows are controlled so as to 12 exert a predetermined pressure on a surface of the body.
13 The body is then heated to a predetermined temperature for 14 a predetermined length of time whereby the dopant compounds and the reactive gas react to produce respective 16 ones of elementary dopants, or intermediate compounds 17 which react with the surface to produce the elementary 18 dopants. The temperature is sufficient to initiate the 19 reactions between respective ones of the elementary dopants and the surface such that a predetermined amount 21 of the elementary dopants diffuse into the body forming a ~2 layer having a depth which is proportional to the 23 temperature and time and having respective dopant 24 concentrations which are proportional to the pressure.
The invention is also an apparatus for diffusing 26 one or more impurities into a semiconductor body 27 comprising a first refractory container connected to a 28 device for creating a vacuum therein, and aregulating 29 device connected to the irst container and the vacuum device for maintaining a predetermined pressure within the 31 first container. The device further includes a structure 32 for supporting one or more of the semiconductor bodies 33 within the irst container, heating apparatus for heating 34 the first container to a predetermined temperature for a predetermined length of time, one or more second 36 containers (which can be refactory) for respectively 37 containing one or more dopants, and one g 2~

01 or more gas flow controllers connected to respective 02 ones of the second containers and to the first 03 container for admitting one or more continuous flows 04 of the dopants in predetermined proportions from 05 respective ones o the second containers to the first 06 container. The predetermined temperature is 07 sufficient to initiate one or more reactions between 08 respective ones of the dopants and a surEace of the 09 body such that predetermined amounts of respective ones of the dopants diffuse into the body thus forming 11 a layer having a depth which is proportional to the 12 predetermined temperature and time, and having 13 respective dopant concentrations which are 14 proportional to the predetermined proportions and the 15 pressure.
16 These and other aspects and advantages of 17 the present invention will become more readily 18 apparent rom the -following description of an 19 illustrative embodiment thereof, inlcuding the drawings in which:
21 Figure 1 shows the basic arrangement of an 22 apparatus s~litable for diffusing an impurity layer 23 into a semiconductor body in accordance with the 24 principles of the present invention, Figure 2 shows a modified arrangemen-t of the 26 apparatus suitable for diffusing an impurity layer 27 into a semiconductor body in the presence of an 28 additional reactive gas, and 29 Figure 3 shows a modified arrangement of the apparatus suitable for diffusing an impurity layer 31 provided by two dopant gases into a semiconductor body 32 in the presence o an additional reactive gas.
33 Referring to Figure 1 which depicts an 34 apparatus which is suitable for diffusing an impurity layer provided by two dopant gases into a 36 semiconductor body, a semiconductor substrate 1 is 37 placed into a vacuum chamber 2 made form a suitable 38 material, e.g. refractory material. An airtight 3~

01 access port 3 is closed and chamher 2 is evacuated 02 through a pressure control gate 4 by a vacuum pump 5.
03 A gas or vapour phase dopant is then admitted into the 04 chamber 2 from a source vessel 6 with a predetermined 05 gas flow rate through a 10w controlling device 7.
06 Dopant gas pressure in the chamber 2 is monitored by a 07 pressure monitoring device 8. A predetermined dopant 08 pressure is maintained for a predetermined leng-th of 09 time whereby a predetermined doping level is reached.
The substrate 1 is heated to at least a temperature at 11 which a surface reaction occurs between the dopant and 12 the substrate 1.
13 An advantage of the instant invention over 14 prior art inventions is that any number of dopant sources can be used. The arrangement of Figure 1 16 shows a second source vessel 9 containing a second gas 17 or vapor phase dopant for admittance to chamber 18 2. The gas flow rate of the second dopant is 19 controlled by flow controlling device 10.
dopant may be used either in elementary 21 form if its vapour pressure is sufficient, or bound 22 into a chemical compound. The latter must react with 23 the surface of substrate 1 in such a way that one of 2~ the reaction pxoducts is the elementary dopant.
Elementary dopant atoms deposited on the 26 surface of substrate 1 diffuse into the substrate 27 material in accordance with the laws of solid-state 28 diffusion, i.e. dependent upon temperature and time.
29 The rate of deposition and the rate of dopant diffusion into substrate 1 can be indpendently 31 controlled by this new method, while the total amount 32 of dopant diffused into the substrate is determined by 33 the length of time of the entire process.
34 By choosing the was pressure in chamber 2 as one independent parameter and the temperature of 36 substrate 1 as another parameter, various dopant 37 concentrations and distributions can be realized with 3~

01 -the inventive method. High gas pressure and low 02 substrate temperature result in a high doping 03 concentration in a very shallow surface layer of the 04 substrate 1. Lowering the gas pressure and increasing 05 the substrate temperature enables the process to yield 06 lighter doping concentrations and deeper doped 07 layers Variation of the gas pressure or the 0~ substra-te temperature, or bo-th of these parameters 09 during the process allows for the creation of doping distribution profiles which are differen-~ from 11 profiles achieved through standard diffusion methods.
12 referring now -to Figure 2, a modified 13 arrangement of an apparatus suitable for diffusing an 14 impurity layer in-to a semiconductor body in the presence of an additional reactive gas is shown.
16 If the chemical compound of the dopan-t does not 17 directly react wi-th the surEace of substra-te 1, or if 18 it is necessary to modify -the surface reaction of -the 19 reaction products, then an additional reactive gas is admitted into the chamber. The reactive gas reacts 21 with the dopant compound resul-ting in either the 22 elemen-tary dopant or an intermediate compound which 23 reacts with the substrate surface to produce the 24 elementary dopant. A reactive gas such as oxygen is necessary for example in order to dope silicon with 26 phosphine.
27 The reactive gas, con-tained in a vessel 11, 2~ is admitted through a flow controlling device 12 into 29 the chamber 2 simultaneously with the dopant gas contained in vessel 6. The ratio of the dopant gas -to 31 the reactive gas is controlled by respective flow 32 controlling devices, 7 and 12. The dopan-t gas and 33 reactive gas undergo a reaction which produces the 34 elementary dopant or an intermediate compound which reacts further with the surface of substrate 1 thus 36 producing the elementary dopant. The elemen-tary 37 dopant then reacts with substrate 1 as described above ~?~

01 for the embodiment of Fiyure 1. Through the use of a 02 reactive gas it is possible to achieve a high 03 concen-tration of impurities in the semiconductor body, 04 and low deEect density.
05 Referring now to Figure 3, apparatus is 06 illustrated Eor implementing the basic method 07 according to this invention for realizing the 08 manufacture of semiconductor devices. The apparatus 09 illustrated in Figure 3 provides an arrangement by which simultaneous pressure controlled multidoping of 11 semiconductor substrates is realized in the presence 12 of a reactive gas. A set of semiconductor wafers 13 13 are arranged on a rectangular quartz rod called a 14 boat. The boat is inserted in a vacuum doping chamber 14. One end of the chamber 14 is closed by an access 16 door 16, the other end being connected to a vacuum 17 pump 17. A pressure control gate 18 is used to adjust 18 the pressure in chamber 14. Chamber 14 is -then 19 evacuated via vacuum pump 17 through fully opened pressure control gate 18. The chamber 14 and the 21 wafers 13 are then heated by a furnace 15. A first 22 dopant eg., an arsenic compound such as Ascl3~
23 contained in vessel 19 is heated by a heating mantle 24 20 to obtain a vapour pressure sufficiently high to supply a first continuous vapour flow to the chamber 26 14. This vapour flow is controlled by a valve 21 and 27 a flow controlling device 22. A second dopant eg., a 28 phosphorous compound such as POC13, contained in 29 vessel 23 is heated by a mantle 24 to obtain a sufficiently high vapour pressure to supply a second 31 continuous vapour flow. The second vapour flow is 32 controlled by a valve 25 and a flow controlling device 33 26. A supply of reactive gas such as oxygen is 34 connected to the chamber 14 through a valve 27 and a flow controlling device 28. When a temperature 36 equilibrium in the chamber ]4 has been established, 3~

01 valves 21, 25 and 27 are opened and the gases begin to 02 flow through the respective preset flow controlling 03 devices 22,26 and 28. The yas pressure in the chamber 04 14 is monitored by a pressure meter 29. The gas 05 pressure and the wafer tempera-ture are set to 06 predetermined levels for which a predetermined doping 07 profile may be created. A controlled gas atmosphere 08 is maintained in chamber 14 until a predetermined 09 necessary amount of dopants are diffused into the wafers. The gas admittance valves 21, 25 and 27 are 11 then closed and chamber 14 is evacuated to remove the 12 gases. Finally gate 18 is closed and the chamber l 13 is filled with an inert carrier gas such as nitrogen 14 via valve 30.
16 Example 1 18 The apparatus shown in Figure 1 and 19 described above is used in the practice of this example One N-type dopant gas is used. A silicon or 21 germanium substrate 1 is placed into the vacuum 22 chamber 2 which is made of quartz. All gas from 23 vacuum chamber 2 is evacuated via vacuum pump 5 24 through pressure control gate 4. Vacuum pressure control gate 4 controls the pressure in chamber 2.
26 The silicon substrate 1 is heated -to about 700 -27 1200C (or about 500 - 900C, for a germanium 28 substrate). The dopant gas phosphine (PH3), or 29 phosphorous oxichloride (POC13), is admitted into chamber 2 from source vessel 6 through flow 31 controlling device 7. The dopant gas pressure in the 32 chamber 2 is maintained at about 400 mTorr and 33 monitored by the pressure monitoring device 8. The 34 dopant gaæ POC13 reacts with the surface of silicon substrate 1, as follows:
36 POC13 + Si ---> SiO2 C12 + P
37 In this case one of the reaction produc-ts on 38 _ 9 _ 3~ r I.. I.

01 the surface of silicon subs-tra~e 1 is the elementary 02 dopant.

04 Example 2 06 The apparatus shown in Figure 2 and 07 described above is used in the practice of this 08 example. One type dopant gas is used. silicon 09 substrate 1 is placed in vacuum chamber 2. The substrate 1 is heated to about 800C. The dopant gas 11 PH3 from source vessel 6 is admitted into chamber 2 12 through the flow controlling device 7. The flow rate 13 of the phosphine PH3 is set at 10 ml/min. A reactive 14 gas, such as oxygen is then admitted into chamber 2 from source vessel 11 through a flow controlling 16 device 12.
17 The impurity gas or vapour PH3 reacts with 18 the oxygen:
19 PH3 + 2 P205 The reaction gas P~05 then reacts with the surface of 21 silicon substrate 1:
22 P205 + Si ---> Si02 + P
23 The time for all reactions in doping chamber 2 is 24 about one hour.
Table I

28 P (mTorr) PH3 (phosphine) 2 (oxy~en~ R ( ) 29 ratio between reacting gases .... . _ _ _. . .

36 Table 1 illustrates the sheet resistance of 37 3 diffused silicon bodies produced in accordance with ~2~

01 the present method and employing phosphine as the 02 source of impurity, phosphorus pentoxide P2Os being 03 generated as an intermediate source material. As can 04 be seen Erom the results of Table 1, by varying the 05 proportions between dopant gas and reactive gas and 06 changing the pressure in the chamber 2, it is possible 07 to achieve a very low level of sheet resistance, which 08 is of particular importance in the manufacture ox 09 bipolar transistor emitters or source or drain areas of fiela-effect devices. The use oE a reactive gas 11 results in more heavily concentrated diffusions.

13 Example 3 The apparatus shown in Figure 3 and 16 described above is used in the practice of this 17 example. Two N-type dopant gases such as phosphorus 18 and arsenic compounds are used. A set of silicon 19 wafers 13 is placed in a quartz tube 14. The tube 14 and the waers 13 are heated by a furnace 15. One end 21 of the tube 14 is closed by an access door 16, while 22 the other end is connected to a vacuum pump 17.
23 Chamber 2 is then evacuated as described above. A
24 pressure control gate 18 is provided for adjusting the pressure in chamber 2. An arsenic compound, such as 26 arsenic trichloride (As C13), is heated in vessel 19 27 to about 110~C by mantle 20 in order to obtain a 28 sufficiently high vapour pressure to supply the vapour 29 flow. This vapour -Elow is controlled by valve 21 and flow controlling device 22. A phosphorous compound, 31 such as phosphorous oxichloride (Po C13) contained in 32 vessel 23 is heated by a mantle 24 to about 95C. The 33 vapour flow of phosphorous compound is controlled by 34 valve 25 and flow controlling device 26. An amount of oxygen necessary to support the doping reaction is 36 admitted into chamber 2 through valve 27 and flow 37 controlling device 28.

3~

01 The gas pressure and wafer temperature are 02 set to predetermined levels which result in a desired 03 doping profile. The controlled gas atmosphere is 04 maintained in the tube for a predetermined length of 05 time during which the necessary amount oE dopants are 06 diffused into the wafer. The gas admittance valves 07 21, 25 and 27 are then closed and chamber 2 is 08 evacuated to rernove the gases. Finally, gate 18 is 09 closed and the tube is filled with nitrogen via valve 30.
11 Dopant gases phosphorous-oxichloride (POC1 12 and arsenic-trichloride (As C13) react with oxygen as 13 follows:
14 POC13 + 2 ~~~> P205 C12 AsC13 + 2 I--> As203 C12 16 Intermediate compounds P205 and As203 then react 17 simultaneously with the silicon substrate:
18 P205 + Si ---I SiO2 + P
19 As203 + Si ---> SiO2 + As The gas flow rates are 15 ml/min. for POC13 and 15 21 ml/min. for AsC13 and 50 ml/min. for oxygen. The gas 22 flows are maintained for about 20 minutes and the 23 wafer temperature due to urnace 15 is about 900C. A
24 defect free N-type diffusion layer of approximately 0.3 micrometerc deep with very low sheet resistance is 26 thus obtained.

28 Example 4 The apparatus shown in Figure 2 and 31 described above is used in the practice of this 32 example.
33 One P-type dopant gas is used. A set of 34 gallium arsenide semiconductor substrates is placed in the vacuum chamber 2. Chamher 2 is evacuated as 36 described above. Gaseous diethylzinc (Zn(CH3)2), 37 contained in vessel 6 is permitted to flow into 3~ - 12 -01 chamber 2, the flow rate being controlled by flow 02 controlling device 7. The temperature of furnace 15 03 is maintained at about from 400C to 700C. The 04 process is completed as described above in Example 3.
05 Although the foregoing is set forth as a 06 full and complete description of a disclosed 07 embodiment of the present invention, it will be 08 apparent to those skilled in the art that numerous 09 alterations and modifications may be made therein without departing from the spirit and the scope of the 11 present invention as defined in the following claims.

Claims (11)

The embodiment of the invention in which an exclusive property or privilege is claimed are defined as follows:
1. A method of diffusing one or a plurality of impurities into a semiconductor body, comprising the steps of:
(a) placing said body in a vacuum chamber, (b) creating a vacuum in said chamber, (c) admitting one or a plurality of continuous flows of gas or vapor phase forms of dopants in predetermined proportions into said chamber, (d) controlling said one or plurality of flows so as to maintain a predetermined pressure of the flows against a surface of said body, and (e) heating said body to a predetermined temperature for a predetermined length of time sufficient to initiate one or a plurality of reactions between respective ones of the dopants and said semiconductor surface, whereby predetermined amounts of respective ones of the dopants diffuse into said body thus forming a layer having a depth which is proportional to said temperature and time and having respective dopant concentrations which are proportional to said predetermined proportions and said pressure.
2. A method as defined in claim 1 wherein the semiconductor body is comprised of silicon, the one dopant is comprised of phosphine, the predetermined temperature is approximately 700°-1200°C
and the predetermined pressure is approximately 400 mTorr.
3. A method as defined in claim 1 wherein the semiconductor body is comprised of germanium and the predetermined temperature is approximately 500-900°C.
4. A method of diffusing one or a plurality of impurities into a semiconductor body, comprising the steps of:
(a) placing said body in a vacuum chamber, (b) creating a vacuum in said chamber, (c) admitting one or a plurality of continuous flows of gas or vapor phase forms of dopant compounds in predetermined proportions into said chamber, (d) admitting a continuous flow of a reactive gas into said chamber, (e) controlling said continuous flows of dopant compounds and reactive gas so as to maintain a predetermined pressure of said dopant compounds and reactive gas against a surface of said body, and (f) heating said body to a predetermined temperature for a predetermined length of time, whereby respective ones of the dopant compounds react with the reactive gas to produce respective ones of elementary dopants, or intermediate compounds which react with the surface to produce the elementary dopants, said temperature being sufficient to initiate one or a plurality of reactions between respective ones of the elementary dopants and said surface such that a predetermined amount of respective ones of the elementary dopant diffuse into said body forming a layer having a depth which is proportional to said temperature and time and having respective dopant concentrations which are proportional to said predetermined proportions and said pressure.
5. A method as defined in claim 4 wherein said semiconductor body is comprised of silicon, said one dopant is comprised of phosphine, said flow of phosphine is approximately 10 ml/min., said reactive gas is oxygen, said flow of oxygen is approximately 40 ml/min., said predetermined temperature is approximately 800°C, said time is approximately one hour, said pressure is approximately 400 mTorr., and said intermediate compound is phosphorous pentoxide.
6. A method as defined in claim 4 wherein said semiconductor body is comprised of silicon, said plurality of dopants is comprised of arsenic trichloride and phosphorous oxichloride, said flow of arsenic trichloride is approximately 15 ml/min., said flow of phosphorous oxichloride is approximately 15 ml/min., said reactive gas is oxygen, said flow of oxygen is approximately 50 ml/min., said predetermined temperature is approximately 900°C, said time is approximately 20 minutes, said intermediate compounds are phosphorous pentoxide and arsenic trioxide, and said depth is approximately .3 micrometers.
7. A method as defined in claim 4 wherein said semiconductor body is comprised of gallium arsenide, said one dopant is comprised of diethylzinc, and said temperature is approximately 400 - 700°C.
8. Apparatus for diffusing one or a plurality of impurities into a semiconductor body, comprising:
(a) first refractory container means, (b) means connected to said first container means for creating a vacuum therein, (c) regulating means connected to said first container means and said vacuum means for maintaining a predetermined pressure within said first container means, (d) means for supporting one or a plurality of the semiconductor bodies within said first container means, (e) means for heating said first container means to a predetermined temperature for a predetermined length of time, (f) one or a plurality of second container means for respectively containing one or a plurality of gaseous dopants, and (g) one or a plurality of gas flow controlling means connected to respective ones of said second container means and to said first container means, for admitting one or a plurality of continuous flows of said dopants in predetermined proportions from respective ones of said second container means to said first container means, whereby the predetermined temperature is sufficient to initiate one or a plurality of reactions between respective ones of the dopants and a surface of said body such that predetermined amounts of respective ones of the dopants diffuse into said body thus forming a layer having a depth which is proportional to said predetermined temperature and time, and having respective dopant concentrations which are proportional to said predetermined proportions and said pressure.
9. Apparatus as defined in claim 8 further comprising:
means for admitting a continuous flow of a reactive gas into said first container means in response to the admittance of one or a plurality of said dopants into said first container means, whereby the reactive gas reacts with said dopants to produce one or a plurality of elementary dopants, or intermediate compounds which react with said surface to produce the elementary dopants, said temperature being sufficient to initiate one or a plurality of reactions between respective ones of the elementary dopants and said surface such that predetermined amounts of respective ones of said elementary dopants diffuse into said body thus forming a layer having a depth which is proportional to said temperature and time, and having respective dopant concentrations which are proportional to said predetermined proportions and said pressure.
10. Apparatus as defined in claim 9 further including means for heating said one or a plurality of second container means, whereby the one or a plurality of dopants contained therein are respectively heated to sufficient temperatures to maintain sufficiently high vapor pressures.
11. Apparatus as defined in claim 8, 9 or 10 wherein said first container means is composed of quartz, said regulating means is a pressure control gate, said means for creating a vacuum is a vacuum pump, said means for supporting is a boat, the means for heating said first container means is a furnace, the one or a plurality of gas flows controlling means is comprised of a valve connected to a flow controller, the means for admitting a continuous flow of reactive gas further includes a valve, and the means for heating said one or a plurality of second container means is comprised of one or a plurality of heating mantles.
CA000454727A 1984-05-18 1984-05-18 Diffusion method to produce semiconductor devices Expired CA1203921A (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
CA000454727A CA1203921A (en) 1984-05-18 1984-05-18 Diffusion method to produce semiconductor devices
IT8421688A IT1234946B (en) 1984-05-18 1984-06-29 Impurity diffusion for semiconductor substrate mfr.
DE3430009A DE3430009C2 (en) 1984-05-18 1984-08-16 Method and device for doping semiconductor substrates
US06/655,439 US4939103A (en) 1984-05-18 1984-09-28 Method of diffusing plurality of dopants simultaneously from vapor phase into semiconductor substrate
GB08426023A GB2158992B (en) 1984-05-18 1984-10-15 Diffusion of impurities into semiconductor substrates
JP59251431A JPS60245218A (en) 1984-05-18 1984-11-27 Method and apparatus for producing semiconductor element
FR8505917A FR2565734A1 (en) 1984-05-18 1985-04-17 METHOD AND APPARATUS FOR DIFFUSION OF IMPURITY INTO SEMICONDUCTOR BODY

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Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63239939A (en) * 1987-03-27 1988-10-05 Toshiba Corp Method and apparatus for introducing impurity into semiconductor substrate
EP0417456A3 (en) * 1989-08-11 1991-07-03 Seiko Instruments Inc. Method of producing semiconductor device
JP3079575B2 (en) * 1990-12-20 2000-08-21 株式会社日立製作所 Method for manufacturing semiconductor device
EP0505877A2 (en) * 1991-03-27 1992-09-30 Seiko Instruments Inc. Impurity doping method with adsorbed diffusion source
US5188986A (en) * 1991-05-17 1993-02-23 United Microelectronics Corporation Hydrogen peroxide in basic solution to clean polycrystalline silicon after phosphorous diffusion
US5324684A (en) * 1992-02-25 1994-06-28 Ag Processing Technologies, Inc. Gas phase doping of semiconductor material in a cold-wall radiantly heated reactor under reduced pressure
US5242859A (en) * 1992-07-14 1993-09-07 International Business Machines Corporation Highly doped semiconductor material and method of fabrication thereof
US5599735A (en) * 1994-08-01 1997-02-04 Texas Instruments Incorporated Method for doped shallow junction formation using direct gas-phase doping
JP4655321B2 (en) * 1999-08-27 2011-03-23 東京エレクトロン株式会社 Heat treatment method
JP4812147B2 (en) * 1999-09-07 2011-11-09 株式会社日立製作所 Manufacturing method of solar cell
JP3706811B2 (en) * 2000-06-14 2005-10-19 株式会社日立国際電気 Semiconductor device manufacturing method, substrate processing method, and semiconductor manufacturing apparatus
US6413844B1 (en) * 2001-01-10 2002-07-02 Asm International N.V. Safe arsenic gas phase doping
US6815736B2 (en) 2001-02-09 2004-11-09 Midwest Research Institute Isoelectronic co-doping
FR2824663B1 (en) * 2001-05-14 2004-10-01 Semco Sa METHOD AND DEVICE FOR DOPING, DIFFUSING AND PYROLITHIC OXIDATION OF REDUCED PRESSURE SILICON WAFERS
US6615615B2 (en) 2001-06-29 2003-09-09 Lightwave Microsystems Corporation GePSG core for a planar lightwave circuit
US6750482B2 (en) * 2002-04-30 2004-06-15 Rf Micro Devices, Inc. Highly conductive semiconductor layer having two or more impurities
CN102074448B (en) * 2009-11-20 2014-09-24 同方威视技术股份有限公司 Ion mobility spectrometer and method for improving detection sensitivity thereof
US9076915B2 (en) 2010-03-08 2015-07-07 Alliance For Sustainable Energy, Llc Boron, bismuth co-doping of gallium arsenide and other compounds for photonic and heterojunction bipolar transistor devices

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3492175A (en) * 1965-12-17 1970-01-27 Texas Instruments Inc Method of doping semiconductor material
US3753809A (en) * 1970-01-09 1973-08-21 Ibm Method for obtaining optimum phosphorous concentration in semiconductor wafers
US3829382A (en) * 1970-09-02 1974-08-13 Monsanto Co Doping control for semiconductor materials
US3916034A (en) * 1971-05-21 1975-10-28 Hitachi Ltd Method of transporting substances in a plasma stream to and depositing it on a target
US3764414A (en) * 1972-05-01 1973-10-09 Ibm Open tube diffusion in iii-v compunds
US3949119A (en) * 1972-05-04 1976-04-06 Atomic Energy Of Canada Limited Method of gas doping of vacuum evaporated epitaxial silicon films
JPS49114355A (en) * 1973-02-28 1974-10-31
JPS50102261A (en) * 1974-01-09 1975-08-13
JPS5236820A (en) * 1975-09-16 1977-03-22 Ouchi Nobutoshi Method of making granular glass wall
US4204893A (en) * 1979-02-16 1980-05-27 Bell Telephone Laboratories, Incorporated Process for depositing chrome doped epitaxial layers of gallium arsenide utilizing a preliminary formed chemical vapor-deposited chromium oxide dopant source
US4233093A (en) * 1979-04-12 1980-11-11 Pel Chow Process for the manufacture of PNP transistors high power
JPS577131A (en) * 1980-06-16 1982-01-14 Junichi Nishizawa Manufacture of p-n junction
JPS5737824A (en) * 1980-08-20 1982-03-02 Seiko Epson Corp Method and device for impurity diffusion
EP0061787B1 (en) * 1981-03-02 1985-11-21 BBC Aktiengesellschaft Brown, Boveri & Cie. Process for doping semiconductor bodies for the production of semiconductor devices
US4618381A (en) * 1983-05-26 1986-10-21 Fuji Electric Corporate Research And Development Ltd. Method for adding impurities to semiconductor base material

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GB2158992A (en) 1985-11-20
DE3430009C2 (en) 1994-01-20
JPS60245218A (en) 1985-12-05
US4939103A (en) 1990-07-03
FR2565734A1 (en) 1985-12-13
GB8426023D0 (en) 1984-11-21
DE3430009A1 (en) 1985-11-21
IT1234946B (en) 1992-06-02
IT8421688A0 (en) 1984-06-29
GB2158992B (en) 1987-09-30

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