CA1238730A - Method and apparatus for operating a display monitor - Google Patents
Method and apparatus for operating a display monitorInfo
- Publication number
- CA1238730A CA1238730A CA000487842A CA487842A CA1238730A CA 1238730 A CA1238730 A CA 1238730A CA 000487842 A CA000487842 A CA 000487842A CA 487842 A CA487842 A CA 487842A CA 1238730 A CA1238730 A CA 1238730A
- Authority
- CA
- Canada
- Prior art keywords
- signal
- information
- screen
- monitor
- synchronizing signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000000034 method Methods 0.000 title claims abstract description 15
- 230000002123 temporal effect Effects 0.000 claims abstract description 10
- 230000005540 biological transmission Effects 0.000 claims description 11
- 230000003111 delayed effect Effects 0.000 claims description 10
- 230000000694 effects Effects 0.000 claims description 10
- 238000006073 displacement reaction Methods 0.000 claims description 6
- 230000003247 decreasing effect Effects 0.000 claims description 4
- 230000000977 initiatory effect Effects 0.000 claims 1
- 230000007704 transition Effects 0.000 claims 1
- 238000010894 electron beam technology Methods 0.000 description 9
- 230000004044 response Effects 0.000 description 7
- 239000000872 buffer Substances 0.000 description 6
- 239000011248 coating agent Substances 0.000 description 5
- 238000000576 coating method Methods 0.000 description 5
- 101100191138 Arabidopsis thaliana DOT4 gene Proteins 0.000 description 1
- 101000825841 Homo sapiens Vacuolar-sorting protein SNF8 Proteins 0.000 description 1
- 101100427348 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) UBP10 gene Proteins 0.000 description 1
- 102100022787 Vacuolar-sorting protein SNF8 Human genes 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000001427 coherent effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000002035 prolonged effect Effects 0.000 description 1
- 230000008672 reprogramming Effects 0.000 description 1
- 230000002441 reversible effect Effects 0.000 description 1
- 231100000241 scar Toxicity 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N3/00—Scanning details of television systems; Combination thereof with generation of supply voltages
- H04N3/10—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
- H04N3/16—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by deflecting electron beam in cathode-ray tube, e.g. scanning corrections
- H04N3/20—Prevention of damage to cathode-ray tubes in the event of failure of scanning
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G1/00—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data
Abstract
METHOD AND APPARATUS FOR
OPERATING A DISPLAY MONITOR
Abstract A method and an apparatus for operating a display monitor to prevent burn-in of the screen. The entire display is imperceptibly moved in both vertical and horizontal directions by changing the temporal relationship between the information signal transmitted to the monitor and the signals used to synchronize the scanning of the screen.
OPERATING A DISPLAY MONITOR
Abstract A method and an apparatus for operating a display monitor to prevent burn-in of the screen. The entire display is imperceptibly moved in both vertical and horizontal directions by changing the temporal relationship between the information signal transmitted to the monitor and the signals used to synchronize the scanning of the screen.
Description
~3~ 3~
METHOD AND APPARATUS FOR
OPERATING A DISPLAY MONITOR
Technical Field This invention relates to systems that display information on a screen, and, more particularly, to systems that prevent the burn-in effect caused by prolonged display of the same image on a cathode ray tube (CRT).
Background of the Invention To display an image on the face of a CRT, an electron beam is scanned across a phosphorescent coating on the inside of the face in successive horizontal lines which progress from top to bottom. The electron beam intensity is modulated with the information to be displayed so that the phosphorescent coating is caused to glow in a pattern corresponding to the image. In some cases, the image moves, as in television, so that no particular area of the screen is singled out for extended electron beam bombardment. Thus, the electron beam does not land on any given spot for a long enough time to damage the phosphorescent layer. The same is not true, however, when the displayed image is stationary and particularly when it is both stationary and sharply outlined. In such cases, the electron beam is traced repeatedly along the same path across the phosphorescent coated faceplate. The darnage that results is what is called "burn-in" and it can leave a permanent and highly undesirable "scar" along which the phosphorescent coating is damaged. Consequently, when another image is subsequently sought to be displayed, the outline of the burn-in path may become partially or totally visible.
In one known CRT display anti-burn circuit, a triangular offset voltage waveform is added to each of the normal electron beam deflecting voltages to constantly move the entire electron scan pattern over an infrequently recurring path. The display of stationary images is prevented and the movement of the pattern is sufficiently ," ~;, :.
., , .' ' " ' ~
.. ~
.
. . :
lZ3B730 ~ 2 --slow to be imperceptible to the viewer~ However, with many commercially available display monitors, e~g., video monitors used in computer terminals, users are not provided access to the deflecting voltages. Furthermore, since the design of the high voltage circuitry used in such monitors varies widely, modifications to monitors provided by different manufacturers would have to be customized. In addition, no means is provided to adapt the characteristics of display movement~ e.g., the rate o~ the extent of the movement, to a particular application.
In view of the oregoing, a recognized problem in the art is t~e burn-in in a display monitor.
Summar of the Invention Y _ .
In an illustrative method in accordance with the invention, the synchronizing signal is delayed with respect to the information signal and the delay is sequentially - increased from a minimum delay to a maximum delay and sequentially decreased back to the minimum delay over a relatively long period, e.g., 15 minutes.
In accordance with an aspect of the invention there is provided a method of operating a monitor that displays information on a screen comrising transmitting an information signal to said monitor representing information to be displayed on said screen, transmitting a synchroniz-ing signal to ~aid monitor to synchronize scanning of said screen and changing the temporal relationship of said information signal and said synchroni~ing signal.
rn accordance with another aspect of the invention there is provided apparatus for operating a monitor that displays information on a screen comprising means for transmitting an information signal to said monitor representing information to be displayed on said screen, means for transmitting a synchronizing signal to said monitor to synchronize sc~nning of said screen and means for changing the temporal relationship of said information signal and said synchronizing signal.
' .~387;~
- 2a -Brief Descr~tion of_the Draw~
A more complete understanding of the present invention may be sbtained from a consideration of the following description when read in conjunction with the drawing in which:
FIG. 1 and 2, when arranged in accordance with FIG. 3, present a diagram of an exemplary video display system illustrating the principles of the present invention.
~ ~ n In the exemplary video display system 100 shown in FIG. 1 and 2, infor~ation is displayed on a screen 191 of a display monitor 190. In the exemplary embodiment, screen 191 represents the face of a cathode ray tube. To display an image on screen 191, an electron beam is scanned across a phosphorescent coating on the inside of the tube face in successive horizontal lines whi~h progress from top to bottom. The electron beam intensity is modulated with .. . . :, .. :
.. . , , . ..
' . ' :, . . :
- -.
. .
.
~;~3i~3~73(~
the information to be displayed so that the phosphorescent coating is caused to qlow in a pattern corresponding ~o the image. In system 100, the information signal is a video siynal that, in effect, turns the electron beam on and off at a high rate. As is conventional, the information in the video signal is interspersed between synchronizing pulses to synchronize horizontal and vertical scanning of the cathode ray tube to provide a coherent display. Temporally adjacent portions of the video signal are separated by sufficient time intervals to permit the leftward return of the beam at the end of a line and the upward return of the beam at the end of a frame. After each information portion representing a line on screen 191 is transmitted to monitor 190, a horizontal synchronizing pulse is transmitted to synchronize the horizontal scanning of screen 191.
Similarly, after a unit of information comprising a complete frame or page is transmitted, a vertical synchronizing pulse is transmitted to synchronize the vertical scanning of screen 191.
System 100 is operated under the control of a microprocessor 101 which communicates with an erasable programmable read only memory ( EPROM) 120, a random access memory (RAM) 110, a CRT controller 160 and a direct memory access ( DMA) device 150 over a bus 102. EPROM 120 stores a program which is read and executed by microprocessor 101 to control system operation. ~AM 110 stores the information comprising one or more pages of characters that have been entered, for example via a keyboard (not shown), to be displayed by monitor 190. CRT controller 160, e.g., the Intel 8275 controller, controls the conversion of the character information stored by RAM 110, to a video signal defining images to be displayed by monitor 190. CRT
controller 160 includes two row buffers (not shown) each of which stores one row of 80 characters. (Each row buffer also stores information defining certain display attributes, e.g., reverse video.) When CRT controller 1~0 transmits a re~uest signal to DMA 150 rom a DRQ terminal, , ' . :
- , :
~387~3C~
DMA 150 responds by effecting the transmission of one row of characters (as well as associated display attributes) from RAM 110 via bus 102 to be stored in one of the row buffers of C~T controller 160. ~hen CRT controller 160 transmits the next request signal to DMA 150, the next row o characters is transmitted from RAM 110 to the second row buffer of CRT controller 160. During the time that characters are being transmitted to the second row buffer, the characters stored by the first row buffer are being transmitted to monitor 190~ After the rows of characters that comprise a complete frame have been transmitted to monitor 190, CRT controller 160 transmits an interrupt signal to microprocessor 101 from an IRQ terminal.
Microprocessor 101 responds by reprogramming DMA 150 as necessary to effect the transmission to cRrr controller 160 of the rows of characters comprising the next frame of information.
Timing within system 100 is derived from a 74.0-megahertz oscillator (not shown) which is included within a clock circuit 162 that divides the oscillator frequency by 2l 24, and 48 to derive clock signals of 37.0, 3.08, and 1.54 megahertz, respectively. Characters are transmitted ~rom CRT controller 160 in response to the 3.08-megahertz clock signal, which is reEerred to herein as the character 2S clock signal. The characters transmittec1 hy CRT controller are defined by a seven-bit character code transmitted in parallel from controller terminals CC0 through CC6 to a latch 168. In the present embodiment, each character is 14 lines high. CRT controller 160 transmits a four-bit line code in parallel from its terminals LC0 through LC3 to a latch 166 to define which one of the 14 lines is presently being conveyed to monitor 190. CRT controller 160 transmits each row of characters 14 times, the first time with a line code of 0000, the second time with a line code of 0001, etc. The characters in the present embodiment are 12 dots wide. Both the character code stored in latch 168 and the line code stored in latch 166 are transmitted to .
- . . .' - , : . . . ~. ' ~
.. . ,.: . .
~3~73(~
two EPR~s 172 ~nd 174 which store the 12 dot definitions ~or each of the 14 lines of all the defined characters.
(EPROM 172 stores the first four dot definitions DOT0 through DOT3 and EPROM stores the remaining eight dot definitions DOT4 through DOT11.) The 12 dot definitions for a ~iven line of a given character as defined by the codes stored in latches 166 and 168, are transmitted in parallel from EPROMs 172 and 174 to a parallel/serial converter 184 and are stored by converter 184 in response to the character clock signal. Converter 184 serially transmits the dot definitions to a first input terminal of an AND gate 185 in response to the 37.0-megahertz clock signal. When a NOR gate 183 is transmitting a logic one enable signal to a second input terminal of AND gate 185, the dot definitions transmitted by converter 184 are conveyed via AND gate 185 as a 37.0-megahertz input video signal to monitor 190.
~ fter the 80 characters of a given line have been transmitted by CRT controller 160, controller 160 transmits a horizontal retrace pulse from its HRTC terminal to a tapped delay line 186, e.g~, the Technitrol TTLDL200 delay line, via two latches 164 and 182 which are clocked in response to the character clock signal. Latchès 164 and 182 are included to maintain the horizontal retrace pulse in synchronism with the character information, which was first stored in latch 168 and then stored in parallel-serial converter 184. The duration of the hori~ontal retrace pulse transmitted by CRT controller 160 is that of 16 characters, i.e., approximately 5.4 microseconds. ~elay line 186 generates at its five output terminals, versions of the horizontal retrace pulse delayed by 40, ~0, 120, 160 and 200 nanoseconds. The five delayed pulses generated by delay line 186, together with the undelayed horizontal retrace pulse, are transmitted as the si~ input signals to a 6:1 multiplexer 188. A three-bit word, stored in a register 140 by microprocessor 101 ~Jia bus 102, is transmitted to multiplexer 188 to define the one of the six :
... . . .
~3~3(:1 horizontal synchronizing signal to monitor 190. Therefore, microprocessor 101 can, by writin~ the appropriate word into register 140, effect the transmission by multiplexer 188 of hori~ontal synchronizing signals delayed by from 0 to 20Q nanoseconds with respect to the information portions of the video signal. The scanning of screen 191 is quickly resynch~onized to a delayed synchronizing signal. However, the effect of the delay of the synchronizing signal with respect to the video signal is the same that would obtain if the video signal were advanced in time with respect to the synchronizing signal. Therefore, the delay of the horizontal synchronizing signal results in a leftward, horizontal displacement of the images displayed on screen 191. A maxi~um horizontal displacement, dh (FIG. 2), approximately 2/3 the width of one character, is obtained by a 200 nanosecond delay variation.
When CRT controller 160 completes the transmission of the last line of a frame, it transmits a vertical retrace pulse from a VRTC terminal to a pair of series-connected counters 130 and 131 included in a timer 129, e.g., the Intel 8253 timer. As with the horizontal retrace pulse, the vertical retrace pulse is also transmitted via latches 164 and 182 to maintain its synchronism with the character information. The mode oE
operation of counters 130 and 131 is defined by microprocessor 101 via bus 102. In the present embodiment, counters 130 and 131 both count the pulses of the 1.54-megahertz clock signal up to predetermined numbers that are established by microprocessor 101 via bus 102. The predetermined number established for counter 130 defines the delay of the vertical synchronizing pulse to be transmitted to monitor 190 and the predetermined number established for counter 131 defines the width of that pulse. When counter 130 receives the vertical retrace pulse from latch 182, it counts up to its predetermined number and then transmits a signal to counter 131. In response to the signal from counter 130, counter 131 begins :' ' '' ;' 73C~
response to the signal from counter 130, counter 131 begins the transmission of the vertical synchronizing pulse to monitor 190 and also begins to count up to the counter 131 predetermined number. The end of the vertical S synchronizing pulse is defined when counter 131 reaches its predetermined number. In the present embodiment, the vertical synchronizing pulse width is maintaine~ at approximately 500 microseconds. At system init~alization, microprocessor 101 writes via bus 102 the predetermined number to counter 131 to define the specified pulse width.
Ilowever, microprocessor 101 can vary the pulse delay from 0 to 435 microseconds in 650 nanosecond increments by writing via bus 102 numbers from 0 to 670 to counter 130. Delaying the vertical synchronizing signal results in an upward, vertical displacement of the images displayed on screen 131. A maximum vertical displacement, dv (FIG. 2), approximately equal to the height of one character is obtained by a 435 microsecond delay variation.
Since the operation of counters 130 and 131 from the 1.54-megahertz clock signal is in synchronism with the character clock signal and there~ore with the vertical retrace pulse transmitted by CRT controller 160, a small ~uantization error, which could otherwise result in variations in the delay o~ the vertical synchronizing signal and, therefore, in the vertical position of the images displayed on screen 191, is prevented.
The horizontal and vertical retrace pulses transmitted by CRT controller 160 are also conveyed via latches 164 and 182 to two input terminals of NOR gate 183.
When CRT controller 160 is transmitting characters to monitor 190 and is transmitting neither a horizontal nor a vertical retrace pulse to NOR gate 183, NOR gate 183 transmits a logic one enable signal to the second input terminal of AND gate 185 so that AND gate 185 conveys the video signal transmitted by converter 184 to monitor 190.
However, when CRT controller 160 has cornpleted the transmission of a line of characters and is transmitting a ' ,- ,' ' ' . ' ' : ',':' ' ', . ~ ' ' ' ' ' ' ,. .
. -~B73~
horizontal retrace pulse or when C~T controller has completed the transmission of the last line of a frame and is transmitting a vertical retrace pulse, NO~ gate 183 transmits a logic zero blanking signal to AND gate 185.
The blanking signal disables the transmission of the video signal by AND gate 185 thus assuring that nothing is displayed on screen 191 during the retrace of the beam. By providing blanking in this mannerr system 100 assures that the variation oE delay of the horizontal and vertical synchronizing signals will not affect the proper blanking of screen 1910 Since the horizontal and vertical movements of the images displayed on screen 191 are determined under the program control of microprocessor 101, the characteristics of the movement can be flexibly adapted to the particular application. For example, to eEfect horizontal movement in the present embodiment, microprocessor 101 controls via bus 102 and register 1~0, the selection of successive ones of the input signals of multiplexer 188 the delay of the horizontal synchronizing signal from a minimum delay of zero to a maximum delay o~ 200 nanoseconds in 40 nanosecond increments. The selection se~uence is then reversed to decrease the delay from 200 nanoseconds to zero. One such cycle from zero to 200 nanoseconds back to zero is completed every 15 minutes. To effect vertical movement, microprocessor 101 controls via bus 102 the predetermined count which counter 130 must reach be~ore counter 131 begins the transmission of the vertical synchronizing pulse to monitor 190. By increasing the predetermined count from 0 to 670 in increments of 10, for example, the delay of the vertical synchronizing signal is increased from a minimum delay of zero to a maximum delay of 435 microseconds in increments of 6.5 microseconds. The process is then reversed to decrease the delay from 435 microseconds to zero. In the exemplary embodiment, one such cycle of vertical movement is completed every 17 minutes~ By in~ependently controlling the horizontal and vertical .- . . ' .
- . .
, ~ . , - . : . .
: i: ~ .
- ~ ~ " ' ~' ' ' .
- ' ' , ' .
~38~'3~) g movement, the resulting pattern oE movement repeats very infrequently. Although in the present embodiment the movements occur at fixed time intervals, the movements could be made in response to repeated operator actions such as page selection or page redraw.
It is to be understood that the above described embodiment is merely illustrative of the principles of the present invention and that other embodiments may be devised by those skilled in the art without departing from the spirit and scope of the invention. For example, rather than changing the temporal relationship of the information signal and the synchronizing signal by delaying the synchronizing signal, as in the described embodiment, the information signal could instead be delayed.
. ,:
.
METHOD AND APPARATUS FOR
OPERATING A DISPLAY MONITOR
Technical Field This invention relates to systems that display information on a screen, and, more particularly, to systems that prevent the burn-in effect caused by prolonged display of the same image on a cathode ray tube (CRT).
Background of the Invention To display an image on the face of a CRT, an electron beam is scanned across a phosphorescent coating on the inside of the face in successive horizontal lines which progress from top to bottom. The electron beam intensity is modulated with the information to be displayed so that the phosphorescent coating is caused to glow in a pattern corresponding to the image. In some cases, the image moves, as in television, so that no particular area of the screen is singled out for extended electron beam bombardment. Thus, the electron beam does not land on any given spot for a long enough time to damage the phosphorescent layer. The same is not true, however, when the displayed image is stationary and particularly when it is both stationary and sharply outlined. In such cases, the electron beam is traced repeatedly along the same path across the phosphorescent coated faceplate. The darnage that results is what is called "burn-in" and it can leave a permanent and highly undesirable "scar" along which the phosphorescent coating is damaged. Consequently, when another image is subsequently sought to be displayed, the outline of the burn-in path may become partially or totally visible.
In one known CRT display anti-burn circuit, a triangular offset voltage waveform is added to each of the normal electron beam deflecting voltages to constantly move the entire electron scan pattern over an infrequently recurring path. The display of stationary images is prevented and the movement of the pattern is sufficiently ," ~;, :.
., , .' ' " ' ~
.. ~
.
. . :
lZ3B730 ~ 2 --slow to be imperceptible to the viewer~ However, with many commercially available display monitors, e~g., video monitors used in computer terminals, users are not provided access to the deflecting voltages. Furthermore, since the design of the high voltage circuitry used in such monitors varies widely, modifications to monitors provided by different manufacturers would have to be customized. In addition, no means is provided to adapt the characteristics of display movement~ e.g., the rate o~ the extent of the movement, to a particular application.
In view of the oregoing, a recognized problem in the art is t~e burn-in in a display monitor.
Summar of the Invention Y _ .
In an illustrative method in accordance with the invention, the synchronizing signal is delayed with respect to the information signal and the delay is sequentially - increased from a minimum delay to a maximum delay and sequentially decreased back to the minimum delay over a relatively long period, e.g., 15 minutes.
In accordance with an aspect of the invention there is provided a method of operating a monitor that displays information on a screen comrising transmitting an information signal to said monitor representing information to be displayed on said screen, transmitting a synchroniz-ing signal to ~aid monitor to synchronize scanning of said screen and changing the temporal relationship of said information signal and said synchroni~ing signal.
rn accordance with another aspect of the invention there is provided apparatus for operating a monitor that displays information on a screen comprising means for transmitting an information signal to said monitor representing information to be displayed on said screen, means for transmitting a synchronizing signal to said monitor to synchronize sc~nning of said screen and means for changing the temporal relationship of said information signal and said synchronizing signal.
' .~387;~
- 2a -Brief Descr~tion of_the Draw~
A more complete understanding of the present invention may be sbtained from a consideration of the following description when read in conjunction with the drawing in which:
FIG. 1 and 2, when arranged in accordance with FIG. 3, present a diagram of an exemplary video display system illustrating the principles of the present invention.
~ ~ n In the exemplary video display system 100 shown in FIG. 1 and 2, infor~ation is displayed on a screen 191 of a display monitor 190. In the exemplary embodiment, screen 191 represents the face of a cathode ray tube. To display an image on screen 191, an electron beam is scanned across a phosphorescent coating on the inside of the tube face in successive horizontal lines whi~h progress from top to bottom. The electron beam intensity is modulated with .. . . :, .. :
.. . , , . ..
' . ' :, . . :
- -.
. .
.
~;~3i~3~73(~
the information to be displayed so that the phosphorescent coating is caused to qlow in a pattern corresponding ~o the image. In system 100, the information signal is a video siynal that, in effect, turns the electron beam on and off at a high rate. As is conventional, the information in the video signal is interspersed between synchronizing pulses to synchronize horizontal and vertical scanning of the cathode ray tube to provide a coherent display. Temporally adjacent portions of the video signal are separated by sufficient time intervals to permit the leftward return of the beam at the end of a line and the upward return of the beam at the end of a frame. After each information portion representing a line on screen 191 is transmitted to monitor 190, a horizontal synchronizing pulse is transmitted to synchronize the horizontal scanning of screen 191.
Similarly, after a unit of information comprising a complete frame or page is transmitted, a vertical synchronizing pulse is transmitted to synchronize the vertical scanning of screen 191.
System 100 is operated under the control of a microprocessor 101 which communicates with an erasable programmable read only memory ( EPROM) 120, a random access memory (RAM) 110, a CRT controller 160 and a direct memory access ( DMA) device 150 over a bus 102. EPROM 120 stores a program which is read and executed by microprocessor 101 to control system operation. ~AM 110 stores the information comprising one or more pages of characters that have been entered, for example via a keyboard (not shown), to be displayed by monitor 190. CRT controller 160, e.g., the Intel 8275 controller, controls the conversion of the character information stored by RAM 110, to a video signal defining images to be displayed by monitor 190. CRT
controller 160 includes two row buffers (not shown) each of which stores one row of 80 characters. (Each row buffer also stores information defining certain display attributes, e.g., reverse video.) When CRT controller 1~0 transmits a re~uest signal to DMA 150 rom a DRQ terminal, , ' . :
- , :
~387~3C~
DMA 150 responds by effecting the transmission of one row of characters (as well as associated display attributes) from RAM 110 via bus 102 to be stored in one of the row buffers of C~T controller 160. ~hen CRT controller 160 transmits the next request signal to DMA 150, the next row o characters is transmitted from RAM 110 to the second row buffer of CRT controller 160. During the time that characters are being transmitted to the second row buffer, the characters stored by the first row buffer are being transmitted to monitor 190~ After the rows of characters that comprise a complete frame have been transmitted to monitor 190, CRT controller 160 transmits an interrupt signal to microprocessor 101 from an IRQ terminal.
Microprocessor 101 responds by reprogramming DMA 150 as necessary to effect the transmission to cRrr controller 160 of the rows of characters comprising the next frame of information.
Timing within system 100 is derived from a 74.0-megahertz oscillator (not shown) which is included within a clock circuit 162 that divides the oscillator frequency by 2l 24, and 48 to derive clock signals of 37.0, 3.08, and 1.54 megahertz, respectively. Characters are transmitted ~rom CRT controller 160 in response to the 3.08-megahertz clock signal, which is reEerred to herein as the character 2S clock signal. The characters transmittec1 hy CRT controller are defined by a seven-bit character code transmitted in parallel from controller terminals CC0 through CC6 to a latch 168. In the present embodiment, each character is 14 lines high. CRT controller 160 transmits a four-bit line code in parallel from its terminals LC0 through LC3 to a latch 166 to define which one of the 14 lines is presently being conveyed to monitor 190. CRT controller 160 transmits each row of characters 14 times, the first time with a line code of 0000, the second time with a line code of 0001, etc. The characters in the present embodiment are 12 dots wide. Both the character code stored in latch 168 and the line code stored in latch 166 are transmitted to .
- . . .' - , : . . . ~. ' ~
.. . ,.: . .
~3~73(~
two EPR~s 172 ~nd 174 which store the 12 dot definitions ~or each of the 14 lines of all the defined characters.
(EPROM 172 stores the first four dot definitions DOT0 through DOT3 and EPROM stores the remaining eight dot definitions DOT4 through DOT11.) The 12 dot definitions for a ~iven line of a given character as defined by the codes stored in latches 166 and 168, are transmitted in parallel from EPROMs 172 and 174 to a parallel/serial converter 184 and are stored by converter 184 in response to the character clock signal. Converter 184 serially transmits the dot definitions to a first input terminal of an AND gate 185 in response to the 37.0-megahertz clock signal. When a NOR gate 183 is transmitting a logic one enable signal to a second input terminal of AND gate 185, the dot definitions transmitted by converter 184 are conveyed via AND gate 185 as a 37.0-megahertz input video signal to monitor 190.
~ fter the 80 characters of a given line have been transmitted by CRT controller 160, controller 160 transmits a horizontal retrace pulse from its HRTC terminal to a tapped delay line 186, e.g~, the Technitrol TTLDL200 delay line, via two latches 164 and 182 which are clocked in response to the character clock signal. Latchès 164 and 182 are included to maintain the horizontal retrace pulse in synchronism with the character information, which was first stored in latch 168 and then stored in parallel-serial converter 184. The duration of the hori~ontal retrace pulse transmitted by CRT controller 160 is that of 16 characters, i.e., approximately 5.4 microseconds. ~elay line 186 generates at its five output terminals, versions of the horizontal retrace pulse delayed by 40, ~0, 120, 160 and 200 nanoseconds. The five delayed pulses generated by delay line 186, together with the undelayed horizontal retrace pulse, are transmitted as the si~ input signals to a 6:1 multiplexer 188. A three-bit word, stored in a register 140 by microprocessor 101 ~Jia bus 102, is transmitted to multiplexer 188 to define the one of the six :
... . . .
~3~3(:1 horizontal synchronizing signal to monitor 190. Therefore, microprocessor 101 can, by writin~ the appropriate word into register 140, effect the transmission by multiplexer 188 of hori~ontal synchronizing signals delayed by from 0 to 20Q nanoseconds with respect to the information portions of the video signal. The scanning of screen 191 is quickly resynch~onized to a delayed synchronizing signal. However, the effect of the delay of the synchronizing signal with respect to the video signal is the same that would obtain if the video signal were advanced in time with respect to the synchronizing signal. Therefore, the delay of the horizontal synchronizing signal results in a leftward, horizontal displacement of the images displayed on screen 191. A maxi~um horizontal displacement, dh (FIG. 2), approximately 2/3 the width of one character, is obtained by a 200 nanosecond delay variation.
When CRT controller 160 completes the transmission of the last line of a frame, it transmits a vertical retrace pulse from a VRTC terminal to a pair of series-connected counters 130 and 131 included in a timer 129, e.g., the Intel 8253 timer. As with the horizontal retrace pulse, the vertical retrace pulse is also transmitted via latches 164 and 182 to maintain its synchronism with the character information. The mode oE
operation of counters 130 and 131 is defined by microprocessor 101 via bus 102. In the present embodiment, counters 130 and 131 both count the pulses of the 1.54-megahertz clock signal up to predetermined numbers that are established by microprocessor 101 via bus 102. The predetermined number established for counter 130 defines the delay of the vertical synchronizing pulse to be transmitted to monitor 190 and the predetermined number established for counter 131 defines the width of that pulse. When counter 130 receives the vertical retrace pulse from latch 182, it counts up to its predetermined number and then transmits a signal to counter 131. In response to the signal from counter 130, counter 131 begins :' ' '' ;' 73C~
response to the signal from counter 130, counter 131 begins the transmission of the vertical synchronizing pulse to monitor 190 and also begins to count up to the counter 131 predetermined number. The end of the vertical S synchronizing pulse is defined when counter 131 reaches its predetermined number. In the present embodiment, the vertical synchronizing pulse width is maintaine~ at approximately 500 microseconds. At system init~alization, microprocessor 101 writes via bus 102 the predetermined number to counter 131 to define the specified pulse width.
Ilowever, microprocessor 101 can vary the pulse delay from 0 to 435 microseconds in 650 nanosecond increments by writing via bus 102 numbers from 0 to 670 to counter 130. Delaying the vertical synchronizing signal results in an upward, vertical displacement of the images displayed on screen 131. A maximum vertical displacement, dv (FIG. 2), approximately equal to the height of one character is obtained by a 435 microsecond delay variation.
Since the operation of counters 130 and 131 from the 1.54-megahertz clock signal is in synchronism with the character clock signal and there~ore with the vertical retrace pulse transmitted by CRT controller 160, a small ~uantization error, which could otherwise result in variations in the delay o~ the vertical synchronizing signal and, therefore, in the vertical position of the images displayed on screen 191, is prevented.
The horizontal and vertical retrace pulses transmitted by CRT controller 160 are also conveyed via latches 164 and 182 to two input terminals of NOR gate 183.
When CRT controller 160 is transmitting characters to monitor 190 and is transmitting neither a horizontal nor a vertical retrace pulse to NOR gate 183, NOR gate 183 transmits a logic one enable signal to the second input terminal of AND gate 185 so that AND gate 185 conveys the video signal transmitted by converter 184 to monitor 190.
However, when CRT controller 160 has cornpleted the transmission of a line of characters and is transmitting a ' ,- ,' ' ' . ' ' : ',':' ' ', . ~ ' ' ' ' ' ' ,. .
. -~B73~
horizontal retrace pulse or when C~T controller has completed the transmission of the last line of a frame and is transmitting a vertical retrace pulse, NO~ gate 183 transmits a logic zero blanking signal to AND gate 185.
The blanking signal disables the transmission of the video signal by AND gate 185 thus assuring that nothing is displayed on screen 191 during the retrace of the beam. By providing blanking in this mannerr system 100 assures that the variation oE delay of the horizontal and vertical synchronizing signals will not affect the proper blanking of screen 1910 Since the horizontal and vertical movements of the images displayed on screen 191 are determined under the program control of microprocessor 101, the characteristics of the movement can be flexibly adapted to the particular application. For example, to eEfect horizontal movement in the present embodiment, microprocessor 101 controls via bus 102 and register 1~0, the selection of successive ones of the input signals of multiplexer 188 the delay of the horizontal synchronizing signal from a minimum delay of zero to a maximum delay o~ 200 nanoseconds in 40 nanosecond increments. The selection se~uence is then reversed to decrease the delay from 200 nanoseconds to zero. One such cycle from zero to 200 nanoseconds back to zero is completed every 15 minutes. To effect vertical movement, microprocessor 101 controls via bus 102 the predetermined count which counter 130 must reach be~ore counter 131 begins the transmission of the vertical synchronizing pulse to monitor 190. By increasing the predetermined count from 0 to 670 in increments of 10, for example, the delay of the vertical synchronizing signal is increased from a minimum delay of zero to a maximum delay of 435 microseconds in increments of 6.5 microseconds. The process is then reversed to decrease the delay from 435 microseconds to zero. In the exemplary embodiment, one such cycle of vertical movement is completed every 17 minutes~ By in~ependently controlling the horizontal and vertical .- . . ' .
- . .
, ~ . , - . : . .
: i: ~ .
- ~ ~ " ' ~' ' ' .
- ' ' , ' .
~38~'3~) g movement, the resulting pattern oE movement repeats very infrequently. Although in the present embodiment the movements occur at fixed time intervals, the movements could be made in response to repeated operator actions such as page selection or page redraw.
It is to be understood that the above described embodiment is merely illustrative of the principles of the present invention and that other embodiments may be devised by those skilled in the art without departing from the spirit and scope of the invention. For example, rather than changing the temporal relationship of the information signal and the synchronizing signal by delaying the synchronizing signal, as in the described embodiment, the information signal could instead be delayed.
. ,:
.
Claims (18)
1. A method of operating a monitor that displays information on a screen comprising transmitting an information signal to said monitor representing information to be displayed on said screen, transmitting a synchronizing signal to said monitor to synchronizize scanning of said screen and changing the temporal relationship of said information signal and said synchronizing signal.
2. A method in accordance with claim 1 wherein said changing step comprises delaying said synchronizing signal with respect to said information signal.
3. A method in accordance with claim 2 wherein said delaying step comprises repetitively varying the delay of said synchronizing signal with respect to said information signal to effect displacement of the information displayed on said screen to prevent burn-in of said screen.
4. A method in accordance with claim 3 wherein said varying step comprises sequentially increasing the delay of said synchronizing signal with respect to said information signal from a minimum delay to a maximum delay.
5. A method in accordance with claim 4 wherein said varying step further comprises sequentially decreasing the delay of said synchronizing signal with respect to said information signal from said maximum delay to said minimum delay.
6. A method in accordance with claim 5 wherein said varying step further comprises alternately repeating said sequentially increasing step and said sequentially decreasing step.
7. A method in accordance with claim 3 wherein said varying step comprises sequentially decreasing the delay of said synchronizing signal with respect to said information signal from a maximum delay to a minimum delay.
8. A method of operating a monitor that displays information on a screen comprising transmitting an information signal to said monitor representing information to be displayed on said screen, transmitting a horizontal synchronizing signal to said monitor to synchronize horizontal scanning of said screen, transmitting a vertical synchronizing signal to said monitor to synchronize vertical scanning of said screen, changing the temporal relationship of said information signal and said horizontal synchronizing signal and changing the temporal relationship of said information signal and said vertical synchronizing signal.
9. Apparatus for operating a monitor that displays information on a screen comprising means for transmitting an information signal to said monitor representing information to be displayed on said screen, means for transmitting a synchronizing signal to said monitor to synchronize scanning of said screen and means for changing the temporal relationship of said information signal and said synchronizing signal.
10. Apparatus in accordance with claim 9 wherein said changing means comprises means for delaying said synchronizing signal with respect to said information signal.
11. Apparatus in accordance with claim 10 wherein said delaying means comprises means for repetitively varying the delay of said synchronizing signal with respect to said information signal to effect displacement of the information displayed on said screen to prevent burn-in of said screen.
12. Display apparatus comprising a monitor having a screen for displaying information thereon, means for transmitting an information signal to said monitor representing information to be displayed on said screen, means for generating a timing signal in fixed temporal relation to said information signal to define distinct portions of said information signal, each said portion representing information to be displayed on a separate line on said screen, means for generating a synchronizing signal by delaying said timing signal by a variable delay time, where said variable delay time may be zero, means for transmitting said synchronizing signal to said monitor to synchronize horizontal scanning of said screen to the receipt of said distinct portions of said information signal and means for repetitively changing said variable delay time to effect horizontal movement of the information displayed on said screen.
13. Display apparatus in accordance with claim 12 wherein said means for generating a synchronizing signal comprises means for generating at least one delayed version of said timing signal and selection means for generating said synchronizing signal by selecting one signal from the plurality of signals comprising said timing signal and said at least one delayed version of said timing signal, and wherein said means for repetitively changing said variable delay time comprises means for repetitively changing the selection made by said selection means.
14. Display apparatus in accordance with claim 12 wherein said means for generating a synchronizing signal comprises means for generating a plurality of delayed versions of said timing signal and selection means for generating said synchronizing signal by selecting one signal from said plurality of delayed versions of said timing signal, and wherein said means for repetitively changing said variable delay time comprises means for repetitively changing the selection made by said selection means.
15. Display apparatus in accordance with claim 12 further comprising means responsive to said timing signal for disabling the transmission of said information signal by said information signal transmitting means.
16. Display apparatus comprising a monitor having a screen for displaying information thereon, means for transmitting an information signal to said monitor representing information to be displayed on said screen, means for generating a timing signal in fixed temporal relation to said information signal to define distinct units of said information signal, each said unit representing information to be displayed on a separate frame on said screen, means for generating a synchronizing signal by delaying said timing signal by a variable delay time, where said variable delay time may be zero, means for transmitting said synchronizing signal to said monitor to synchronize vertical scanning of said screen to the receipt of said distinct units of said information signal and means for repetitively changing said variable delay time to effect vertical movement of the information displayed on said screen.
17. Display apparatus in accordance with claim 16 wherein said means for generating a synchronizing signal comprises means for generating a clock signal and counter means responsive to said timing signal for initiating counting of transitions of said clock signal and for generating said synchronizing signal upon reaching a predetermined count and wherein said means for repetitively changing said variable delay time comprises means for repetitively changing the predetermined count to be reached by said counter means.
18. Display apparatus in accordance with claim 16 further comprising means responsive to said timing signal for disabling the transmission of said information signal by said information signal transmitting means.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/643,635 US4677430A (en) | 1984-08-23 | 1984-08-23 | Method and apparatus for operating a display monitor |
| US643,635 | 1984-08-23 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1238730A true CA1238730A (en) | 1988-06-28 |
Family
ID=24581662
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000487842A Expired CA1238730A (en) | 1984-08-23 | 1985-07-31 | Method and apparatus for operating a display monitor |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US4677430A (en) |
| EP (1) | EP0192655B1 (en) |
| JP (1) | JPS62500050A (en) |
| KR (1) | KR940000596B1 (en) |
| CA (1) | CA1238730A (en) |
| DE (1) | DE3575030D1 (en) |
| ES (1) | ES8704015A1 (en) |
| WO (1) | WO1986001628A1 (en) |
Families Citing this family (29)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4929935A (en) * | 1986-05-02 | 1990-05-29 | John Fluke Mfg. Co., Inc. | Apparatus for aligning raster scanned image to touch panel |
| US5448262A (en) * | 1993-11-29 | 1995-09-05 | Acc Microelectronics Corporation | Display screen blanking using interactive video and user-interface monitoring |
| US5986707A (en) * | 1995-06-07 | 1999-11-16 | Geshwind; David Michael | Methods and devices for the creation of images employing variable-geometry pixels |
| KR0138678B1 (en) * | 1995-09-28 | 1998-06-15 | 배순훈 | Synchronized signal processing circuit of a monitor |
| KR100226693B1 (en) * | 1996-11-14 | 1999-10-15 | 전주범 | A circuit and method for conserving a screen in a monitor |
| MY116734A (en) * | 1997-04-17 | 2004-03-31 | Matsushita Electric Ind Co Ltd | Image display device |
| US7783722B1 (en) | 2000-03-08 | 2010-08-24 | Music Choice | Personalized audio system and method |
| US7133924B1 (en) | 2000-03-08 | 2006-11-07 | Music Choice | Personalized audio system and method |
| US8463780B1 (en) | 2000-03-08 | 2013-06-11 | Music Choice | System and method for providing a personalized media service |
| US7275256B1 (en) | 2001-08-28 | 2007-09-25 | Music Choice | System and method for providing an interactive, visual complement to an audio program |
| US7320025B1 (en) | 2002-03-18 | 2008-01-15 | Music Choice | Systems and methods for providing a broadcast entertainment service and an on-demand entertainment service |
| US7028082B1 (en) | 2001-03-08 | 2006-04-11 | Music Choice | Personalized audio system and method |
| US7856485B2 (en) | 2000-03-08 | 2010-12-21 | Music Choice | Systems and methods for providing customized media channels |
| US7325043B1 (en) | 2000-03-08 | 2008-01-29 | Music Choice | System and method for providing a personalized media service |
| US6879963B1 (en) | 2000-04-12 | 2005-04-12 | Music Choice | Cross channel delivery system and method |
| US8271341B2 (en) * | 2000-04-12 | 2012-09-18 | Music Choice | Media content delivery systems and methods |
| US7564432B1 (en) * | 2000-08-25 | 2009-07-21 | Rockwell Collins, Inc. | Method and apparatus for extending the life of matrix addressed emissive display devices |
| US20020042754A1 (en) * | 2000-10-10 | 2002-04-11 | Del Beccaro David J. | System and method for receiving broadcast audio/video works and for enabling a consumer to purchase the received audio/video works |
| JP2003195852A (en) * | 2001-12-28 | 2003-07-09 | Canon Inc | Image processor |
| US7617295B1 (en) | 2002-03-18 | 2009-11-10 | Music Choice | Systems and methods for providing a broadcast entertainment service and an on-demand entertainment service |
| US7158169B1 (en) | 2003-03-07 | 2007-01-02 | Music Choice | Method and system for displaying content while reducing burn-in of a display |
| US7626609B1 (en) | 2003-03-07 | 2009-12-01 | Music Choice | Method and system for displaying content while reducing burn-in of a display |
| KR100642359B1 (en) * | 2003-12-30 | 2006-11-03 | 엘지전자 주식회사 | An image display device and method for preventing screen |
| US7529845B2 (en) * | 2004-09-15 | 2009-05-05 | Nokia Corporation | Compressing, filtering, and transmitting of protocol messages via a protocol-aware intermediary node |
| WO2006138620A2 (en) * | 2005-06-15 | 2006-12-28 | Music Choice | Systems and methods for facilitating the acquisition of content |
| US20070096767A1 (en) * | 2005-10-28 | 2007-05-03 | Chang-Hung Tsai | Method of preventing display panel from burn-in defect |
| US20100245339A1 (en) * | 2009-03-30 | 2010-09-30 | Associated Industries China, Inc. | Method of preventing image sticking on a tft-lcd |
| US9197937B1 (en) | 2012-04-26 | 2015-11-24 | Music Choice | Automatic on-demand navigation based on meta-data broadcast with media content |
| US10219027B1 (en) | 2014-10-24 | 2019-02-26 | Music Choice | System for providing music content to a user |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3267454A (en) * | 1963-06-24 | 1966-08-16 | Ibm | Line justifying and proportional spacing apparatus for display devices |
| US3623005A (en) * | 1967-08-01 | 1971-11-23 | Ultronic Systems Corp | Video display apparatus employing a combination of recirculating buffers |
| US3700955A (en) * | 1970-09-01 | 1972-10-24 | Honeywell Inc | Cathode ray tube display apparatus with extended tube life |
| DE2214657C3 (en) * | 1972-03-25 | 1978-09-28 | Deutsche Forschungs- Und Versuchsanstalt Fuer Luft- Und Raumfahrt E.V., 5000 Koeln | Method and device for generating a checkerboard pattern which can be used as a paravisual display |
| US3793483A (en) * | 1972-11-24 | 1974-02-19 | N Bushnell | Video image positioning control system for amusement device |
| JPS5335330A (en) * | 1976-09-13 | 1978-04-01 | Nippon Telegr & Teleph Corp <Ntt> | Character display control unit |
| US4127796A (en) * | 1977-05-23 | 1978-11-28 | Hughes Aircraft Company | CRT display anti-burn circuit |
| JPS545329A (en) * | 1977-06-14 | 1979-01-16 | Sony Corp | Electron beam scanning unit |
| US4130830A (en) * | 1977-09-14 | 1978-12-19 | Atari, Inc. | Method and apparatus for homogeneous exposure of video display screen |
| US4198661A (en) * | 1979-02-01 | 1980-04-15 | American Optical Corporation | Cathode ray tube burn-in prevention apparatus |
| US4275338A (en) * | 1979-09-19 | 1981-06-23 | Zenith Radio Corporation | Anti-spot burn protection for CRT |
| JPS5647089A (en) * | 1979-09-26 | 1981-04-28 | Matsushita Electric Ind Co Ltd | Crt display unit |
| US4359745A (en) * | 1980-07-30 | 1982-11-16 | Honeywell Inc. | Cathode ray tube display apparatus |
| US4369441A (en) * | 1980-09-18 | 1983-01-18 | Louis Wohlmuth | Display control system |
| JPS5763583A (en) * | 1980-10-03 | 1982-04-17 | Tokyo Shibaura Electric Co | Display control system |
| US4297619A (en) * | 1981-01-02 | 1981-10-27 | Zenith Radio Corporation | Phosphor protection circuit for multiple CRT projection television |
| JPS58190163A (en) * | 1982-04-30 | 1983-11-07 | Nec Home Electronics Ltd | Preventing system for deterioration of fluorescent screen of picture display |
| JPS59155888A (en) * | 1983-02-25 | 1984-09-05 | 株式会社日立製作所 | Display unit |
-
1984
- 1984-08-23 US US06/643,635 patent/US4677430A/en not_active Expired - Fee Related
-
1985
- 1985-07-19 KR KR1019860700221A patent/KR940000596B1/en not_active IP Right Cessation
- 1985-07-19 JP JP60503429A patent/JPS62500050A/en active Pending
- 1985-07-19 DE DE8585903924T patent/DE3575030D1/en not_active Expired - Fee Related
- 1985-07-19 WO PCT/US1985/001399 patent/WO1986001628A1/en active IP Right Grant
- 1985-07-19 EP EP85903924A patent/EP0192655B1/en not_active Expired
- 1985-07-31 CA CA000487842A patent/CA1238730A/en not_active Expired
- 1985-08-22 ES ES546352A patent/ES8704015A1/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| EP0192655B1 (en) | 1989-12-27 |
| WO1986001628A1 (en) | 1986-03-13 |
| JPS62500050A (en) | 1987-01-08 |
| KR940000596B1 (en) | 1994-01-26 |
| US4677430A (en) | 1987-06-30 |
| KR870700247A (en) | 1987-05-30 |
| EP0192655A1 (en) | 1986-09-03 |
| DE3575030D1 (en) | 1990-02-01 |
| ES8704015A1 (en) | 1987-03-01 |
| ES546352A0 (en) | 1987-03-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CA1238730A (en) | Method and apparatus for operating a display monitor | |
| US3878536A (en) | Apparatus for improving the shape of characters formed by a row and column coordinate matrix for display on a cathode-ray tube | |
| US3422420A (en) | Display systems | |
| US4129859A (en) | Raster scan type CRT display system having an image rolling function | |
| US4016362A (en) | Multiple image positioning control system and method | |
| US3624634A (en) | Color display | |
| US3423749A (en) | Character positioning control | |
| US4107664A (en) | Raster scanned display system | |
| EP0069517B1 (en) | Character display apparatus | |
| US4409591A (en) | Variable size character generator | |
| US3579225A (en) | Light probe circuit for persistent screen display system | |
| GB1378522A (en) | Parrern control system for controlling textile machinery | |
| NL8204950A (en) | GRAPHIC EFFECTS GENERATOR. | |
| US5134389A (en) | Display terminal device | |
| US3787833A (en) | Upshift control for video display | |
| US3803584A (en) | Display system | |
| GB2094116A (en) | Improvements in visual display devices | |
| JPH0258635B2 (en) | ||
| US3671956A (en) | Display system | |
| SU414589A1 (en) | DEVICE FOR DISPLAYING INFORMATION ON SCREEN ELECTRON BEAM PIPE | |
| US4146878A (en) | Video display apparatus display modification | |
| US3441926A (en) | Graphic display systems for crt responsive to selected parts of plural filtered step waveforms including precursor,linear and overshoot parts | |
| SU1587484A1 (en) | Device for output of symbol information on screen of cathode-ray tube | |
| SU1495780A1 (en) | Device for display of data on video monitor unit | |
| SU651380A1 (en) | Arrangement for displaying information on crt screen |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MKEX | Expiry |