CA1252574A - Local area network special function frames - Google Patents

Abstract

ABSTRACT OF THE INVENTION
In a local area network having a plurality of nodes, wherein the local area network utilizes a token passing scheme for communicating between nodes, each node has an interface apparatus which operates independently of a processor associated with said node. A method of the present invention provide for diagnosing and/or recovering a second node from a first node, the method implemented by the second node includes the steps of waiting to receive a message frame addressed to the second node. If the message frame addressed to the second node is a special function frame, and is in an off-line mode, the type of special function frame is determined to perform the command specified by the type of special function frame. The operation of the second node then returns to the step of waiting to receive a message frame addressed to it.

Description

LOCAL AREA NETWORK SPECIAL FUNCTIOM FRAMES
RELATED PATENT APPLICATION

This invention may be employed in a distributed data processing system as disclosed in Canadian Patent Application, Serial No. 460,867 and filed August 13, 1984 entitled "Plant Management Systeml', by R.A. Henzel, the related patent application being assigned to the same assignee as the present application.

BACKGROUND OF THE INVENTION

There exists many types of local area networks (LAN) which are in use, or are under development, or in the process of being standardized. Generally, in a LAN, there exists a bus and a plurality of stations (or n'odes) attached to the bus.
Each station (or node) attached to the bus has the same status as any other station, i.e., there is no master and slave rela-tionship between the stations. Thus, no features o~ a LAN are known to exist whereby a predetermined station can interrogate any other station and further where an interrogation/reply between stations results in a diagnostic and recovery type function.

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2 ~
n PATENT ~

The present invention allowF a node ~or remote node) on a local area ~etwork to be diagnosed and m~nipulated from a predetermined node that hafi ~n operator interface (or has an int~rface which permi~8 I/O, or interaction with an 5en~ity (i.e., an oper~or) out~ide the local area n~twork3. ~he predetermined node (deno~ed herein as a ~upervi~or node) having ~he operator interface can therefore control/diagnose/receive ~tatus report~ of any ~f the remote nodes. ~n interface apparatus iB provided at 10ea~h node of the local area network which permits communication to the predetermined node (or ~upervasor node) independent of the remote node host microproce~sor.

S~MMARY OF ~ Y~TIO~
15Therefor~9 th~re i8 supplied by the present in~en~ion, an interface apparatu~ for providing each node of the local area network the capability of communicating with a ~upervi~or node in accordance with the method o~ the pre~ent inven~ion, independen~ of the statu~ o~ the 20a~ociated node microproce~or. In B local area network h~ving ~ plur~lity of node8, wherein the loc~l ~rea network u~ilize8 a tok~n p~8ing ~cheme ~or communicat~ng between no~e~, ea~h node hav~ng an in erface appxr~tu~ which oper~te~ ~ndependently of ~ pro~e~80r as~oci~ted with the I2000040 ~1 ~arch 85 ..... ... ........... ... . ... . . . . . . .

~S~ 7f~

-3- 7~593-14 node, a method of diagnosing and/or recovering a second node from a first node, the method implemented by the second node comprising the steps of waiting to receive a mes~age frame addressed to the second node. The second node then determines if the message frame is a special function frame. If the mes-sage frame is determined to be a special function frame, the second node insures that the node is in an off-line mode. The second node then determines the type of special function frame to perform the command specified by the type of special func-tion frame. Finally, the second node operation returns to thestep of waiting to receive a message frame addressed to the second node.
In accordance with the present invention, there is provided in a local area network having a plurality of nodes, wherein the local area network utilizes a token passing scheme for communicating between nodes, each node having an interface apparatus which operates independently of a processor associated with said node, a method of diagnosing a second node from a first node, the method implemented by the second node comprising the steps of:
a) waiting to receive a message frame addressed to the se~ond node;
b) determining if the message frame is a special function frame, and if the message frame is determined to be a special function frame;
c) insuring that the mode is in an off-line mode;
d) decoding the command field of the special func-tion frame;
e~ performing the command represented by said com-mand field, in response to said decoding; andf) returning to step (a).

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-3a- 72593-l~

In accordance with the present invention, there is further provided a method of diagnosing anc1 recovering a second node from a first node according to claim l, wherein the step of determining the type of special function frame ~urther comprises the steps of:
a) reading information specified, if the type of special function frame is a read command wherein the informa-tion to be read is specified, and then proceeding to step (c~;
b) issuing a control signal to abort the current processing of the processor associated with the node if the type of special function frame is an abort command;
c) queuing an acknowledge frame message to be subse-quently transmitted to said first node; and d) returning to the step of waiting of step (a).
Accordingly, it is an object of the present invention to provide an apparatus for communicating with a predetermined node of a local area network.
It is another object of the present invention to pro-vide an apparatus for communicating with a predetermined node of a local area network in response to a request for predeter-mined information.
It i9 still another object of the present invention to provide an apparatus for communicating with a predetermined node of a local area network in response to a request for pre-determined information independent of the status o~ a processor unit associated with the node.

5 ~7~k n PP ~rENT n The~e and other objec~s of the present invention will become more apparen~ taken in conjunction with the following description and ~t~ached drawing~ wherein like characters indi~ate like parts, and which drawin~s form a part of the present applica ion.

BRI~F DESCRIPTIOM OF T~E DRA~I~GS
Figure 1 ~how~ a ~y~te~ block dia~ram of a control ~y~tem in which the apparatu~ of the present invention may be included;
Figure 2 ~hows a ~chematic block diagram illu~trating the common elements of each physical ~odule of the plan~
control network of the 8y8tem;
Figure 3 illustrates the wave forms of start-of-frame and end-of frame delimiter6;
Figure 4 ~hows the format of a token pa~ing frame;
Figure 5 ~how~ the format of ~n information frame;
Figure 6 defines the significa~ce of various bit configuration~ of a de~tinat~on addresa field of a frame;
Figure 7 ~hows ~ logio block diagr~m of each bus ~nterface unit of the local ~rea network;
Figure 8 shows the form~ of ~ speclal function frame;
Fiqure 9 shows the ormat o~ a ~peci~l function acknowl~dgment frame~ and I2000040 21 March 85 ` !

C~ '' PATENT n Figures lOA and lOB, wbich together comprise F~gure 10, shows a flo~ diagram of the operation of the bu8 interface unit.

D~T~IL~D D~SC~IPTIQ~
Before describing ~he ~ppar~u~ of ~he pre en~
inven~ion, it will be helpful to describe ~ local area network (LAN) in ~hich the ~ppar~tus o the pre~ent invention can be utilized. ~e~erring ~o Figure 1, there is ~hown a ~y~tem ~lock diagram of a control sy~tem 5, or ~ore simply a ~ystem 5. The organiz2tion, or architecture, of the control syfitem 5 includes a plant control network (or more ~imply network) 14, a token p~88ing distributed local area rletwork (L~N). Physical modules 16 o~ network 14 are of variouç ~pecialized functional types, ~8 will be âescribed hereinunder~, ~ach physical module 16 iB ~he peer, or equivalent, of 'che other in term~ of righ~ of acces~ to the network ' ~ ~ommunication medium, or plant control bus 18, ~or the purpo e of ~ran~mi~ ng data to other modules 16 of network 14. ~i~hway gateway module 16-~G provides commun~ cations and data ~ran~la~ion facilities between plant control bus 18 ~nd da~ highway 20 a~so~iht~d with a proces~ con~crol ~ubsy~te~ 22, which is a di3tributed digital proce~ control and di!~ a ac:q~ai ition subsystem.

I2000O40 21 ~q~rch 85 r ~L~ 5; ~ " PATENT n ~he process control subsystem 22 ~ t in the pref erred embodiment, a Hone~rwell Inc. qq~C 200û proce~s con'crol 8y . tem, a de~cription of which is found in a ~one~7ell publication entitled, ~Basic Sys'cem~ ~DC 2000 System summary SY-02-02", dated ~une 1981, 12 page~.
Universal oper~tor 6tation module (I~S) 16-US of network 14 i a work station for one or ~ore plan'c operator3i. It includes an opera~or console ~hich i~ the in~2rface between the pl~nt operator, or operator~, and the proces~ or proces~es of the plan~ for which they are responsible.
Each univer~al operator sta~ion module 16-~S! i~ connected to plant control bus 18, ~nd all communic~ions between the univer~al operator station ~odule 16-U5, and any o~her module 16 of network 1~ by means of plant control bus 18. Universal operator ~t~tion ~odule 16-~S ha~ access to data hat i~ on pl~nt control bu~ 18 and ~he resourc~ and dat~ av2ilable through~ or rom, any o~ ~he other module~
16 of n~twork 14. The univer~al station ~odule 16-US
inoludes a cathode ray tube dl~play (CRT) 15 which includes a video di~play gener~tor, ~n operator k~yboard (~B) 17, a prin~r (PRT) l9r ~nd can ~l~o lnclude (but no~ ~hown) a floppy di~k data stora~e devic~, trend pen recorders, and sta~u~ di~play~, ~or e~ample.
A hi~ory ~odule (~) 16-~M provides mass da~a storage I20000J.0 21 ~arch 85 ~æ~ 7~ ~PATENTn capability. The his~ory module 16-H~ include~ at le28t one conventional di~k mass 6torage device such ZIB a Winchester disk, wh~ch disk storage device provides ~ large volume of nonvolatile ~torage capability for binary da~a. The types o data ~tored by such a m~s~ storage devi~e are 1:~pically trend hi~tories; or data ~rom ~hich such trend~ can be determined, d~ta that con~titutes or ~orms CRT type di~play~D copies of programs or modules 16,.. r~ In the preferred embodimen~, a disk data ~torage uni~ of ~he hi~tory module fiuch as 16-HM c~n 6tore up to 32.5 megabytes of data.
An applica~ion module (~M) 16-AM provide~ additional dat~ processing capabili'cy ~n ~upport o~ the process control function~ performed by the controllers a~sociated with the proce~ con~rol sub~ystem~ such a~ data acquisition~ alarming, ba~ch hi~tory collection, and provide continuou~ control complata~cional facilitie~ when n~edsd~. The da'ca proces~;ing capabil~ty of the ~pplication module 16~ provided by a proce~or ~not ~hown) and a memory ~nolt shown) ~sociated with thQ module.
Comput~r module (CM) 16-C~S use~ ~he ~t~ndard or csmmon un~ t~ of all phy~$c~1 ~nodules ~o permit ;!1 med~um-to-large æcale, qener~l purpo~e d~ proce~s~g 8y5tem ~0 co~municaJce with other modules 16 of network 14 and the ~2~000~0 21 MarCh 8S

i ~ 7~ ~PATENT~

units of ~uch module~ over plant control bu8 18 and the units of proces~ control subsy~tems 22 via the highway gat2way module 16-~G. Dat~ prsces~ing ~ystems of a computer module 16-CM are u~ed to provide supervisory, optimization, generaliz~d user program preparation and execution of auch progr~ms in higher level program language~. Typica~ly, the data proce&~ing ~y~ems of a computer module 16-C~ have the capability o~ communicating with other such 8y tem~ by a communicaSion proce~sor and communication line~.
Plant con~rol bus 18 (or ~ore ~imply bus 18) i8 a high-speed, bit ~erial dual redundant communication bus that interconnects all the module~ 16 of pl~nt ~ontrol network 14. Bus 18 provides the only data ~ransfer path between the principal ~ources of da~, such as highway g~teway module 16-~G, ~pplication ~odule 16-AM, and history `module 16-~M, ~nd prin~ipal users of ~uch data, ~uch as univer~l op~rator ~tation module 16-~S, computer module 16-e~, ~nd application module 16 AM. Bus 18 ~l~o provide~
the 60mmunic~tion medium o~er which l~rge bloek~ of data, such a~ me~ory image~, c~n be mov~d from one module 16, ~uch a~ history ~odule 16-~ to univ~rs~l 8~ation module 16-U~. Bue 18 i~ du~l r~dundant in ~ha~ it ~onsi~t~ of two coaxial c~bles that permit the serial transmi~sion of I20000~0 21 March 85 .. ... . . . .
.. . ... . j. . . . . . .. . . . .. .

2~

binary signals over both at a rate of five meyabi-ts per second.
Each of the physical modules 16 includes certain, or required, standard units, which are illustrated in Figure 2. Each module 16 has a bus interface unit, BIU, 32 which is connected to the plant control bus 18 by a transceiver 34.
Each module 16 is also provided with a module bus 36 which, in the preferred embodiment, is capable of transmitting 16 bits of data in parallel, a module CPU 38 and a module memory 40. Other units to tailor each type of module 16 to satisfy its functional requirements are operatively connected to module bus 36 so that each such unit can communicate:with the other units of a module 16 via its module bus 36. The BIU 32 of the module 16 that has the token at any given time is enabled to transmit data on, or over, bus 18. In the preferred embodiment, all transmissions by a BIU 32 are transmitted simultaneously, or in parallel, over the coaxial cables which form the bus 18. A more detailed description of the c.ontrol system 5 can be had by referring to the above-20 related Canadian Patent Application, Serial No. 460,867 and filed August 13, 1984, entitled " Plant Management System ".

7~ I PATE2?T n Information i~ transmitted between m~dules of network 14 by rames o two types one of ~hich i8 ~ token-pa~ing ~rame, or token, 42, ~uch a~ i8 ~llu8trated in Figure 4. A
~oken~pa~s frame 42 includes from 8 to 10 byte~ of a preamble 46. Preamble 4~ con~igts of ~ignals of the ~ame ~ype, ~u~h as logical one~. Preamble 46 i~ followed by a ~tart-of-frame delimiter, SFD 48, of one byte, destination addre~s field 5~ of two byte~, a ~ource addre~s field 52 of two bytes, ~ frame ch~ck ~equence 54 of two byte~, which 8equence i8 used to detect ~rror~ in frame 42, and an end-of-frame delimi~er, EFD 56, of one by~e. In Figur~ 3, the wave form~ of start-of-frame delimiter, 5FD ~8, and of end-of-fr~me delimiter 5~, ~FD, are illu~tra~ed.
Information tran8mitted by. a transmit circuit of the lS 8IU 32 of the ~odule 16 having the token over ~us 18 con~ s of binary signal~ wh~ch are manchester encoded 80 that a receive clock can be derived fEom the received 8ignal~ by e~h re~eiving ~I~ 32. A logical 5 i~
tr~n~itted by the s~gn~l during ~he fir~t half of a bit being low ~nd being high dur~ng the ~econd half of the bit, a ~id-bit low~to~high tr~n~ition. A logical 1 i5 tran8mitted by ~he 8ignal during khe fir8t h~lf of ~he bit being hiç1h and low during th~ se~ond half, a mid-bit high-to-low tran~ition. ~qanchester encoding require~ that there zlw~ys be ~ tr~nl3itlon ~n ~he midd~e o~ each bit I2000040 21 ~arch ~5 ... ... .... .. . . ..

~ 7~ ~AT~NT~

cell. If there i~ no such ~ran~ition, ~ code violation (CV~ occur~. Both ~tart and end-of-frame delimiters 48, 56 lnclude code violations, four Cv~6 for each. By using CV'~ in thi6 ~anner, a ~-bit error would have to occur to change ~alid data into a frame delimiter. End-o-frame delimiter 56 i8 used rather than silence on bus 18 becau~e of the possibility oP reflection~ on bus 18 being in~erpreted a~ a tran~mi~sion after transmi~ion i8 ~topped by the module 16 having the token a~ any given timeO ~n antijabber timer of each BIU 32 inhibits ~he continuous transmis ion of signals by ~ BIU 3~ ~or more than a predetermined period of time, ~hich period i~ 6ubstantially lon~er than i8 required to transmit ~he l~rgest information rame 44. ~he timer i8 reset e~ch time a BIU 32 stops transmitting.
~eferring ~till to Figures 4 and 5, it can be ~een that the forma~ of an informatlon frame 44 difers ~rom that of a token-pa~ ra~e ~2 only by including an in~orma~ion field 5S. In the preferred embodi~ent, field 58 i~ limited to lnclud~ bet~een 100 and 4~088 byte~ of binary data. A11 other field~ of an information frame 44 are the ~ame as that of token-pa~ r~me 42.
In Fiqure 6, the signi~cance of the bit posi~ion~ of a dest~natlon addre~ ~ield S0 of a frame i~ explained. A

I2000040 21 March 85 .
I

~ PATENT~

frame, either a token-pa~ing frame ~2 or an information frame 449 i5 defined a~ a packet of a message formatted for tran~mi~ion over plant control bu~ 18. In the preferred embodi~ent, there are two ba~ic types of addresses: a phy~ic 1 address and a logical address. A physical address i5 the address of a given phy~ical module 16 t ~nd f ield 50 is identified or decoded as being that of a physic~l module 16 when the most significant bit~ bit position 15 of field 50, i~ a logical zeroO Each module 16 has a unique 7~bit phy~ical address. TypicallyD ~he physical ~ddress of a physical module 16 i8 determined by a multi-bi~ switch or by a ~erie~ of mechanically-made circui~ lnterconnections, or the like, mounted, in the preferred ~mbodiment, on ~he printed circuit board o~ the ~odule containing one of its tr2nsceivers 34. A token-pas~ frame 42 i8 identified by the three most ~ignifican~ blt position6, bits 15, 14, and 13 being logica} ~ero~ The lower order seven-bit posltion~, b~t positions 06-00, are the physical address of the phy~cal ~odule 16 ~o ~hich a token 421 ~or example, i~
~ddre88ed. If bit po8ition~ 15 ~nd 14 are logieal zero~
and bit po it~on 13 i~ a logi~al one, ~hen the frame i~ a diagno~$c frame addres8ed to ~he module 1~ whose phyRical ~d~req~ corr~spond~ ~o that of, or equal~ t~at defined by, the bits in the lower order ~even bit po~i~ion~ o~ field I2000040 21 March 85 ... , ... ,.. , ........ .. . . I

;77f~ ~PATENTn 55. A ~peci~l function frame i~ a form of ~n informatiori frame 44 and can be u8~ d to determ~ne if a given problem or ~et of problems exist in the addre_sed modul2. If bit~ 15 and 14 are logical ones, then bit 13 designates which of 5the two receit7e channel~ of the addre~sed module's BIU 32 s o aecep~ and proce88 the ~rame. I~ bi~ 12 i set and ~he addre~s i~ a phy~ic~l addre~ bu~ not a ~oken or a diagnostic frame, the frame i~ to be received, or i addre~ed to ~ll physical module~ 16 of network 14.
10A logical one in bit po~i~lon lS indica~ces that ~he addrefis defined by the bi~s of the lower order bit po~itions, 12 ~hrough 00, i~ that o a logical entity or logical module where a logical entity or module is a program module or ~et of data~ If bit 14 i8 a zero under 15~u~h circumstance~, then bit 13 deliignate~ which receive channel of the hddre~ed ~IU i~ to receiYe, or procesR, the frame. If bit8 15 ~nd 14 are both logical vngs, then the îrame i~ an interrup'c, a high-priority me8~aget and bit 13 de~ignate~ ~he recei-7e ch~nnel of the B~U 32 to receive the 20interrupt.
A module' ~ EIIll 32 determines which logically addres~ed fra~e8 tra~8~lnitted s~ver bus 18 are addr~ed ~o it. In the preferred ~mbodiment, there can be up to 8~ di~erent logical addre~e~ where R - 21~. A BIU 32 detern~ine~ if .

I200~0~0 21 ~arch 85 .. .. , ... : .. ... . ... .... . . ... . . .

r,;~
f ~ " PA'rENT t7 ~ to accept an in~ormation frame with ~ loyical address by means of a logical ~ddreRs filter table. ~he lower order 10 bl~s of the address field are the addre~ of bytes of data, ~ fil~er byte, which i8 stored at each addres~able location in the filter ~emory o~ each ~IU 32O The higher order 3 bits of the logical nddress, bit po8itions 12-10~
specify a bit posi~ion of ~he addres~ed ~ er word. If that bit i~ a logical one, then ~hat frame i~ accepted by the module ~ince it i8 addressed to ~ logical module or progr~m stored in that module'~ ~emory 40~
In the preferred embodim~nt, module~ 16 have been provided with redundan~ or backup modules, but have been omitted in order to ~impl~fy the drawings ~nd description.
` Each type of module 16 i~ compri~ed of hardware device~
which are physically packaged toge her and designed to support a particular ~et of functions. The unit o~
redundancy in the network 14 i8 the phy~ioal ~odule 16. A
redundant, secondary, or backup, module 16 mu ~ be of the ~me ype as it~ primary module 80 that both w~ll have the ~me co~plement of h~rdw~re units~ It ~111 be understood by tho~2 ~killed ln the art th~t each ~ype of module 16 of the network 14 i a~p~ble of h~vi~g one or more b~ckups.
Each of modules 16 include~ a ~odul~ cen~ral processor uni~ 38 ~nd a module memory 40, a random-~ccess memory, ~nd I20000~0 21 March 85 ... ... , . .... . , . , . .. , ~ .. .. .. .. . . . . .......... . .
~ - - !

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PAT ENT ?l ~uch ~dditional con'croll~r devices, or uni~, which are configured to provide ~he desired functionality of that type of module; i.e, I that of the operator ~ation 16-US, for example. Th~ data-proce ~ing capabilitie~ of each module' B CPU 38 and module memory ~0 cr2a~ce a distri~ut~d proces~in~ environment which provide~ ~or improved reliability and perform~nce of n~tw~k 1~ and plant managemen~ 8y8tem 5. ~he reliability of ne~work 14 and plant management ~ys~em S i8 improved because, if one module 16 of network 14 fail~, the other module~ 16 will remain operational, ~8 a re~ult, network 14 a~ ~ ~hole i~
not disabled by euch ~n occurrence ~g would be the case in cen~ralized sy~'cem~. Performance i6 improved by ~his distribut~d envi ronment in th~t throughput and fast operator respon~e times result from the incre~sed computer proces~ing re~ources, and ~he concurrency and parallelism o~ the ~a~-proce~ing capabilitie~ o~ ~he ~ystem.
Bach modul~ 16 1~ re~ponsible for g:he int~grity of its own operation. The failure of a module 16 i8 detected by the module it~elf ~nd, if it doe~ detect ~uch a failure, it will ~e~se operation and send a termin~ing ~ta~e, or ~tatus, mes3~e if possible, l~nder cer~ain c~rcum~tances, a module ~ ~ bus lnterfac~ UDit 32 ~ill sen~ ou~ a ~ailed l3tatus me~ag~ iiE it~ watchdog t~3~er t~me~; out, for I20000~0 - 21 ~arch 85 ~2~;~5~74 ~PATENT~

example. If a module, ~8 a whole, iB un~ble to Rend out a failed s~a~e or sta~cus me~sage, i'C8 backup module (not shown) will detect the failure of it~ primary becau~e of ~che ab~ence o~ periodic s~catus m~sages which are trarlsmitted by a primary module to its backup modul2s. A
backup, or 6econdary, module 16, upon receip'c of a termina~ing or failed ~tatus taessage, or, upon the absence of the receipt of its associa~ed primary module ' 8 st~tu~
me~age, ~tarts operating æ.8 B primary module. The function~ per~ormed by each physical module ~re c:ontrolled by it~ programming~ and ~ch program en~city, or program module, i~ igned a logical ~ddress which i~ sometimes referred to as a logical module~, The redundant, or backup, phy~ical modules will contain the same set of logical function~ or logieal module~ a~ their primary. It ~hould be noted that the backup modules for a primary physical module of one 'cype mu~'c be of the same type a~ its primary.
Modules 1~ communicate with each other over the communication medium, or bus lElo A~3 mentioned above, in network 14, e~ch o~ the module~ 16 i8 the eguiv~len~, or the peer, of the other~. Thu~ ~n network 14 rlo one of ~he module~ 16 ~ a m~cer IDodule, and each ~f the modules 16 h~s an equal right o~ aC:~sg ~or ~he purpose of tr~ mitting inf ormation over bus 14 . It should be noted I2000040 21 March 85 .. -- . .... . . . . .

~ 7~ W~TENT~

that all modules 16 receive all signal~ tr~nsmitted over bus 14 by any of the other modules. ~ach module 16 is a~signed a physical address with the ~malle~t phy5ical S addres~ of a module 16 being 00 and the largest being ~n, In the preferred embodiment, n ~ 7, so that the maximum numbPr of modules comprising ne~work 14 i~ 128. While all the modules of network 14 ~re phy~ically connec~ed ~o ~us 18 80 as to both receive and tran6mit binary data, a logieal ring is formed in ~hich each module 16 transmits the ~oken 42 to i~s ~uccessor, the nex~ module 16 in the logical r1ng having a lar~er physical addre~s.
A successor module 16 xecognizes that it is ~he successor, or accepts a token addressad ~o it by i~s predece~sor module by transmitting within a predetermineA
period of time after receiving a token ~ddressed to it, and by doing 80 has the token or accepts i~. ~ccepting a ~oken addressed to it confer~ on the accepting modula 16, the right to tran~m~t lnform~tion over bus 18 to o~her modules 0 16. Accepting a token ~equires the accepting module 16 to which the token i~ addressed ~o recognize the signals cons~ituting ~ token ns being ~uch, ~nd that the token is addressed to it~ The receipt of such a token by a succe~or ~odule 1~ from itB predeces~or ~ran~ers the right to the succes~or to tran~mit wi~hin a predetermined I~000040 Xl ~arch 85 ~ ~ r~ `?r~t~
-~a-~PATENT

period of time an information fr~me over bus 18 to any or all of the modules 16 connected thereto, ~s well a~ the necessity for tran mitting the ~oken 42 o i~s ~ucce~sor.
As tated ~bove, a succe~sor module 16 i8 the module having the next larger physical addre~ ~han the module having the token at any ~iven tîme. In any such logical ring, ~he next larger address after 27 or 127 is defined as being logical addre~s 00. It should be noted that, while the maximum number of modules in a logical ring i~ 1~8, the minimum number i~ 2~ Each of the ~odule~ lS has a given func~ion, such as being ~n opera~or st~tion, a mas~memory storage subsystem, a data proce~ing ~ub~ystem, or an access controller which permit~ other device~ including other local-area networks to communicate with network 14, ~tc.
Referring to Figure 7, there is Rhown a partial functional block diagram nf a repre~ent~tiv2 module 16, which includes the bu6 interface unit (BIU) 32 and a transceiver 34 which connec~ 32 to bu~ 18 and is capable of transmitting data over bus 18 and of receiving data from bu6 18~ Transceiver 34, ~D ~he pre~erred embodiment, i~ tr~n~former coupl~d to bu~ 18. BIU 32 is provided with ~ ~ery fa~t microengine 222, one of the function~ of wh~ch i~ to identify tok~ns ~2 addre~sed ~o it I2000040 21 March 85 ~19-~ 5 ~ ~ 7~ R PATENT n or it~ mQdule 1~ and to transmit a to~en 42 to its successor module. In the preferred embod1ment, microengine ~22 i~ an 8-bit-wide arithmetic and logic unit made of bit ~lice components. ~icroengine 222 can execu~e a 24-bit microinstruction from its programmable read only memory ~PRO~ 223 in 200 nanosecond~. Micro*ngine 222 al~o includes a crystal controlled clock which produce~
megahertz (MHz) clock signals.
Da~a receivèd from bus 18 by BIU 32, for example, is transmi~ted by bus tran~ceiver 34 and receiver circuitry 224 to re~eive FIFO register 226, whichr in the preferred embodiment, s~ores thirty-two eight bit by~es of data plus one parity bit per byte. Microengine 222 examine~ the destination addre~s field~ of data inform~tion frames and token pass frames ~2 received and ~tored in FI~O register 226 to determine if e~ch frame received i8 addre~ed to it, and~ if the frame addressed to it iB nn information frame or a token frame 42. If ~he received data is an information framer then the receiYed dat~ i~ transferred by direct memory acce~s IDMA) write circui~ry 228 by conventional direct memory acc~ess technique~ to the module memory ~0 over module bu~ 36 oves ~hich the ~odule memory 40 ~nd module ~emory PV 38 directly commun~eate with BIU
~5 32~ Module bus 36, in the preferred embodiment; i8 capable I2000040 21 ~ar~h 85 f~
Rl PATENT n of transmitting 6ixteen data bits plu two parity bits in parallel. (Module CPU 38 and module memory 40 are not ~llu~tra~ed here bu~ axe shown in ~igure 2.) If a received ~ra~e ~ a token pa~6 frame 42 addressed to BIU 3~; i.e., the to~en'~ destination address field 50 contains ~he addreR~ of the BIV (denoted MY .~DDRESS), microengine 222 i~ programmed ko act without in~ervention of the ~odule CPU 40- On receip~ o~ a token pa~s frame 42, the destination addre~s ~ield 50 of ~he token, which i~ the physical address of module 16 and thus of BI~ 32, BIU 32 ~ill transmit ~n information frame, if one ifi available, to another module or ~o all of the ~o~ules 16 attached to the bus 18, which form a logi~al ringO In doing 50~
microengine 222 cause~ it~ D~A re~d circuitry 232 to transfer data comprising thi6 ~nformation from the module memory 40 into ~ts read data FIFO register 234.
Microengine 22~ causes dat~ from regi~ter 234 to be transferred ~o tran~mit circuitry 236 ei~ht bits at a time once every eight instruction cy~le~ or ~lock period~, of microenqine 222~ The r~e ~t which daga i~ elther o~tained from or wrltten into ~he ~odule memory 40 over module bu~
36 by the DMA circuitry 228 or 232 i~ up to ~ixteen time~
greater th~n ~he r~te at which ~he data ~ received from bus 18 by buffer receive regi~er 226 or i~ transmitted by ~5 I2000040 21 ~arch 65 . .. .... ... . . . _.. . . .... . . . .

~ PATE~T~

tran~mitter circuitry 236 and bus transceiver 34 to bus 18. To a~ure this i5 tbe ca~e, each BI~ 32 is a5signed the highe~ priority with respect ~o direct memory aocess of the module memory 40O
Module CPU 38 is6ue~ commands to BIU 32 by wri~ing the commands into ~hared regis~er~ 238. Microengine 222 processes such commands during inter~rame gaps or when a frame i~ being received that i~ not addgessed to ît.
Shared regi~ter~ 338 also contain status in~orma~ion ~hat is readable by module CPU 38. BIU 32 i~ ~160 provided with a r~ndom-access memory R~M 240, in~o which i8 stored the physical address of module 32 in the network 14, as MY
ADDRESS. The Rource of the ~ignal~ representing BIU 32's physical address in the pre~erred embodiment ifi a Berie~ of interconnections on the same circuit board a6 ~ransceiver 3~.
Referring to Figure 8, there i8 shown a format of a ~pecial function frame. ~he ~peciàl ~unction fr~me c~n be received by ~ny module 16 of network 14 from any of modules 16, however, in the preferred embodiment of ~he present invention, it i8 received from ~ ~upervi60r~ node, specifically the unlver~al Bt~tion 16-~So ~8 discus6ed ~bove, the ~icroengine 222 can operate ~n bo~h ~n o~f-line and ~n on-I'ine mode. In the off-line mode, ~11 command~

I2000040 21 March 85 ... ~.... ~,. ,,., ... .... , . . I

~ PATENT n from the module CPU 38 are proeessed e~cept the ~tar~
commands, Al~o, in ~he of-line mode, the module 16 does not participa~e in token passing or receive information frame~. ~he module 16 will process special function frames i they are received. In the on-line ~ode the module 16 accepts all commands from the module CPU 3~ and participate~ in ~oken passing. The special ~unction frames are not accepted or processed in an on-line mode except for the enter off-line mode frame.
Receipt of special ~unc~ion frames ~hat cause the module 16 to en~er the off-lin~ mode, or if it i~ already in that model perform the function specified by the frame.
Special function frames are sent u~ing normal transmission mechanisms described aboveD When a module 16 ente~s the off-line mode, ~t di~ables the module CP~ 38 watchdog ~unction, it flags the module CPV 38 that it is in the of-line mode, and it executes the specific diagnostic functions. Special function frames can indicaSe the ~ollowing funct~on~:
a . Enter of f-line mode b. Re~et ~odule - performs a res~t ~hardware ma~ter clear) of the module 18 c. A~ort module CPU 38 - th~ abort i~ ~ccompli~hed by pulsing the pow.er f~il interrupt line (level 7) and I20û0040 21 March 85 ... . . . .
.. _ . . ... . . . ... .
. ,,, . ~

a PATENT 1~

setting appropriate Bta~us 80 tha~ the ~odule CPU 38 enterfi an externally induced error recovery routine. A
module 18 sends a module CPV 38 wa~chdog time out fra~e to inform the netwo~k 14 tha~ the module CPU 38 in this mcdule has been abortedn d. One word read - transmit~ back to the supervisor node the content~ of one word of module memory 40 or I/O controller nonpaged sta~us.
e. Return configuration status - ~ransmits back to ~he supervisor node the module 18 configuration status of BIU 32 which includes a module CPU 38 and module memory 40 status bits (the module CP~ o~ the preferred embodiment i~ a Motorola 68U00).
The reset module ~pecial function frame does no~ have an acknowledgment. All other framas have an acknowledge frame returned, the format of the acknowledgment frame being shown in Fi~ure 9. In the event the ~odule 16 receive~ a ~pecial function frame before it ha~ fini~hed processing a prev$ous special funct1On frame, only the first special ~0 function fr~me will be honored and have an acknowledgment frame ~ent.
Referr~ng to Figures 10A and 10Bt ~hich together compr~se Figur~ 10, ther~ i8 shown a ~lo~ ~iagram of the operation per~ormed by the ~I~ 3~ ~nd more ~pecifically ~5 the microeng$ne 2~2 of BIU 32.

I2000040 21 ~arch 85 ~2 ~ ~ 7~ aPATENTR

The microengine 222 of each module 16, perf~rms a self tes~ (block 101~ ~hen ~he ~odule 16 i5 initially powered on to ve~ify that the module 16 i~ opera~ing properly, and starts its interfacing opera~ion a~ the conclusion of selP
S test at START (block 105). Each BIU 32 of each module 16 receives every frame transmitted on bus 18, and determines if the fr~me is addre~sed to it (block 110~. If the frame i8 not addres~ed to that module, ~he module ~S is essentially in a w~it loop waiting for a frame addres~ed to ~he module 1~. If the frame rereived is addressed ~o the module ~ check is initia~ed ~o de~ermine if the frame i~ a special function frame (block 115). If the frame is determined to be a ~peciai function frame a check i5 then performed to determine if the frame i5 a command to enter the off line mode (block 120). If the command ~ 8 to enter the off line mode, the off line mode fl~g i~ set (block 125), a special function aeknowledgment frame (or more simply referred ~o herein as an acknowledg~ent frame~ is queued (block 130), ~nd the oper2tion returns ~o the wait loop of blo~k 110~
At block 120, lf the command was not to enter the off llne mode, a check i~ perfor~ed to de~ermine i~ the off line ~ode ha~ alre~dy been established (block 135). If ~he off line mode has not been establlshed, ~he operation I2000040 21 ~arch 85 t ~L~ 5 ~, ~ PATENT n returns to the wait lovp of block 110 since special function frame proce~ing can be performed only in an off line mode. If ~he off line mode h~s been e6tabli~hed the commands are decoded to de~ermine the type of the command, S i.e., if a one word read oomm~nd has b~en recaived ~block 140). If a one word read command has been received, the wo~d speclfied is r~ad ~block 145), an acknowledgmen~ frame is queued up (block 130) for ~ubsequen~ transmi sion when the module 16 receives the token, the ~c~nowledgment ~rame including th2 contents of the word speciied to ba read, and the opera4~on returns to the wait loop of block 110.
At block 140` if the command was not a one word read command, the command i~ decoded to determine if a return configuration sta~ufi ~as received (block 150). If the command is determined to be a return con~iguration status command, the configuration ~tatus i~ read ~block 155), the acknowledgm~nt frame i8 queued up (block 130), and the operation returns to the wait loop of block 110. I~ the command wa~ not a return con~iguration sta~us command ~0 (block 150), a determination i~ made ~o determine if the command i8 an abort MCP~ command (block 160). If the command i8 to abor~ the MCPU 38, a level 7 in~errupt i~
i~sued ~block 165), a w~tchdog time out ~r~me ~ queued up (block 170), an ackno~ledgment frame i~ queued (block 130), I2000040 21 March 85 . ........... ,.... ~.............. -''' !

.

~7J~ "PATENTn and the operation r2turnC to the wait loop o~ block 110.
(The level 7 interrupt i~ the power aiI inter~upt of the Motorola 68000 which aborts ~he current proces~ing of the module CPU 38.) S At block 160, if the command iB not ~n abort ~CPU
command, the command i6 decoded to determine if a re~et module command has been i~ued tblock 175). If the command i5 not a reset module command, the proce~sing re~urns to the wait loop of block 110, ~ince none of the established 14 diagnostic command types have been i~sued. If a reset module command is i~sued, the microengine 222 i~sue~ a re8et module instruction ~block 180~, and wait~ a predetermined amount of time (block 185) thereby insuring that the reset command has propaga~ed throughout the module lS and ha5 been efectuated. At the end of the predeterm~ned time period, the operation return~ ~o the start of the operation and perform8 the ~elf te~t ~bloek 101). It is in thi~ manner, namely by the operation of the microengine 222, th~t the ~odule 16 can ~nterf~Ge with a ~uper~isora ~0 node, and proce~s the ~pecial funct~on frame independent of t~e operation o~ the module CPU 38.
A~er a fra~e ~8 receiv~d ~nd addre8~ed ~o thi8 module, ~block 110) ~nd the frame i~ deter~ined no~ ~o be a ~pecial function frame (block 115), ~ determina~ion i8 made to ~5 I20000~0 ~1 ~arch 85 ~ ~!7~
,~ t~ ~ P~TENT n determine if the frame is a token pas~ fr~me (block 282), refer to Figure lOB~ If the frame i~ ~ token pass frame a de~ermina~ion i8 made ~o determine if a special func~ion frame has been queued up (block 2g4~ ~o be returned to the S transmitting module. If a 8pecial unction frame ha~ been ~ueued, the special function ~rame i5 ~ran~mitted (block 286), the ~pecial func~ion frame being ~he watchdog timeou~
frame or a ~peci~l ~unc~ion ~cknowledgment frame~ Af~er the special function frame ha~ been transmit~ed, ~he ~oken is then pa~sed to the s~ccessor module 16 ~block 228), and the operation returns to the wait loop of ~lock 110. If no ~peclal function frame has been queued (block 284), determina~ion iB m~de if the off line mode has been entered ~block 2~0). If the off line mode has been entered the operation re~urn~ to the wa~t loop of block 110. I~ the off line mode has not been entered, information re~uested from earlier tran~missions/commands, are tran~mitted via an information frame, ~f such information i~ available ~block 292). The token i8 then pasfied to the succeR~or module 16 2Q and the operation return. to the walt loop of block 110.
At blo~k 282, if the frame received ~8 no~ a token pass frame, a determ~nation i~ made ~hether th~ ~odule i~ in the off line mode ~block 29~. lThis branch for~ the ~norm~l~
transmi~sion between modules a~art ~rom the token 2s I20000~0 21 March 35 --2f~--S `~57~ a PATENTn passingO) At this point the frame mu~t be an information frame since no information can be received in an off line mode. If the module is in an off line mode, the operation return~ to the wait loop o~ block 110. If the module is not in an off line mode, the information frame i8 received and processed, the proce~sing being performed by the module CPU 38. The commands of the information frame are passed to the module CPU 38 from the microengine 222. The results of the proces~ing, if any~ are queued for subsequent transmi~sion when the module receives the token an~ is allowed to transmit on the bus 18 (block 29~). The operation then returns to ~he wait loop of block 110.
~ hile there ha~ been shown what i~ conside~ed the preferred embodiment of the present invention~ it will be manife~t that many chanyes and modificatlons can be made therein without departing from the e~ential spirit and scope o~ the inventlon. It i~ intended, therefor, in the annexed cl~im8 to cover all ~uch changes and modificd~ions ~hich f~ll within the true BCOFe of the invention.

I20000~0 21 March 85 .. . . . .... . . . .. . . .. . . .

Claims (6)

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:

1. In a local area network having a plurality of nodes, wherein the local area network utilizes a token passing scheme for communicating between nodes, each node having an interface apparatus which operates independently of a processor associated with said node, a method of diagnosing a second node from a first node, the method implemented by the second node comprising the steps of:
a) waiting to receive a message frame addressed to the second node;
b) determining if the message frame is a special function frame, and if the message frame is determined to be a special function frame;
c) insuring that the node is in an off-line mode;
d) decoding the command field of the special function frame;
e) performing the command represented by said command field, in response to said decoding; and f) returning to step (a).

Claim 2. A method of diagnosing and recovering a second node from a first node according to claim 1, wherein the step of determining the type of special function frame further comprises the steps of:
a) reading information specified, if the type of special function frame is a read command wherein the information to be read is specified, and then proceeding to step (c);
b) issuing a control signal to abort the current processing of the processor associated with the node if the type of special function frame is an abort command;
c) queuing an acknowledge frame message to be subsequently transmitted to said first node; and d) returning to the step of waiting of step (a).

Claim 3. A method of diagnosing and recovering a second node from a first node according to claim 2, wherein the step of determining the type of special function frame further comprises the steps of:
a) issuing a reset control signal to the node if the type of special function frame is a reset command;
b) waiting a predetermined amount of time to allow the reset control signal to propagate through the node; and c) returning to the step of waiting to receive a message frame addressed to the second node.

Claim 4. A method of diagnosing and recovering a second node from a first node according to claim 1, wherein the step of determining whether he message frame is a special function frame is determined to be a frame other than a special function frame, the method further comprising the steps of:
a) determining whether the message frame is a token pass frame, such that if the message frame is not a token (Claim 4 - continued) pass frame the message frame is processed as a normal transmission message frame, otherwise proceed to step (b);
b) determining if a return special function frame is queued, to transmit the return special function frame if it is queued, and then proceeding to step (d);
c) determining is the node is in the off-line mode, to transmit available information frames if the node is not in the off-line mode, otherwise proceeding to step (e);
d) passing the token to a successor node; and e) returning to the step of waiting to receive a message frame addressed to the second node.

Claim 5. A method of diagnosing and recovering a second node from a first node according to claim 2, wherein the step of issuing a control signal to abort the current processing further comprises the steps of:
a) issuing a high priority, non-inhibitable interrupt to the processor associated with the node, the interrupt causing the processor to suspend operation; and b) queuing a time out frame message to be subse-quently transmitted to said first node.

6. The method of Claim 1, wherein step e) comprises the sub-staps of:
(i) generating an acknowledgement frame in which a particular field includes data or status information, according to said command; and (ii) queuing said acknowledgement frame for subsequent transmission to said first node.