CA2026558C - Adaptive digital filter including low-pass filter - Google Patents

Abstract

ADAPTIVE DIGITAL FILTER INCLUDING LOW-PASS FILTER ABSTRACT OF THE DISCLOSURE An adaptive digital filter for estimating a response characteristic of a signal path by monitoring a sampled output signal of the signal path, estimating a predetermined number of filter coefficients which represent the response characteristic of the signal path, and generating an estimated output signal of the signal path using a plurality of successive sampled input signals of the signal path and the estimated filter coefficients, where the estimation is carried out so that a difference between the output signal and the estimated output signal is reduced. Each of the filter coefficients is extracted by a low-pass filter where the low-pass filter coefficient in the low-pass filter can be set to a constant. Normalization can be carried out in either the input side or the output side of the low-pass filter. Otherwise, the low-pass filter coefficient may be set to 1-K?Xj(m)2/r, where r is set equal to a norm of the sampled input signals in the beginning, and is then set to an integrated power of the sampled input signals.

Description

2~63~8 ~; :
. - 1 - FJ-8113-CA -ADAPTIVE DIGITAL FII.TER INCLUDING LOW- PASS FII.TER

~ BACKGROUND OF THE INVENTION ::~
~` (1) Field of the Invention - -The present invention relates to an adaptive digital filter for estimating a response characteristic of a signal path by monitoring a sampled output signal ~. . of the signal path, estimating a prledetermined number of i filter coefficients which represent the response -characteristic of the signal path, and generating an estimated output signal of the signal path using a -~
plurality of successive sampled input signals of the :-' signal path and the estimated filter coefficients, where the estimation is carried out so that a difference ;
between the output signal and the estimated output signal is reduced. The present invention is applicable, in particular, to an echo canceler which cancels ~l tsuppresses) an echo signal in a telephone terminal. In ¦ telephone terminals which are each connected to a two~
20 way transmission line in telephone network systems, a :~
~l voice signal propagating in one direction in the :, transmission line can be coupled to the other direction, ;
for example, in two-line to four-line transforming ~ :
~;l hybrid circuits due to an impedance mismatching, or through open-type speaker to microphone paths in the telephone terminals. That is, an echo path between the 1 two signal-propagating directions of the transmission lines exists in the telephone terminals. In the echo cancelers, an impulse response characteristic in the :-~ 30 echo path is estimated based on an echo signal which is :~.
!I detected in telephone terminals to subtract the ~ :-l estimated signal from a signal propagating in a -: -~
telephone transmission line in which the above echo ~ .
signal may propagate To carry out the above estimation, J~ 35 aaaptive digital filters are utilized, and conventional--~1 ly, the normalized least mean square (NLMS) algorithm is applied.

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~ ~ -(2) Description of the ~elated Art In the prior art, it is known that the value c~f the coefficient correction constant value K must be limited to 0<K<2.
However, since the convergence actually becomes slow when the coefficient correction constant K exceeds one, usually, the normalized least mean square (NLMS) algorithm is carried out using the coefficient correction constant K in the range 0<K<1.
Further, in the prior art, the residual echo is monitored, - and the coefficient correction constant K is made large when it is determined that the filter coefficient is in a convexging process, and the coefficient correction constant K is made small when it is determined that the filter coefficient is in a stable converged state.
In the echo canceler which operates in accordance with the above conventional normalized least mean square ;NLMS) algorithm, i the estimated filter coefficient greatly varies responding to an j impulse input or a beginning or ending of a word, and the j accuracy of the estimation is suddenly and greatly reduced. Por " example, generally, silent durations each existing before a , 20 consonant and continuing for about 200 msec, frequently appear 3 in voice signals, and in response, the estimated filter coefficient greatly varies. Generally, the accuracy of the ¦ estimation is quickly reduced by these disturbances, but recovery to accurate estimation is slow.
SUMMARY QF THE INVENTION
A feature of one embodiment of the present invention is to provide an adaptive digital filter for estimating a response characteristic of a signal path by monitoring a sampled output signal of the signal path, estimating a predetermined number of filter coefficients which represent the response characteristic of the signal path, and generating an estimated output signal of the signal path using a plurality of successive sampled input signals Qf the signal path and the estimated filter coefficients, where the estimation is carried out so that a difference between 2~26~a8 ., .
_ 3 _ . the output signal and the estimated output signal is reduced, and the operation of the adaptive digital filter .;s stable even when ~` an amplitude of the input signal varies.
:': 5 Another feature of another embodiment of the present invention is to provide an adaptive digital fi:Lter for estimating ~. a response characteristic of a signal path by monitoring a -~ sampled output signal of the signal path, estimating a predeter-mined number of filter coefficients which represent the response -characteristic of the signal path, and generating an estimated ~ output signal of the signal path using a plurality of successive :I sampled input signals of the signal path and the estimated filter ,~ coefficients, where the estimation is carried out so that a difference between the output signal and the estimated output signal is reduced, and in which the filter coefficients converge , quickly through the operation of the adaptive digital filter.
In accordance with an embodiment of the present invention there is provided an adaptive digital filter for estimating a response characteristic of a signal path by monitoring a sampled ~ 20 output signal of the signal path, estimating a predetermined ~ number of filter coefficients which represent the response characteristic of the signal path, and generating an estimated i, output signal of the signal path using a plurality of successive sampled input signals of the signal path and estimated filter i 25 coefficients, wherein an estimation is carried out so that a difference between the output signal and the estimated output signal is reduced, the filter comprising: an input signal register for holding a plurality of sampled input signals which have been sampled since a predetermined number of cycles before the current time; a filter coefficient register for holding the i predetermined number of filter coefficients which respectively ~ correspond to the plurality of sampled input signals; a ~' convolution calculating means for calculating a convolution between the input signal and the estimated response , .

2 ~ ~ 6 ~ ~ 8 ., characteristic using the plurality of successive sampled input signals which are held in the input signal register, and the estimated filter coefficients which are held in the filter i 5 coefficient register; an error obtaining means for obtaini~g a difference between the sampled output signal of the signal path and the convolution as an error in the estimation; and a filter ~ coefficient estimating means for estimating the predetermined ~ number of filter coefficients so that the error is reduced; the 1~ -filter coefficient estimating means comprising a filter coefficient renewing means for each of the predetermined number ~¦ of filter coefficients, for renewing the corresponding filter coefficient in each cycle of sampling, and wherein the filter coefficient renewing means comprises a multiplier for obtaining a product of one of the sampled output signals corresponding to the filter coefficient renewing means, and the sampled input signal, an integrating means for integrating an output of the multiplier to extract a component of the filter coefficient corresponding to the filter coefficient renewing means, a power calculating means for calculating a power of one of the sampled output signals corresponding to the filter coefficient renewing means, and a divider for dividing an output of the integrating means by an output of the power calculating means.
In accordance with another embodiment of the present invention there is provided an adaptive digital filter for estimating a response characteristic of a signal path by monitoring a sampled output signal of the signal path, estimating a predetermined number of filter coefficients which represent the response characteristic of the signal path, and generating an estimated output signal of the signal path using a plurality of : successive sampled input signals of the signal path and estimated filter coefficients, wherein an estimation is carried out so that a difference between the output signal and the estimated output l~ signal is reduced, the filter comprising: an input signal register for holding a plurality of sampled input signals which ' :~

2-~26~8 . .
, have been sampled since a predetermined number of cycles before the current time; a filter coefficient register for holding the predetermined number of filter coefficients which respectively correspond to the plurality of sampled input signals; a con~
volution calculating means for calculating a convolution between the input signal and the estimated response character.istic using a plurality of successive sampled input signals which are held in the input signal register, and the estimated filter coef-ficients which are held in the filter coefficient register; anerror obtaining means for obtaining a difference between the sampled output signal of the signal path and the convolution as an error in the estimation; and a filter coefficient estimating means for estimating the predetermined number of filter coeffi-cients so that the error is reduced; the filter coefficientestimating means comprising a filter coefficient renewing means for each of the predetermined number of filter coefficients, for renewing the corresponding filter coefficient in each cycle of sampling, and wherein the filter coefficient renewing means comprises a multiplier for obtaining a product of one of the sampled output signals corresponding to the filter coefficient renewing means, and the sampled input signal, an accumulating means for accumulating an output of the multiplier, a power calculating means for calculating a power of one of the sampled output signals corresponding to the filter coefficient renewing ¦ means, a divider for dividing an output of the accumulating means by an output of the power calculating means, and an integrating ~i means for integrating the output of the divider to extract a .l component of the filter coefficient corresponding to the filter coefficient renewing means.
In accordance with yet another embodiment of the present ~, invention there is provided an adaptive digital filter for I estimating a response characteristic of a signal path, by monitoring a sampled output signal of the signal path, estimating j 35 a predetermined number of filter coefficients which represent the .
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~. response characteristic of the signal path, and generating an , estimated output signal of the signal path using a plurality of successive sampled input signals of the signa} path and estimated ~- 5 filter coefficients, wherein an estimation is carried out so that ~l a difference between the output signal and the estimated output signal is reduced, the filter comprising: an input signal register for holding a plurality of sampled input signals which have been sampled since a predetermined number of cycles before the current time; a filter coefficient register for holding the predetermined number of filter coefficients which respectively .;! correspond to the plurality of sampled input signals; a ., convolution calculating means for calculating a convolution between the input signal and the estimated response characteristic using a plurality of successive sampled input signals which are held in the input signal register, and the estimated filter coefficients which are held in the filter coefficient register; an error obtaining means for obtaining a ;ii difference between the sampled output signal of the signal path and the convolution as an error in the estimation; and a filter coefficient estimating means for estimating the predetermined number of filter coefficients so that the error is reduced; the filter coefficient estimating means comprising a filter coefficient renewing means for each of the predetermined number '! 25 of filter coefficients, for renewing the corresponding filter coefficient in each cycle of ~ampling, and wherein the filter coefficient renewing means comprises a dividing means for dividing the sampled input signal by one of the sampled output ~ signals corresponding to the filter coefficient renewing means, ,1 30 a zero detecting means for determining that one of the sampled output signals corresponding to the filter coefficient renewing ¦ means is below a predetermined level, an integrating means for integrating the output of the dividing means so that a component of the filter coefficient corresponding to the filter coefficient renewing means is extracted in an output thereo~, and a stop .'~

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.~ control means for stopping the operation of the integrating means-~ when the zero detecting means determines that one of the sampled .` output signals corresponding to the filter coefficient renewing , 5 means is below the predetermined level.
, In accordance with a further embodiment of the present .~ invention there is provided an adaptive digital filter for -~ estimating a response characteristic of a signal path by '~ monitoring a sampled output signal of the signal path, estimating `~ 10 a predetermined number of filter coefficients which represent the :`; response characteristic of the signal path, and generating an estimated output signal of the signal path using a plurality of successive sampled input signals of the signal path and estimated .j filter coefficients, wherein an estimation is carried out so that ,'~t 15 a difference between the output signal and the estimated output signal is reduced, the filter comprising: an input signal i~ register for holding a plurality of sampled input signals which have been sampled since a predetermined number of cycles before the current time; a filter coefficient register for holding the ~i 20 predetermined number of filter coefficients which respectively :.;i correspond to the plurality of sampled input signals; a ~ convolution calculatiny means for calculating a convolution .,~ , between the input signal and the estimated response characteristic using a plurality of successive sampled input , 25 signals which are held in the input signal register, and the ;ll estimated filter coefficients which are held in the filter coefficient register; an error obtaining means for obtaining a difference between the sampled output signal of the signal path - and the convolution as an error in the estimation; and a filter l 30 coefficient estimating means for estimating the predetermined number of filter coefficients so that the error is reduced; the filter coefficient estimating means comprising a filter coefficient renewing means for each of the predetermined number of filter coefficients, for renewing the corresponding filter ;l 35 coefficient in each cycle of sampling, and wherein m th filter ~s' ,~

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coefficient renewing means corresponding to m-th filter coeffi-cient, where m is an integer satisfying 1 <i_I where I is equal to the number of filter coefficients, comprises a low-pass filter for integrating the sampled input signals so that a component of the filter coefficient corresponding to the filter coefficeint renewing means is extracted in the output thereof, and the low-. pass filter comprises a first multiplier for multiplying each of the sampled input signals by a first factor which is e~ual to K.Xj(m)/r, where K is a coefficient correction constant, Xj(m) is the sampled input signal which have been sampled (m-1) cycles before the current time j, j denotes a number indicating a current time, and r denotes a value for normalizing the first factor, an adder, a delay means for delaying an output of the adder, and a second multiplier for multiplying an output of the delay means by a second factor which is equal to l-K.Xj(m~2/r, the adder adding outputs of the first and second multipliers, and .i the output of the adder becoming the output of the filter coef-, ficient renewing means.
In accordance with a still further embodiment of the present invention there is provided an adaptive digital filter for esti-mating a response characteristic of a signal path by monitoring a sampled output signal of the signal path, estimating a pre-j determined number of filter coefficients which represent the response characteristic of the signal path, and generating an ~ estimated output signal of the signal path using a plurality of successive sampled input signals of the signal path and estimated filter coefficients, wherein an estimation is carried out so that a difference between the output signal and the estimated output signal is reduced, the filter comprising: an input signal register for holding a plurality of sampled input signals which , ! ' ' ' .
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1 have been sampled since a predetermined number of cycles ~fefore ., the current time; a filter coefficient register for holding the predetermined number of filter coefficients which respectively 1 5 correspond to the plurality of a sampled input signals; a :fs convolution calculating means for calculatLng a convolution .~. between the input signal and the estimated response ~ characteristic using a plurality of successive sampled input f signals which are held in the input signal register, and the estimated filter coefficients which are held in the filter I coefficient register; an error obtaining means for obtaining a ; difference between the sampled output signal of the signal path and the convolution as an error in the estimation; and a filter i coefficient estimating means for estimating the predetermined number of filter coefficients so that the error is reduced; said filter coefficient estimating means comprising a filter coefficient renewing means for each of the predetermined number of filter coefficients, for renewing the corresponding filter coefficient in each cycle of the sampling, and the filter coefficient renewing means comprising a first multiplier for multiplying each of the sampled output signals by a coefficient 3 correction constant (K), a divider for dividing an output of the I first multiplier by a value ('r) for normalizing the first factor, $ a second multiplier for multiplying an output of the divider by l 25 one of the sampled output signals, and an adder for adding a previously estimated filter coefficient corresponding to the I filter coefficient renewing means, to the output of the second l multiplier.
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Figure 1 shows a construction of an echo canceler which is :
provided in a telephone terminal; :~

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Figure 2 shows a detailed construction of the output signal register 5, the filter coeEficient register 6, and the convolution call~ulator 7;
Figure 3 is a block diagram showing the operation for obtaining a (estimated) filter.coefficient H~l(m) corresponding to an m-th tap for the next sample , time j+1 in the echo canceler in accordance with the ~ normalized least mean square (NL~fS) algorith~;
-~ Figure ~ shows the construction of the norm calculation circuit 81 in Fig. 3;
Figure S is a block diagram showing the operation of the conventional normalized least mean ssuare (NIMS) algorithm in form comprising a low-pass : :
Eilter; .
Figure 6 is a block diagram corresponding to , the operation of the normalized least mean square (NLMS) .-.~ algorithm in the form of a low-pass filter;
Figure 7 shows a result of a simulation ~:
wherein the variation of the low-pass filter coefficient .
~, 20 a is obtained when a voice signal Afku" is supplied as the (m-1)-cycle-delayed sampled output signal Xj(m) to : :~
. the conventional echo canceler in accordance with the . ;
normalized least mean square (NLMS) algorithm, and the ~ ;:
number I of the taps is set to I = 80;
Figure 8 is a block diagram of a calculation ..
` system for estimating the echo path gain hj(m), ;~ comprising a low-pass filter which obtains the estimated -. -:~
filter coefficient H~(m), and wherein the filter .. ~
coefficient is a constant; -- -:
Figure 9 shows a basic construction of the ...
first embodiment of the present invention; -~
Figure 10 shows an example of the construction of the sum-of-products calculator 20 in Fig. 9; `.~
Figure 11 shows a first example of the . :-.:
construction of the filter coefficient modifying circuit i 21 in Fig. f; .`~
`'``' ', ''`'' ~'`-' .~ ' ' ~ '.:
fi . .-.~ ,~ `` ' 2~f26f!if~f Figure 12 shows a second examfple of the ~`~ construction of the filter coefficient modifying circuit ~ ~ -`~ 21 in Fig. 9;
Figure 13 shows a first: example of the -construction of the integrating circuit 24 in Fig. 9;
~f Figure 14 shows a second example oE the -`` construction of the integrating circuit 24 in Fig. 9;
Figure 15 shows a -third example of the construction of the integrating circuit 24 in Fig. 9;
-~~ 10 Figure 16 shows a fourth example of the ; construction of the integrating circuit 24 in Fig. 9;
Figure 17 shows a first example of the ; construction of the power calculator 25 in Fig. 9; ~-Figure 18 shows a second example of the construction of the power calculator 25 in Fig. 9;
Figure 19 shows the construction of Fig. 9 ' when the integrating circuit of Fig. 13 and the power ~-calculator of Fig. 18 are applied thereto; ~ `
Figure 20 shows the construction of Fig. 19 for all the filter coefficients Hj(i) where i = 1 to I;
Figure 21 shows a third example of the , construction of the power calculator 25 in Fig. 9; ` `~
`ll Figure 22 shows a construction of the second embodiment of the present invention, for obtaining an l z5 estimated filter coefficient H,+l(m) corresponding to an '~ m-th tap for the next sample time j+1 in the echo ;~ canceler;
Figure 23 shows a basic construction of the -third embodiment of the present invention, for obtaining an estimated filter coefficient H,~l(m) corresponding to 'f an m-th tap for the next sample time j+1 in the echo canceler;
Figure 24 shows a basic construction of ~he fourth embodiment of the present invention, for o~taining an estimated filter coefficient Hj+lf(m) corresponding to m-th tap for the next sa~ple time j+1 in the echo canceler;
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2~26~8 Figure 25 shows an example of the construction of the integrating circuit 43 in the fourth embodiment of the present invention;
Figure 26 shows a basic construction of the fifth embodiment of the present invention, for obtaining an estimated filter coefficient Hj~1(m) corresponding to m-th tap for the next sample time j~1 in the echo . :
canceler; :
Figures 27A to 27F show results of ` 10 simulations of the above method (ii) wherein a rate of .
addition of a next filter coefficient is varied;
Figures 28A and 28B show results of simulations which are carried Ollt for confirming the effectiveness of the above methods (i) and (ii) in the 15 construction for the normalized least mean square ~NLMS) algorithm of Fig. 6;
Figures 29A to 29C show results of simulations which are carried out for confirming the effectiveness of the above method ~iii) in the 20 construction for the normalized least mean square (NLMS~
algorithm of Fig 6; ~ :~
Figures 30A and 30s show results of :
, simulations which are carried out for confirming the :-~
J effectiveness of the above other method (iv) in the :
25 construction for the normalized least mean square (NLMS) : -~
algorithm of Fig. 6;
igures 31A to 31C, and 32A to 32C show .
, results of simulations which are carried out for various .' values of the low-pass filter coefficient ar for obtaining the optimum value of the low-pass filter coefficient a' in the constructions of the first, second, and third embodiments;
Figures 33A to 33C show results of simulations which are carried out for various values of the coefficient correction constant K for obtaining the optimum value of the coefficient correction constant K
in the constructions of Fig. 6;
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Figures 34A to 34D show the results of simulations which are carried out for comparing the::
~-~` conv~rgence characteristics of the estimation system for ~` the echo path gain h~(m) wherein the low-pass filter ., 5 coefficient a' is a constant, with the convergence :.
,Y, characteristics of the estimation system for the echo ~ path gain h~(m) by the nor~alized least mean square -~ (NLMS) algorithm; ~ :
Figure 35 shows the results of simulations " 10 which are carried out for the estimation system for the - echo path gain hj(m) wherein the low-pass filter -~ ~
coefficient a' is a constant, and the estimation system -for the echo path gain h~(m) by the normalized least mean square (NLMS) algorithm; :
.:. 15 Figure 36 shows the results of simulations ,~, which are carried out for the estimation system for the ~:
.'1 echo path gain h;(m) by the normalized least mean square (NLMS) algorithm wherein the coefficient correction ~ constant K=1.75;
;i 2Q Figure 37 shows an example of the ~; construction for carrying out the operation of :~ monitoring the quantity of the right side of the ~"
~: relationship (17), and generating a control signal to ;~
: stop the operation for the estimation of the echo path ~ -~
25 gain hj~m) when the above condition (17) is not -~-satisfied; and .
~;~ Figure 38 shows an exam~le of the .. l, construction for carrying out the operation of -~
.~ . monitoring the quantity of the right side of the relationship (18), and generating a control signal to stop the operation for the estimation of the echo path ~-; gain h~(m) when the above condition (18) is not satisfied.

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DESCRIPTION OF THE PREFERRED EMBODIMENTS
(1) Derivation of the Basic Conceptc; of the Present Invention Reference will initially he made to Fiqures l to 4 wAich il illustrate a conventional system.
- Figure l shows a construction of an echo canceler which is provided in a telephone terminal. In Fig. 1, reference numeral 1 denotPs a subscriber's terminal, 2 denotes a hybrid transformer ~-~
10 circuit, 3 denotes a balance network, 4 denotes an adaptive ~j digital filter, and 9 denotes a subtracter. In the adaptive digital filter 4, reference numeral 5 denotes an output slgnal register, 6 denotes a filter coefficient register, 7 denotes a convolution calculator, and 8 denotes a filter coefficient renewing circuit. Further, Xj(i) denotes an (i~ cycle-delayed sampled output signal where i denotes a tap number and i denotes a sample timing, Sj denotes an audio input signal from the subscriber, Nj denotes a noise signal, hj(i) deno-tes a true filter coefficient corresponding to an actual impulse response (echo path gain) which is to be estimated by the adaptive digital filter and generates an echo signal ~hj~i)Xj(i), Yj denotes a ~ total input signal which is equal to a sum of the above audio j~ input signal Sj, the noise signal Nj, and the echo signal ~hj(i)Xj(i), Ej(i) denotes a residual echo, and Hj(i) denotes an estimated filter coefficient corresponding to the above true filter coefficient hj(i). In the example of the echo canceler, the word "output signal" is used for indicating "a sound output from the speaker", and the word "input signal" is used for indicating "a sound input from the microphone". Therafore, the `-"output signal" in the echo canceler includes an input signal to an echo path, and the "input signal" in the echo canceler `
includes an output signal from the echo path, as shown in Fig.
1. ''' '```'`'~ `~`.`~`'`"
The output signal register 5 holds a plurality of successive sampled output signals Xj(i). The filter coefficient register 7 ~'`".`~'..'`; `"``

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- 15a holds the (estimated) filter coefficient Hj(i) for each tap of the adaptive digital filter. The convolution calculator 7 carries out a convolution calculation using the (i-l)-cycle-S delayed sampled output signals Xj(i) and ~he filter coefficientHj(i) to obtain an estimated echo ~Hj(i)Xj(i) where ~ is a summation of all the taps in the adaptive digital filter. The filter coefficient renewing circuit 8 obtains a new (estimated) filter coefficient Hj~1(m) for each tap m for the next timiny j~
in accordance with the following equation which is given by the conventional normalized least mean square (NLMS) algorithm Hjf1(m) = Hj(m) + K-Ej-Xj(m)/~Xj(i)2 (1) where Ej denotes a residual echo which i5 detected in the output ¦ of the subtracter 9 at the timing j, K is a coefficient correction constant, and the summation in the norm ~Xj~i)2 is carried out over all the taps in the adaptive digital filter.
Note that "~" denotes a summation of all the taps in the adaptive digital filter through this specification except when otherwise specified. Conventionally, the above norm ~Xj(i)2 in the divisor is deemed to be included for suppressing influences of variations in amplitude of the output signal on the renewed filter coefficient. The subtracter 9 subtracts the above estimated echo ~Hj(i)Xj(i) from the total input signal Yj to obtain the residual echo Ej. The residual echo Ej is a remainder of the echo signal which could not be eli~inated by the estimated echo ~Hj(i)Xj(i) in the subtracter 9.
Figure 2 shows a detailed construction of the output signal register 5, the filter coefficient register 6, and the convolution calculator 7. As shown in Fig. 2, the output signal ~' 30 register 5 comprises a plurality of delay circuits 5a, inputs the ;l above (i~ cycle-delayed sampled output signal Xj, and generates (m-l)-cycle-delayed output signal Xj(m) where m = 1 to I and I is a number of the taps in the adaptive digital filter. The filter coefficient register 6 holds filter coefficients Hj(m) corresponding to the taps m = 1 to I. The convolution calculator ~
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- 15b -7 comprises a plurality of multipliers 7a to obtain the multiples of the respective filter coefficients Hj(i) and the corresponding -cycle-delayed sampled output signals Xj(i), and an accumulator 7b to obtain the summation ~Hj(i)Xj(i) o~ the multiples Hj(i)Xj(i).
:! Figure 3 is a block diagram showing the operation for obtaining an estimatad filter coefficient Hj~(m~ corresponding to an m-th tap for the next sample time j+l in the echo canceler in accordance with the normalized least mean square (NLMS) 3 algorithm. In Fig. 3, the filter coefficient register 6, the output signal register 5, the convolution calculator 7, and the ; subtracter 9 are the same as Figs. 1 and 2, and reference numeral ~3~ 81 denotes a norm calculation circuit, 80 and 83 each denote a 1 15 multiplier, 82 denotes a divider, and 84 denotes an adder.
The multiplier 80 is provided for multiplying the residual ~,~ echo Ej by the coefficient correction constant K, the norm calculation circuit 81 calculates the norm ~Xj(i)2, the divider 82 divides the output of the multiplier 80 by the norm ~Xj(i)2, the multiplier 83 multiplies the output of the divider 82 by the value of the (m~ cycle-delayed sampled output signal XJ(m), and the adder 84 adds the estimated filter coefficient Hj(i) at the sample time j to the output of the multiplier 83 to obtain the filter coefficient Hj,t(m) corresponding to the m-th tap for the next sample time j+l.
~¦ Figure 4 shows the construction of the norm calculation circuit 31 in Fig. 3. In Fig. 4, the output signal register 5 is the same as Figs. 1, 2 and 3, and reference numerals 10 and 11 each denote a square calculator, 12 denotes a subtracter, and 13 denotes an accumulator. In the accumulator 13, reference numeral 14 denotes an adder, and 15 denotes a delay circuit. The sampled output signal Xj is input in parallel into the square calculator 10 to obtain an Xj2 circuit, and into the output signal register 5 to obtain the above-mentioned (m~ cycle~
delayed output signal Xj(m) where m = 1 to I. The square .:'. `
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2~263~8 - 15c - .~ :
calculator 11 receives the (i~ cycle-delayed sampled output ~-signal Xj(i) from the output signal register 5 to obtain Xj(I~2.
The subtracter 12 subtracts the output Xj(I)2 of the square calculator 11 from the output Xj2=Xj(l) 2 of the square calculator 12. The output Xj2-Xj(I) 2 of the subtracter 10 is supplied to the accumulator 13 to obta.in the accumulation of the output XjZ-Xj(I)2 of the subtracter 12. ::
Since the initial values held in the output signal register 5 are zero, the output Xj~I) of the output signal register 5 is ~ .
zero during the first I sample clock cycles, the output of the `~
square calculator 11 is also zero during the first I sample clock cycles. The output Tq of the accumulator 13 at the sample time q is Tq = X12 + X22 + .. + Xq2 where q~I. Then, when the sample time q becomes larger than I, the output Xj(I) of the output signal register 5 becomes - .
effective. For example, when q=I+l, the output of the accumulator 13 becomes T~f1 = (X~f12 - X12) + Tl . `1`=
= X22 + X32 + . . . + X~2 + Xl+12. ,'.` '`'`''' Further, generally, when q>I, the output of ths accumulator 13 becomes Tq = (Xq2 _ Xq12) + T
= Xq If 12 + Xq lf22 + . . . Xq2~
Namely, a summation of squares of precedingly sampled successive I output signals is output from the output signal register 5 as the norm ~Xj(i)2. :~
Generally, regarding the convergence rate of the filter 1 30 coefficient Hjf1(m) in the conventional normalized least mean .
I square (NLMS) algorithm as explained above, it is considered that the larger the coefficient correction constant value K becomes, I the faster the convergence of the filter coefficient bscomes and the less accurate estimation of the echo can be carried out, and the smaller the coefficient correction ~onstant value K becomes, :

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- 15d-the slower the convergence of the filter coefficient becomes and the more accurate estimation of the echo can ~e carried out.
First, the cause of the aforementioned drawbacks in the echo canceler in accordance with the conventional normalized least mean square (NLMS) algorithm, is considered as ~ollows.
As shown in Fi~s. 1 and 3, the residual ec:ho Ej is shown as Ej = Yj - ~Hj(i)Xj(i) (2) where the total input signal Yj(i) is expressed using the (i~
cycle-delayed sampled output signal Xj(i), the audio input signal Sj from the subscriber, the noise signal Nj, and the true filter coefficient hj(i) corresponding to an actual impulse response (echo path gain) which is to be estimated by the adaptive digital filter, as Yj = (Sj + Nj) + ~.hj(i)Xj ~3) Namely, the filter coefficient renewing circuit 8 of Fig.
1 operates to make the estimated filter coef~icien-t Hj(i) approach the true filter coefficient hj(i) corresponding to an actual impulse response (echo path gain) based on the residual echo Ej.
By substituting the equations (2) and (3) into (1), ~+l~m) = ~ (m) + ~-[Yi ~ i)Xj(i)]-Xj(m)/~X~ 2 = H;(m) + K-[S; + N;]-Xi(m)/~X;(i)2 + K [h; (i)Xj (i) ] Xi(m)/~Xj(i) 2 - K-[~j(i)Xj(i)]-Xj(m)/~Xj(i) 2 = ~i(m) + K-[(Sj + ~)+ ~j(i)X~ ] x;(m)/x;ti)2 (g) wnere ~(i) is an estimation error, and ~i) = h;(i) -~i (i) .
By separating a term wherein i = m, +l(m~
= ~;(m) + ~-[Sj + N;]-Xj(m)/~Xi(i~ 2 + ~-[~ihj(i)X;(i) - ~Hj(i)xj(i)] x;(m)/~Xi(i)2 2~26~8 ~

+ K-[h~m)X~¦m) - H~(m)X~(m)]-X~(m)/~X)(i)2 .~
(5) ~:
where ~m is a summation of all the t:aps of the adaptive digital f.ilter except i = m~ By def.ining an amount Emi ~:
~' 5 as .
Emj = (Si + N~) + ~h~(i)Xiti) - ~Ii(i)Xi(i) ~, = (SJ + Nj) + ~i(i)xi(i), the equation (5) is expressed as ~ Hj~lt~) 3 10 = Hj(m) .
~ + K-Em~-X~(m)/~X~(i)2 , + K-hi(m)X;(m)2/~Xj (i)2 .
: - K-H~(m)X;(m)2/~Xj(i)2.
= Hj(m)-[l-K-Xi(m)2/~i(i)2]
+ K-Em;-XJ(m)/&;(i)2 + K-h~(m)Xi(m)2/~Xj(i)2 .
= H~(m) [l-K Xi(m)2/xi(i)2] .
+ K-[hj(m) + Emj/Xj(m)]X;(m)2/~Xi(i)2 . = Hi(m)-[l-K-~(m)2/~Xi(i)2]
+ K-[h;(m) + Q~(m)]X;(m)2/~Xj(i)2 (6) where Qitm) is defined as Q~(m) = Emj/Xj(m).
, Pigure 5 shows the calculation of the equation (6) ¦ as a block diagram. In Fig. 5, an amount a is defined by l a = [1-K-Xi(m)2/~X~(i)2], (7) 3 25 and therefore, `~
= K-Xi(m)2/~i(i)2-As shown in Pig. 5, it is understood that the -~
conventional normalized least mean square (NLMS) ~ .:
algorithm includes a low-pass filter comprising an adder - ~-I ~ 30 16, multipliers 19 and 18, and a delay element 17, where ¦ the multiplier 19 multiplies an input signal hi(i) + -. :
Qi(i) by a gain compensating factor ~1-a), the adder 16 . adds the output of the multiplier 18 to the output of . ~
the multiplier 19, the delay element 17 delays the ~ -:
35 output of the adder 16 for one sample clock cycle, and ~ ~ -the multipli~r 18 multiplies the output of the delay ~ -element 17 by the above factor a. Namely, from the above ~- :

~ .

' 1. '.' '`. ' . "'- ~

,' i :. ~ ., :: ::
~ ~. " - ,., ~ :

2~26~8 point of view, the disturbance Q~(i) which is included in the input signal [h~ Q~(i)] is suppressed by the low-pass filter having a low-pass filter coefficient a, and the filter coefficient HJ(m) in the adaptive digital filter is converged to the echo path gain hi(m), and thus, the echo path gain h~(m) is extracted as a direct current component.
In the diagram of Fig. 5, the disturbance Q~(m) ;~;
includes a factor 1/X~(m). To avoid a division by X~(m) = zero, the diagram of Fig. 5 is rewritten by the following transformation, hj(m) ~ hj(m)Xj(m), and K-X;(m)2/~X;(i)2 ~ K-X;(m)/~X~(i)2 ~--to obtain a diagram of Fig. 6, where the above quantity h~(m)X~(m) corresponds to a component of the echo signal.
To keep the operation of the low-pass filter stable, the low-pass filter coefficient a must satisfy the following condition ---1 < ~ < 1.
The stability condition of the low-pass filter is expressed as -1 < 1-K-Xj(m)2/X~(i)2 ~ 1 (8) The equation (8) leads to 0 < K xj(m)2/Xi(i)2 < 2.
Since X;(m)2/~Xj (i)2 < 1, the following condition for the coefficient correction constant K is obtained.
The above condition is the same as the conventional stability condition for the normalized least mean square (NLMS) algorithm. The adaptive digital filter is stable even when X~(m) = 0 and therefore the low-pass filter ~ ~-coefficient becomes equal to one, because the input into the low-pass filter becomes zero.
From the above consideration, the cause of the aforementioned drawback in the conventional normalized least mean square (NLMS) algorithm, is understood. that ~-is, the low-pass filter coefficient a in the low-pass .:`
. .

2~2~8 .. ~.
. - 18 - FJ-8113-CA

filter varies with the amplitude of the (m-l)-cycle-~ delayed sampled output signal X~(m) as shown in the ;`~ equation (7).
To analyze the problem in more detail, the case K
s = 1 is considered. In the case, the~ equation (7) becomes ~ aJ(m) = [l-X~(m)2/~X~(i)2]. (9) -`~ Since 0 < X;(m)2/~X~(i)2 ~ l, the low-pass filter coefficient ~ varies according to 1he variation of the `
amplitude of the (m-l)-cycle-delayed sampled output i lO signal X;(m) as .j O < a~ (m) < l.
When the low-pass filter coefficient a is large in the ~J above range, the low-pass filter becomes more stable and the disturbance included in the input signal is -suppressed more efEectively, but the convergence becomes ~, more slow. When the low-pass filter coefficient a is , ~J small in the above range, the convergence in the low-;,~ pass filter becomes faster, but the low-pass filter , . . . .
~, becomes more unstable and the suppression of the ` `
~' 20 disturbance included in the input signal is less i effective. Therefore, the performance of the low-pass - -`:j filter varies with the variation of the low-pass filter ;1 coefficient a, i.e., with the amplitude of the (m-l)-cycle-delayed sampled output signal X~tm). Namely, the residual echo varies with the amplitude of the (m-l)-cycle-delayed sampled outpu~ signal Xj(m).
~` For example, when an impulse-like signal is input -~, as the sampled output signal, X~(m) 2 becomes nearly ~-;~ equal to ~X~(i) 2, and therefore, the low-pass filter 30 coefficient ~ becomes nearly equal to zero. Thus, the ~ ~-low-pass filter becomes very unstable with regard to the ~ disturbance, and the estimated filter coefficients in ,~ the adaptive digital filter vary greatly. ~ ~`
In addition, the eguation (7) shows that the low-35 pass filter coefficient a increases when the coefficient -correction constant K is decreased, and decreases when , ' the coefficient correction constant K is increased.

:~1 , ........................................................................ .
`:','.

. j i' ~:

~ ~ 2 6 ~

Figure 7 shows a result of a simulation wherein ;~ the variation of the low-pass filter coefficient a is obtained when a voice si~nal ~kun is supplied as the (m~
1)-cycle-delayed sampled output signal X~(m) to the ~ 5 conventional echo canceler in ac~ordance with the i~ normalized least mean square (NLMS) algorithm, and the number I of the taps is set to I = 80. As shown in Fig.
7, the filter coefficient a become~ unstable at the -~
beginning of the voice signal and when the consonant "k" - ~-10 is input. ~ -Conventionally, as mentioned before, the factor -~-Xi (i) 2 in the second term on the right side of the equation (1) is considered to be provided for suppressing the influence of the variation of the 15 amplitude of the (m-1)-cycle-delayed sampled output ¦ signal X~(m) on the filter coefficients HJ(m). However, as understood from the above consideration, the effect of the suppression by the factor 1/~X~(i) 2 in the ~ -~ equation (1) is insufficient. The factor 1/&~(i)2 in '~ 20 the second term on the right side of the equation (1) - ~-provides only normalization within successive (i~
cycle-delayed sampled output signals held in the output signal register 5, but does not provide normalization on the time axis. The normalization factor 1/X~(i) 2 25 suppresses the influence of the variation of the ~ amplitude of the (m-1)-cycle-delayed sampled output l signal Xj(m) only partially.
Therefore, it is not necessary to limit the range ;~
of the summation in the norm ~Xi(i3 2 within the taps in -30 the adaptive digital filter, and the range of the , `, summation can be varied. ~
Further, the normalization need not be carried out ~ ~-in the low-pass filter, the operation corresponding to the normalization can be carried out outside of the low-35 pass filter, for example, in either the input side or the output side of the low-pass filter. When the ~; normalization factor is excluded from the low-pass ., - ~ '. :~' .

~, , . :' i, ' '.
. .

- 2 ~ ~ 6 ~
- 20 - FJ-8113-CA -~

filter, and the factors which vary with the (m-1)-c~cle-delayed sampled output signal X~(m) is excluded from the ` low-pass filter, the low-pass filter coefficient a in ~ ;~
the low-pass filter can be set to a constant a'. For ;~
example, the factors which vary with the (m-1)-cycle-delayed sampled output signal Xjtm), can be excluded ij from the low-pass filter 100 in Fig. 6 by multiplying ;~ the input of the low-pass filter 100 by a factor i 1/X;(m). . -Figure 8 is a block diagram of a calculation system for estimating the echo path gain h;(m), comprising a low-pass filter which obtains the estimated filter coefficient Hj(m), and wherein the filter coefficient is a constant. The differences from the construction of Fig. 6 are that the filter coefficient , in the low-pass filter is made constant, and that the ~ input of the low-pass filter i5 ~ultiplied by 1/Xj(m).
l According to the construction of Fig. 8, the accuracy of the estimated filter coefficient Hj~l(m) is not varied by ;~-, 20 the variation of the amplitude of the (m-1)-cycle-delayed sampled output signal Xj(m).
In the construction of Fig. 8, the provision of the subtracter 22' is not essential to obtain a converged filter coefficient Hj+l(m). When the subtraction in the subtracter 22' is not carried out, the lack of the value -~mHj(i)X;(i) causes only an increase in noise level in the output of the echo canceler because the amount -~H~(i)XJ(i) does not include the factor relating the number m.
, 30 Generally, the amount -~H;(i)Xi(i) is added to the input Y~(i) for canceling the component ~mh~ (i) in the echo signal to accelerate the convergence of the ~
filter coefficient H;(m). The acceleration of the ~--convergence is realized only when the following relationship exists.
hj(i)X~ > ¦~mQj(i)X~(i)¦ (10) ~
Since ; ~-.. ~

2 ~ 2 6 ~ ~ 8 ~, - 21 - FJ-8113-CA

[Y~ - mHJ ( i ) Xj ( i ) ] - X~ (m) .
~;i = [h~(m)X~(m) + (S~ -~ N~
j -t ~h~(i)X~ mH;(i)X~i)]-X~(m) .: ~-= [hi(m)X~(m) + (S~ + N~
+ ~ (i)X;(i)]-X~(m) ~:~
= h~(m)X~(m)2 + ~(S~ ~ N~
l + ~ )X~(i)]-Xi(m)~
i when the above relationship (10) does not exist, the `~ subtraction of the amount ~mHj (i) X~ (i) in the subtracter ~:1 .- :;:.::
l 10 22' increases an error in the filter coefficient H;+1(m) 'i which is obtained from the construction of Fig. 8. The ~ relationship (10) does not exist when the filter .:~ ~
1 coefficient H;(m) does not closely approximate the true :: ~ :
echo path gain h~(m), for example, in the beginning of ~ :~
15 the operation of the echo canceler, and therefore, the .
convergence of the filter coefficient H~(m) is :
accelerated by substantially reducing the subtraction of , the amount ~H~ Xj(i) in the subtracter 22' until the ~ filter coefficient H;(m) comes close to the true echo ;l 20 path gain h;(m), for example, in the beginning of the operation of the echo canceler. ~ `
Further, the low-pass filter coefficient a' in the :-~
, low-pass filter may be set to a small value in the .~ beginning of the operation of the echo canceler, and .
then be increased with the progress in the convergence of the output of the low-pass filter. As explained before, when the low-pass filter coefficient ~' is small (near to zero), the convergence rate becomes high and ~ :
the accuracy of the convergence becomes low, and when ~ :
the low-pass filter coefficient:a' is large (near one), :~
the convergence rate becomes low and the accuracy of the :. -convergence becomes high Therefore, by the above setting and increasing of the low-pass filter coefficient af, the progress in the convergence is ac- :-~ ~ -3~ celerated in the beginning of the operation of the echo ~:
canceler, and accurate convergence is obtained after the ~ :
convergence is achieved to a predetermined degree. ~ -~

-:

:
2~26~8 :, :
- 22 - FJ-~113-CA

The operation shown in Fig. 8, however, includes the possibility of a division by zero when X~(m) = 0. To avoid the division by zero, two methods are considered. ~ ~-The first method to avoid the division by zero is to detect that Xj(m) = 0, and halt t:he operation of the construction of Fig. 8.
The second method to avoid the division by zero is to replace the operation of 1/X~(m) by an operation of a normalization outside the low-pass filter.
In the second method, by multiplying the output of the subtracter 22' in Fig. 8 by Xj(m), [Yj - S~H~(i)Xj~i)]-Xj~m) j = h~(m)X~(m)2 + [(Si + N;) + Sm~;(i)X~(i)]-x~(m).
By accumulating the above quantity over j = k to ~C, and dividing -the quantity by a norm ~'X~(i)2 for the normalization, ~'[h~(m)X;(m)2 ~ ;-+ Xj(m)-{(Sj + Nj) + ~m~j(i)X~(i)}]/~'Xj(i)2, ~`
= ~'hj(m)Xj(m)2 +~x;(m)-[(s; + Nj) + ~m~i(i)Xi(i)]/~'X~(i)2, where ~' is a summation of j = k to ~C. When hj(m) can be -approximated to be a constant htm) during the above summation, the above normalized quantity becomes h(m) +~'Xj(m)-[(S; + Nj) + ~m~(i)X~(i)]/~Xj(i)2.
When the above normalization is carried out in the input side of the low-pass filter 32' of Fig. 8, the filtering operation of the low-pass filter is carried `~
out on the second term of the above normalized quantity, 30 and when the above normalization is carried out in the -~
output side of the low-pass filter 32' of Fig. 8, the ~ -~
filtering operation of the low-pass filter is carried out on the numerator of the second term of the above normalized quantity.

' ~

, .~ . . . .

2 ~ 2 ~ ~ 5 ~

(2) First Embodiment of the Present Invention Basic Construction igure 9 shows a basic construction of the first e~bodiment of the present invention, for obtaining an ~, 5 estimated filter coefficient H~ m,l corresponding to an m-th tap for the next sample time j+1 in the echo ~ canceler. The construction of Fig. 9 realizes the above "t case wherein the normalization is carried out in the ;
~`~ output side of the low-pass filter 32~ of Fig. 8. In 10 Fig. 9, the filter coefficient register 6, the output `~ signal register 5, the convolution calculator 7, and the subtracter 22 are the same as the output signal register 5, the convolution calculator 7, and the subtracter 9 in Figs. 1 and 2, and reference numeral 20 denotes a sum-15 of-products calculator, 21 denotes a filter coefficient modifying circuit, 23 denotes a multiplier, 24 denotes ' an integrating circuit, 25 denotes a power calculator, :,, and 25 denotes a divider.
The sum-of-products calculator 20 receives the 20 value ~Hi(i)Xj(i) from the convolution calculator 7, and - the m-th filter coefficient Hi(m) from the filter coefficient register 6, and the (m-1)-cycle-delayed ~ -~
, sampled output signal Xj(m~ from the output signal ~ ~-,, register 5, and obtains the value ~mHj(i)Xj(i). The 25 filter coefficient modifying circuit 21 modifies the filter coefficients Hi(i) in the calculation of the value ~mHi(i)Xi~i) in the convolution calculator 7 or in the sum-of-products calculator 20 so that the calculated ;j value ~mHj(i)Xj(i) is substantially reduced during a .. ,.,1 .
30 predetermined time from the beginning of the operation -~
of the echo canceler to prevent the input to the following stage of the circuit of Fig. 9 from being damaged by inaccurate values ~Hi(i)Xj(i) which are calculated using the filter coefficients Hi(i) which - ~ -have not been converged yet. For example, the filter ~1~! coefficient modifying circuit 21 modifies the filter coefficients Hj(i) by making filter coefficients of `': :
-~ ~

~,, , 2 ~ 2 ~ ~ ~ 8 , p,redetermined taps zero, as explained later.
The subtracter 22 calculates the difference between the total input signal Y,5 (i) and the above valu0 ~H;(i)Xi(i), and the multiplier 23 multiplies the output [Y~ mHj(i)X~(i)] of the subtracter 22 by the (m-1)-delayed sampled output signal X;(m) which is supplied ~' from the output signal register 5. The integrating ~, circuit 24 integrates the output of the multiplier 23 so ' ,,that a component corresponding to the true echo path ~' 10 gain h~(m) is extracted from the output [Y,(i) - , H,(i)Xi(i)]Xi(m) of the multiplier 23 by filtering out noise components, and comprises a low-pass filter ,~
wherein it~ low-pass filter coefficient a is a constant a~, and the low-pass filter realizes the low-pass filter 32' in Fig. 8.
The power calculator 25 comprises a square ,~
calculator 251 and an integrating circuit 252 to calculate an integrated power P;(m) of the (m-1)-cycle-delayed sampled output signal X;(m). The divider 26 ~ 20 divides the output of the integrating circuit 24 by the 1 power P;(m) of the (m-1)-cycle-delayed sampled output ~ ~ -signal X~(m) to obtain the renewal value of the filter coefficient Hj+l(m).

Sum-of-Products Calculator 20 ~ Figure 10 shows an example of the construction of 1 the sum-of-products calculator 20 in Fig. 9. The sum-of-products calculator 20 shown in Fig. 10 comprises a -~ 9~-multiplier 63 and a subtracter 64. The multiplier 63 , ~ 30 calculates the product of the (m-1)-cycle-delayed ! ' sampled output signal X~(m) which is supplied from the ;'~
output signal register 5 and the estimated filter coefficient Hj(m) which is supplied from the filter coefficient register 6. The subtracter 64 subtracts the 1 35 product H,(m)X;(m) from the convolution 9H,(i)Xi(i~ which iS supplied from the convolution calculator 7 to obtain I~ the value ~Hj(i)Xi(i).

.
,~ .

,'.: : . . ' , . :. `

~'~` ':~ ' ' ' .

2 ~ 2 ~

Filter Coefficient_Modifvina Çircuit 21 Figure ll shows a first example of the construction oE the filter coefficient modifying circuit 21 in Fig. 9. In Fig. ll, reference numeral 65 denotes 5 the first example of the fil-ter coefficient modifying circuit 21 in Fig. 9, 661, 662, to 66I each denote a comparator, and 671, 672, to 67I each denote a selector.
A pair comprised of a comparator 66i and a selector 67 (i=l to I, i ~ m) is provided for each tap of -the lO adaptive digital filter except the tap i = m. The selector 67i receives the filter coefficient Hj(i) and ;~
"0" value, and selects one of the received values as its output to the convolution calculator 7 under the control of the output of the corresponding comparator 66i. The 15 filter coefficient modifying circuit 65 receives the residual echo Bj or a timer count. The comparator 66 compares the received residual echo Ej or timer count with a respective threshold value Thi, and controls the corresponding selector 67i to select the "0" value as 20 its output when the received residual echo E~ or timer count is below the threshold value Thi, or to select the uO,, value as its output when the received residual echo E; or timer count exceeds the threshold value Thi. Thus, the "0" value is supplied to the convolution calculator -~
25 7 instead of the estimated filter coefficient Hj (i~
during a predetermined time from the beginning of the operation of the echo canceler, or until the residual echo Ej falls below a predetermined level, and -~
therefore, the sum-of-products output from the sum-of- i~
30 products calculator 20 is substantially reduced during a ~ ~j predetermined time from the beginning of the operation of the echo canceler, or until the residual echo Ej ~-falls below a predetermined level, to prevent the input -~
to the following stage of the circuit of Fig. 9 from ;~
35 being damaged by inaccurate values ~Hj(i)X~ which are } calculated using the filter coefficients Hj(i} which ~ ~-have not been converged yet.
~ :
, ., ~-. ~ , , ' : ' 2~2~5~

. ~ , Figure 12 shows a second exa~lple of the construction of the filter coefficient modifying circuit 21 in Fig. 9. In Fig. 12, reference num~ral 65' denot~s the second example of the filter coefficient modifying circuit 21 in Fig. 9, 681, 682, to 68I each denote a comparator, and 691, 692, to 69I each denote a multiplier. A pair comprised of a comparator 681 and a multiplier 69i (i=1 to I, i ~ m) are provided for each tap of the adaptive digital filter except the tap i = m.
10 The multiplier 69i receives the filter coefficient Hj(i), multiplies the filter coefficient Hj(i) by one of predetermined factors Cil to C i4 which are non-negative values not more than one, under the control of the output of the corresponding comparator 68i, and supplies 15 the multiplied value to the convolution calculator 7 instead of the estimated Eilter coefficient H~ (i) for ; the taps i=1 to I, i ~ m. The filter coefficient modifying circuit 65' receives the residual echo Ej or a timer count. The comparator 68i compares the received ~j 20 residual echo E~ or timer count with one or more threshold values Thi1 to Thi3 which are set therein in -advance, and controls the corresponding multiplier 69i ~ -to use one of the predetermined factors Cil to Ci4 corresponding to the result of the comparison. The above 25 threshold values Thi1 to Thi3 and the factors Cil to Ci4 are predetermined so that the output of the multipliers 681, 682, to 68I are substantially reduced during a predetermined time corresponding to the threshold Thil -from the beginning of the operation of the echo 30 canceler, or until the residual echo Ej falls below a predetermined level corresponding to the threshold Thi1, j~ and then the outputs of the multipliers 681, 682, to 68 ? are increased step by step, with an elapse of time or with a progress of convergence of the filter coefficient 35 H;(m), by the multiplication by the factors Cil to Ci4 ~. :
::! which are non-negative values not more than one. Thus, ~1 . .
the sum-of-products output from the sum-of-products ... :
. .

' .. : :~: .: :

: , . ~ .: . ~ ~ . ' ' 2 0 2 6 ~

calculator 20 is substantially reduced during a predetermined time from the beginning of the operation of the echo canceler, or until the residual echo Ej falls below a predetermined level, and then the sum-of-products output from the sum-of-products calculator 20 is increased step by step to the value ~mH~ ti) X~ (i), with ~ ~-an elapse of time or with a progress of convergence of ~ -the filter coefficient H~(m), to prevent the input to the following stage of the circuit of Fig. 9 from being ; -damaged by inaccurate values ~H~(i)Xj(i) which are calculated using the filter coefficients H~i) which have not been converged yet. ~ ~ -In the above examples of Figs. 11 and 12, in the case where the filter coe-fficients Hj(i) ~i=1 to I) are -initially set equal to zero, the comparators may compare the corresponding estimated filter coefficients H
(i=1 to I, i ~ m) with the respective threshold values. -~
In the above case, the filter coefficients Hj(i) are ~ ~;
changed from zero to the echo path gain h;(i) step by 20 step by being renewed in each sample clock cycle. ; ;~
In the construction of Fig. 11, the comparator 66i ~- - -compares the filter coe~ficient Hj(m) with a respective threshold value Thi, and controls the corresponding selector 67i to select the ~0~ value as its output when the filter coefficient Hj(i) is below the threshold value Thi, or to select the ~'0~' value as its output when the filter coefficient H~(m) exceeds the threshold value Thi. Thus, the ~D" value is supplied to the convolution .. . ~-. .
calculator 7 instead of the estimated filter coefficient 30 Hj(i) until the filter coefficient H~(i) exceeds a ~-predetermined level, and therefore, a sum-of-products output from the sum-of-products calculator 20 is substantially reduced until the filter coefficient H~
exceeds a predetermined level, to prevent the input to the following stage of the circuit of Fig. 9 from being damaged by inaccurate values ~H;(i)Xi(i) which are ;
calculated using the filter coefficients H~(i) which -' '-.

:'; ::: . . . :

. ~, ~" ~ , . . .
,,:,~ ~ , .
.~ . .
, ~,: . .

` 2~26~

have not been converged yet.
In the construction of Fig. 12, the comparator 68 compares the filter coefficient H~(i) with one or more threshold values Thi1 to Thi3 which are set therein in advance, and controls the corresponding multiplier 69i , to use one of the predetermined factors Cil to C
;~ corresponding to the result of the comparison. The above threshold values Thi1 to Thi3 and the factors Ci1 to Cl~
¦ are predetermined so that the outputs of the multipliers 681, 682, to 68I are substantially reduced until the -filter coefficient Hj(i) exceeds a predetermined level corresponding to the threshold Thi1, and then the I outputs of the multipliers 681, 682, to 68I are increased step by step, with a progress of convergence of the ~', 15 filter coefficient H~(m), by the multiplication by the ;$ factors Cil to C1~ which are non-negative values not more than one. Thus, the sum-of-products output from the sum-of-products calculator 20 is substantially reduced until -~
the filter coefficient Hj(i) exceeds a predetermined -level, and then the sum-of-products output from the sum-of-products calculator 20 is increased step by step to the value ~mHj(i)Xi~i), with a progress of convergence of ; the filter coefficient Hj~m), to prevent the input to ~-the following stage of the circuit of Fig. 9 from being i, 25 damaged by inaccurate values ~Hj(i)Xj~i) which are calculated using the filter coefficients H~ which have not been converged yet.
~;
Intearatina Circuit 24 ;~
~'l 30 Figure 13 shows a first example of the JI construction of the integrating circuit 24 in Fig. 9. In the example of Fig. 13, the integrating circuit 24 is constituted by a low-pass filter 50 wherein its low-pass ; filter coefficient a' is a constant.
Figure 14 shows a second example of the construction of the integrating circuit 24 in Fig. 9. In the example of Fig. 14, the integrating circuit 24 ., .

,~ - .

2~26~a~ :-. . .
comprises a low-pass filter 50~ wherein its low-pass filter coefficient a' is a constant:. The low-pass filter coefficient setting circuit 51 set~ the low-pass filter - --coefficient a' in the multipliers l9b and l~b in the ~-5 low-pass filter 50' according to the amount of the residua] echo Ej or the elapse of time from the beginning of the operation of the echo canceler.
~ Although not shown in Fig. 14, the low-pass filter ,~
3 coefficient setting circuit 51 comprises a comparator 10 wherein one or a plurality of threshold levels for a ~-~i timer count each of which corresponds to a value of the low-pass filter coefficient ', and a memory storing the values of the low-pass filter coefficients ' The low-pass filter coefficient setting circuit 51 sets a small 15 value near zero at the beginning of the operation of the echo canceler, receives the timer count, and then renews the low-pass filter coefficient a' in the multipliers 18b and l9b to one of the above values when the received timer count exceeds the corresponding predetermined 20 threshold level with the elapse of time. The above values of the low-pass filter coefficient ~ which are memorized in the memory, correspond to the respective threshold levels so that the low-pass filter coefficient ¦ ' i~creases from the above small value near zero to a value near one with the increase in the timer count.
The low-pass filter coefficient setting circuit 51 ~ may alternately comprise a comparator wherein one or a - -~
,j plurality of threshold levels for an amount of the i~ residual echo E; each of which corresponds to a value of ' 30 the low-pass filter coefficient a', and a memory storing ~ ~ -1 the values of the low-pass filter coefficients a'. The low-pass filter coefficient setting circuit 51 sets a small value near zero at the beginning of the operation of the echo canceler, receives the residual echo Ej, and -i 35 then renews the low-pass filter coefficient a' in the ; -~
; multipliers 18b and l9b to one of the above values when ~--~ the received residual echo Ej exceeds the corresponding `-t '~`' '.'', -`

:, C' ', ~ ' ~ , .. , ' - . . : . . ..

-- 2 ~ 8 predetermined threshold level. The above values of the low-pass filter coefficient ' which are memorized in the memory, correspond to the respective threshold levels so that the low-pass filter coefficient ~' increases from the above small value near zero to a value near one with the increase in the residual echo E~.
By the above setting (increasing) oE the low-pass filter coefficient ', the progress in the convergence is accelerated in the beginning of the operation of the , echo canceler, and accurate convergence is obtained -d- ~--I after the convergence is achieved to a predetermined ¦ degree.
, Figure 15 shows a third example of the '~ 15 construction of the integrating circuit 24 in Fig. 9. In the example of Fig. 15, the integrating circuit 24 ~ - I
I comprises a low-pass filter 50 wherein its low-pass ~ ~ ;
I filter coefficient a' is a constant, an arithmetic 1~ average calculator 52 wherein its low-pass filter ! 20 coefficient is equal to (n-1)/n, selectors 53 and 53' and a controller 71. In the construction of Fig. 15, the ~ low-pass filter 50" and the arithmetic average I calculator 52 are alternatively used. The selectors 53 ~-j and 53' are provided in the input and output sides of the construction of Fig. 15. The selector 53 supplies , the output of the multiplier 23 of Fig. 9 to one of the i low-pass filter 50" and the arithmetic average calculator 52, and the selector 53' selects as its ' output one of the outputs of the low-pass filter 50" an the arithmetic average calculator 52. The output of the ~, selector 53' is supplied to the divider 26 in Fig. 9.
The controller 71 controls the above selections in the selectors 53 and 53' according to the level of the residual echo E~ or elapse of time, i.e., the controller ~ ;
71 controls the above selections in the selectors 53 and 53' so that both the selectors 53 and 53' select the arithmetic average calculator 52 until the predetermined `'"~`~''' ~

-` 2~26~8 - 31 - FJ-8113-CA ~ ~
.,~, . , ~` time elapses from the beginning of the operation of the ~' echo canceler, or until the residual echo Ei falls below a predetermined level, and both th~Z selectors 53 and 53 select the low-pass filter 50" after the predetermined 5 time elapses from the beginning of the operation of the '., echo canceler, or after the residual echo E~ falls below a predetermined level. For example, the arithmetic q average calculator 52 is used when all the filter l~s\~ià ~oefficients HZ(i) are made zero in the calculation of ;^~ 10 convolution in the convolution calculator 7 under the ~-control of the filter coefficient modifying circuit 21 in Fig. 9 as mentioned before.
The low-pass filter 50n in Fig. 15 may be the same as the low-pass filters shown in Figs. 13 and 14. The 15 arithmetic average calculator 52 is explained below. The arithmetic average calculator 52 has a construction similar to the low-pass filter 50", but the -~
multiplication factor in the multiplier l9d is equal to 1/n, and the multiplication factor in the multiplier 18d -~
20 is e~ual to (n-1)/n, where n is the number of the samples which is counted from the beginning of the ;~
operation of the echo canceler.
~'j When the input of the arithmetic average -~
Zj calculator 52 is denoted by A(j), and the output of the 25 arithmetic average calculator 52 corresponding to the ~ ;-~` input A(j) is denoted by B(j), the operations of the ~
,A' arithmetic average calculator 52 from the first sample ~ -~`! are as follows.
B (1) = A(1) B(2) = A(1)/2 + A(2)/2 = [A(l) + A(2)]/2 Z B~3) = B(2)X2~3 t A(3)/3 , = [A(l) + A(2)]/2X2/3 t A(3)/3 :::
~ii = [A(1) ~ A(2) + A(3) ] /3 Z B(4) = B(3)x3/4 + A(4)/4 -= [A(l) + A(2) + A(3)]/3X3/4 + A(4)/4 i ~' = [A(l) + A(2) + A(3) + A(4)]/4 , .
.! ~
~ . , 2 ~ 2 ~

Namely, the arithmetic average of the samples which are successively input into the arithmetic average calculator 52 is obtained as the output thereo~. The multiplying factors 1/n and (n-1~/n in the multipliers 5 l9d and 18d are controlled by the controller 71 in the y construction of Fig. 15.
The convergence rate in the integrating operation ;~ by the arithmetic average calculator and the low-pass filter are compared below. When the number of the 10 samples is denoted by q, and the dispersion of the input is denoted by ~2, the dispersion of the output of the low-pass filter is equal to ~2~ (1-a) where ~ is the low-pass filter coefficient and the dispersion of the output of the arithmetic average calculator is ~2 /q~
~ 15 Therefore, to obtain the same dispersion as the i arithmetic average calculator by the low-pass filter, (1-) = l/q , ~
3 must be satisfied. For example, when q = 256, a must be ~ -' a = 255/256. The dispersion of the output of the q-times 20 integration through a low-pass filter is equal to ~2-(1-, aq). Therefore, at the convergence time is equal to 90%
-~ of the converged value, ~? 1-q= o.9.
Therefore, aq = 0.1, and the convergence time q to 90%
is q = 588 when a = 255/256. On the other hand, t he convergence time q to 90~ is g = 256 in the arith metic average calculator. As understood from the above example, the integrating operation by the arithme tic average calculator is faster than the operation b y the low-pass filter.
However, an error which is generated in the i! process of the estimation of the echo path gain (filter J coefficient H~(i)) decreases with q in the low-pass ~ filter, but decreases with 1/q in the arithmetic average ~ ~-,~ 35 calculator. Namely, in the integrating operation by the arithmetic average calculator, the influence of the error remains for a long time. Therefore, it is /l 2~26~g ~:

9t advantageous to use the arithmetic average calculator only when all the filter coefficients HJ(i) are made zero in the calculation of convolution in the convolution calculator 7 under the control oE the filter coefficient modifying circuit 21 in Fig. 9. Thus, in the ~ construction of Fig. 15, the fast convergence rate is 'Al realized in the arithmetic average ,calculator 52 in the beginning of the operation of the echo canceler without suffering from the filter coefficients H~(i) which are not converged yet. Then, after the filter coefficients : , ~.. -~,:. .
~(i) are made non-zero values in the calculation of convolution in the convolution calculator 7, the ¦ operation is switched to the low-pass filter 50N to make the converging operation stable. ~
Figure 16 shows a fourth example of the -construction of the integrating circuit 24 in Fig. 9. In the example of Fig. 16, the aritbmetic average calculator 52 is the same as the arithmetic average calculator shown in Fig. 15. In the construction of Fig.
20 16, the same function as the construction of Fig. 15 is i realized by a renewing and fixing operation of the ~ -;
, multiplying factors 1/n and (n-1)/n in the multipliers '! l9d and 18d under the control of the controller 71' ~
~ through the coefficient renewing circuit 53a which ;~;
'A 25 contains an n-value fixing circuit 53b.
; Similar to the construction of Fig. 15, the circuit of Fig. 16 operates as an arithmetic average calculator until a predetermined time elapses from the ~ -beginning of the operation of the echo canceler when all -~
the filter coefficients Hj(i) are made zero in the calculation of convolution in the convolution calculator ~, 7 under the control of the filter coefficient modifying circuit 21 in Fig. 9, or until the residual echo E
falls below a predetermined level. The controller 71' - ;-controls the coefficient renewing circuit 53a to set a value equal to 1/n and (n-l)/n as the multiplying ~3 factors in the multipliers l9d and 18d at each sampling ;~ ',,'' ~.

2~26~53 .;
~'! cycle, where n is equal to the n~unber of the samples J which are input into the construction of Fig. 16 ~rom the beginning of the operation of t:he echo canceler.
Then, after the filter coefficients H~(i) are made non-~ero values in the calculation of convoluti~n in the convolution calculator 7, or after the residual echo E~
falls below a predetermined level, the controller 71' ~- controls the coefficient renewing circui~ 53a to stop `~, the abQve operation of setting the multiplying factors at each sampling cycle, and controls the n-value fixing circuit 53b to operate. The n-value fixing circuit 53b 1 fixes the multiplying factors in the multipliers l9d and 18d to a predetermined value to make the converging operation stable.
~ 15 ;~ Power Calculator 25 Figure 17 shows a first example of the ' construction of the power calculator 25 in Fig. 9. The -~
power calculator shown in Fig. 17 comprises a sguare ~ 20 calculator 56 and a low-pass filter 50. The square `A, calculator 56 calculates the square of the (m-1)-cycle-delayed sampled output signal Xj(m) which is supplied from the output signal register 5, and the low-pass filter 50 obtains an integrated value of the square of ;
the (m-1)-cycle-delayed sampled output signal Xj(m) as the integrated power Pj(m) of the (m-1)-cycle-delayed sampled output signal X~(m).
Figure 18 shows a second example of the construction of the power calculator 25 in Fig. 9. The power calculator shown in Fig 18 is commonly provided for all the filter coefficients Hj(i) where i = 1 to I.
The power calculator shown in Fig. 18 comprises a square -~
calculator 56' and a low-pass filter 50' and a delay line 57. which are the same as Fig. 16. The power calculator 56' calculates the square of the sampled ~ output signal Xj. The low-pass filter 50' obtains an ~ - -j integrated value of the square of the sampled output ,1 -` ~ ,~

2 ~ 2 6 ., ~ 3 signal X~. The integrated square of the sampled output signal X~ which is output from the low-pass filter 50, is serially input into the delay line 57. The delay line 57 comprises I-1 delay circuits which are connected in 5 series, and each of the delay circuits delays its input -~
signal by one sampling clock cycle. The delay line 57 outputs i-cycle-delayed integrated squares of sampled output signals X~ in parallel from t:he I-1 delay -~
circuit~, where i = 1 to I-1. In Fig. 18, the output of '10 the low-pass filter 50 is denoted by Pj(1), and the i- -;
icycle-delayed integrated square of the sampled ou~put signal Xj from the delay line 57, is denoted by P~(i+1), where i = 1 to I-1. The outputs Pj(i) are respectively the same as the power output from the low-pass filter 50 in Fig. 17.
Figure 19 shows the construction of Fig. 9 when the integrating circuit of Fig. 13 and the power calculator of Fig. 18 are applied thereto. As shown in Fig. 19, the multiplier l9a of Fig. 13 and the multiplier l9e of Fig. 18 are not provided in the construction of Fig. 19 because the operations of the multiplier l9a of Fig. 13 and the multiplier l9e of Fig. - ~ ~-18 are canceled by the division in the divider 26 when the low-pass filter coefficient a~ in the multiplier 13a of Fig. 13 and the low-pass filter coefficient ~' in the multiplier l9e of Fig. 18 is set the same. Generally, the low-pass filter coefficient a' in the multiplier l9a ~
of Fig. 13 and the low-pass filter coefficient ~' in the ;~ ;
multiplier l9e of Fig. 18 need not be set to the same when the integrating circuit 2g of Fig. 9 operates as an ... ...
arithmetic average calculator, however, the low-pass filter coefficient a' in the multiplier l9a of Fig. 13 and the low-pass filter coefficient ~' in the multiplier l9e of Fig. 18 must be set the same when the integrating '35 circuit 24 of Fig. 9 operates as a low-pass filter for ~ `
realizing the normalization in the output side of the low-pass filter which is explained before with reference ; -~
'`'":.''- ~

:

2~26~3 ~-to Fig. 8. Figure 20 shows the construction of Fig. 19 for all the filter coefficients ~(i) where i = 1 to I.
In Fig. 20, the construction containing the subtracter 22, the multiplier 23, and integrating circuit 24, is denoted by the echo path gain calculation block 70i r where i = 1 to I.
Alternatively, in the construction of Fig. 9, if a reciprocal circuit is provided in the output side of the power calculator 25, the divider 26 may be replaced with 10 a multiplier. Since, generally, a dividing operation requires more steps than a multiplying operation :in processing in a digital signal processor, the processing time can be reduced by the above alternative.
Figure 21 shows a third example of the ~ -15 construction of the power calculator 25 in Fig. 9. The third example of the construction of the power calculator shown in Fig. 21, comprises a selector 58, ~-' two square calculators 56a and 56b, a low-pass filter j 50~, a register 59, a switch 60, a subtracter 61, and a 20 multiplier 62. The selector 58 selects one of the ~
cycle-delayed sampled output signals X~(i) = X~-i+1 from the output signal register 5 where i = 1 to I. The ' square calculator 56a calculates the square Xj-i+12 of the ~ `selected output of the selector 58, and the s~uare Xj-i+12 25 is supplied to the subtracter 61 as a subtrahend, where I i = 1 to I.
3 On the other hand, the square of the sampled output signal Xj is calculated in the square calculator 56b, and is integrated through the low-pass filter Son 30 to obtain the integrated power Pj~1) = PJ. The ~-integrated power P~(1) is expressed as ~ ~-~3 j ( ) ; ~ X; 1 + ,~ Xj-2 ..
+ ~3,Xj 32 + ~,Xj 42 ~ ,,, .-First, the above integrated power P~(1) from the low~
~3 35 pass filter 50" is output through the switch 60 to the ` -~ output terminal of the construction of Fig. 21. In `~
3 ~ parallel with the above, the integrated power Pj(1) is 3 ~ `

~ 2 ~ 2 6 ~ ~ 8 - 37 - FJ-8113-CA ~ --~ supplied to the multiplier 62 through ~he subtracter 61, where the above subtrahend is controlled to be zero. The integrated power P~(1) is then multiplied by 1/~' in the multiplier 62, and the multiplied ~alue PJ~ ' is held -~
5 in the register 59. ~ ;
Next, the switch 60 is disco~ected from the -~ output terminal of the low-pass filter 50", and is connected to the output terminal of the register 59.
-~ Therefore, the content of the register 59 i~ supplied to i 10 the subtracter 61 as a minuend. At this time, the delayed sampled output signal Xj(1) = X~ is supplied to j the subtracter 61 as a subtrahend, since the delayed , - .. .
' sampled output signal Xj(1) is selected in the selector ! 58. Thus, in the subtracter 61, the amount (Pi(1)-X~2) is ;1 15 obtained, and the amount is multiplied by 1/~' in the ~I multiplier 62, and the multiplied value (Pi(1)-Xj2)/~' is held in the register 59. The value (Pj(1)-Xi2)/~' is -~
expressed as .~; (P; (1) -xj2) /~' = Xj-12 + ,B~ -xj-22 + ~'2-X:j-32 l, 20 + ~3 Xj 42 + ~4 X;-s2 + ~
Namely, (Pj(l)-Xi2)/~' = Pj(2) = Pj-1 is obtain~d.
The value Pj(2) = Pi-l is held in the register 59.
`D, Then, the content of the register 59 is supplied to the ; . . ~. ~
.l subtracter 61 as a minuend. At this time, the delayed sampled output signal Xj(2) = X~-l is supplied to the subtracter 61 as a subtrahend, since the delayed sampled output signal Xj(2) is selected in the selector 58.
Thus, in the subtracter 61, the amount (Pj(2)-Xi-l~) is obtained, and the amount is multiplied by 1/~' in the -~
multiplier 62, and the multiplied value (Pj(2)-Xj-12)/~
I is held in the register 59. The value ~Pj(2)-Xj-12)/~' is 7C expressed as l tP~(2)-Xi-l2)/~' = X; 22 + ~-Xi 32 + ~2-Xi 42 -+ ~3.~Xi 52 -~ 4-Xi-62 t-Namely, (Pi(2) -X~2) /~ = P~ (3) = Pi-2 iS obtained. ~--Similarly, the integrated powers Pi(i) are obtained for - i = 1 to I. -~
A

, ~ - . .

:,-,~.:
~ :~.;. ~ - :

~3~

,, :,,, ,.,., ~ .

2~26~8 - 38 - FJ-Eill3-CA
, , Alternatively, the above result of the integrated powers Pj(i) for i = 1 to I are obtained when the input X~(1) of the square calculator 56b is replaced with X~(I), the multiplying factor 1/~' is replaced with ~
in the multiplier 62, and the order of the selection oE
~^ the (i-1)-cycle-delayed sampled output signals Xj(i) in the selector 58 is made opposite ta, th~ order in the ,t operation explained above.
, , Settina of the Low-Pass Filter Coefficients in the Low-Pass Filter in the Inteqratina Circuit 24 The convergence rate in the above operation for estimating the true echo path gain h~(m) and the , accuracy in the estimated echo path gain (filter ;~,15 coefficient) ~j(m) depend greatly on the value of the ~ ~
~;ilow-pass filter coefficient a' in the low-pass filter in -the integrating circuit 24. As explaine~ later, it is ~,found as a result of a computer simulation that there is a value of the low-pass filter coefficient a~ which ~,20 gives the optimum setting for the estimation of the echo path gain h;(m). The value is determined as j where I' is the number of taps corresponding to a -- -~
'~j reverberation time in the system.
i 25 Since an additional noise Nj exists, in practice, ~ it is desirable to use a value of a' which is a little ~-~
,g, larger than the above optimum value.

Initial Settinq of the Reqisters 5 and 6 --, 30 Further, when starting the operation of the echo ~'`'!'" ",,~
canceler, it is advantageous to clear (set to zero) the ~ output signal register 5 and the filter coefficient ''~! register 6 so that the operation of the echo canceler is not damaged by the past data. At least, the content of the filter coefficient register 6 corresponding to a j~j minimum time from the beginning of the operation of the '77 echo canceler which is necessary for an output signal to ":;

-- 2~2~8 : .
generate an echo signal in the echo path, must be cleared in the initi~l condition. The above initial ~ -setting makes the convergence of the filter coefficients fast.
. S
(3) Second Embodiment of the Present Invention Figure 22 shows a construction of the second ~1 embodiment of the present invention, for obtaining an ;~ estimated filter coefficient Hj+l(m) corresponding to m~
th tap for the next sample time j+1 in the echo canceler. The construction of Fig. 22 realizes the case ~` wherein the normalization is carried out in the input I side of the low-pass filter 32' of Fig. 8. In Fig. 22, ; the subtracter 22, the multiplier 23, and the sg~lare calculator 251 are the same as the corresponding 3' constructions in the first embodiment as shown in Fig. -9, and reference numeral 25 denotes a power calculator, 27 denotes a first accumulator, 253 denotes a second accumulator, 28 denotes a divider, and 29 denotes an 20 integrating circuit. Since the construction for ;~
~ generating the sum-of-products ~H;(i)Xi~i) which is to -;
`~ be supplied to the subtracter 22, is the same as the .~ corresponding construction shown in Fig. 9 for the first embodiment of the present invention, the construction is not shown in Fig. 22. The integrating circuit 29 ~I comprises a low-pass filter that corresponds to the low-pass filter 32~ in Fig. 8. -~
Each of the first and second accumulators 27 and j~ 253 accumulates a predetermined number of successive inputs thereof, and the accumulated result of the first accumulator 27 is supplied to the divider 28 as a ~ -dividend, and the accumulated result of the second ~-~
accumulator 253 is supplied to the divider 28 as a ~ -`~ divisor. Since the output o~ the multiplier 23 is [Y; - ~mH~(i)X;(i)]-X;(m) = [h~(m)X;(m) + Q;(m)X~m)]-X~(m) ` = h~(m)X~(m) 2 + Q~(m)X~(m) 2 ' ,: . :
j .
. ~ `.

., ~ . : . ` `

- 2~2~5~

: ' when the accumulation is carried out from j=k-tl to k+N, the accumulated value of the first accumulator 27 is [h; (m) + Q~ (m) ] ~ X~+k (m)2.
n=l ~ ~ .
The accumulated value of the second accumulator 253 is -1~ ~ X;~k ~m) 2 .
n=l 10 Therefore, the output of the divider 28 is 1 [hj(m) + Q;(m)].
Namely, the normalization is realized in the input side `~
of the low-pass filter. When the normalization is j carried out in the input side of the low-pass filter as -~
15 above, the sampling frequency is converted to a lower ~;
J value in the first accumulator 27, and therefore, the construction in the following stages can be easily realized. The integrating circuit 29 integrates the output of the divider 28 so that a component 20 corresponding to the true echo path gain h~(mJ is -- -extracted from the output of the divider 28 by filtering -~-~
out noise components. U
Although, in the construction of Fig. 22, the integrating circuit 29 is shown as a low-pass filter, -~
25 the integrating circuit 29 may be realized by any of the constructions of the integrating circuits of Figs. 14, - ` ;-l 15, and 16, the power calculator 25 may be realized by --~
any of the constructions of Figs. 17, 18, and 19, and any of the realizations and the modifications which have - -;
30 been explained in the first embodiment for the integrating circuit, the power calculator, the su~-of~
~ products calculator, and the filter coefficient i modifying circuit, may be applied in the second ~ e~bodiment. In addition, the optimum value of the low-3 35 pass filter coefficient a' in the low-pass filter in the construction of the second embodiment is obtained in the ~! ~: same manner as the first embodiment. Further, the same ~,:: .. . ~

2~26~8 - 41 - FJ-8113-CA ~

initial setting of the output signal register 5 and the ~
-filter coefficient register 6 as explained for the first embodiment, can be applied to the second e~bodiment.
", (4) Third Embodiment of the PL-esent Invention Figure 23 shows a basic construction of the third ~mbodiment of the present invention, for obtaining an estimated filter coefficient H~l(m) corresponding to an m-th tap for the next sample time j~1 in the echo canceler. The construction of Fig. 23 realizes the case wherein the first method to avoid the division by zero ~ -which was explained with reference to Fig. 8. In Fig. - -23, the output signal register 5, the filter coefficient -:~
register 6, the convolution calculator 7, the sum-of- -~-products calculator 20, the filter coefficient mocLifying circuit 21, and the subtracter 22, are the same as the corresponding constructions in the first and second embodiments as shown in Figs. 9 and 22. In addition, in ~ -z~-Fig. 23, reference numeral 30 denotes a reciprocal calculator, 31 denotes a multiplier, 32 denotes an integrating circuit, 33 denotes a zero detecting circuit, and 34 denotes a stop control circuit.
The reciprocal calculator 30 obtains a reciprocal of the (m-1)-cycle-delayed sampled output signal Xj(m). --25 The zero detecting circuit 33 determines whether or not -the amplitude of the (m-1)-cycle-delayed sampled output signal X;(m) is less than a predetermined amount, where -~
the predetermined amount is such that an amount which is ;- `
larger than the reciprocal of the predetermined amount 30 ma~ cause an overflow in calculation of the filter ~ ~
coefficients. The multiplier 31 multiplies the output of -the subtracter 22 by the above reciprocal 1/X;(m). The integrating circuit 32 integrates the output of the multiplier 31 so that a component corresponding to the `~
35 true echo path gain h~(m) is extracted from the output ~1 of the multiplier 31 by filtering out noise components. ~-The stop control circuit 34 stops the operations of the -, ., ^

:~, 2 ~ 2 6 ~ ~ 8 multiplier 31 and the integrating circuit 32 when the zero detecting circuit 33 determines that the amplitude ` of the (m-1)-cycle-delayed sampled output signal X~m) is less than a predetermined amount.
In the example shown in Fig. 23, the integrating circuit 32 is realized by a low-pass filter. The low- ~ --pass filter comprises multipliers 18 and lg, an adder 16, and a delay circuit 17 as the low-pass filters explained above. In addition, the low-pass filter in ; 10 Fig. 23 comprises coefficient setting circuits 74 and 75 ;~
~ f~r setting multiplying factors a~ and (1-a') in the `J, multipliers in 18 and 19, respectively. The above stop ;--!,3 control circuit 34 makes the coefficient setting -~ -circuits 74 and 75 set the above multiplying factors a' ~... ..
and (1-a') by making a' = 1 when the zero detecting circuit 33 determines that the amplitude of the (m-1)-cycle-delayed sampled output signal X;(m) is less than a predetermined amount. By the above setting, the -i~ multiplying factor (1-') in the multiplier 19 is made ` -!~ 20 zero, and the multiplying factor a' in the multiplier 18 -is ~ade equal to one, and therefore, the output of the -multiplier 19 is made zero, and the output of the delay --~
~; circuit 17 is supplied to the adder 16 through the ``
,~3 ~; multiplier 18 as is. Namely, the integrating operation j 25 in the low-pass filter is halted for the moment to avoid ,i the division by zero.
`l The integrating circuit 32 may be realized by -;~
either of the constructions of the integrating circuits of Figs. 14, 15, and 16, the power calculator 25 may be 3Q realized by either of the constructions of Figs. 17, 18, ~ -~
and 19, and any of the realizations and the i~l modifications which have been explained in the first - `-embodiment for the integrating circuit, the power -~
~, calculator, the sum-of-products calculator, and the filter coefficient modifying circuit, may be applied in the third embodiment. When the integrating circuit 32 is replaced with one of the above constructions of Figs. ~

,'. ' ~ `
., :, ` ~26~8 ~ 14, 15, and 16, the above setting of the multiplying ,~ factors a~ and ~1- a~ ) making a~ = 1 is carried out by the low-pass filter coefficient setting circuit 51 in Fig. 14, the the controller 71 in Fig. 15, or the 5 controller 71' through the coefficient renewing circuit f 53a in Fig. 16, respectively. -~
-, In addition, the optimum value of the low-pass filter coefficient a' in the low-pass filter in the construction of the third embodiment is obtained in the ~^~ 10 same manner as the first embodiment. Further, the same ~' - initial setting of the output signal register 5 ana the filter coefficient register 6 as explained for the first and second embodiments, can be applied to the third embodiment. ;
~5) Fourth Embodiment of the Present Invention Figure 24 shows a basic construction of the fourth ~ -~-~ embodiment of the present invention, for obtaining an estimated filter coefficient H~ m) corresponding to an 20 m-th tap for the next sample time i+1 in the echo ~ --canceler. The fourth embodiment of the present invention , is provided based on the consideration with reference to -~
Fig. 6 that it is not necessary to limit the range of the summation in the norm ~Xj(i3 2 within the taps in the , 25 adaptive digital filter, and the range of the summation v can be varied. In addition, means for suppressing the variation in the low-pass filter coefficient due to the variation of the sampled output signal Xj is provided in the fourth embodiment.
, 30 In Fig. 24, the filter coefficient register 6, the -, convolution calculator 7, the sum-of-products calculator ~`; 20, the filter coefficient modifying circuit 21, and the ~`
subtracter 22, are the same as the corresponding ~-constructions in the first, second, and third ' 35 embodiments as shown in Figs. 9, 22, and 23. In addition, in Fig. 24, reference numeral 5~ denotes an output signal register, 40 denotes a norm calculator, 41 . ~

~`` i'~`' ` ' ' " ~' . " ' ~ ..... , ~ :
~ `? ~

2 ~ 2 ~ ~ a 8 .
- 44 - FJ-8113-CA ~ -, denotes a power calculator, 42 denotes a delay line, and 43 denotes an integrating circuit.
The output signal register 5' comprises a output signal register 5a which is the sam~e as the output signal register 5 in the first, second, and third embodiments, and holds a plurality of successive sampled ~ -tpllt signals X~(i) (i = 1 to I) where I is equal to - -the number of taps in the convolution calculator 7. The output signal register 5' in the fourth embodiment further comprises an additional output signal re~ister ~ 5b which receives the serial output of the above output j signal register 5a, and holds an additional plurality of successive sampled output signal~ X~ti) ~i = I+1 to ~`
I+L). The norm calculator 41 calculates the norm n .. l Nr = ~Xk (m) 2 k=l ~---. ':: ' ::
s using the sampled output signals Xk (m) (k =1 to n) which are supplied from the output signal register 5', 1 20 where n is the number of sampled output signals Xk(m) which are input into the norm calculator 41, and the -~ -m æ imum of n is equal to I+L. The power calculator 41 receives the sampled output signal X;, and calculates an j integrated power Pj of the sampled output signal X
The power calculator 41 comprises a square calculator 411 which calculates a square of the sampled output signal Xi, and an integrating circuit 412 obtains ~ . .
,~ an integrated value of the square of the sampled output ~-, ~
signal X; as the integrated power P~. The gain in the -~
, 30 integrating circuit 412 is set to be equal to I+L. The i integrated sguare of the sampled output signal X; which is output from the low-pass filter 412, is serially ; input into the delay line 42. The delay line 42 comprises I-1 delay circuits which are connected in 35 series, and each of the delay circuits delays its input ` ~`
signal by one sampling clock cycle. The delay line 42 outputs (m-1)-cycle-delayed integrated power Pj(m) in '''~ `
` .~

2 ~ 2 ~ ~ ~ 8 , - 45 - FJ-8113-CA

parallel from the m-1 delay circuit. The power calculator 41 and the delay line 42 can be realized by any of the constructions of Figs. 17, 18, and 21, except that the gain in the integrating circuit is set to , 5 above. Namely, the power calculator 41 and the delay -~ line 42 may be realized by the construction of Fig. 18 or 21 which is commonly provided for all the circuits ~i~
~ for all the filter coefficients H~(i) where i = 1 to I.
;, The integrating circuit 43 is constructed in the ~' 10 form of a low-pass filter, and the low-pass filt~r 43 comprises multipliers 431 and 434, the adder 432, and a j delay circuit 433. The multiplying factor in the ,~ ; . . --, q multiplier 431 is set to be equal to K-X;(m)~r, and the i multiplying factor in the multiplier 434 is set to be 15 equal to 1-K-X;(m)2/r, where r is equal to one of the above norm Nr, the above integrated power P;, and the ~ -above ~m-1)-cycle-delayed integrated power P~(m).
Although not shown, a controller is provided for ~ ~-providing one of the above norm Nr, the integrated power Pi, and the (m-1)-cycle-delayed integrated power Pj(m), ~ to the the integrating circuit 43 as the above r value.
sj The controller selects the above norm Nr as the r value until the predetermined time elapses from the beginning ~ --of the operation of the echo canceler, or until the 25 residual echo Ej falls below a predetermined level. When the norm Nr is supplied as the r value, the integrating circuit 43 operates as an arithmetic average calculator.
~, For example, the arithmetic average calculator 52 is ;
' used when all the filter coefficients Hj(i) are made -~ ~ 30 zero in the calculation of convolution in the `~
I convolution calculator 7 under the control of the filter -J coefficient modifying circuit 21 as mentioned before.
i The function of the above integrating circuit 43 as an arithmetic average calculator is explained below.
When the first output signal [hl(m)X1(m) + Zl]
from the subtracter 22 is supplied to the integrating ~ ~
circuit 43, where a term including a noise component is ~-;

~. !

: 1 `,, !~ ,~:,.

- 2 ~ 2 6 ~

indicated as Z~ for j=1 to I, the output H2(m) of the integrating circuit 43 is H2(m) -[hl(m)Xl(m) -~ Z1]-Xl(m~l/Xl(m) 2 =hl(m) + Zl-X1~m)/Xl(m)2 ~ 5 because s n ~ Nr (m) = ~Xk (m)2 = Xl(m)2 k=l as n = 1. Next, the second output signal [h2(m)X2(m) +
~ 10 Z2} from the subtracter 22 is supplied to the :l, integrating circuit 43, the output H3(m) of the~ -.
~ integrating circuit 43 is Jj H3(m) = [h2(m)X2(m) + Z2~
xX2(m)/[Xl(m)2+X2(m)2]
+[hl(m) + ZlXl(m)/Xl(m)2] ~ :
xXl(m)2/[xl(m)2+Xz(m)2]
= lh2(m)X2(m)2 + Z2X2(m)]
xx2(m)/[xl(m)2+x2(m)2]
+[hl(m)Xl(m)2 + ZlXl(m)~
xl/[xl(m)2+x2(m) = [h2(m)X2(m)2 + hl(m)Xl(m)2] -~
/[xl(m)2+X2(m)2]
+[Z2X2(m) + ZlXl(m)] -~
x1/[Xl(m)2+X2(m)2]
, 25 because 3 n ,j Nr (m) = &k (m)2 = Xl(m)2+X2(m)2 k=l : S
as n = 2. When it can be assumed that the echo path is l 30 stable, l~ i.e., hl(m) = h2(m) = h~m), H3(m) is expressed as .
H3(m) = h(m) +[Z2X2(m) + ZlXl(m)~
x l/ [xl (m) 2-~x2 (m) 2] ~
~ 35 Namely, an arithmetic average is obtained when th~ norm ;~ Nr (m) is used in the integrating circuit 43 as the r ~ ~.
l value. As indicated above, the filter coefficient Hj(m) ~ :

~, :
.

.,. ,,, - 2~26~8 which is obtained from the construction of Fig. 24, consists of the objective echo path gain h(m) and a ; noise term which is desirably suppressed through the --! filtering operation. Since the length of the output -, 5 signal register 5' is elongated to I + L, the norm Nr -~ which is in the divisor in the above second term of the i-~ expression of the filter coefficient H~ (m), increases -i, with the lapse of time. Thus, the noise term is - -~ :
'R effectively suppressed due to the above elongation of -` 10 the output signal register 5'. ~-i After the predetermined time elapses from the beginning of the operation of the echo canceler, or after the residual echo E~ falls below the above ' predetermined level, the controller first selects the ~ 15 above integrated power P~ as the above r value. Since s~ the integrated power Pj must be delayed by (m-1) cycles, it takes time to obtain the above (m-l)-cycle-delayed - -integrated power P;(m) from the integrated power P;. The ~-~
' power P; is selected until the above tm-1)-cycle-delayed 20 integrated power Pi(m) can be obtained from the delay ~;
line ~2. When the above (m-1)-cycle-delayed integrated power P;(m) can be obtained from the delay line 42, the ~ ~-(m-1~-cycle-delayed integrated power P;(m) is selected -~ -as the above r value. By using the integrated power P;
or P;(m) in the divisor of the low-pass filter coefficient a = [1-K-Xj(m)/r], the variation of the low~
, pass filter coefficient due to the variation of the ¦ amplitude of the sampl~d output signal X; is effectively suppressed after the convergence is obtained to a ~-;~ 30 predetermined degree.
The integrating circuit ~3 may be reali~ed by the l construction of Fig. 25. In the construction of Fig. 25, -~ -;~- the above integrating circuit which functions as an arithmetic average calculator and the integrating circuit which functions as a low-pass filter wherein the low-pass filter coefficient is equal to [1-K-Xj(m)/r]
~ where r is equal to the integrated power Pi or P;(m), i'. i, , , - -: ~.ir,:

- 2 ~ 2 ~ 3 ~

;g are respectively provided as denot~ed by 54 and 43a, and ;,~ one of the constructions is selected by the selectors 55 and 55' under the control of the controller 71".
Any of the realizations and the modifications 5 which have been explained in the first embodiment for -the sum-of-products calculator 20 and the Eilter ~l` coefficient modifying circuit 21 may be applied in the -~; fourth embodiment.
-~ In addition, the same initial setting of the i 10 output signal register 5 and the filter coefficient ~'~ register 6 as explained for the first to third embodiments, can be applied to the initial setting of the output signal register 5~ and the filter coefficient register 6 in the fourth embodiment.
As explained later, it is found as a result of a ~ ~
computer simulation that there is a value of the ~ ~;
~` coefficient correction constant K which gives the -~ ~
optimum setting for the estimation of the echo path gain ~- -h~(m). The value is determined from the aforem~ntioned 20 optimum value of the low-pass filter coefficient a' as -~

'! where I' is the number of taps which corresponds to the i reverberation time in the system. The relationship ~-between the low-pass filter coefficient a' and the coefficient correction constant K is a = [1-K-Xj(m)2/r]. (12) j Since, the integrated power r is normalized to (I+L), the average value aa of the low-pass filter coefficient a is obtained from the above relationship between the low-pass filter coefficient and the coefficient correction constant K, as P~
aa = 1-K/(I+L). (13) Thus, the optimum value of K is obtained as -~
K = (I~L)/I'. (14) ~ -;
Since an additional noise Nj exists, in practice, it is desirable to use a value of K which is a little smaller -~
than the above optimum value.

~ ' ''` ' A
' 2 ~ 2 6 ~
- 49 - FJ-8113-CA ~ ~-(6) Fifth Embodiment of the Present Invention Figure 26 shows a basic construction of the fifth embodiment of the present invention, for obtaining an estimated fi~ter coefficient ~+1~m) corresponding to an 5 m-th tap for the next sample time j~1 in the echo canceler. In the fifth emboAiment of the present invention, an improvement is provided on the ; construction of Fig. 3. The improvement is made based on the consideration that it is not necessary to limit the 10 range of the summation in the norm ~Xi(i)2 within the taps in the adaptive digital filter, and the range of -~ -the summation can be varied. In addition, means for suppressing the variation in the low-pass filter coefficient due to the variation of the sampled output , 15 signal X; is provided in the fifth embodiment.
3 In Fig. 26, the filter coefficient register 6, the ~-convolution calculator 7, the output signal register 5' ~ the norm calculator 40, the power calculator 41, and the --:
j delay line 42 are the same as the corresponding 20 constructions in the fourth embodiment as shown in Fig.
~, 24. In addition, in Fig. 26, the subtracter 9, the multipliers 80 and 83, and the divider 84 are the same -as the corresponding constructions in Fig. 3. Further, ;~
in Fig. 26, reference numeral 82~ denotes a divider 1 25 which corresponds to the divider 82 in Fig. 3, however, ~ ;
I the divisor in the dividing operation in the divider 82' is denoted by r, which is different from the divider 82 in Fig. 3. Reference numeral 21a denotes a filter -~
coefficient modifying circuit, which is similar to the 30 filter coefficient modifying circuit 21 as in the first to fourth ~mbodiments, that is, the filter coefficient -modifying circuit 21a can be realized by the construction similar to the constructions of Figs. 11 and 12. However, the filter coefficient modifying 35 circuit 21a further carries out the suppression of the filter coefficient HJ(m), although the suppression of I
the filter coefficient Hj~m) is excluded from the , ~ . : , -. ::: , 2 ~ 2 6 ~ 5 ~

constructions of Figs. 11 and 12.
One of either the norm Nr which is gsnerated in the norm calculator 40, the integraLted power P; which is generated in the power calculator 41, and the (m-l~-cycle-delayed integrated power Pi(m) which is generated in the delay line A2, is selected as the divisor r in ~-~
the divider 82~ and is supplied to the divider 82'. -~
~ Namely, in the fifth embodiment, the estimation of the ;~; echo path gain h;(m) is obtained in accordance with the 10 following equation, Hjll(m) = Hi(m) + K-E;-Xi(m)/r (15) ~-~ where Ei is the residual echo. The control of the Y selection of the value r is carried out in a manner ~-similar to the fourth embodiment. Therefore, the noise 15 term is effectively suppressed in the stage before ,ij convergence is obtained, and by using the integrated ~ power P; or P~(m) in the divisor in the divider 82', the ;~ influence of the variation of the amplitude of the ~ sampled output signal X; on the estimation of the echo ~ -¦ 20 path gain hi(m) is effectively suppressed after thP
;, .--.
~ convergence is obtained to a predetermined degree.
"¦ In addition, the same initial setting of the output signal register 5 and the filter coefficient register 6 as explained for the first to fourth -~
embodiments, can be applied to the initial setting of the output signal register 5' and the filter coefficient ~--register 6 in the fifth embodiment. ~-Further, the same optimum value of K as the fourth embodiment is obtained for the fifth embodiment.

(7) Control of Application of Disturbance As shown in Fig. 6, the disturbances in the -~
adaptive digital filter in the echo canceler are (a) S~ + N~
(b) ~hi(i)Xi(i), and ,, (c) ~Hj (i ) Xi (i) .

~ ~'' `.

:

2 ~ 2 ~
~ - 51 - FJ-8113-CA
'`, , -:
~` Among the above disturbances, the voice signal S
can be ignored because the estimation of the echo path gain Hj(m) is stopped to avoid "double talk" when the voice signal Sj is detected, which is a well-]cnown ~` 5 teclmique in the echo canceler. In addition, the disturbance (3) i5 applied to cancel or suppress the -disturbance (b). However, the suppression is effective ~ only when the aforementioned relationship (10) ;`'i ¦~hj (i)Xj (i) ¦ > ¦~i (i)X~ (10) exists.
Therefore, the control of the filter coefficients - -~
Hj(m) in the above disturbance (c) is carried out by the filter coefficient modifying circuit 21, as follows:
(i) stop the application of the disturbance ~, 15 (3) until the relationship (10) is satisfied in the beginning of the estimation of the echo path gain;
(ii) apply each estimated filter coefficient H~(m) one after another in addition to the previously ~' applied filter coefficient(s) as the estimation 20 progresses, i.e., apply ~irst H~(1) only, apply next ~-H~(1) and H~t2) only after a predetermined time, then apply Hj(l), H~(2), and Hj(3) only after a predetermined ~I time, -- ; and (iii) first apply the filter coefficients H;(m) as small values, and then increase the values of the filter coefficients as the estimation progresses.
According to the above method (i), in the beginning of the estimation of the echo path gain h;(m), the operation of the estimation can be stably carried ~i 30 out regardless of the amounts of the above disturbances (a) and (b). Then, the disturbance (c~ can be applied ll when convergence has been obtained to a predetermined ;~l degree. In addition, when the application of the disturbance (3) is stopped in the above method (i), it l 35 is advantageous to apply the aforementioned arithmetic average calculator as the integrating circuits 24, 29, 32, and 43 in the first, second, third, and fourth i ,' , ,. ~: : : . : - -~,.,. ~. ~ -. . :, 2~2~a~

embodiments, respectively. Then, the application oE the disturbance (3) is restarted in the above ~ethod (i), ` and the low-pass filter is used as the integrating circuits 24, 29, 32, and 43 in the first, second, third, S and fourth embodiments, respectively.
~ Figures 27A to 27F show results of simulations of ~`, the above method (ii) wherein a rate of addition of a ;
next filter coeEficient i5 varied. The simulations are carried out using the construction of the first -embodiment as shown in Fig. 9, white noise is used as the output signal X~, the reverberation time in the system is assumed to be 64 msec, the sampling rate is ~
assumed to be 8kHz, and the number of taps in the ~ -adaptive digital filter is assumed to be 512. In 15 addition, in the above simulations, the above method (i) is applied in addition to the method Figure 27A shows the result of the simulation of the above method (ii) wherein one additional filter ¦ coefficient H~(m) is added for each sampling cycle. The 3 20 abscissa corresponds to an elapse of time, and the ordinate corresponds to the residual echo. One additional filter coefficient H~(m) is added for each two s~mpling cycles in Fig. 27A; one additional filter coefficient H~(m) is added for each two sampling cycles 25 in Fig. 27B; one additional filter coefficient H~(m) is -~
added fo~ each three sampling cycles in Fig. 27C; one additional filter coefficient Hj(m) is added for each I four sampling cycles in Fig. 27D; one additional filter ;-~
I coefficient H~(m) is added for each six sampling cycles 30 in Fig. 27E; and one additional filter coefficient Hj(m) is added for each ten sampling cycles in Fig. 27F.
Since, generally, the S/N ratio in the component H~(i)X~(il is larger than the S/N ratio in the component Hj(k)Xj(k) where i<k, it is advantageous to apply the -35 filter coefficients in the order from Hj(i) with a smaller value of i.

,: " ~,~,`':
-.:
'`: ~'~

.- - ,.. .

53 2 ~ FJ-8ll3-CA
The effectiveness of the method (ii~ is proven by the above results of the simulations of FiQs. 27A to 27F, and it is understood that the convergence is delayed when the above rate of addition of a next filter ~` 5 coefficient is too low. Namely, the filter coefficients ~- H~(m) must be immediately applied to the construction ; for estimating the echo path gain h~(m).
Figures 28A and 28B show results of simulations ~ ~;
which ~re carried out for confirming the effectiveness 10 of the above methods ~i) and (ii) in the construction f for the normalized least mean square (NLMS) algorithm of ;~ Fig. 6. Figure 28A shows the result when the normalized least mean square (NLMS) algorithm is simply applied, and Figure 28B shows the result when the above method 15 (i) and (ii) are applied the normalized least mean square (NLMS) algorithm, where one additional filter ; ~¦
coefficient H~(m) is added for each four sampling cycles as in Fig. 27D. The effectiveness of the methods (i) and (ii) is proven by the above results of the simulations 20 of Figs 28A and 28B. Since the aforementioned fourth and fifth embodiments are provided based on the construction of Fig. 6, it is considered that the -methods (i) and (ii) are effective in the fourth and -~ :-fifth embodiments.
! 25 Figures 29A to 29C show results of simulations which are carried out for confirming the effectiveness of tha above method (iii) in the construction for the normalized least mean square (NLMS) algorithm of Fig. 6.
Figure 29A shows the result when the normalized least , ~ 30 mean square (NLMS) algorithm is simply applied. Figure '~ 29B shows the result when the above method (iii) is ! applied the normalized least mean square (NLMS) ,~ algorithm, where the modifying coefficient C is multiplied to the filter coefficient H~(m) in the aforementioned filter coefficient modifying circuit 21 in the following manner.
C = 0 when j-m+1<0;

.

:. 5. ...

2 ~ 2 6 ;, ~ 3 C = (j-m+1)/j when O<j-m+1<2J; and C = 1 when j-m+122J, where J is a number which is predetermined based on the ~ -~
number of taps in the adaptive digital filter. In the ` 5 simulation of Fig. 29B, the estimation for the filter ; coefficients H;tm) is not carried out regarding the filter coefficients H~(m) to which (` = 0 is multiplied. ~-Figure 29C shows the result when the above method (iii) is applied the normalized least mean square ~NLMS) algorithm, where the modifying coeficients C is multiplied to the filter coefficient Hj(m) in the aforementioned filter coefficient modifying circuit 21 ' in the same manner as Fig. 29B In the simulation of Fig. 29C, the estimation for the filter coefficients H~(m) is carried out for all the filter coefficients H;(m). The effectiveness of the methods (iii) is proven -by the a~ove results of the simulations of Figs. 29A to 29C.
The modifying coefficient C in the filter coefficient modifying circuit 21 may be set in the various manners as follows~
Example 1, -~
C = 0 when j-m+1<0;
¦ C = (j-m+1)/m when O<j-m+l<m; and C = 1 when j-m+12m; ;~
Example 2, C = (j-m+1)/j when j<J; -~
C = (j-m+1)/j when J~j; and C = 1 when j-m-~12J; or Example 3, C = 0 when j-m+1~0;
C = (j-m+1)/j when O<j-m+l<J; and 1 C = 1 when j-m+l>J.
Another method (iv) to accelerate the convergence of ~he estimated filter coefficients Hj(m) is to make the output signal X~ equal to zero before the estimation begins, i.e., the sampled output signal Xjti) is made ; ~:, :'' - .:

2~2~8 equal to zero fo{ all i<j. This method (iv) is realized . by clearing the output signal register before beginning ~he estimation, or by sending zero siynals as the sampled output signals Xi before beginning the 5 estimation. ;
~; Figures 30A and 30s show results of simulations ~ ~
-~ which are carried out for confirming the effectiveness -' ~-;~ of the above another method (iv) in the construction for the normalized least mean square (NLMS) algorithm of -~ 10 Fig. 6. Figure 30A shows the result when the above other ~ -~ method is applied the normalized least mean square (NLMS) algorithm. Figure 30B shows the result when the normalized least mean square (NLMS) algorithm is simply i applied. The effectiveness of the above other method ;. 15 (iv) is proven by the above results of the simulations of Figs. 30A and 30B.
Yet another method (v) to accelerate the convergence of the estimated filter coefficients Hj(m) is to make the filter coefficients Hj(m) corresponding ---to a minimum time from the beginning of the operation of the echo canceler which is necessary for an output - signal to generate an echo signal in the echo path, ~ ~
;ii equal to zero before the estimation begins. The above ~ ;
initial setting in the filter coefficient register makes ~' 25 the convergence of the filter coefficients fast.
'~

(8) Optimum Values of the Low-Pass Filter -Coefficient a' . - ~
- ~ As mentioned before, the convergence rate in the ,;~ 30 above operation for estimating the true echo path gain ~ -} h~(m) and the accuracy in the estimated echo path gain ~;
(filter coefficient) Hj(m) greatly depend on the value of the low-pass filter coefficient ' in the low-pass filter in the integrating circuit 24 in the 35 constructions of the first, second, and third -embodiments. The optimum value of the low-pass filter coefficient a' which gives the optimum setting for the -, . ..
. ......................................................................... .
:
'. 'f ., `
2~26558 :

'' ' :' estimation of the echo path gain h~(m), is obtained by ~
`~ computer simulations. ~ ;
igures 31A to 31C show resu:Lts of simulations which are carried out for various values of the low-pass filter coefficient a' for obtaining the optimum value of the low-pass filter coefficient a~ in the constructions of the first, second, and third emhodiments. The simulations are carried out using the construction of the first embodiment as shown in Fig. 9, a white noise ~J5 10 iS used as the output signal Xj, the reverberation time -5' in the system is assumed to be 64 msec, the sampling rate is assumed to be 8kHz, and the number of taps in the adaptive digital filter is assumed to be 512, which corresponds to the above reverberation time. In 15 addition, in the above simulations, the above-mentioned ;
method (ii) is applied wherein one additional filter coefficient H;~m) is added for each four sampling cycles.
Figure 31A shows the result when the low-pass filter coefficient ' in the integrating circuit 24 in Fig. 9 is set to a'=1023/1024(=0.9990). Figure 31B shows the result when the low-pass filter coefficient ~ in the integrating circuit 24 in Fig. 9 is set to- -a'=511/512(=0.9980). Figure 31C shows the result when 25 the low-pass filter coefficient a' in the integrating ~ -~
circuit 24 in Fig. 9 is set to a~=255~256(=0.9961). As ''! understood from the above results of the simulations of Figs. 31A and 31s, the convergence rate is high, but the residual echo is large when the low-pass filter , 30 coefficient a' is small, and the convergence rate is low, but the residual echo is small when the low-piass filter coefficient a' is large. When the low-pass filter coefficient a' is larger than a particular value, the I residual echo level is not decreased any more, i.e., the -~
=' 35 residual echo level is saturated at the value of the `-~~
low-pass filter coefficient a'. The optimum value of the low-pass filter coefficient a' is determined as the ':
;.i '~` :

2~2~

value of the low-pass filter coefficient ~ which gives a saturation value of the residual lecho. The saturation `!' value is a minimum value of the low-pass filter coefficient a~ which gives a minimum value of the ` 5 residual echo. As the result of the above simulations, the optimum value of the low-pass filter coefficient a' -~
is determined as ; ' = ~I - 1)/I, where I is the number of taps corresponding to a 10 reverberation time in the system.
To confirm the above optimum value for a higher residual echo level, further simulations are carried out -~
for a different number of taps, in this case 128, of the adaptive digital filter. Figure 32A shows the result i 15 when the low-pass filter coefficient a' in the ; integrating circuit 24 in Fig. 9 is set to a'=1023/1024(=0.9990). Figure 32B shows the result when the low-pass filter coefficient a' in the integrating circuit 24 in Fig. 9 is set to a'=511/512(=0.9980). ;~
Figure 32C shows the result when the low-pass filter coefficient a' in the integrating circuit 24 in Fig. 9 is set to '=127/128(=0.9922). As understood from the results of Figs. 32A to 32C, the low-pass filter coefficient a' giving the saturation value of the residual echo is the same as the result of the simulations of Figs. 31A to 31C. Namely, the optimum value of the low-pass filter coefficient a' is obtained regardless of the number of taps.
As mentioned before, since an additional noise N;
exists, in practice, it is desirable to use a value of a' which is a little larger than the above optimum value.

(9) Optimum Values of the Coefficient Correction Constant K ~-As mentioned before, the convergence rate in the ~
above operation for estimating the true echo path gain ~-' ,-.,~ . :: ."'''' 2 ~
~ - 58 - FJ-8113-CA
.,, ~
hi(m) and the accuracy in the estimated echo path gain ~` (filter coefficient) H;(m) greatly depend on the value of the coefficient correction conslant R in the constructions of the fourth and fiEth embodiments. The optimum value of the coefficient correction constant K
~;`i which gives the optimum setting for the estimation of -.~ the echo path gain hi(m), is obtained by computer simulations.
igures 33A to 33C show results of simulations which are carried out for various values of the coefficient correction constant K for obtaining the optimum value of the coefficient correction constant K
in the constructions of Fig. 6. The simulations are carried out using the construction of Fig. 6, the number `~
of taps in the adaptive digital filter is set to be 128, and the above-mentioned method (ii) is applied wherein one additional filter coefficient H;(m) is added for each four sampling cycles. In addition, the reverberation time is set to the same value as the simulations of Figs. 31A to 31C, i.e., the reverberation time corresponds to 512 taps in the adaptive digital filter.
~ Figure 33A shows the result when the coefficient !;' correction constant K in the construction of Fig. 6 is - -~
set to K=0.125. Figure 33B shows the result when the 1 coefficient correction constant K in the construction of -~
Fig. 6 is set to K=0.25. Figure 33C sho~s the result `ii when the coefficient correction constant K in the ~-construction of Fig. 6 is set to K=1.
As~understood from the above results of the simulations of Figs. 33A and 33C, the convergence rate ~, is high, but the residual echo is large when the ~ -,, coefficient correction constant K is large, and the ''~.'7il convergence rate is low, but the residual echo is small when the coefficient correction constant K is small.
When the coefficient correction constant K is larger than a particular value, the residual echo level is not ;~

.. .

2 ~ 2 6 ~ 3 8 ~ - 59 - FJ-8113-CA
.- -decreased any more, i.e., the resid,ual echo level is -~
ir saturated at the value of the coefficient correction constant K. The optimum value of the coefficient correction constant K is determined as the value of the coefficient correction constant K which gives a ~ ;
saturation value of the residual echo. The saturation ~-~' value is a minimum value of the coefficient correction const~nt K which gives a minimum value of the residual echo. As a result of the above simulations, the optimum i 1~ value of the coefficient correction constant X is iibout , K = O. 25.
In the normalized least mean square (NLMS) ~' algorithm of Fig. 6, from the eguation (7) a = [1-K-X;(m)2/~X;(i)2]
the average aa of the low-pass filter coeEficient a is ~ = l-K/I (16) where I is equal to the number of taps in the adaptive digital filter.
From the above equation (15), when I=128, K=0.125 l 20 (Fig . 33A) corresponds to a = 1023/1024 (=0.9990), K=0.25 (Fig. 33B) corresponds to a = 511/512 (=0.9980), ''~! and X=l (Fig. 33C) corresponds to a = 127/12~ (=0.9922).
Considering the equation (11), a' = (I' - 1)/I', (11) ~ -the optimum value of the coefficient correction constant j K(=0.25) corresponds to I'=512 which corresponds to the ~ reverberation time. Namely, the optimum value of the ;i, coefficient correction constant K(=0.25) corresponds to ~, the reverberation time in the system.
- 30 As mentioned before, since an additional noise N
exists, in practice, it is desirable to use a value of K
which is a little smaller than the above optimum value. ;

(10) Advantage of Constant Coefficient Figures 34A to 34D show the results of simulations which are carried out for comparing the convergence -characteristics of the estimation system for the echo , ' ' ' ` ~. .~' .~ - :
, ~' :':
.. . . . ..

- 2 ~ 2 6 ~

, path gain hj(m) wherein the low-pass filter coefficient a~ is a constant, with the convergence characteristics of the estimation system for the echo path gain hj(m) by the normalized least mean square (NLMS) algorit~n. In the simulations, the number of taps in the adaptive digital Eilter is set to be equal to 512 which is the number corresponding to the reverberation time in the -~
example.
Figure 34A shows the result w,hen the low-pass 10 filter coefficient a' in the integrating circuit 2~ in ~ `;
i Fig. 9 is set to a'=1023/1024(=0.9990), which is the ;~ same as Fig 31A. Figure 34B shows the result when the coefficient correction constant K in the construction of Fig. 6 is set to K=0.5, which corresponds to the value ' 15 of the low-pass filter coefficient a'=1023/1024 by the equation (16). Figure 34C shows the result when the low- ~-~ pass filter coefficient a ~ in the integrating circuit 2 ¦ in Fig. 9 is set to a'=2047/2048(=0.9961). Figure 34D
shows the result when the coefficient correction 20 constant K in the construction of Fig. 6 is set to -~
K=0.25, which corresponds to the value of the low-pass filter coefficient a'=20~7/2048 by the equation (16).
The above results of Figs. 3~A to 3gD show that -- ' the convergence characteristics of the estimation system , 25 for the echo path gain hj(m) wherein the low-pass filter j coefficient a ~ is a constant, are much more advantageous than the convergence characteristics of the estimation system for the echo path gain h~(m) by the normalized least mean sguare INLMSJ algorithm.
Figure 35 shows the results of simulations which I are carried out for the estimation system for the echo -¦ path gain hj(m) wherein the low-pass filter coefficient a~ is a constant, and the estimation system for the echo path gain h;(m) by the normalized least mean square ~ 35 ~NLMS) algorithm. The abscissa corresponds to elapse of 3, time (in seconds), and the ordinate corresponds to the ql echo suppression (by dB). In the simulations, the number J ~ ~
'' ':'`'~ ~

.,',, :, ~ - . ~ - ~ , -, . , :

~2~
` - 61 - FJ-8113-CA

of taps in the adaptive digital filter is set to be equal to 256. Therefore, the low-pass filter coefficient ~=2047/2048 corresponds to the coefEicient correction , constant K=1/8, and the low-pass filter coefficient 5 '=4095/4096 corresponds to the coe!fficient correction ~ constant K=1/16, by the equation ~16), which is the `-~ number corresponding to the reverberation time in the example. As shown in Fig 35, the convergence of the ; estimation for the echo path gain h~(m) wherein the low-`~ 10 pass filter coefficient ~ is a constant and a'=2047/2048, is 0.4 seconds faster than the convergence ;1 of the estimation system for the echo path gain hj(mj by the normalized least mean square (NLMS) algorithm wherein the coe-fficient correction constant K=1/8 15 corresponding to a'=2047/2048, and the convergence of the estimation for the echo path gain h~(m~ wherein the low-pass filter coefficient a' is a constant and ;
'=4095/4096, is about 1.0 seconds faster than the convergence of the estimation system for the echo path gain h;(m) by the normalized least mean square (NLMS) s algorithm wherein the coefficient correction constant K=1/16 corresponds to a'=4095/4096.
As mentioned before, in the prior art, it is I considered that the larger the coefficient correction 1 25 constant value K becomes, within the extent O<K<2, the ¦ faster the convergence of the filter coefficient becomes and a less accurate estimation of the echo is carried -~
out, and the smaller the coefficient correction constant ~, value K becomes, the slower the convergence of the 30 filter coefficient becomes and the more accurate estimation of the echo can be carried out. Figure 36 `
, shows the results of simulations which are carried out for the estimation system for the echo path gain hj(m) by the normalized least mean square (NLMS) algorithm ;-~
35 wherein the coefficient correction constant K=1.75.
3 Comparing the result of Fig. 25 (K=1.75) with the `; results of Fig. 34B (K=0 5) and Fig. 34D (K=0.25), it is -'i . ~; -:

2~26~3g '~
~ understood that no improvement is obtained by setting ~;
'~ the coefficient correction constant K=1.75. By fur-ther simulations (not shown) made by the applicants, no ~ improvement is obtained by setting the coefficient 1 5 correction constant ~ to a value larger than one. On the other hand, in the estimation using a constant low-pass filter coefficient ~, as shown in Fig. 31C, the 1 convergence characteristic is improved when a'=255/256 which corresponds to K=2 when the n~u~ber of taps is equal to 512.
As explained above, the estimation system using a constant low-pass filter coefficient a' is much advantageous than the normalized least mean square (NL~.S) algorithm.
~5 I (11) Stability of Normalized Least I Mean Square (NLMS) Operation ~-In the construction of Fig. 5, the disturbance , Qi(m) is considered to be reduced by the integrating ¦ 20 operation through the low-pass filter included therein.
When the low-pass filter coefficient in the low-pass -~
~ filter is denoted by ai, the degree of the reduction Ai ¦ of the disturbance Q;(m) which is expected to be finally I achieved, is given by A; = (l-ai)2 + j2 (1-ai)2 + ---= (l-ai)/(l+ai) (17) -:.
- . -~hen the dispersion of the estimation error ~ is denoted by a02r and the dispersion of the output signal X~ is denoted by ox2, the dispersion of the disturbance -~
30 is approximated by I (I-1)-~o2-ax2/~x2 = (I-1)- aO2 ¦ Thus, the dispersion of the output of the low-pass -~
filter is A~-(I-1)-a02.
From the above estimation of the dispersion, the , stability condition of the low-pass filter is -I -~
t ~ 2 > Aj (I-l) , , ' :

- 2~26~
;~ - 63 - FJ-8113-CA
,~
Substituting the expression of (17) into the above `~ stability condition, the stability condition is 1 > (I~ (1-j)/(l~a~) . (lg) Substituting the above coefficient ~ by the average value a = 1 ~ K/I, ~,~ 1 > (I-l)-(K/I)/(2-K/I), ~` That is, --~ 1 > (I-l)-K/(2I-K), ~` Thus, ~, 10 2 ~ K (19) ;~ is obtained. This is included in the relationship 0 < K < 2. (8) The above stability condition (19) is obtained based on the assumption that the low-pass filter , 15 coefficient a~ is approximated by the average value aa =
i, 1-K/I. However, as explained before, generally, the low-,~ pass filter coefficient ~j varies with the output signal `~
X; in accordance with the equation (7). ThereEore, when the low-pass filter coefficient ai is less than the t!! 20 average value aa = 1-K/I, the relationship (18) may not ~-~
exist, and when the state wherein the relationship (18) does not exist, and continues for a long time, the output of the low-pass filter may diverge. -~
Whien the output signal Xj is assumed to be white -25 noise, the probability that the low-pass filter -coefficient ai is less than the average value ob = 1-s K/I, amounts to 32% based on the consideration of the ~, standard dispersion ~x Therefore, the state wherein the `-`~
relationship (18) does not exist, is liable to continue -30 for a long time. Although the operation of the ~, normalizedi least mean square (NLMS) algorithm ,~ theoretically converges in a sufficiently long time, in -- -~'~ practice, registers in digital signal processors which are usedi for carrying out the above operation of the -~
35 low-pass filter, have a definite length. Therefore, when ``
the state wherein the relationship (lB) does not exist, -~
and continues for a long time, the operation of the '`i ~ ",~

.
- 2~26~
` - 64 - FJ-8113-CA
~ . :
~ .
? estimation using the low-pass filter, diverges. ~ ;
Conventionally, to avoid the above problem of divergence, the coefficient correction constant K must be set to be small enough based on experience.
5 Therefore, conventionally, the conv4rgence rate of the : , -~ operation for the estimation becomes slow. ~ ~
The range of the variation of the low-pass filter ~ -,~ coefficient a~ is `, 1-K 5 aj < 1 -~
; j 10 Since the stability condition is most severe when a K, the relationship (19) becomes 'Z - . ~
1 > (I-l)-K/(2I-K). ;
- That is, 2-K > (I-1)-K.
Thus, K < 2/I (20) -~
This is a rigorous and very severe condition.
`' However, such a rigorous condition is requiredl, for i examZple, in the case where the output signal X~Z is an ,l 20 impulse response (or a step response) wherein only X;(m) is not zero, and Xj(i)=0 for all cases of i~m. Since, in , practice, noise overlaps the successive sampled output signals Xj, the above severe condition is considered in ;l, practice not to be required.
~' 25 Thus, if an increase in the estimation error due to the low-pass filter coefficients a~ which do not satisfy the above stability condition, can be absorbed -~
by the registers in the digital signal processors, a coefficient correction constant K which may cause a ~ -small probability that a low-pass filter coefficient does not satisfy the above stability condition, can be used.
l For example, substituting a~ 2 1-4K/I into the "~
r~ relationship (18) based on the fact that 95% of the low-pass filter coefficient aj distributes in the region wherein ; > 1-4K/I, the following relationship ~ K < 1/2 (21) .'~ -, .,--.. ~ :~ , , :, :

2~263~

is obtained.
Or, substituting a~ > 1-~K/I into the relat70nship (18) based on the fact that 99.7% oi- the low-pass filter coefficient ~; distributes in the region wherein ~ > 1-9K/I, the following relationship K < 2/9 (22) is obtained.
" When one of the above conditions (21) or (22) is satisfied, as long as an increase in the estimation error due to the low-pass filter coefficients a~ which do not satisfy the above stability condition (18), can be absorbed by the registers in the digital signal processors, the operation for the estimation is stable.
However, the probability of the divergence in the , 15 operation for the estimation is not zero. Therefore, by j substituting the equation (7) ~ -a = [1-K-X;(m) 2/~X~ (i) 2], into the above relationship (18), a condition K C 2&~(i) 2 / I-Xj(m)2 (23) , 20 is obtained. By monitoring the quantity of the right side of the relationship (23), and stopping the operation for the estimation of the echo path gain hj(m) when the above condition (23) is not satisfied, the ~- -large value of the coefficient correction constant K can 1 25 be used in the normalized least mean square (NLMS) ~
algorithm without divergence. ~ :
Flgure 37 shows an example of the construction for carrying out the operation of monitoring the quantity of the right side of the relationship (23), and generating -~
30 a control signal to stop the operation for the - - -estimation of the echo path gain h~(m) when the above -~
condition (23) is not satisfied. The construction of Fig. 37 can be operated together with the operation in of the construction of Fig. 6 --In Fig. 37, reference numeral 120 denotes an input terminal, 121 denotes a s~uare calculator, 122 denotes a shift register, 123 denotes a selector, 124 denotes a .- - 66 - FJ-8113-CA

subtracter, 125 denotes an adder, 126 denotes a delay ;`~ circuit, 127 denotes a divider, 128 denotes a multiplier, 129 denotes a comparator, and 130 denotes an output terminal.
The sampled output signal X~(1) is input through the input terminal 120, and the sq~lare of the sampled output signal Xj(1) is obtained in the square calculator ~ 121. The square Xi (i) 2 iS serially input into the shift `i register 122. The shift register 122 generates and j' 10 outputs in parallel squares of (i-1~-cycle-delayed --~ sampled output signals Xj(i) where i = 2 to I, and I is the number of taps in the adaptive digital filter The selector 123 receives in parallel the square of the ;~
sampled output signal Xj(1) and the squares of (i-1)-15 cycle-delayed sampled output signals Xj(i) where i = 2 ~
,~ to I, and selects one of the squares of the signals -;~ X~(m) 2 to supply the selected squares of the signals to ~;;L the divider 127 as a divisor. The output xi(i) 2 of the ;~ square calculator 121 is also supplied to the subtracter 124 as a minuend, and the squares of (I-1)-cycle-delayed sampled output signals Xj(I) 2 are supplied to the subtracter 124 as a subtrahend. The output of the subtracter 124 is supplied to the adder 125. The adder ¦ 125 and the delay circuit 126 constitute a loop, and the ~ 25 output of the subtracter 124 is accumulated through the - ~-;~, loop. By the above construction, the output of the adder ,~'5 125 is equal to XXi(i) 2 where the summation is carried -~out for i=1 to I, and is supplied to the divider 127 as ~ -a dividend. Thus, ~X~(i) 2 / X; (m) 2 iS obtained in the 30 divider 127, and the output of the divider 127 is multiplied by the value 2/I in the multiplier 128 ;~`
! Therefore, 2~X~(i) 2 / IXj~m) 2 iS supplied to the ~-comparator 129. The comparator 128 compares the output ---of the multiplier 128 with the value K. When the ~ 35 comparator 129 determines that K 2 2Xj(i)2 / IX~(m)2, -~, the comparator 129 outputs a control signal to stop the ~ operation for estimating the echo path gain hj(m). The ~-., , . .
., ... .

2 ~ 2 ~

comparator 129 may be constructed so as to output the value K instead of the above control signal, and output zero as the K value when the comparator 129 d~termines that K 2 2~X~(i)2 / I-X;(m)2. In the above construction, -the constructions for obtaining ~X~(i)2 and X~m)2 may be ~ provided commonly with the constructions which carry out --i the same calculations for the operation o~ estimation of the echo path gain hi~m), respectively.
When the number of taps is sufficiently large, the ,i 10 following approximation ~X~(i)2 = I-ax2 --can be used, and therefore, the above condition (23) is - ~
' rewritten as ~ ;
K < 2aX2 / X;(m)2, (24) ! 15 where an assumed value may be used for the value of aX2.
The relationship (24) is the stability condition for the normalized least mean square (NLMS) algorithm. However, as explained before, the normalization is not necessary 7 in the operation for the estimation by the normalized 20 least mean square tNLMS) algorithm because the normalization factor 1/~Xj(i) 2 iS provided for -~
relatively suppressing the influence of the variation of the arnplitude. When the norrnalization factor 1/~Xj(i)2 is not included, the stability condition ~23) is ~ 25 rewritten as ~-3 K < 2 / I-X~(m) 2, (25) i When the len9th of the registers in the digital ¦ signal processor is long, it is expected that an increase in the estimation error due to the low-pass -~
30 filter coefficients ai which do not satisfy the above -`
stability condition (25), can be absor~ed by the ---registers in the digital signal processors. Therefore, by replacing Xi(m)2 with the dispersion ~x2 of the Xj(m)2 in the relationship (25), a relationship -~
K < 2 / I-~X2 (26) is obtained causing the low-pass filter coefficients ai ~ ~"
not to satisfy the above stability condition (25) at a ~
:

.0"' ~ ~ ' ' ~ .' ' ' , ' -, .

~: - 2 ~
.~ - 68 - FJ-8113-CA

-~ probability of 32%.
;When the length of the registers in the digital signal processor is not long, it i~ expected that an increase in the estimation error due to the low-pass i5 filter coefficients aJ which do not satisfy the above `~stability condition (25), can be absorbed by the -~
registers in the digital signal processors. Therefore, by replacing X;(m)2 with twice the dispersion aX2 of the ~-~X~(m)2 in the relationship ~25), a relationship -!. 1 0 K < 1 ~ X2. (27) is obtained causing the low-pass filter coefficients a ;; not to satisfy the above stability condition (25~ at a 1 ,~ lower probability than the above relationship (26). Or, by replacing X;(m)2 with (3/2)-ux2 of the X;(m)2 in the relationship (24), a relationship K < 2 /~3I-ox2]. (28) '~ is obtained.
In addition, by monitoring the quantity of the J right side of the relationship (25), and stopping the - -;-?20 operation for the estimation of the echo path gain hj(m) ~;
when the above condition (25) is not satisfied, a large -value of the coefficient correction constant K can be used in the normalized least mean square (NLMS) ` -~ ~
algorithm without divergence. ~ ~-1 25 Figure 38 shows an example of the construction for ~! carrying out the operation of monitoring the quantity of I the right side of the relationship (24), and generating a control signal to stop the operation for the estimation of the echo path gain h;(m) when the above -~ -condition (24) is not satisfied. The construction of Fig. 38 can be operated together with the operation of ¦ the construction of Fig. 6 .! In Fig. 38, reference numeral 131 denotes an input ~ terminal, 132 denotes a square calculator, 133 denotes a -' 35 shift register, 134 denotes a selector, 135 denotes a multiplier, 136 denotes an adder, 137 denotes a multiplier, 138 denotes a delay circuit, 139 denotes a ' -.~ `, , .

,~ .

~ 2~6~

divider, 140 denotes a comparator, and 141 denotes an output terminal.
`` The sampled output signal X~(1) is input through the input terminal 131, and the s~uare of the sampled ~` 5 output signal X~tl) is obtained in the square calculator 132. The square X~(i) 2 iS serially input into the shift -~
~` register 133. The shift register 133 generates and -~ outputs in parallel squares of (i~ cycle-delayed .~ ,, .
sampled output signals Xj~i) where i = 2 to I, and I is - 10 the number of taps in the adaptive digital ~ilter. The , selector 134 receives in parallel the square of the ,~ sampled output signal Xi(1) and the squares of (i-1)-cycle-delayed sampled output signals Xj(i) where i = 2 to I, and selects one of the squares of the signals -~
X~(m)2 to supply the selected squares of the signals to the divider 139 as a divisor. The output Xj(i) 2 of the square calculator 132 is also supplied to the multiplier 135, and is multiplied by a constant 2(1-y) where y is the low-pass filter coefficient. The output o~ the -i 20 multiplier 135 is supplied to the adder 136. The adder ~;~ 136, the delay circuit 138, and the multiplier 137 --constitute a loop, and the output of the multiplier 135 - `~
is accumulated through the loop. In the loop, the output `~
of the adder 136 is supplied to the delay circuit 138, ~¦ 25 the output of the delay circuit 138 is supplied to the ~ -multiplier 137, and is multiplied by y in the multiplier `.'' 137, and the output of the multiplier 137 is supplied to the adder 136. Thus, the multiplier 135 and the above -- -~' loop constitute a low-pass filter. ThP output of the - -low-pass filter is qual to 2-(1-y) -aX2/(l-y), where aX2 is the dispersion (average power) of the sampled output -signal X~(i), and is supplied to the divider 139 as a ~ -,' dividend. Thus, 2-~x2/X; (m) 2 iS obtained in the divider 139. The output 2-~x2/X;(m)2 is compared with the -i 35 coefficient correction constant K. When the comparator ~, 140 determines that K 2 2-ax2/xi(m)2, the comparator 140 -~
` outputs a control signal to stop the operation for esti-.1 , .
, ~,p~.", .,- - .- . - . : . .

2~2~8 mating the echo path gain hj (m) . The comparator 140 may : -be constructed so as to output the ~ralue K instead of the above control signal, and output zero as the K value when the comparator 129 determines that K 2 2-ax2/X;~m)2.
In the above construction, the constructions for obtaining X~(i) 2 and Xi(m) 2 may be provided commonly with the constructions which carry out the same calculations for the operation of estimation of the echo path gain h~m), respectively.
Although the above provision ls made for operating with the construction of Fig. 6, a similar provision can be made for the aforementioned fourth and fifth embodiments. Since the estimation in the fourth and fifth embodiments is carried out in accordance with H;+l~m) = H~m) + K-E;-X;~m)/r, ~14) and the low-pass filter coefficient a is I a = [1-K-Xj~m~/r], I by substituting the equation a = [1-K-Xi(m)/r], into the above relationship (18), a condition K ~ 2r / I-X;(m)2 (29) is obtained, where r is equal to one of the above norm Nr, the above integrated power Pi, and the above (m-1)- ~-cycle-delayed integrated power Pi~m). Therefore, by -~
i 25 replacing ~Xi~i) 2 in the above constructions for I monitoring the stability conditions, with the above r value, the similar constructions for monitoring the stability conditions can be constructed for the fourth and fifth embodiments.
(12) Realization and Application of the -~
constructions of the present invention - -All the constructions according to the present invention, which are explained above, can be realized by --35 either hardware or software (in the digital signal ~ ~ -processor).

. .

- :

.- -., ~ .:

71 2 ~ 2 6 ~ ~ 8 FJ-8113-CA ~ ~

l In addition, the dividers which are provided in :. -`~` the constructions according to the present invention, may be replaced by a construction comprised of a reciprocal generator and a multiplier, and the :.
subtracters which are provided in the constructions according to the present invention, may be replaced by a construction comprised of a polarity inverter and an adder. ~- :
:.~ Although all -the above embodiments are e~plained .-5 10 for an echo canceler including an adaptive digital :~
filter, as readily understood, all the above provisions can be applied to any other adaptive digital filter for :~
~ estimating a response characteristic of a signal path by .-.
ji~ monitoring a sampled output signal of the signal path, ` -'~ 15 estimating a predetermined number of filter coefficients ~ which represent the response characteristic of the ~ ;~
signal path, and generating an estimated output signal :: `- .
of the signal path using a plurality of successive ~-sampled input signals of the signal path and the `--.
estimated filter coefficients, where the estimation is carried out so that a difference between the output ~ signal and the estimated output signal is reduced.
3 i~:

.' '~
's :.
.~. : - :. : `

.~ . .
, ~ : ~, .,' . .
: 1 : .

.. , : ~.. ... ,.. , .. , . , ~:: : .

Claims (76)

1. An adaptive digital filter for estimating a response characteristic of a signal path by monitoring a sampled output signal of said signal path, estimating a predetermined number of filter coefficients which represent the response characteristic of the signal path, and generating an estimated output signal of said signal path using a plurality of successive sampled input signals of the signal path and estimated filter coefficients, wherein an estimation is carried out so that a difference between said output signal and said estimated output signal is reduced, the filter comprising:
an input signal register for holding a plurality of sampled input signals which have been sampled since a predetermined number of cycles before the current time;
a filter coefficient register for holding said predetermined number of filter coefficients which respectively correspond to the plurality of sampled input signals;
a convolution calculating means for calculating a convolution between said input signal and said estimated response characteristic using said plurality of successive sampled input signals which are held in said input signal register, and said estimated filter coefficients which are held in said filter coefficient register;
an error obtaining means for obtaining a difference between said sampled output signal of said signal path and said convolution as an error in said estimation; and a filter coefficient estimating means for estimating said predetermined number of filter coefficients so that said error is reduced;
said filter coefficient estimating means comprising a filter coefficient renewing means for each of said predetermined number of filter coefficients, for renewing the corresponding filter coefficient in each cycle of sampling, and wherein said filter coefficient renewing means comprises a multiplier for obtaining a product of one of said sampled output signals corresponding to the filter coefficient renewing means, and said sampled input signal, an integrating means for integrating an output of said multiplier to extract a component of said filter coefficient corresponding to the filter coefficient renewing means, a power calculating means for calculating a power of said one of said sampled output signals corresponding to the filter coefficient renewing means, and a divider for dividing an output of the integrating means by an output of the power calculating means.

2. An adaptive digital filter according to claim 1, wherein said integrating means comprises a low-pass filter for integrating the output of the said multiplier to extract a component of said filter coefficient corresponding to the filter coefficient renewing means, wherein a low-pass filter coefficient in the low-pass filter is a constant.

3. An adaptive digital filter according to claim 2, wherein said integrating means further comprises a low-pass filter coefficient setting means for setting said low-pass filter coefficient in said low-pass filter, said low-pass filter coefficient is set to a small value near zero at the beginning of the operation of an echo canceler, and is renewed to be increased with an elapse of time.

4. An adaptive digital filter according to claim 3, wherein the low-pass filter coefficient in said low-pass filter is set to be equal to (n-1)/n where n is an integer, and n is set to be equal to the number of the samples which are counted from the beginning of the operation of the adaptive digital filter for a predetermined time from the beginning of the operation of the adaptive digital filter, and n is renewed so that said low-pass filter coefficient is renewed to be increased with an elapse of time, after a predetermined time.

5. An adaptive digital filter according to claim 2, wherein said integrating means further comprises, an arithmetic average calculating means and low-pass filter coefficient setting means for calculating an arithmetic average of the input signals thereof, wherein said low-pass filter coefficient is set a small value near zero at the beginning of the operation of an echo canceler, and is renewed to be increased with an elapse of time, and a selecting control means for selecting said arithmetic average calculating means to be used as said integrating means for a predetermined time from the beginning of the operation of the adaptive digital filter, and selecting said low-pass filter to be used as said integrating means after a predetermined time.

6. An adaptive digital filter according to claim 2, wherein m-th filter coefficient renewing means corresponding to m-th filter coefficient, where m is an integer satisfying 1?m?I
where I is equal to said number of the filter coefficients further comprises, a power calculation means for calculating an integrated power (Pj) of said sampled input signals, wherein the gain in said power calculation means is set to be equal to a gain in said low-pass filter, and a power delay means for delaying said integrated power (Pj) by (m-1) cycles to obtain a (m-1)-cycle-delayed integrated power (Pj(m)), and the (m-1)-cycle-delayed integrated power (Pj(m)) is supplied to said divider as a divisor.

7. An adaptive digital filter according to claim 2, wherein m-th filter coefficient renewing means corresponding to m-th filter coefficient, where m is an integer satisfying 1?m?I
where I is equal to said number of the filter coefficients further comprises a power calculation means for receiving one of said sampled input signals which is sampled (m-1) cycles before the current time, and is held in the input signal register, and calculating an (m-1) cycle-delayed integrated power (Pj(m)) of the received sampled input signal, where the gain in said power calculation means is set to be equal to a gain in said low-pass filter, and the (m-1)-cycle-delayed integrated power (Pj(m)) is supplied to said divider as a divisor.

8. An adaptive digital filter according to claim 1, wherein m-th filter coefficient renewing means corresponding to m-th filter coefficient, where m is an integer satisfying 1?m?I
where I is equal to said number of the filter coefficients, further comprises a sum-of-products calculating means for receiving the output of the convolution calculating means, and obtaining and outputting a sum of-products .SIGMA.mHj(i)Xj(i) where Xj(i) is the sampled input signal which has been sampled (i-1) cycles before the current time j, Hj(i) denotes a filter coefficient cor-responding to the sampled input signal Xj(i), and .SIGMA.m is a summation of all the filter coefficient of the adaptive digital filter except i=m, and a subtracter which receives said sampled output signal and the output of the convolution calculating means, subtracts the output of the convolution calculating means from said sampled output signal, and said multiplier receives the output of the subtracter instead of said sampled output signal.

9. An adaptive digital filter according to claim 8, further comprising a filter coefficient modifying means for modifying the values of the filter coefficient which are supplied to the convolution calculating means.

10. An adaptive digital filter according to claim 9, wherein said filter coefficient modifying means comprises:
a comparing means where 1?i?I and I is the number of the filter coefficients, for each filter coefficient, for receiving said error in said estimation, and comparing the error with a reference level which is predetermined for each filter coefficient, and a modifying means for outputting zero to said convolution calculating means instead of the corresponding filter coefficient when said error is below said reference level, and outputting the corresponding filter coefficient when said error exceeds said reference level.

11. An adaptive digital filter according to claim lo, wherein each said reference level is preset so that the filter coefficients are supplied to the convolution calculating means in the order of the corresponding sampled input signals which are held in the input signal register, from the newest to the oldest.

12. An adaptive digital filter according to claim 9, wherein said filter coefficient modifying means comprises a comparing means where 1?i?I and I is the number of the filter coefficients, for each filter coefficient, for receiving said error in said estimation, and comparing the error with a plurality of reference levels which are predetermined for each filter coefficient, to determine the level of the error, and a modifying means for multiplying the corresponding filter coefficient by a plurality of factors according to the level of the error, and outputting the multiplied filter coefficient to said convolution calculating means, said reference levels and said factors being predetermined so that said multiplied filter coefficients which are supplied to said convolution calculation means instead of the filter coefficients, gradually increase from zero to the whole values of the filter coefficients.

13. An adaptive digital filter according to claim 9, wherein said filter coefficient modifying means, comprises a comparing means where 1?i?I and I is the number of the filter coefficients, for each filter coefficient, for receiving a timer count which indicates an elapse of time from the beginning of the operation of the adaptive digital filter, and comparing the timer count with a reference level which is predetermined for each filter coefficient, and a modifying means for outputting zero to said convolution calculating means instead of the corresponding filter coefficient when said timer count is below said reference level, and outputting the corresponding filter coefficient when said timer count exceeds said reference level.

14. An adaptive digital filter according to claim 13, wherein each said reference level is preset so that the filter coefficients are supplied to the convolution calculating means in the order of the corresponding sampled input signals which are held in the input signal register, from the newest to the oldest.

15. An adaptive digital filter according to claim 9, wherein said filter coefficient modifying means comprises a comparing means where 1?i?I and I is the number of the filter coefficients, for each filter coefficient, for receiving a timer count in said estimation, and comparing the timer count with a plurality of reference levels which are predetermined for each filter coefficient, to determine the level of the timer count, and a modifying means for multiplying the corresponding filter coefficient by a plurality of factors according to the level of the timer count, and outputting the multiplied filter coefficient to said convolution calculating means, said reference levels and said factors being predetermined so that multiplied filter coefficients which are supplied to said convolution calculation means instead of the filter coefficients, gradually increase from zero to the whole values of the filter coefficients.

16. An adaptive digital filter for estimating a response characteristic of a signal path by monitoring a sampled output signal of said signal path, estimating a predetermined number of filter coefficients which represent the response characteristic of the signal path, and generating an estimated output signal of said signal path using a plurality of successive sampled input signals of the signal path and estimated filter coefficients, wherein an estimation is carried out so that a difference between said output signal and said estimated output signal is reduced, the filter comprising:
an input signal register for holding a plurality of sampled input signals which have been sampled since a predetermined number of cycles before the current time;
a filter coefficient register for holding said predetermined number of filter coefficients which respectively correspond to the plurality of sampled input signals;
a convolution calculating means for calculating a convolution between said input signal and said estimated response characteristic using a plurality of successive sampled input signals which are held in said input signal register, and said estimated filter coefficients which are held in said filter coefficient register;
an error obtaining means for obtaining a difference between said sampled output signal of said signal path and said convolution as an error in said estimation; and a filter coefficient estimating means for estimating said predetermined number of filter coefficients so that said error is reduced;
said filter coefficient estimating means comprising a filter coefficient renewing means for each of said predetermined number of filter coefficients, for renewing the corresponding filter coefficient in each cycle of sampling, and wherein said filter coefficient renewing means comprises a multiplier for obtaining a product of one of said sampled output signals corresponding to the filter coefficient renewing means, and said sampled input signal, an accumulating means for accumulating an output of the multiplier, a power calculating means for calculating a power of said one of said sampled output signals corresponding to the filter coefficient renewing means, a divider for dividing an output of the accumulating means by an output of the power calculating means, and an integrating means for integrating the output of said divider to extract a component of said filter coefficient corresponding to the filter coefficient renewing means.

17. An adaptive digital filter according to claim 16, wherein said integrating means comprises a low-pass filter for integrating the output of the said divider to extract a component of said filter coefficient corresponding to the filter coefficient renewing means, wherein a low-pass filter coefficient in the low-pass filter is a constant.

18. An adaptive digital filter according to claim 17, wherein said integrating means further comprises a low-pass filter coefficient setting means for setting said low-pass filter coefficient in said low-pass filter, said low-pass filter coefficient is set to a small value near zero at the beginning of the operation of an echo canceler, and is renewed to be increased with an elapse of time.

19. An adaptive digital filter according to claim 18, wherein the low-pass filter coefficient in said low-pass filter is set to be equal to (n-1)/n where n is an integer, and n is set to be equal to the number of the samples which are counted from the beginning of the operation of the adaptive digital filter for a predetermined time from the beginning of the operation of the adaptive digital filter, and n is renewed so that said low-pass filter coefficient is renewed to be increased with an elapse of time, after a predetermined time.

20. An adaptive digital filter according to claim 17, wherein said integrating means further comprises an arithmetic average calculating means low-pass filter coefficient setting means for calculating an arithmetic average of the input signals thereof, wherein said low-pass filter coefficient is set to a small value near zero at the beginning of the operation of the echo canceler, and is renewed to be increased with an elapse of time, and a selecting control means for selecting said arithmetic average calculating means to be used as said integrating means for a predetermined time from the beginning of the operation of the adaptive digital filter, and selecting said low-pass filter to be used as said integrating means after a predetermined time.

21. An adaptive digital filter according to claim 17, wherein m-th filter coefficient renewing means corresponding to m-th filter coefficient, where m is an integer satisfying 1?m?I
where I is equal to said number of the filter coefficients, further comprises a power calculation means for calculating an integrated power (Pj) of said sampled input signals, where the gain in said power calculation means is set to be equal to a gain ins aid low-pass filter, and a power delay means for delaying said integrated power (Pj) by (m-1) cycles to obtain (m-1)-cycle-delayed integrated power (Pj(m)), and the (m-1)-cycle-delayed integrated power (Pj(m)) is supplied to said divider as a divisor.

22. An adaptive digital filter according to claim 17, wherein m-th filter coefficient renewing means corresponding to the m-th filter coefficient, where m is an integer satisfying 1?m?I where I is equal to said number of the filter coefficients further comprises a power calculation means for receiving one of said sampled input signals which is sampled (m-1) cycles before the current time, and is held in the input signal register, and calculating an (m-1)-cycle-delayed integrated power (Pj(m)) of the received sampled input signal, where the gain in said power calculation means is set to be equal to a gain in said low-pass filter, and the (m-1)-cycle-delayed integrated power (Pj(m)) is supplied to said divider as a divisor.

23. An adaptive digital filter according to claim 16, wherein m-th filter coefficient renewing means corresponding to m-th filter coefficient, where m is an integer satisfying 1?m?I
where I is equal to said number of the filter coefficients, further comprises a sum-of-products calculating means for receiving the output of the convolution calculating means, and obtaining and output-ting a sum-of-products .SIGMA.mHj(i)Xj(i) where Xj(i) is the sampled input signal which has been sampled (i-1) cycles before the current time j, Hj(i) denotes a filter coefficient corresponding ?o the sampled input signal Xj(i), and .SIGMA.m is a summation of all the filter coefficients of the adaptive digital filter except i=m, and a subtracter which receives said sampled output signal and the output of the convolution calculating means, subtracts the output of the convolution calculating means from said sampled output signal, and said multiplier receives the output of the subtracter instead of said sampled output signal.

24. An adaptive digital filter according to claim 23, further comprising a filter coefficient modifying means for modifying the values of the filter coefficients which are supplied to the convolution calculating means.

25. An adaptive digital filter according to claim 24, wherein aid filter coefficient modifying means comprises a comparing means where 1?i?I and I is the number of filter coefficients, for each filter coefficient, for receiving said error in said estimation, and comparing the error with a refer-ence level which is predetermined for each filter coefficient, and a modifying means for outputting zero to said convolution calculating means instead of the corresponding filter coefficient when said error is below said reference level, and outputting the corresponding filter coefficient when said error exceeds said reference level.

26. An adaptive digital filter according to claim 25, wherein each said reference level is preset so that the filter coefficients are supplied to the convolution calculating means in the order of the corresponding sampled input signals which are held in the input signal register, from the newest to the oldest.

27. An adaptive digital filter according to claim 24, wherein said filter coefficient modifying means comprises a comparing means where 1?i?I and I is the number of the filter coefficients, for each filter coefficient, for receiving said error in said estimation, and comparing the error with a plurality of reference levels which are predetermined for each filter coefficient, to determine the level of the error, and a modifying means for multiplying the corresponding filter coefficient by a plurality of factors according to the level of the error, and outputting the multiplied filter coefficient to said convolution calculating means, said reference levels and said factors being predetermined so that said multiplied filter coefficients which are supplied to said convolution calculation means instead of the filter coefficients, gradually increase from zero to the whole values of the filter coefficients.

28. An adaptive digital filter according to claim 24, wherein said filter coefficient modifying means comprises a comparing means where 1?i?I and I is the number of the filter coefficients, for each filter coefficient, for receiving a timer count which indicates an elapse of time from the beginning of the operation of the adaptive digital filter, and comparing the timer count with a reference level which is predetermined for each filter coefficient, and a modifying means for outputting zero to said convolution calculating means instead of the corresponding filter coefficient when said timer count is below said reference level, and outputting the corresponding filter coefficient when said timer count exceeds said reference level.

29. An adaptive digital filter according to claim 28, wherein each said reference level is preset so that the filter coefficients are supplied to the convolution calculating means in the order of the corresponding sampled input signals which are held in the input signal register, from the newest to the oldest.

30. An adaptive digital filter according to claim 24, wherein said filter coefficient modifying means comprises a comparing means where 1?i?I and I is the number of filter coefficients, for each filter coefficient, for receiving a timer count in said estimation, and comparing the timer count with a plurality of reference levels which are predetermined for each filter coefficient, to determine the level of the timer count, and a modifying means for multiplying the corresponding filter coefficient by a plurality of factors according to the level of the timer count, and outputting the multiplied filter coefficient to said convolution calculating means, said reference levels and said factors being predetermined so that said multiplied filter coefficients which are supplied to said convolution calculation means instead of the filter coefficients, gradually increases from zero to the whole values of the filter coefficients.

31. An adaptive digital filter for estimating a response characteristic of a signal path, by monitoring a sampled output signal of said signal path, estimating a predetermined number of filter coefficients which represent the response characteristic of the signal path, and generating an estimated output signal of said signal path using a plurality of successive sampled input signals of the signal path and estimated filter coefficients, wherein an estimation is carried out so that a difference between said output signal and said estimated output signal is reduced, the filter comprising:
an input signal register for holding a plurality of sampled input signals which have been sampled since a predetermined number of cycles before the current time;
a filter coefficient register for holding said predetermined number of filter coefficients which respectively correspond to the plurality of sampled input signals;
a convolution calculating means for calculating a convolution between said input signal and said estimated response characteristic using a plurality of successive sampled input signals which are held in said input signal register, and said estimated filter coefficients which are held in said filter coefficient register;
an error obtaining means for obtaining a difference between said sampled output signal of said signal path and said convolution as an error in said estimation; and a filter coefficient estimating means for estimating said predetermined number of filter coefficients so that said error is reduced;
said filter coefficient estimating means comprising a filter coefficient renewing means for each of said predetermined number of filter coefficients, for renewing the corresponding filter coefficient in each cycle of sampling, and wherein said filter coefficient renewing means comprises a dividing means for dividing said sampled input signal by one of said sampled output signals corresponding to the filter coefficient renewing means, a zero detecting means for determining that said one of said sampled output signals corresponding to the filter coefficient renewing means is below a predetermined level, an integrating means for integrating the output of the said dividing means so that a component of said filter coefficient corresponding to the filter coefficient renewing means is extracted in an output thereof, and a stop control means for stopping the operation of said integrating means when said zero detecting means determines that said one of said sampled output signals corresponding to the filter coefficient renewing means is below the predetermined level.

32. An adaptive digital filter according to claim 31, wherein said integrating means comprises a low-pass filter for integrating the output of the said dividing means to extract a component of said filter coefficient corresponding to the filter coefficient renewing means, wherein a low-pass filter coefficient in the low-pass filter is a constant.

33. An adaptive digital filter according to claim 32, wherein said integrating means further comprises a low-pass filter coefficient setting means for setting said low-pass filter coefficient in said low-pass filter, said low-pass filter coefficient is set to a small value near zero at the beginning of the operation of an echo canceler, and is renewed to be increased with the elapse of time.

34. An adaptive digital filter according to claim 33, wherein the low-pass filter coefficient in said low-pass filter is set to be equal to (n-1)/n where n is an integer, and n is set to be equal to the number of the samples which are counted from the beginning of the operation of the adaptive digital filter for a predetermined time from the beginning of the operation of the adaptive digital filter, and n is renewed so that said low-pass filter coefficient is renewed to be increased with an elapse of time, after a predetermined time.

35. An adaptive digital filter according to claim 32, wherein said integrating means further comprises, an arithmetic average calculating means and low-pass filter coefficient setting means for calculating an arithmetic average of the input signals thereof, wherein said low-pass filter coefficient is set a small value near zero at the beginning of the operation of the echo canceler, and is renewed to be increased with an elapse of time, and a selecting control means for selecting said arithmetic average calculating means to be used as said integrating means for a predetermined time from the beginning of the operation of the adaptive digital filter, and selecting said low-pass filter to be used as said integrating means after a predetermined time.

36. An adaptive digital filter according to claim 31, wherein m-th filter coefficient renewing means corresponding to m-th filter coefficient, wherein m is an integer satisfying 1?m?I
where I is equal to said number of the filter coefficients, further comprises, a sum-of-products calculating means for receiving the output of the convolution calculating means, and obtaining and outputting a sum-of-products .SIGMA.mHj(i)Xj(i) where Xj(i) is the sampled input signal which has been sampled (i-1) cycles before the current time j, Hj(i) denotes a filter coefficient corres-ponding to the sampled input signal Xj(i), and .SIGMA.m is a summation of all the filter coefficients of the adaptive digital filter except i=m, and a subtracter which receives said sampled output signal and the output of the convolution calculating means, subtracts the output of the convolution calculating means from said sampled output signal, and said dividing means receiving the output of the subtracter instead of said sampled output signal.

37. An adaptive digital filter according to claim 36, further comprising a filter coefficient modifying means for modifying the values of the filter coefficients which are supplied to the convolution calculating means.

38. An adaptive digital filter according to claim 37, wherein said filter coefficient modifying means comprises a comparing means where 1?i?I and I is the number of the filter coefficients, for each filter coefficient, for receiving said error in said estimation, and comparing the error with a reference level which is predetermined for each filter coefficient, and a modifying means for outputting zero to said convolution calculating means instead of the corresponding filter coefficient when said error is below said reference level, and outputting the corresponding filter coefficient when said error exceeds said reference level.

39. An adaptive digital filter according to claim 38, wherein each said reference level is preset so that the filter coefficients are supplied to the convolution calculating means in the order of the corresponding sampled input signals which are held in the input signal register, from the newest to the oldest.

40. An adaptive digital filter according to claim 37, wherein said filter coefficient modifying means comprises a comparing means where 1?i?I and I is the number of the filter coefficients, for each filter coefficient, for receiving said error in said estimation, and comparing the error with a plurality of reference levels which are predetermined for each filter coefficient, to determine the level of the error, and a modifying means for multiplying the corresponding filter coefficient by a plurality of factors according to the level of the error, and outputting the multiplied filter coefficient to said convolution calculating means, said reference levels and said factors being predetermined so that said multiplied filter coefficients which are supplied to said convolution calculation means instead of the filter coefficients, gradually increase from zero to the whole values of the filter coefficients.

41. An adaptive digital filter according to claim 37, wherein said filter coefficient modifying means comprises a comparing means where 1?i?I and I is the number of the filter coefficients, for each filter coefficient, for receiving a timer count which indicates an elapse of time from the beginning of the operation of the adaptive digital filter, and comparing the timer count with a reference level which is predetermined for each filter coefficient, and a modifying means for outputting zero to said convolution calculating means instead of the corresponding filter coefficient when said timer count is below said reference level, and outputting the corresponding filter coefficient when said timer count exceeds said reference level.

42. An adaptive digital filter according to claim 41, wherein each said reference level is preset so that the filter coefficients are supplied to the convolution calculating means in the order of the corresponding sampled input signals which are held in the input signal register, from the newest to the oldest.

43. An adaptive digital filter according to claim 37, wherein said filter coefficient modifying means comprises a comparing means where 1?i?I and I is the number of the filter coefficients, for each filter coefficient, for receiving a timer count in said estimation, and comparing the timer count with a plurality of reference levels which are predetermined for each filter coefficient, to determine the level of the timer count, and a modifying means for multiplying the corresponding filter coefficient by a plurality of factors according to the level of the timer count, and outputting the multiplied filter coefficient to said convolution calculating means, said reference levels and said factors are predetermined so that said multiplied filter coefficients which are supplied to said convolution calculation means instead of the filter coefficients, gradually increase from zero to the whole values of the filter coefficients.

44. An adaptive digital filter according to claim 31, wherein said divider in each filter coefficient renewing means comprises a reciprocal calculating means for obtaining a reciprocal of said one of said sampled output signals corresponding to the filter coefficient renewing means, and a multiplier for multiplying said sampled input signal by the output of the reciprocal calculating means.

45. An adaptive digital filter for estimating a response characteristic of a signal path by monitoring a sampled output signal of said signal path, estimating a predetermined number of filter coefficients which represent the response characteristic of the signal path, and generating an estimated output signal of said signal path using a plurality of successive sampled input signals of the signal path and estimated filter coefficients, wherein an estimation is carried out so that a difference between said output signal and said estimated output signal is reduced, the filter comprising:
an input signal register for holding a plurality of sampled input signals which have been sampled since a predetermined number of cycles before the current time;
a filter coefficient register for holding said predetermined number of filter coefficients which respectively correspond to the plurality of sampled input signals;
a convolution calculating means for calculating a convolution between said input signal and said estimated response characteristic using a plurality of successive sampled input signals which are held in said input signal register, and said estimated filter coefficients which are held in said filter coefficient register;
an error obtaining means for obtaining a difference between said sampled output signal of said signal path and said convolution as an error in said estimation; and a filter coefficient estimating means for estimating said predetermined number of filter coefficients so that said error is reduced;
said filter coefficient estimating means comprising a filter coefficient renewing means for each of said predetermined number of filter coefficients, for renewing the corresponding filter coefficient in each cycle of sampling, and wherein m-th filter coefficient renewing means corresponding to m-th filter coefficeint, where m is an integer satisfying 1?i?I where I is equal to said number of filter coefficients, comprises a low-pass filter for integrating said sampled input signals so that a component of said filter coefficient corresponding to the filter coefficeint renewing means is extracted in the output thereof, and said low-pass filter comprises a first multiplier for multiplying each of said sampled input signals by a first factor which is equal to K.Xj(m)/r, where K is a coefficient correction constant, Xj(m) is the sampled input signal which have been sampled (m-1) cycles before the current time j, j denotes a number indicating a current time, and r denotes a value for normalizing the first factor, an adder, a delay means for delaying an output of said adder, and a second multiplier for multiplying an output of the delay means by a second factor which is equal to 1-K.Xj(m)2/r, said adder adding outputs of the first and second multipliers, and the output of the adder becoming the output of said filter coeffi-cient renewing means.

46. An adaptive digital filter according to claim 45, wherein said m-th filter coefficient renewing means further comprises a norm calculation means for calculating a norm where Xk(m) is the sampled input signal which has been sampled (m-1) cycles before the current time k, n is the maximum number of k in the sampled input signals which are held in the input signal register, and said norm (Nr) is supplied to said first and second multipliers as said value (r).

47. An adaptive digital filter according to claim 46, wherein the number of the sampled input signals which are held in said input signal register is larger than the number of the filter coefficients.

48. An adaptive digital filter according to claim 45, wherein each of said filter coefficient renewing means further comprises a power calculation means for calculating an integrated power of said sampled input signals, where the gain in said power calculation means can be set to a predetermined value.

49. An adaptive digital filter according to claim 48, wherein m-th filter coefficient renewing means corresponding to m-th filter coefficient, where m is an integer satisfying 1?m?I
where I is equal to said number of the filter coefficient, further comprises a power delay means for delaying said integrated power (Pj) by (m-1) cycles to obtain (m-1)-cycle-delayed integrated power (Pj(m)), and the (m-1) cycle-delayed integrated power (Pj(m)) is supplied to said first and second multipliers as said value (r).

50. An adaptive digital filter according to claim 45, wherein said m-th filter coefficient renewing means corresponding to said m-th filter coefficient, where m is an integer satisfying 1?m?I where I is equal to said number of the filter coefficients, further comprises a norm calculation means for calculating a norm where Xk(m) is the sampled input signal which has been sampled (m-1) cycles before the current time k, n is the maximum number of k in the sampled input signals which are held in the input signal register, and said norm (Nr) is supplied to said first and second multipliers as said value (r) in a first stage of the operation of the adaptive digital filter, a power calculation means for calculating an integrated power (Pj) of said sampled input signals, where the gain in said power calculation means can be set to a predetermined value, and the integrated power (Pj) is supplied to said first and second multipliers as said value (r) in a second stage of the operation of the adaptive digital filter, and a power delay means for delaying said integrated power (Pj) by (m-1) cycles to obtain a (m-1)-cycle-delayed integrated power (Pj(m)), and the (m-1)-cycle-delayed integrated power (Pj(m)) is supplied to said first and second multipliers as said value (r) in a third stage of the operation of the adaptive digital filter.

51. An adaptive digital filter according to claim 50, wherein the number of the sampled input signals which are held in said input signal register is larger than the number of the filter coefficients.

52. An adaptive digital filter according to claim 45, wherein said m-th filter coefficient renewing means corresponding to said m-th filter coefficient, where m is an integer satisfying 1?m?I where I is equal to said number of the filter coefficients, further comprises a sum-of-products calculating means for receiving the output of the convolution calculating means, and obtaining and outputting a sum-of-products .SIGMA.mHj(i)Xj(i) where Xj(i) is the sampled input signal which has been sampled (i-1) cycles before the current time j, Hj(i) denotes a filter coefficient corres-ponding to the sampled input signal Xj(i), and .SIGMA.m is a summation of all the filter coefficients of the adaptive digital filter except i=m, and a subtracter which receives said sampled output signal and the output of the convolution calculating means, and subtracts the output of the convolution calculating means from said sampled output signal, and said first multiplier receiving the output of the subtracter instead of said sampled output signal.

53. An adaptive digital filter according to claim 52, further comprising a filter coefficient modifying means for modifying the values of the filter coefficients which are supplied to the convolution calculating means.

54. An adaptive digital filter according to claim 53, wherein said filter coefficients modifying means comprises a comparing means where 1?i?I and I is the number of the filter coefficient, for each filter coefficient, for receiving said error in said estimation, and comparing the error with a reference level which is predetermined for each filter coefficient, and a modifying means for outputting zero to said convolution calculating means instead of the corresponding filter coefficient when said error is below said reference level, and outputting the corresponding filter coefficient when said error exceeds said reference level.

55. An adaptive digital filter according to claim 54, wherein each said reference level is preset so that the filter coefficients are supplied to the convolution calculating means in the order of the corresponding sampled input signals which are held in the input signal register, from the newest to the oldest.

56. An adaptive digital filter according to claim 53, wherein said filter coefficient modifying means comprises a comparing means where 1?i?I and I is the number of the filter coefficients, for each filter coefficient, for receiving said error in said estimation, and comparing the error with a plurality of reference levels which are predetermined for each filter coefficient, to determine the level of the error, and a modifying means for multiplying the corresponding filter coefficient by a plurality of factors according to the level of the error, and outputting the multiplied filter coefficient to said convolution calculating means, said reference levels and said factors being predetermined so that said multiplied filter coefficients which are supplied to said convolution calculation means instead of the filter coefficients, gradually increase from zero to the whole values of the filter coefficients.

57. An adaptive digital filter according to claim 53, wherein said filter coefficient modifying means comprises a comparing means where 1?i?I and I is the number of the filter coefficients, for each filter coefficient, for receiving a timer count which indicates an elapse of time from the beginning of the operation of the adaptive digital filter, and comparing the timer count with a reference level which is predetermined for each filter coefficient, and a modifying means for outputting zero to said convolution calculating means instead of the corresponding filter coefficient when said timer count is below said reference level, and outputting the corresponding filter coefficient when said timer count exceeds said reference level.

58. An adaptive digital filter according to claim 57, wherein each said reference level is preset so that the filter coefficients are supplied to the convolution calculating means in the order of the corresponding sampled input signals which are held in the input signal register, from the newest to the oldest.

59. An adaptive digital filter according to claim 53, wherein said filter coefficient modifying means comprises a comparing means where 1?i?I and I is the number of the filter coefficients, for each filter coefficient, for receiving said timer count in said estimation, and comparing the timer count with a plurality of reference levels (Thi1 to Thi3) which are predetermined for each filter coefficient, to determine the level of the timer count, and a modifying means for multiplying the corresponding filter coefficient by a plurality of factors according to the level of the timer count, and outputting the multiplied filter coefficient to said convolution calculating means, said reference levels and said factors being predetermined so that said multiplied filter coefficients which are supplied to said convolution calculation means instead of the filter coefficients, gradually increase from zero to the whole values of the filter coefficients.

60. An adaptive digital filter according to claim 45, further comprising a stability condition monitoring means for determining whether or not a stability condition K<2r/I-X?(m)2 is satisfied, where I is the number of the filter coefficient, K is said coefficient correction constant, r is said value in the divider, Xj(m) is the sampled input signal which has been sampled (m-1) cycles before the current time j, and a stop control means for generating a stop control signal which stops the operation of the adaptive digital filter when said stability condition is not satisfied.

61. An adaptive digital filter for estimating a response characteristic of a signal path by monitoring a sampled output signal of said signal path, estimating a predetermined number of filter coefficients which represent the response characteristic of the signal path, and generating an estimated output signal of said signal path using a plurality of successive sampled input signals of the signal path and estimated filter coefficients, wherein an estimation is carried out so that a difference between said output signal and said estimated output signal is reduced, the filter comprising:
an input signal register for holding a plurality of sampled input signals which have been sampled since a predetermined number of cycles before the current time;
a filter coefficient register for holding said predetermined number of filter coefficients which respectively correspond to the plurality of a sampled input signals;
a convolution calculating means for calculating a convolution between said input signal and said estimated response characteristic using a plurality of successive sampled input signals which are held in said input signal register, and said estimated filter coefficients which are held in said filter coefficient register;
an error obtaining means for obtaining a difference between said sampled output signal of said signal path and said convolution as an error in said estimation; and a filter coefficient estimating means for estimating said predetermined number of filter coefficients so that said error is reduced;
said filter coefficient estimating means comprising a filter coefficient renewing means for each of said predetermined number of filter coefficients, for renewing the corresponding filter coefficient in each cycle of said sampling, and said filter coefficient renewing means comprising a first multiplier for multiplying each of said sampled output signals by a coefficient correction constant (K), a divider for dividing an output of the first multiplier by a value (r) for normalizing the first factor, a second multiplier for multiplying an output of the divider by one of the sampled output signals, and an adder for adding a previously estimated filter coefficient corresponding to the filter coefficient renewing means, to the output of the second multiplier.

62. An adaptive digital filter according to claim 61, wherein said m-th filter coefficient renewing means corresponding to m-th filter coefficient, where m is an integer satisfying 1?m?I where I is equal to said number of the filter coefficients, further comprises a norm calculation means for calculating a norm where Xk(m) is the sampled input signal which has been sampled (m-1) cycles before the current time k, n is the maximum number of k in the sampled input signals which are held in the input signal register, and said norm (Nr) is supplied to said divider as said value (r).

63. An adaptive digital filter according to claim 62, wherein the number of the sampled input signals which are held in said input signal register is larger than the number of the filter coefficients.

64. An adaptive digital filter according to claim 61, wherein each of said filter coefficient renewing means further comprises a power calculation means for calculating an integrated power (Pj) of said sampled input signals, where the gain in said power calculation means can be set to a predetermined value.

65. An adaptive digital filter according to claim 64, wherein m-th filter coefficient renewing means corresponding to m-th filter coefficient, where m is an integer satisfying 1?m?I
where I is equal to said number of the filter coefficients, further comprises a power delay means for delaying said integrated power (Pj) by a (m-1) cycles to obtain (m-1)-cycle-delayed integrated power (Pj(m)), and the (m-1)-cycle-delayed integrated power (Pj(m)) is supplied to said divider as said value (r).

66. An adaptive digital filter according to claim 61, wherein m-th filter coefficient renewing means corresponding to m-th filter coefficient, where m is an integer satisfying 1?m?I, where I is equal to said number of the filter coefficients, further comprises a norm calculation means for calculating a norm where Xk(m) is the sampled input signal which has been sampled (m-1) cycles before the current time k, n is the maximum number of k in the sampled input signals which are held in the input signal register, and said norm (Nr) is supplied to said divider as said value (r) in a first stage of the operation of the adaptive digital filter, a power calculation means for calculating an integrated power (Pj) of said sampled input signals, where the gain in said power calculation means can be set to a predetermined value, and the integrated power (Pj) is supplied to said divider in a second stage of the operation of the adaptive digital filter, and a power delay means for delaying said integrated power (Pj) by (m-1) cycles to obtain a (m-1)-cycle-delayed integrated power (Pj(m)), and the (m-1)-cycle delayed integrated power (Pj(m)) is supplied to said divider as said value (r) in a third stage of the operation of the adaptive digital filter.

67. An adaptive digital filter according to claim 66, wherein the number of the sampled input signals which are held in said input signal register is larger than the number of the filter coefficients.

68. An adaptive digital filter according to claim 61, wherein each of said filter coefficient renewing means further comprises, a subtracter which receives said sampled output signal and the output of the convolution calculating means, and subtracts the output of the convolution calculating means from said sampled output signal, and said first multiplier receiving the output of the subtracter instead of said sampled output signal.

69. An adaptive digital filter according to claim 68, further comprising a filter coefficient modifying means for modifying the values of the filter coefficients which are supplied to the convolution calculating means.

70. An adaptive digital filter according to claim 69, wherein said filter coefficient modifying means comprises a comparing means where 1?i?I and I is the number of the filter coefficients, for each filter coefficient, for receiving said error in said estimation, and comparing the error with a reference level which is predetermined for each filter coefficient, and a modifying means for outputting zero to said convolution calculating means instead of the corresponding filter coefficient when said error is below said reference level, and outputting the corresponding filter coefficient when said error exceeds said reference level.

71. An adaptive digital filter according to claim 70, wherein said each reference level is preset so that the filter coefficients are supplied to the convolution calculating means in the order of the corresponding sampled input signals which are held in the input signal register, from the newest to the oldest.

72. An adaptive digital filter according to claim 69, wherein said filter coefficient modifying means comprises a comparing means where 1?i?I and I is the number of the filter coefficients, for each filter coefficient, for receiving said error in said estimation, and comparing the error with a plurality of reference levels which are predetermined for each filter coefficient, to determine the level of the error, and a modifying means for multiplying the corresponding filter coefficient by a plurality of factors according to the level of the error, and outputting the multiplied filter coefficient to said convolution calculating means, said reference levels and said factors being predetermined so that said multiplied filter coefficients which are supplied to said convolution calculation means instead of the filter coefficients, gradually increase from zero to the whole values of the filter coefficients.

73. An adaptive digital filter according to claim 69, wherein said filter coefficient modifying means comprises a comparing means where 1?i?I and I is the number of the filter coefficients, for each filter coefficient, for receiving a timer count which indicates an elapse of time from the beginning of the operation of the adaptive digital filter and comparing the timer count with a reference level which is predetermined for each filter coefficient, and a modifying means for outputting zero to said convolution calculating means instead of the corresponding filter coefficient when said timer count is below said reference level, and outputting the corresponding filter coefficient when said timer count exceeds said reference level.

74. An adaptive digital filter according to claim 73, wherein each said reference level is preset so that the filter coefficients are supplied to the convolution calculating means in the order of the corresponding sampled input signals which are held in the input signal register, from the newest to the oldest.

75. An adaptive digital filter according to claim 69, wherein said filter coefficient modifying means comprises a comparing means where 1?i?I and I is the number of the filter coefficients, for each filter coefficient, for receiving said timer count in said estimation, and comparing the timer count with a plurality of reference levels which are predetermined for each filter coefficient, to determine the level of the timer count, and a modifying means for multiplying the corresponding filter coefficient by a plurality of factors according to the level of the timer count, and outputting the multiplied filter coefficient to said convolution calculating means, said reference levels and said factors being predetermined so that said multiplied filter coefficients which are supplied to said convolution calculation means instead of the filter coefficients, gradually increase from zero to the whole values of the filter coefficients.

76. An adaptive digital filter according to claim 61, further comprising a stability condition monitoring means for determining whether or not a stability condition K<2r/1-X?(m)2 is satisfied, where I is the number of the filter coefficients, K is said coefficient correction constant, r is said value in the divider, Xj(m) is the sampled input signal which have been sampled (m-1) cycles before the current time j, and a stop control means for generating a stop control signal which stops the operation of the adaptive digital filter when said stability condition is not satisfied.