CA2030678C - Real-time rejection circuit to automatically reject multiple interfering hopping signals while passing a lower level desired signal - Google Patents
Real-time rejection circuit to automatically reject multiple interfering hopping signals while passing a lower level desired signalInfo
- Publication number
- CA2030678C CA2030678C CA002030678A CA2030678A CA2030678C CA 2030678 C CA2030678 C CA 2030678C CA 002030678 A CA002030678 A CA 002030678A CA 2030678 A CA2030678 A CA 2030678A CA 2030678 C CA2030678 C CA 2030678C
- Authority
- CA
- Canada
- Prior art keywords
- time
- signal
- signals
- time domain
- passing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04K—SECRET COMMUNICATION; JAMMING OF COMMUNICATION
- H04K3/00—Jamming of communication; Counter-measures
- H04K3/20—Countermeasures against jamming
- H04K3/22—Countermeasures against jamming including jamming detection and monitoring
- H04K3/224—Countermeasures against jamming including jamming detection and monitoring with countermeasures at transmission and/or reception of the jammed signal, e.g. stopping operation of transmitter or receiver, nulling or enhancing transmitted power in direction of or at frequency of jammer
- H04K3/228—Elimination in the received signal of jamming or of data corrupted by jamming
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
- G01S7/36—Means for anti-jamming, e.g. ECCM, i.e. electronic counter-counter measures
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04K—SECRET COMMUNICATION; JAMMING OF COMMUNICATION
- H04K3/00—Jamming of communication; Counter-measures
- H04K3/20—Countermeasures against jamming
- H04K3/22—Countermeasures against jamming including jamming detection and monitoring
- H04K3/224—Countermeasures against jamming including jamming detection and monitoring with countermeasures at transmission and/or reception of the jammed signal, e.g. stopping operation of transmitter or receiver, nulling or enhancing transmitted power in direction of or at frequency of jammer
Abstract
ABSTRACT
A real-time rejection circuit for passing low level desired signals in the presence of one or more strong interfering signals. A chirp-Z transform system separates the various frequency components of a received signal into frequency segregated time domain signals. A power splitter separates the time domain signal into two paths. One path includes a modulator or switch that is normally biased "ON" for passing the time domain signal. The second path includes a diode detector that produces pulses of sufficient strength when a strong interfering component is present to override the bias and turn the modulator "OFF" for a sufficient period of time to attenuate the unwanted frequency components in the other path. The modulator output will primarily contain the low level desired frequency components that are passed through an inverse transform device for producing a frequency domain signal of the desired signal uncorrupted by unwanted signals.
A real-time rejection circuit for passing low level desired signals in the presence of one or more strong interfering signals. A chirp-Z transform system separates the various frequency components of a received signal into frequency segregated time domain signals. A power splitter separates the time domain signal into two paths. One path includes a modulator or switch that is normally biased "ON" for passing the time domain signal. The second path includes a diode detector that produces pulses of sufficient strength when a strong interfering component is present to override the bias and turn the modulator "OFF" for a sufficient period of time to attenuate the unwanted frequency components in the other path. The modulator output will primarily contain the low level desired frequency components that are passed through an inverse transform device for producing a frequency domain signal of the desired signal uncorrupted by unwanted signals.
Description
6 7 ~
The present invention relates to RF signal processing and, more particularly, to a real-time signal rejection circuit that automatically rejects multiple interfering hopping signals while passing a lower level desired signal.
In the field of electronic warfare, it has been the general practice to employ various electronic jamming techniques wherein RF emitters transmit interfering signals at one or more frequencies to obstruct the RF communications of others. Such jamming emitters may be fixed, i.e. transmitting energy at a fixed " 10 narrow frequency band, or they may be agile, i.e. transmitting energy at different narrow frequency bands that vary with time (frequency hopping).
~`
To counteract the effects of such jamming, a variety of antijamming devices have been developed. One such device for use with wideband receivers employes a rejection circuit that suppresses one frequency or band of frequencies while passing all other frequencies. One of the most critical problems confronting : . . .
designers of these rejection circuits for use with wideband receivers in the presence of narrowband interferers has been , ,;~ .
maintaining sufficient receiver sensitivity so that the power levels of strong interfering signals are significantly reduced .` while not attenuating a much weaker desired signal. This problem c is overcome by the present invention.
The general purpose of this invention is to provide a real-time rejection circuit for interference protection of wideband ;..~,'~i receivers while maintaining high receiver sensitivity. The present invention embraces all the advantages of similarly employed :.:
:.
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.. ~
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.
rejection circuits, attaining the same or better results with a simpler, more easily designed combination of components.
To attain this, the present invention comtemplates a rejection circuit having a transform means for separating the frequency components of a received signal into a frequency segregated time domain. A gating circuit, normally biased "ON", passes the desired frequency components in the time domain to an ; inverse transform means for recovering the RF signal by transforming the time domain signal into frequency segregated time domain signals. Stronger frequency components in the time domain signal are detected and used to overcome the bias of the gating circuit to turn the gate "OFF" thereby blocking the stronger ~ . .
components.
` It is, therefore, an object of the present invention to provide an interference protection circuit that automatically rejects one or more interfering signals while passing lower level . : .
desired signals.
Another object is the provision of a real-time rejection : .~
:~ circuit for use in a wideband receiver that will maintain high sensitivity in the presence of agile or fixed narrowband interferers.
,.... .
A further object of the invention is to provide a real-time rejection circuit having a simpler combination of components that may be more easily designed than conventional circuits used ::;
for a similar purpose.
Other objects and many of the attendant advantages of this invention will be readily appreciated as -the same becomes `~ better understood by reference to the following detailed . .
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.~ . -~ 2~S~78 description when considered in connection with the accompanying drawings.
FIG. 1 is a schematic diagram of a preferred embodiment.
FIG. 2 is a graph illustrating several waveforms that ~` ~
appear throughout the circuit of FIG. 1.
FIG. 3 is a graph illustrating the relationship between parameters of the FIG. 1 circuit.
FIG. 4 is a schematic circuit diagram of a modification of the FIG. 1 embodiment.
;`.' FIG. 5 is a graph useful in understanding the embodiment of FIG. 4.
~.;
., .
FIG. 6, which is on the same sheet as FIG. I, is a schematic diagram of still another embodiment of the invention.
-~ Referring now to the drawings, there is shown in FIG. 1 a . .,~, rejection circuit 10 having an input terminal 12 connected to a ^~ conventional chirp-z transform system 14 such as shown and described by Hays et al in "Surface Wave Transform Adaptable : ;1.' ,';f' Processor System", 1975 Ultrasonics SYmposium Proceedings, IEEE
Cat. No. 75 CHO 994-4SU, pp 363-367. As noted in Hays et al, the chirp-z system 14 transforms time domain input signals into frequency segregated time domain signals having frequency components separated in time. In figure 5 on page 36~ of Hays et al, a circuit is shown that can be used to manually gate out ..-.
~ undesired frequencies. This method works well if the user manually :
observes on an oscilloscope where to place the gate signal; or if the user knows what the frequency is before-hand, then a clock gate "~ can be manually set. As will become clear below, the present .. ,:. .
' circuit 10 does not require the user to know what the frequency is . ,:
;
. i ~' `
,,.,~
~.
' ~
.
:,.
.~ or ~Jhere to set the gate position. Circuit lO automatically and quickly (in nanoseconds) ~nocks down multlple fixed frequency or hopping interferers while preserving weaker desired signals.
Syfitem 14 includes a chirp-Z input terminal 15 for inputting a chLrp 6ignal to a surface acoustic wave ~SAW) expander 17. A multiplier 19 mixes an amplified version of the output of the SAW expander 17 with the input 6ignal on terminal 12. The product from multiplier 19 is compresscd in a S~W compressor 13 to produce a chirp-Z tran~form of the input signal.
; 10 1~he output of the chir~-Z system 14 i6 connected to a power ~plitter 16 havin~ two outputs. One output i~ connected to a delay line 18 while the other output i6 conrlected to a diode detector 20. ~he output of delay line l8 is connected to the ~ input of a modulator 22. The diode 20 is connected to a video .
amplifier 24 whose output is connected to the input of an AC-DC
; i601ation box 26. ~ positive fixed bias voltage is connected to box 26 via a battery 2~, or other conventional power 6upply, and ' an ad~ustable resi6tor 30. ~he output of box 26 iB connected to .;,; . .
an enable gate in~ut on modulat~r 22. The output of modulator 22 ~0 is connected to a conventional inverse chirp-Z transform device ;
32. Device 32 typically has the 6ame components as 6ystem 14 with ~' a 61ightlv different arrangement as ~hown in Hayes et al, cited ;~`; above. Device 32 has lnput and output tarmlnals 36, 34, i~'' respectively.
~ FIG. 2 illustrates typical waveforms useful in "~
i under6~anding the operation of the rejection circuit 10. Signal6 :` fl and f2 represent the frequency co~,ponents of the center ~, . .
.
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. ~ .
. . ~ . .
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frequency of a relatively weak desired signal and the center freguency of a stronger, narrowband interference signal, respectively, the composite of which represents the recei.ved signal appearing at the input terminal 12. The conventional chirp-Z transform sy6tem 14 will separate the frequency components fl and f2 (plus any other components present in the time domain input signal) into frequency segregated signal6 in the time domain as shown by waveform A. The impulse signal represents the input ....
;' to terminals 15 and 36.
;~ lO ~he modulator 22, rlormally biased "ON' by a positive . ., voltage provided by variable resistor 30 and battery 28, will pass the desired weak component fl to the output. ~owever, modulator 22 when gated "OFF" by a 6ufficiently negative signal will appreciably attenuate signal~ appearing at point A. With proper ad~ustment of resistor 30 and the delay 18 the large negative pulses appearing at the output of amplifier 24 (waveform B~ will be ~ufficiently negative to turn "OFF" the modulator 22 at those instances when the unwanted components f2 in waveform A appear at the input to modulator 22. As ~uch, the f2 components will be 6igr.ificantly atten~ated, leaving only the fl components at the input to device 32 as shown in waveform C. An inverse chirp-transform of waveform C will be performed by device 32 to produce a frequency domain signal containing primarily the weak signal fl.
FIG. 3 is a graphical illustration showing a typical variation between the insertion loss of the circuit 10 versus the effective bias voltage at the modulator 22 which, for example, may be implemented with a reasonably fast switch, such as the , .
:~ -5 -.
. .
;
. . , : .
- ~:
:'' ' 6 ~ ~
; Watkins-Johnson S-l. Representative values for the curve in FIG.
3 appear in Lhe following table.
-; APPROXIMATE
WAVEFORM BEFFECTIVE BIAS VOLTAGE INSERTION LOSS
VOLTSOF MODUhATOR 22OF MODULATOR 22 -0.2 1.3 5.5 d~
. -0.5 1.0 5.5 dB
~0.7 0.8 6.0 dB
-1.0 0.5 12.0 dB
J, ,~ -1.1 0.4 >20 d~
:. 10 -1.5 0.0 ~30 dB
;',, ,`; FIG. 4 illustrate~ a variation of the FIG. 1 embodiment.
.;
~ Circuit 10' includes means to retain the spectrial purity of weak '!,; desired signals (fl) that are below or equal to the amplitude of the sidelobes (SL) of a strong interfering signal (f2! as shown in '~ FIG. 5. The circuit 10' of FIG. 4 i~ 6imilar to the circuit 10 of FIG. 1 ~ith the addition of the peak detector/sample-and-hold ', circuit 29. The circuit 29 iS provided to increase the width of ;v, the "GATE OF~"' time for modulator 22 to the value 1`2 ~o that the .~t,. first and 6econd sideiobas SL, al~ays present in a chirp-Z
.:
transform, can be removed along with the main lobe f2.
Still ~nother variation iB ~hown in FIG. 6. The circuit ~; 10"~include~ an alternate method of obtaining "GATE OFF" time. In .,;.
circuit 10", one of the OUtpUtfi of power ~plitter 16 is amplified by amplifier 24 and then attenuated in an adjustable RF attenuator .. ...
~ 35. The attenuated signal i6 then diode detected by diode 20. A
, :.
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.::
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. . ~
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pulsP generator 37, ~uch as a Hewlett Packard model B~82 A, :.: normally puts out a fixed bias to gate modulator 22 "ON" while passing signals to the inverse chirp-Z transform device 32.
. ~owever, when a significantly negative signal f2 is received from . diode 20, pul~e generator 37 is triggered to output the required . negative voltage pulse to gate "OFF" modulator 22. In addition, . the pulse generator 37 has an adjustable pul~e duration control so ~ that the modulator 22 can be gated "OFF" for some predetermined ", . time so that the highest si.delobes SL (FIG. 5) are removed. With - strong interfering signals separated by more than the frequen:~.
resolution of the chirp-Z, the circuit 10" of FIG. 6 will readily ~ pass desired signals at significantly lower power level~ in the ~: order of 20 dB. Using the circuit of FIG. 6, a low level signal fl can be gr~ater than 30 dB below st.rong interfering sign21s if a sufficiently wide "GATE OFF" pulse from the generator 37 is employed. Of course, the interfering signals can be either fixed ~
or hopping.
. Var.i.ous other modifications are contemplated and may obviously be resorted to by those ~Xilled in the art withGut departing from ths spirit and scope cf the invention, as hereinafter de~ined by the appended claims, as only preferred embodiments thereof have been di~closed.
,~
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. .
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,~.' "", ., .~ , :
f .
.~ .
, .. . .
The present invention relates to RF signal processing and, more particularly, to a real-time signal rejection circuit that automatically rejects multiple interfering hopping signals while passing a lower level desired signal.
In the field of electronic warfare, it has been the general practice to employ various electronic jamming techniques wherein RF emitters transmit interfering signals at one or more frequencies to obstruct the RF communications of others. Such jamming emitters may be fixed, i.e. transmitting energy at a fixed " 10 narrow frequency band, or they may be agile, i.e. transmitting energy at different narrow frequency bands that vary with time (frequency hopping).
~`
To counteract the effects of such jamming, a variety of antijamming devices have been developed. One such device for use with wideband receivers employes a rejection circuit that suppresses one frequency or band of frequencies while passing all other frequencies. One of the most critical problems confronting : . . .
designers of these rejection circuits for use with wideband receivers in the presence of narrowband interferers has been , ,;~ .
maintaining sufficient receiver sensitivity so that the power levels of strong interfering signals are significantly reduced .` while not attenuating a much weaker desired signal. This problem c is overcome by the present invention.
The general purpose of this invention is to provide a real-time rejection circuit for interference protection of wideband ;..~,'~i receivers while maintaining high receiver sensitivity. The present invention embraces all the advantages of similarly employed :.:
:.
:,i : -- 1 --.~ .
.. ~
. . . -~: :
'' &~ ~
.
rejection circuits, attaining the same or better results with a simpler, more easily designed combination of components.
To attain this, the present invention comtemplates a rejection circuit having a transform means for separating the frequency components of a received signal into a frequency segregated time domain. A gating circuit, normally biased "ON", passes the desired frequency components in the time domain to an ; inverse transform means for recovering the RF signal by transforming the time domain signal into frequency segregated time domain signals. Stronger frequency components in the time domain signal are detected and used to overcome the bias of the gating circuit to turn the gate "OFF" thereby blocking the stronger ~ . .
components.
` It is, therefore, an object of the present invention to provide an interference protection circuit that automatically rejects one or more interfering signals while passing lower level . : .
desired signals.
Another object is the provision of a real-time rejection : .~
:~ circuit for use in a wideband receiver that will maintain high sensitivity in the presence of agile or fixed narrowband interferers.
,.... .
A further object of the invention is to provide a real-time rejection circuit having a simpler combination of components that may be more easily designed than conventional circuits used ::;
for a similar purpose.
Other objects and many of the attendant advantages of this invention will be readily appreciated as -the same becomes `~ better understood by reference to the following detailed . .
;~ - 2 -. ,~:
;.' ,.'..i ~: , .: ~
"''`''`~
::, .' ~ : , ; ` ~ .
, .................... .
.~ . -~ 2~S~78 description when considered in connection with the accompanying drawings.
FIG. 1 is a schematic diagram of a preferred embodiment.
FIG. 2 is a graph illustrating several waveforms that ~` ~
appear throughout the circuit of FIG. 1.
FIG. 3 is a graph illustrating the relationship between parameters of the FIG. 1 circuit.
FIG. 4 is a schematic circuit diagram of a modification of the FIG. 1 embodiment.
;`.' FIG. 5 is a graph useful in understanding the embodiment of FIG. 4.
~.;
., .
FIG. 6, which is on the same sheet as FIG. I, is a schematic diagram of still another embodiment of the invention.
-~ Referring now to the drawings, there is shown in FIG. 1 a . .,~, rejection circuit 10 having an input terminal 12 connected to a ^~ conventional chirp-z transform system 14 such as shown and described by Hays et al in "Surface Wave Transform Adaptable : ;1.' ,';f' Processor System", 1975 Ultrasonics SYmposium Proceedings, IEEE
Cat. No. 75 CHO 994-4SU, pp 363-367. As noted in Hays et al, the chirp-z system 14 transforms time domain input signals into frequency segregated time domain signals having frequency components separated in time. In figure 5 on page 36~ of Hays et al, a circuit is shown that can be used to manually gate out ..-.
~ undesired frequencies. This method works well if the user manually :
observes on an oscilloscope where to place the gate signal; or if the user knows what the frequency is before-hand, then a clock gate "~ can be manually set. As will become clear below, the present .. ,:. .
' circuit 10 does not require the user to know what the frequency is . ,:
;
. i ~' `
,,.,~
~.
' ~
.
:,.
.~ or ~Jhere to set the gate position. Circuit lO automatically and quickly (in nanoseconds) ~nocks down multlple fixed frequency or hopping interferers while preserving weaker desired signals.
Syfitem 14 includes a chirp-Z input terminal 15 for inputting a chLrp 6ignal to a surface acoustic wave ~SAW) expander 17. A multiplier 19 mixes an amplified version of the output of the SAW expander 17 with the input 6ignal on terminal 12. The product from multiplier 19 is compresscd in a S~W compressor 13 to produce a chirp-Z tran~form of the input signal.
; 10 1~he output of the chir~-Z system 14 i6 connected to a power ~plitter 16 havin~ two outputs. One output i~ connected to a delay line 18 while the other output i6 conrlected to a diode detector 20. ~he output of delay line l8 is connected to the ~ input of a modulator 22. The diode 20 is connected to a video .
amplifier 24 whose output is connected to the input of an AC-DC
; i601ation box 26. ~ positive fixed bias voltage is connected to box 26 via a battery 2~, or other conventional power 6upply, and ' an ad~ustable resi6tor 30. ~he output of box 26 iB connected to .;,; . .
an enable gate in~ut on modulat~r 22. The output of modulator 22 ~0 is connected to a conventional inverse chirp-Z transform device ;
32. Device 32 typically has the 6ame components as 6ystem 14 with ~' a 61ightlv different arrangement as ~hown in Hayes et al, cited ;~`; above. Device 32 has lnput and output tarmlnals 36, 34, i~'' respectively.
~ FIG. 2 illustrates typical waveforms useful in "~
i under6~anding the operation of the rejection circuit 10. Signal6 :` fl and f2 represent the frequency co~,ponents of the center ~, . .
.
~. - 4 -....
~, i ,...................................................................... .
'~
. ~ .
. . ~ . .
' . - ' :: '~ ' ~:
., ~ . . ~ .
frequency of a relatively weak desired signal and the center freguency of a stronger, narrowband interference signal, respectively, the composite of which represents the recei.ved signal appearing at the input terminal 12. The conventional chirp-Z transform sy6tem 14 will separate the frequency components fl and f2 (plus any other components present in the time domain input signal) into frequency segregated signal6 in the time domain as shown by waveform A. The impulse signal represents the input ....
;' to terminals 15 and 36.
;~ lO ~he modulator 22, rlormally biased "ON' by a positive . ., voltage provided by variable resistor 30 and battery 28, will pass the desired weak component fl to the output. ~owever, modulator 22 when gated "OFF" by a 6ufficiently negative signal will appreciably attenuate signal~ appearing at point A. With proper ad~ustment of resistor 30 and the delay 18 the large negative pulses appearing at the output of amplifier 24 (waveform B~ will be ~ufficiently negative to turn "OFF" the modulator 22 at those instances when the unwanted components f2 in waveform A appear at the input to modulator 22. As ~uch, the f2 components will be 6igr.ificantly atten~ated, leaving only the fl components at the input to device 32 as shown in waveform C. An inverse chirp-transform of waveform C will be performed by device 32 to produce a frequency domain signal containing primarily the weak signal fl.
FIG. 3 is a graphical illustration showing a typical variation between the insertion loss of the circuit 10 versus the effective bias voltage at the modulator 22 which, for example, may be implemented with a reasonably fast switch, such as the , .
:~ -5 -.
. .
;
. . , : .
- ~:
:'' ' 6 ~ ~
; Watkins-Johnson S-l. Representative values for the curve in FIG.
3 appear in Lhe following table.
-; APPROXIMATE
WAVEFORM BEFFECTIVE BIAS VOLTAGE INSERTION LOSS
VOLTSOF MODUhATOR 22OF MODULATOR 22 -0.2 1.3 5.5 d~
. -0.5 1.0 5.5 dB
~0.7 0.8 6.0 dB
-1.0 0.5 12.0 dB
J, ,~ -1.1 0.4 >20 d~
:. 10 -1.5 0.0 ~30 dB
;',, ,`; FIG. 4 illustrate~ a variation of the FIG. 1 embodiment.
.;
~ Circuit 10' includes means to retain the spectrial purity of weak '!,; desired signals (fl) that are below or equal to the amplitude of the sidelobes (SL) of a strong interfering signal (f2! as shown in '~ FIG. 5. The circuit 10' of FIG. 4 i~ 6imilar to the circuit 10 of FIG. 1 ~ith the addition of the peak detector/sample-and-hold ', circuit 29. The circuit 29 iS provided to increase the width of ;v, the "GATE OF~"' time for modulator 22 to the value 1`2 ~o that the .~t,. first and 6econd sideiobas SL, al~ays present in a chirp-Z
.:
transform, can be removed along with the main lobe f2.
Still ~nother variation iB ~hown in FIG. 6. The circuit ~; 10"~include~ an alternate method of obtaining "GATE OFF" time. In .,;.
circuit 10", one of the OUtpUtfi of power ~plitter 16 is amplified by amplifier 24 and then attenuated in an adjustable RF attenuator .. ...
~ 35. The attenuated signal i6 then diode detected by diode 20. A
, :.
~O - 6 -,.~
.::
:; `~`"
. . ~
;' . ~ .
~,: . , , . , .
, 0&7 , ..
pulsP generator 37, ~uch as a Hewlett Packard model B~82 A, :.: normally puts out a fixed bias to gate modulator 22 "ON" while passing signals to the inverse chirp-Z transform device 32.
. ~owever, when a significantly negative signal f2 is received from . diode 20, pul~e generator 37 is triggered to output the required . negative voltage pulse to gate "OFF" modulator 22. In addition, . the pulse generator 37 has an adjustable pul~e duration control so ~ that the modulator 22 can be gated "OFF" for some predetermined ", . time so that the highest si.delobes SL (FIG. 5) are removed. With - strong interfering signals separated by more than the frequen:~.
resolution of the chirp-Z, the circuit 10" of FIG. 6 will readily ~ pass desired signals at significantly lower power level~ in the ~: order of 20 dB. Using the circuit of FIG. 6, a low level signal fl can be gr~ater than 30 dB below st.rong interfering sign21s if a sufficiently wide "GATE OFF" pulse from the generator 37 is employed. Of course, the interfering signals can be either fixed ~
or hopping.
. Var.i.ous other modifications are contemplated and may obviously be resorted to by those ~Xilled in the art withGut departing from ths spirit and scope cf the invention, as hereinafter de~ined by the appended claims, as only preferred embodiments thereof have been di~closed.
,~
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.~ .
, .. . .
Claims (2)
1. A rejection circuit comprising:
an RF input terminal;
transform means for transforming a time domain RF
signal on the RF input terminal into a frequency segregated time domain signal having frequency components separated in time, each said frequency component having a main lobe and two side lobes on either side of said main lobe;
a normally ON gate means for passing said time domain signal to an output; and pulse means for causing strong frequency components in said time domain signal having a magnitude greater than a predetermined level to turn the gate means OFF for a period of time to substantially block the strong frequency components, said period of time being established by a peak detector-sample and hold circuit means and spanning the main and two side lobes.
an RF input terminal;
transform means for transforming a time domain RF
signal on the RF input terminal into a frequency segregated time domain signal having frequency components separated in time, each said frequency component having a main lobe and two side lobes on either side of said main lobe;
a normally ON gate means for passing said time domain signal to an output; and pulse means for causing strong frequency components in said time domain signal having a magnitude greater than a predetermined level to turn the gate means OFF for a period of time to substantially block the strong frequency components, said period of time being established by a peak detector-sample and hold circuit means and spanning the main and two side lobes.
2. The circuit of Claim 1, wherein said pulse means includes a pulse generator means for turning said gate "OFF" for said period of time.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US07/461,943 | 1990-01-08 | ||
| US07/461,943 US4965581A (en) | 1990-01-08 | 1990-01-08 | Real-time rejection circuit to automatically reject multiple interfering hopping signals while passing a lower level desired signal |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CA2030678A1 CA2030678A1 (en) | 1991-07-09 |
| CA2030678C true CA2030678C (en) | 1994-02-01 |
Family
ID=23834550
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002030678A Expired - Fee Related CA2030678C (en) | 1990-01-08 | 1990-11-21 | Real-time rejection circuit to automatically reject multiple interfering hopping signals while passing a lower level desired signal |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US4965581A (en) |
| CA (1) | CA2030678C (en) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5295151A (en) * | 1985-10-22 | 1994-03-15 | The United States Of America As Represented By The Secretary Of The Army | Transition detection circuit for PSK signals using the SAW Chirp-Z algorithm (U) |
| CA1333413C (en) * | 1988-07-13 | 1994-12-06 | Andre Gagnon | Frequency independent strong signal suppressor |
| US5355091A (en) * | 1992-05-21 | 1994-10-11 | The United States Of America As Represented By The Secretary Of The Army | Apparatus for real time interference signal rejection |
| US5257284A (en) * | 1992-11-16 | 1993-10-26 | The United States Of America As Represented By The Secretary Of The Army | Circuit for accurately measuring phase relationship of BPSK signals |
| US5424674A (en) * | 1992-11-18 | 1995-06-13 | The United States Of America As Represented By The Secretary Of The Army | Wide dynamic range detection circuit |
| US5247308A (en) * | 1993-02-24 | 1993-09-21 | The United States Of America As Represented By The Secretary Of The Army | Detection and characterization of LPI signals |
| US5495253A (en) * | 1994-11-17 | 1996-02-27 | The United States Of America As Represented By The Secretary Of The Army | Soliton rejection filter |
| CA2279161C (en) | 1999-07-27 | 2005-10-25 | Jim P.Y. Lee | An lpi digital receiver |
| US6473596B1 (en) * | 1999-12-20 | 2002-10-29 | The United States Of America As Represented By The Secretary Of The Air Force | Close proximity transmitter interference limiting |
| JP4007498B2 (en) * | 2002-11-15 | 2007-11-14 | 三菱電機株式会社 | Automotive radar equipment |
| DE102005034878B4 (en) * | 2004-07-26 | 2011-08-18 | Kyocera Corp. | Selector switch, radio frequency transceiver, radar device, vehicle equipped with the radar device, and small ship |
| US7336220B2 (en) * | 2006-06-01 | 2008-02-26 | M/A-Com, Inc. | Method and apparatus for equalizing broadband chirped signal |
| RU2569331C1 (en) * | 2014-09-18 | 2015-11-20 | Федеральное государственное бюджетное образовательное учреждение высшего профессионального образования "Рязанский государственный радиотехнический университет" | Passive jamming doppler phase measuring device |
| RU2628904C1 (en) * | 2016-10-11 | 2017-08-22 | Федеральное государственное бюджетное образовательное учреждение высшего образования "Рязанский государственный радиотехнический университет" | Computer for improvement of interference |
| RU2680824C1 (en) * | 2017-12-11 | 2019-02-27 | Федеральное государственное бюджетное образовательное учреждение высшего образования "Рязанский государственный радиотехнический университет" | Calculator for interference rejection |
| RU182620U1 (en) * | 2018-01-30 | 2018-08-24 | Федеральное государственное бюджетное образовательное учреждение высшего образования "Рязанский государственный радиотехнический университет" | ADAPTIVE COMPENSATOR OF PASSIVE INTERFERENCE |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3155912A (en) * | 1961-05-01 | 1964-11-03 | Gen Electric | Automatic gating circuit |
| US3495244A (en) * | 1968-10-07 | 1970-02-10 | Hazeltine Research Inc | Interference discriminating apparatus |
| US3588534A (en) * | 1969-05-07 | 1971-06-28 | Collins Radio Co | Peak-slope frequency discriminator |
| US4038539A (en) * | 1976-02-23 | 1977-07-26 | American Electronic Laboratories, Inc. | Adaptive pulse processing means and method |
| US4521917A (en) * | 1983-11-14 | 1985-06-04 | General Electric Company | Noise blanking circuit and method |
-
1990
- 1990-01-08 US US07/461,943 patent/US4965581A/en not_active Expired - Fee Related
- 1990-11-21 CA CA002030678A patent/CA2030678C/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| CA2030678A1 (en) | 1991-07-09 |
| US4965581A (en) | 1990-10-23 |
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| EEER | Examination request | ||
| MKLA | Lapsed |