CA2034361A1 - Polycrystalline cvd diamond substrate for single crystal epitaxial growth of semiconductors - Google Patents

Polycrystalline cvd diamond substrate for single crystal epitaxial growth of semiconductors

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Publication number
CA2034361A1
CA2034361A1 CA002034361A CA2034361A CA2034361A1 CA 2034361 A1 CA2034361 A1 CA 2034361A1 CA 002034361 A CA002034361 A CA 002034361A CA 2034361 A CA2034361 A CA 2034361A CA 2034361 A1 CA2034361 A1 CA 2034361A1
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CA
Canada
Prior art keywords
single crystal
cvd diamond
silicon
sic
polycrystalline cvd
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA002034361A
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French (fr)
Inventor
Thomas R. Anthony
James Fulton Fleischer
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General Electric Co
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General Electric Co
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Filing date
Publication date
Application filed by General Electric Co filed Critical General Electric Co
Publication of CA2034361A1 publication Critical patent/CA2034361A1/en
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H01L21/44—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/38 - H01L21/428
    • H01L21/441—Deposition of conductive or insulating materials for electrodes
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/26—Deposition of carbon only
    • C23C16/27—Diamond only
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/02—Pretreatment of the material to be coated
    • C23C16/0272—Deposition of sub-layers, e.g. to promote the adhesion of the main coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/02447—Silicon carbide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02527—Carbon, e.g. diamond-like carbon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/02546—Arsenides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3732—Diamonds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/135—Removal of substrate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/931—Silicon carbide semiconductor

Abstract

POLYCRYSTALLINE CVD DIAMOND SUBSTRATE FOR SINGLE
CRYSTAL EPITAXIAL GROWTH OF SEMICONDUCTORS

ABSTRACT OF THE DISCLOSURE
The present invention is directed towards the production of a single crystal semiconductor device mounted in intimate contact with a polycrystalline CVD diamond substrate which allows the high heat conductivity of diamond to keep the device cool. This device is made by a method comprising the steps of placing in a reaction chamber, a single crystal of silicon heated to an elevated CVD diamond-forming temperature.
A hydrocarbon/hydrogen gaseous mixture is provided within the chamber and is at least partially decomposed to form a polycrystalline CVD diamond layer on said silicon. During this deposition/growth phase, an intermediate layer of single crystal SiC has been found to form between the single crystal of silicon and the polycrystalline CVD diamond layer. In the next step of the process, the silicon is etched or removed to reveal the single crystal SiC
supported by the polycrystalline CVD diamond layer. Finally, a semiconductor layer (e.g. silicon, SiC, GaAs, or the like) is grown on the exposed single crystal of SiC to produce a single crystal semiconductor polycrystalline CVD diamond mounted device.

Description

~OSDOC-' 69 X~3~36~

POLYCI~YSTALLINE CVD D~ OND SUBSTR~TE I~OR SINCLE
CRYSTAL ~PITA.~IAL CI~OWTII O~ SL.~ICONDUCTORS

Background of the Inventlon The prescnt invention relates to the preparstion of single crystal semiconductor wafers and more particularly to utilizing and producing a polycrystalline CVD diamond substrate thercfor.
Its hardness und thermal propertics are but two of the characteristics 5 that make diamond useful in a variety of industrial components. Initially, natural diamond was used in a variety ot abrasive applications. ~Yith the ability to synthesize diamond by high pressure/high tempcrature (HP/I~T) techniques utilizing a cntalyst/sintering aid under conditions where diamond is the thermally stable carbon phase, n variety of additionsl products found 10 "avor in the marketplacc. I'olycrystallinc diamond compacts, often supported on a tungstcn carbide support in cylindrical or annular form, cxtended the product linc for diamond additionnlly. I~owevcr, the reguirement of high pressure and high temperature has been a limitation in product configuration, for example.
Recently, industrial effort directed toward the growth of diamond at low pressures, where it is mctastable, has incrcased dramstically. Although the ability to produce diamond by low-pressure synthcsis techniques has been known for decades, drawbacks including extremely low growth rates prevented wide commercial flcceptance. Recent developments have led to 20 higher growth rates, thus spurring recent industrial interest in the field.
Additionally, the discovery of an entirely new class of solids, known as "diamond Like" carbons and hydrocarbons, is an outgrowth of such recent work.
Low pressure growth of diamond has been dubbed "chemical vapor 25 deposition" or "CVD" in the field. Two predominant CVD tcchniques have found favor in the literature. One of these techiques involves the use of a dilute mixturc of hydrocarbon gas (typically methane) nnd hydrogen wherein the hydrocarbon content usually is varied from about 0.1?6 to 2.5% of the total volumetric tlow. The gas is introduced via a quartz tube located just 30 aboYe a hot tungsten filament which is electrically heated to a temperature ranging from between about 1750 ~o 24û0C. The gas mixture disassociates nt thc filflmcnt surface and diamonds are condensed onto a ~03~3fi~ 60SDO0469 heated substrate placed just helow the hot tungsten filament. The substrate is held in a resistance heflted boat (oftcn molybdenum) and heated to a temperature in the region of about 500 to 1100C.
The second technique involves the imposition of a plasma discharge to the foregoing filament process. Th~ plasma discharge serves to increase the nucleation density, growth rate, nnd it is believed to enhance formation of diamond films as opposed to discrete diamond partieles. Of the plasma systems that have been utilized in this area, there are three basie systems.
One is a microwave plasma system, the second is an RF (inductively or capacitively coupled) plasma system, and the third is a d.c. plasma system.
The RF and microwsve plasma systems utilize relatively complex and expcnsive cquipment which usually requires complex tuning or matching networks to eleetrically couple electrical energy to the generated plasma.
Additionnlly, the diamond growth rate offered by these two systems can be quite modest.
In the semiconductor arena, doping polycrystalline CVD diamond with boron, aluminum, lithium, phosphorous, or the like to produee an n-type or p-type semiconduetor deviee is known. Representative art in this regard inelude U.S. Pats. Nos. 3,636,077, 3,636,078, 3,636,079, and 4,767,608, and European Patent Publication No. 286,306. EP Patent Publieation 282,0S4 expands on sueh semieonduetor teehnology by eoating a single crystal substrate of silicon or GaAs with an intermediate SiC layer upon which is deposited CVD diamond as a single crystal. This singie crystal diamond ean be doped with boron, phosphorous, or sulfur, ~or example. This publieation reports that direetly growing CVD diamond on a single erystal silicon substrate results in the produetion of polyerystalline CVl) diamond, rather than single erystal diarnond, and henec is a proeess not suitable for semieonduetor produetion.

Broud Statement of the Invention The prescnt invention is direeted towards the produetion of a single erystal semieonduetor deviee mounted in intimate eontaet with a polyerystalUnc CVD diamond substrate whieh allows the high heat conduetivity o~ diamond to keep the deviee eool. This deviee is made by a method eomprising the steps of plaeing in a reaetion ehamber, a single crystal of silieon heated to an elevated CVD diamond-~orming temperature.
A hydroearbon/hydrogen gaseous mixture is provided within the ehamber and , 334~3~1. 60SD00469 is at least partially decomposcd to form a polycrystalline CVD diamond layer on said silicon~ During this dcposition/growth phase, an intermediste layer of single crystal ~iC has bccn found to form between the single crystal of silicon and the polycrystalline CVI~ diamond layer. In the next step of 5 the process, the silicon is etchcd or removed to reveal the single crystal SiC supported by the polycrystalline CVD diamond Inyer. Finally, a semiconductor layer (e.g. silicon, SiC, GaAs, or the like) is grown on the exposed single crystal of SiC to produce a single crystal sem iconductor polycrystalline CVD dinmond mounted device.
Advantages of the present invention include the ability to grow a :;ingle crystal of semiconductor material whieh is in intimate contact with a polycrystalline diamond layer, thus allowing the high heat conductivity of diamond to keep the device eool. Another advantage is the ability to make semiconduetor deviees that have the effeetive thermal conductivity of 15 diamond, but which have the electrieal and processing characteristics of the semiconductor wafer material. These and other advantages will be readily npparent to those skilled in the art bascd upon the disclosure eontained herein.

20 Detailed Deseription of the Invention CVD diamond grows as a polyerystalline film with a grain size typieally ranging from about 50 mierons to sub-micron grain size. I or some applieations, such as the growth of single crystal semiconductor material on diamond substrates, the polyerystalline nature of CVD diamond prevents the 25 growth of semieonduetor single erystals. As stated above, the ability to mount a semieonduetor deviee in intimflte eontaet with diamond allows the high heat eonduetivity of diamond to keep the device eool. For some applieations sueh ns high power CaAs deviees, this heat resistanee of the wafer is the limiting property of the deviee. The problem, then, is to devise 30 a proeedure whereby single erystal semiconductor material can be grown/deposited on polyerystalline CVI) diamond.
Apparently, prior investigators have failed to appreeiate the faet that when CVD diamond is grown direetly on a single erystal of silicon, that a thin transition layer of SiC (about 5-100 atoms thiek) forms between the 35 diamond and the silieon wafer. This transition layer of SiC is a single erystal. Onee this diseovery is made and appreeiated, those skilled in the rt will readily appreeiate the remaining steps of the proeess and its Z03~3Gl 60SDoo469 flexibility in perrnitting shlr-le crystal semiconductor wafers to be mounted/grown directly on polycrystalline CVD diamond substrates.
With respect to conventionul CVD processes useful in the present invcntion, hydrocnrbon/Ilydrogen gaseous mi.Ytures arc fed into a CVD
5 reactor as an initial step. ~Iydrocarbon sources can include the methane series gases, e.g. methane, eth~ne, propane; unsaturated hydrocarbons, e.g.
ethylene, acetylene, cyclohcxene, and benzene; and the like. Methane, however, is preferred. TIle molar ratio of Ilydrocarbon to hydrogen broadly ranges from about 1:10 to about 1:1,000 with about l:l00 being preferred.
10 This g~seous mixture optionally may be diluted with an inert gas, e.g. argon.The gaseous mi~ture is at least partially dccomposed thermally by one of several techniqucs Icnown in the art. Onc of thesc techniques involves the use of a hot filamcnt which normally is formed of tungsten, molybdenum, tantalum, or alloys thereof. U.S. Pat. No. 4,707,384 illustrates this process.
The gaseous mixture partial decomposition also can be conducted with the assistance of d.c. discharge or radio frequency electromagnetic radiation to gencratc a plasma, .such as prosposcd in U.S. Pats. Nos.
4,749,587, 4,767,608, and 4,830,702; and U.S. Pat. No. 4,434,188 with respect to use of microwaves. The substrate may be bombarded with electrons during the CVD deposition process in accordance with U.S. Pat.
No. 4,740,263.
Regardless of the particular method used in generating the partially decomposed gaseous mixture, the substrate is maintained at an elevated CVD diamond-forming temperature which typically ranges from about 500 to 1100C and preferably in the range of about 850 to 950C where diamond growth is at its highest rate in order to minimize grain size.
Pressures in the range of from about 0.01 to 1000 Torr, advantageously about 100-800 Torr, are taught in the art, with reduced pressure being preferred. Details on CVD proccsses additionally can be reviewed by reference to Angus, et al., "Low-Pressurc, Metastable Crowth of Diamond and 'Diamondlike' Phnses", Science, vol. 241, pages 913-921 (August 19, 1988); and Bachmann, et al., "Diamond Thin Films", Chemical and EngineerinF News, pp. 24-39 (May 15, 1989).
The thickness of the polycrystalline CVD layer grown/deposited on the silicon wafer preferably should be self-supporting and of sufficient thickness that it meets the heat conductivity requirements of the ultimate semi-conductor device. In this regard, it will be appreciated that useful CVD

203~361. 60SDo0469 diamond layer thicl;nesses oftcn will rangc frorn about 10 to 1,000 micromcters witll about 100 to 300 rnicrometers being typical. Once thc desired thickness of thc CVD dhlmond luyer has been reachcd, the CVD
process is terminnted.
The next step of the process involves the selcctive removal of silicon from the silicon-SiC-diamond laminate structure that has been formed.
Care must be exercised that silicon is etched or removed, but not the single crystal SiC intermediate layer. Etch solutions suitsble for this purpose include, for example:
Ternary mixtures of 11~ NO2 and 112O (1:3:1 molar ratio), 10 micron/min etch rate, Binary mixtures of IIF and ~INO3 (1:3 molar ratio), 20 microns/min etch rate, Ternary mixture of I~F, HNO3 and CH3COOH (3:5:3 molar ratio), 25 micron/min etch rate.
Now, with the single crystal layer of SiC revcaled, albeit only angstroms in thickness, a conventional semiconductor material now can be grown/deposited on this layer for producing single crystal epitaxial semiconductor growth. Silicon, SiC, GaAs, and the like can be epitaxially grown on the thin single crystal of SiC to produce a single crystal active layer of the semiconductor material which now is in intimate contact with the diamond layer, allowing the high heat conductivity of diamond to keep the device cool. The growth of such semi-conductor msterials is well known in the art and little more concerning this step of the process need be detailed here, e.g. see J.L. Vossen and W. Kern, Thin Film Processes, Handbook of Thin Film Technolo~y, edited by L.l. Massel and R. Glang, McGraw-Hill Book Company, New York, New York (1970). All references herein are expressly incorporated herein by reference.

Claims (10)

1. A method for forming n single crystal semiconductor device which comprises the steps of:
(a) placing in a reaction chamber a single crystal of silicon heated to an elevated CVD diamond-forming temperature;
(b) providing a hydrocarbon/hydrogen gaseous mixture within said chamber;
(c) at least partially decomposing said gaseous mixture in said chamber to form a polycrystalline CVD diamond layer in said silicon, an intermediate layer of single crystal SiC forming therebetween;
(d) removing said silicon to reveal said single crystal SiC
supported by said polycrystalline CVD diamond; and (e) growing a semiconductor layer on said single crystal SiC to produce a single crystal semiconductor polycrystalline CVD diamond device.
2. The method of claim I wherein the molar ratio of hydrocarbon to hydrogen in said gaseous mixture ranges from between about 1:10 and 1:1,000.
3. The method of claim 2 wherein said gaseous mixture additionally comprises an inert gas.
4. The method of claim 1 wherein said pressure ranges from between about 0.01 and 1,000 Torr.
5. The method of claim 1 wherein said single crystal of silicon is heated to an elevated CVD diamond-forming temperature ranging from between about 500° and 1100° C.
6. The method of claim 1 wherein said hydrocarbon of said gaseous mixture comprises methane.
7. The method of claim 1 wherein said silicon is removed by
8. The method of claim 1 wherein the thickness of said polycrystalline CVD diamond layer ranges from between about 10 to 1,000 micrometers.
9. The method of claim 1 wherein said semiconductor layer grown on said single crystal of SiC is selected from the group consisting of silicon, SiC, and CaAs.
10. The invention as defined in any of the preceding claims including any further features of novelty disclosed.
CA002034361A 1990-02-13 1991-01-17 Polycrystalline cvd diamond substrate for single crystal epitaxial growth of semiconductors Abandoned CA2034361A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US479,486 1990-02-13
US07/479,486 US4981818A (en) 1990-02-13 1990-02-13 Polycrystalline CVD diamond substrate for single crystal epitaxial growth of semiconductors

Publications (1)

Publication Number Publication Date
CA2034361A1 true CA2034361A1 (en) 1991-08-14

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US (1) US4981818A (en)
EP (1) EP0442304B1 (en)
JP (1) JPH05109625A (en)
KR (1) KR910016056A (en)
AT (1) ATE115334T1 (en)
CA (1) CA2034361A1 (en)
DE (1) DE69105537D1 (en)
IE (1) IE910010A1 (en)
ZA (1) ZA91697B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11692264B2 (en) * 2014-06-25 2023-07-04 Sumitomo Electric Industries, Ltd. Method of manufacturing diamond substrate, diamond substrate, and diamond composite substrate

Families Citing this family (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5131963A (en) * 1987-11-16 1992-07-21 Crystallume Silicon on insulator semiconductor composition containing thin synthetic diamone films
JPH06103757B2 (en) * 1989-06-22 1994-12-14 株式会社半導体エネルギー研究所 Diamond electronic device
JP2775903B2 (en) * 1989-10-04 1998-07-16 住友電気工業株式会社 Diamond semiconductor element
JPH03163820A (en) * 1989-11-22 1991-07-15 Tokai Univ Manufacture of diamond n-type semiconductor and diamond pn junction diode
US4981818A (en) * 1990-02-13 1991-01-01 General Electric Company Polycrystalline CVD diamond substrate for single crystal epitaxial growth of semiconductors
GB9021689D0 (en) * 1990-10-05 1990-11-21 De Beers Ind Diamond Diamond neutron detector
CA2049673A1 (en) * 1990-11-26 1992-05-27 James F. Fleischer Cvd diamond by alternating chemical reactions
JP3028660B2 (en) * 1991-10-21 2000-04-04 住友電気工業株式会社 Manufacturing method of diamond heat sink
FR2678647A1 (en) * 1991-07-05 1993-01-08 Centre Nat Rech Scient PROCESS FOR PRODUCING A MESH GRADIENT CRYSTAL.
US5313094A (en) * 1992-01-28 1994-05-17 International Business Machines Corportion Thermal dissipation of integrated circuits using diamond paths
US5276338A (en) * 1992-05-15 1994-01-04 International Business Machines Corporation Bonded wafer structure having a buried insulation layer
US5236545A (en) * 1992-10-05 1993-08-17 The Board Of Governors Of Wayne State University Method for heteroepitaxial diamond film development
US5272104A (en) * 1993-03-11 1993-12-21 Harris Corporation Bonded wafer process incorporating diamond insulator
US5376579A (en) * 1993-07-02 1994-12-27 The United States Of America As Represented By The Secretary Of The Air Force Schemes to form silicon-on-diamond structure
US5354717A (en) * 1993-07-29 1994-10-11 Motorola, Inc. Method for making a substrate structure with improved heat dissipation
JP3023056B2 (en) * 1994-09-28 2000-03-21 東洋鋼鈑株式会社 Manufacturing method of diamond coated brazing products
US5455432A (en) * 1994-10-11 1995-10-03 Kobe Steel Usa Diamond semiconductor device with carbide interlayer
US7132309B2 (en) * 2003-04-22 2006-11-07 Chien-Min Sung Semiconductor-on-diamond devices and methods of forming
US7011134B2 (en) * 2000-10-13 2006-03-14 Chien-Min Sung Casting method for producing surface acoustic wave devices
US6814130B2 (en) 2000-10-13 2004-11-09 Chien-Min Sung Methods of making diamond tools using reverse casting of chemical vapor deposition
US7012011B2 (en) * 2004-06-24 2006-03-14 Intel Corporation Wafer-level diamond spreader
US7394103B2 (en) * 2004-09-13 2008-07-01 Uchicago Argonne, Llc All diamond self-aligned thin film transistor
US7675079B1 (en) 2004-10-28 2010-03-09 Kley Victor B Diamond coating of silicon-carbide LEDs
US20060202209A1 (en) * 2005-03-09 2006-09-14 Kelman Maxim B Limiting net curvature in a wafer
EP2400531A3 (en) * 2005-06-20 2012-03-28 Nippon Telegraph And Telephone Corporation Diamond semiconductor element and process for producing the same
JP4797571B2 (en) * 2005-10-26 2011-10-19 トヨタ自動車株式会社 Method for manufacturing silicon carbide semiconductor material
US8157914B1 (en) 2007-02-07 2012-04-17 Chien-Min Sung Substrate surface modifications for compositional gradation of crystalline materials and associated products
US8309967B2 (en) 2007-05-31 2012-11-13 Chien-Min Sung Diamond LED devices and associated methods
US7781256B2 (en) * 2007-05-31 2010-08-24 Chien-Min Sung Semiconductor-on-diamond devices and associated methods
US7799599B1 (en) * 2007-05-31 2010-09-21 Chien-Min Sung Single crystal silicon carbide layers on diamond and associated methods
US7799600B2 (en) * 2007-05-31 2010-09-21 Chien-Min Sung Doped diamond LED devices and associated methods
US7846767B1 (en) 2007-09-06 2010-12-07 Chien-Min Sung Semiconductor-on-diamond devices and associated methods
GB201010705D0 (en) * 2010-06-25 2010-08-11 Element Six Ltd Substrates for semiconductor devices
GB201121659D0 (en) 2011-12-16 2012-01-25 Element Six Ltd Substrates for semiconductor devices
GB201121655D0 (en) 2011-12-16 2012-01-25 Element Six Ltd Substrates for semiconductor devices
GB201222352D0 (en) * 2012-12-12 2013-01-23 Element Six Ltd Substrates for semiconductor devices
GB2510468B (en) 2012-12-18 2016-06-08 Element Six Ltd Substrates for semiconductor devices
US9469918B2 (en) * 2014-01-24 2016-10-18 Ii-Vi Incorporated Substrate including a diamond layer and a composite layer of diamond and silicon carbide, and, optionally, silicon
US10584412B2 (en) 2016-03-08 2020-03-10 Ii-Vi Delaware, Inc. Substrate comprising a layer of silicon and a layer of diamond having an optically finished (or a dense) silicon-diamond interface
JP6763347B2 (en) * 2017-06-07 2020-09-30 株式会社Sumco Nitride semiconductor substrate manufacturing method and nitride semiconductor substrate

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61251158A (en) * 1985-04-30 1986-11-08 Sumitomo Electric Ind Ltd Radiating substrate
JPH0754834B2 (en) * 1986-03-26 1995-06-07 新技術事業団 Method for manufacturing diamond film semiconductor substrate
US5131963A (en) * 1987-11-16 1992-07-21 Crystallume Silicon on insulator semiconductor composition containing thin synthetic diamone films
US4981818A (en) * 1990-02-13 1991-01-01 General Electric Company Polycrystalline CVD diamond substrate for single crystal epitaxial growth of semiconductors

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11692264B2 (en) * 2014-06-25 2023-07-04 Sumitomo Electric Industries, Ltd. Method of manufacturing diamond substrate, diamond substrate, and diamond composite substrate

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EP0442304B1 (en) 1994-12-07
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EP0442304A3 (en) 1991-10-16
DE69105537D1 (en) 1995-01-19
EP0442304A2 (en) 1991-08-21
US4981818A (en) 1991-01-01
ZA91697B (en) 1991-12-24
JPH05109625A (en) 1993-04-30
ATE115334T1 (en) 1994-12-15

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