CA2049366A1 - Atm switch and control method thereof - Google Patents
Atm switch and control method thereofInfo
- Publication number
- CA2049366A1 CA2049366A1 CA2049366A CA2049366A CA2049366A1 CA 2049366 A1 CA2049366 A1 CA 2049366A1 CA 2049366 A CA2049366 A CA 2049366A CA 2049366 A CA2049366 A CA 2049366A CA 2049366 A1 CA2049366 A1 CA 2049366A1
- Authority
- CA
- Canada
- Prior art keywords
- partial cells
- partial
- ecc
- cell
- circuits
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0078—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
- H04L1/0085—Formatting with cells
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/15—Interconnection of switching modules
- H04L49/1515—Non-blocking multistage, e.g. Clos
- H04L49/153—ATM switching fabrics having parallel switch planes
- H04L49/1538—Cell slicing
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/15—Interconnection of switching modules
- H04L49/1553—Interconnection of ATM switching modules, e.g. ATM switching fabrics
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/25—Routing or path finding in a switch fabric
- H04L49/253—Routing or path finding in a switch fabric using establishment or release of connections between ports
- H04L49/255—Control mechanisms for ATM switching fabrics
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/30—Peripheral units, e.g. input or output ports
- H04L49/3081—ATM peripheral units, e.g. policing, insertion or extraction
- H04L49/309—Header conversion, routing tables or routing tags
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5625—Operations, administration and maintenance [OAM]
- H04L2012/5627—Fault tolerance and recovery
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5638—Services, e.g. multimedia, GOS, QOS
- H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
- H04L2012/5652—Cell construction, e.g. including header, packetisation, depacketisation, assembly, reassembly
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
- H04L2012/5681—Buffer or queue management
Abstract
An ATN switch including ECC encoder circuits each for generating, for an ATM cell as an information symbol, an ECC check symbol and for adding the ECC check symbol thereto, cell partitioning circuits each for subdividing an information field of an ATM cell into N
partial cells, for subdividing a check symbol field into M partial cells, and for assigning an identical routing tag to the obtained partial cells (N + M) partial cell switches for respectively routing the (N + M) partial cells in an independent fashion based on the routing tag, and ECC decoder circuits for receiving the (N + M) partial cells thus routed and for achieving an error correction on the received partial cells.
partial cells, for subdividing a check symbol field into M partial cells, and for assigning an identical routing tag to the obtained partial cells (N + M) partial cell switches for respectively routing the (N + M) partial cells in an independent fashion based on the routing tag, and ECC decoder circuits for receiving the (N + M) partial cells thus routed and for achieving an error correction on the received partial cells.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP02-215703 | 1990-08-17 | ||
JP21570390A JP2993715B2 (en) | 1990-08-17 | 1990-08-17 | ATM switch and control method thereof |
Publications (2)
Publication Number | Publication Date |
---|---|
CA2049366A1 true CA2049366A1 (en) | 1992-02-18 |
CA2049366C CA2049366C (en) | 1998-12-08 |
Family
ID=16676764
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA002049366A Expired - Fee Related CA2049366C (en) | 1990-08-17 | 1991-08-16 | Atm switch and control method thereof |
Country Status (5)
Country | Link |
---|---|
US (4) | US5557621A (en) |
EP (1) | EP0471380B1 (en) |
JP (1) | JP2993715B2 (en) |
CA (1) | CA2049366C (en) |
DE (1) | DE69120166T2 (en) |
Families Citing this family (39)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1993001669A1 (en) * | 1991-07-01 | 1993-01-21 | Australian And Overseas Telecommunications Corporation Limited | High speed switching architecture |
AU655308B2 (en) * | 1991-07-01 | 1994-12-15 | Telstra Corporation Limited | High speed switching architecture |
EP0584398B1 (en) * | 1992-08-28 | 1998-01-07 | Siemens Aktiengesellschaft | Method and circuit for transmitting information cells within an ATM network |
US5412646A (en) * | 1994-05-13 | 1995-05-02 | At&T Corp. | Asynchronous transfer mode switch architecture |
KR0126848B1 (en) * | 1994-12-16 | 1998-04-01 | 양승택 | A fixed length picket switching apparatus using multiplacer demultiplexer |
US5648969A (en) * | 1995-02-13 | 1997-07-15 | Netro Corporation | Reliable ATM microwave link and network |
US5710756A (en) * | 1995-02-13 | 1998-01-20 | Netro Corporation | Burst-error resistant ATM microwave link and network |
JP3168908B2 (en) * | 1996-04-11 | 2001-05-21 | 日本電気株式会社 | Method of exchanging information of payload portion of ATM cell |
US5802052A (en) * | 1996-06-26 | 1998-09-01 | Level One Communication, Inc. | Scalable high performance switch element for a shared memory packet or ATM cell switch fabric |
US5936949A (en) * | 1996-09-05 | 1999-08-10 | Netro Corporation | Wireless ATM metropolitan area network |
US6243844B1 (en) * | 1997-01-17 | 2001-06-05 | Ascom Tech Ag | Signal transmitter used in the transmission of data in a communication system |
JPH10285173A (en) * | 1997-04-08 | 1998-10-23 | Hitachi Ltd | Atm cell processor |
KR100216371B1 (en) | 1997-06-30 | 1999-08-16 | 윤종용 | Large scale atm switch with fault tolerant scheme and self routing method in 2nxn multiplexing switches |
EP1002272B1 (en) * | 1997-07-15 | 2008-09-10 | Viasat, Inc. | Method and apparatus for adaptive control of forward error correction codes |
US6813259B1 (en) | 1997-07-15 | 2004-11-02 | Viasat, Inc. | Method and apparatus for minimizing delay variance via time divided transmissions |
JPH1155283A (en) * | 1997-08-06 | 1999-02-26 | Fujitsu Ltd | Atm switchboard |
JPH11154954A (en) | 1997-11-20 | 1999-06-08 | Hitachi Ltd | Atm switch |
US6628641B1 (en) | 1997-12-24 | 2003-09-30 | Nortel Networks Limited | Header error detection for wireless data cells |
US6693904B1 (en) * | 1998-04-09 | 2004-02-17 | Lucent Technologies Inc. | Trace format for a sliced switch fabric |
EP0982970B1 (en) | 1998-08-21 | 2006-10-04 | Nippon Telegraph and Telephone Corporation | ATM switch |
US6272584B1 (en) * | 1998-09-10 | 2001-08-07 | Compaq Computer Corporation | System board with consolidated EEPROM module |
EP1032242A3 (en) * | 1999-02-26 | 2003-09-10 | Hitachi, Ltd. | Switching method, switching equipment and switching network |
JP2000253072A (en) | 1999-03-03 | 2000-09-14 | Hitachi Ltd | Exchange system and method for controlling exchange |
EP1049351B1 (en) | 1999-04-26 | 2006-03-29 | Hitachi, Ltd. | Diversity handover processing apparatus and network control system using this apparatus |
US6906999B1 (en) * | 2000-06-30 | 2005-06-14 | Marconi Intellectual Property (Ringfence), Inc. | Receiver decoding algorithm to allow hitless N+1 redundancy in a switch |
US7082127B1 (en) * | 2000-07-28 | 2006-07-25 | Marconi Intellectual Property (Ringfence), Inc. | Synchronous dynamic register updating across a distributed system |
US7106692B1 (en) * | 2000-10-04 | 2006-09-12 | Ericsson Ab | APS/port mirroring |
US7046681B2 (en) * | 2000-11-29 | 2006-05-16 | Raza Microelectronics, Inc. | Network switch for routing network traffic |
US7072345B2 (en) | 2000-11-29 | 2006-07-04 | Raza Microelectronics, Inc | Programmable integrated circuit for use in a network switch |
AU2002219908A1 (en) * | 2000-11-29 | 2002-06-11 | Sisilk Networks, Inc. | Network switch with a parallel shared memory and method of operation |
US7420969B2 (en) * | 2000-11-29 | 2008-09-02 | Rmi Corporation | Network switch with a parallel shared memory |
CN1297116C (en) * | 2002-04-30 | 2007-01-24 | 国际商业机器公司 | Method and arrangement for local synchronization in master-slave distributed communication systems |
ITMI20031309A1 (en) * | 2003-06-26 | 2004-12-27 | Marconi Comm Spa | SWITCHING NETWORK. |
US20070005248A1 (en) * | 2005-06-29 | 2007-01-04 | Intel Corporation | Data reconstruction in link-based interconnects |
US8126616B2 (en) * | 2005-09-30 | 2012-02-28 | Innovative Biomechanical Solutions, Llc | Vehicle seating system and method |
US7900116B2 (en) * | 2006-08-07 | 2011-03-01 | Broadcom Corporation | Switch with error checking and correcting |
JP5056947B2 (en) * | 2008-06-04 | 2012-10-24 | 富士通株式会社 | Information processing apparatus, data transmission apparatus, and data transfer method for data transmission apparatus |
JP5707830B2 (en) | 2009-10-19 | 2015-04-30 | 株式会社リコー | Image processing method and image processing apparatus |
US8239737B2 (en) * | 2009-12-10 | 2012-08-07 | Intel Corporation | Data line storage and transmission utilizing both error correcting code and synchronization information |
Family Cites Families (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2533091A1 (en) * | 1982-09-13 | 1984-03-16 | Cii Honeywell Bull | SYSTEM FOR DETECTING AND CORRECTING TRANSMISSION ERRORS OF A BINARY MESSAGE USING A CYCLIC CODE DETECTOR AND CORRECTING ERRORS OF THE REED-SOLOMON TYPE BETWEEN |
BE1000396A7 (en) * | 1987-03-18 | 1988-11-22 | Electronique Et Telecomm Bell | Switching system. |
DE3742941A1 (en) * | 1987-12-18 | 1989-07-06 | Standard Elektrik Lorenz Ag | PACKAGE BROKERS |
US5233603A (en) * | 1988-04-21 | 1993-08-03 | Nec Corporation | Packet switch suitable for integrated circuit implementation |
JP2596087B2 (en) * | 1988-08-31 | 1997-04-02 | 日本電気株式会社 | Packet switching method |
FR2635242B1 (en) * | 1988-08-05 | 1990-10-05 | Lmt Radio Professionelle | ASYNCHRONOUS TRANSMISSION METHOD AND DEVICE USING MICROCELLS |
DE3885754D1 (en) * | 1988-09-23 | 1993-12-23 | Siemens Ag | Method and circuit arrangement for transmitting message signals in a broadband communication network. |
JP2860661B2 (en) * | 1989-03-14 | 1999-02-24 | 国際電信電話 株式会社 | ATM switch |
JPH0738639B2 (en) * | 1989-03-14 | 1995-04-26 | アルカテル・エヌ・ブイ | Telecommunication switching system |
JP3053094B2 (en) * | 1989-03-27 | 2000-06-19 | 株式会社日立製作所 | Statistical multiplexing method for digital signals. |
JP2892689B2 (en) * | 1989-07-05 | 1999-05-17 | 株式会社日立製作所 | Packet communication network and packet switch |
ATE149069T1 (en) * | 1989-09-29 | 1997-03-15 | Siemens Ag | CIRCUIT ARRANGEMENT FOR DETERMINING THE QUANTITY OF MESSAGE SIGNALS SUPPLIED TO AN ATM SWITCHING SYSTEM DURING VIRTUAL CONNECTIONS AND FOR CHECKING COMPLIANCE WITH DEFINED BITRATES |
JPH03207197A (en) * | 1990-01-09 | 1991-09-10 | Fujitsu Ltd | Digital cross-connecting device |
ES2093649T3 (en) * | 1990-02-06 | 1997-01-01 | Alcatel Italia | SYSTEM, PACKAGE STRUCTURE AND DEVICE TO PROCESS THE INFORMATION PROVIDED BY A SIGNAL ENCODER. |
DE4008078A1 (en) * | 1990-03-14 | 1991-09-19 | Standard Elektrik Lorenz Ag | COPYABLE ATM SWITCH |
US5136584A (en) * | 1990-07-11 | 1992-08-04 | At&T Bell Laboratories | Hardware interface to a high-speed multiplexed link |
EP0810806A3 (en) * | 1990-07-26 | 2001-04-11 | Nec Corporation | Method of transmitting a plurality of asynchronous cells |
JP2677703B2 (en) * | 1990-08-20 | 1997-11-17 | 富士通株式会社 | MSSR speech path switch stage number setting method |
US5166926A (en) * | 1990-12-18 | 1992-11-24 | Bell Communications Research, Inc. | Packet address look-ahead technique for use in implementing a high speed packet switch |
CA2059396C (en) * | 1991-01-16 | 1996-10-22 | Hiroshi Yamashita | Compact device for checking a header error in asynchronous transfer mode cells |
-
1990
- 1990-08-17 JP JP21570390A patent/JP2993715B2/en not_active Expired - Fee Related
-
1991
- 1991-08-16 EP EP91113792A patent/EP0471380B1/en not_active Expired - Lifetime
- 1991-08-16 CA CA002049366A patent/CA2049366C/en not_active Expired - Fee Related
- 1991-08-16 DE DE69120166T patent/DE69120166T2/en not_active Expired - Fee Related
- 1991-08-19 US US07/747,143 patent/US5557621A/en not_active Expired - Fee Related
-
1996
- 1996-02-29 US US08/609,995 patent/US5818853A/en not_active Expired - Fee Related
-
1998
- 1998-06-01 US US09/087,899 patent/US5983386A/en not_active Expired - Fee Related
-
1999
- 1999-07-12 US US09/351,126 patent/US6067654A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
DE69120166T2 (en) | 1997-01-23 |
US5983386A (en) | 1999-11-09 |
US5818853A (en) | 1998-10-06 |
JP2993715B2 (en) | 1999-12-27 |
CA2049366C (en) | 1998-12-08 |
EP0471380A1 (en) | 1992-02-19 |
US5557621A (en) | 1996-09-17 |
JPH0498937A (en) | 1992-03-31 |
DE69120166D1 (en) | 1996-07-18 |
US6067654A (en) | 2000-05-23 |
EP0471380B1 (en) | 1996-06-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EEER | Examination request | ||
MKLA | Lapsed |