CA2050901A1 - Frequency synthesizer with an interface controller and buffer memory - Google Patents
Frequency synthesizer with an interface controller and buffer memoryInfo
- Publication number
- CA2050901A1 CA2050901A1 CA2050901A CA2050901A CA2050901A1 CA 2050901 A1 CA2050901 A1 CA 2050901A1 CA 2050901 A CA2050901 A CA 2050901A CA 2050901 A CA2050901 A CA 2050901A CA 2050901 A1 CA2050901 A1 CA 2050901A1
- Authority
- CA
- Canada
- Prior art keywords
- buffer memory
- loop circuit
- phase lock
- lock loop
- frequency synthesizer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03J—TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
- H03J5/00—Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner
- H03J5/02—Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner with variable tuning element having a number of predetermined settings and adjustable to a desired one of these settings
- H03J5/0245—Discontinuous tuning using an electrical variable impedance element, e.g. a voltage variable reactive diode, in which no corresponding analogue value either exists or is preset, i.e. the tuning information is only available in a digital form
- H03J5/0272—Discontinuous tuning using an electrical variable impedance element, e.g. a voltage variable reactive diode, in which no corresponding analogue value either exists or is preset, i.e. the tuning information is only available in a digital form the digital values being used to preset a counter or a frequency divider in a phase locked loop, e.g. frequency synthesizer
- H03J5/0281—Discontinuous tuning using an electrical variable impedance element, e.g. a voltage variable reactive diode, in which no corresponding analogue value either exists or is preset, i.e. the tuning information is only available in a digital form the digital values being used to preset a counter or a frequency divider in a phase locked loop, e.g. frequency synthesizer the digital values being held in an auxiliary non erasable memory
Abstract
A frequency synthesizer (fig. 1), which has at least one programmably characterized phase lock loop circuit (10,14) in-cludes a buffer memory (40,fig.4) and an interface controller (38,fig.2) responsive to operational codes received from a central controller (12) to direct transfer of data words (50,52) for characterization of the phase lock loop circuit among the at least one phase lock loop circuit, the buffer memory, and the central controller. In one embodiment, the transfer of data words between the central controller and phase lock loop circuit or buffer memory are performed serially in accordance with a prespecified protocol and governed by a clock signal generated by the central controller. Data word transfers between the buffer memory and at least one phase lock loop circuit may also be performed serially in accordance with a prespecified protocol, but may be governed auto-nomously by an internal clock signal generated by the frequency synthesizer.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/372,997 US4901036A (en) | 1989-06-29 | 1989-06-29 | Frequency synthesizer with an interface controller and buffer memory |
US372,997 | 1989-06-29 |
Publications (2)
Publication Number | Publication Date |
---|---|
CA2050901A1 true CA2050901A1 (en) | 1990-12-30 |
CA2050901C CA2050901C (en) | 1995-03-21 |
Family
ID=23470498
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA002050901A Expired - Fee Related CA2050901C (en) | 1989-06-29 | 1990-05-18 | Frequency synthesizer with an interface controller and buffer memory |
Country Status (10)
Country | Link |
---|---|
US (1) | US4901036A (en) |
EP (1) | EP0479932B1 (en) |
JP (1) | JPH04506592A (en) |
KR (1) | KR950010143B1 (en) |
CN (1) | CN1013628B (en) |
AT (1) | ATE141452T1 (en) |
CA (1) | CA2050901C (en) |
DE (1) | DE69028113T2 (en) |
HK (1) | HK1004583A1 (en) |
WO (1) | WO1991000651A1 (en) |
Families Citing this family (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5163161A (en) * | 1989-11-07 | 1992-11-10 | Crum Development Corp. | Fast scanning radio receiver with frequency data base management by remote processor |
US6324120B2 (en) | 1990-04-18 | 2001-11-27 | Rambus Inc. | Memory device having a variable data output length |
US6751696B2 (en) | 1990-04-18 | 2004-06-15 | Rambus Inc. | Memory device having a programmable register |
IL96808A (en) | 1990-04-18 | 1996-03-31 | Rambus Inc | Integrated circuit i/o using a high performance bus interface |
US5257409A (en) * | 1991-10-18 | 1993-10-26 | Motorola, Inc. | Frequency synthesizer with programming feedback |
WO1993025954A2 (en) * | 1992-06-11 | 1993-12-23 | Sierra Semiconductor Corporation | A universal programming interface for clock generators |
US5289141A (en) * | 1992-10-13 | 1994-02-22 | Motorola, Inc. | Method and apparatus for digital modulation using concurrent pulse addition and subtraction |
US20020091850A1 (en) | 1992-10-23 | 2002-07-11 | Cybex Corporation | System and method for remote monitoring and operation of personal computers |
US5487181A (en) * | 1992-10-28 | 1996-01-23 | Ericsson Ge Mobile Communications Inc. | Low power architecture for portable and mobile two-way radios |
US5436599A (en) * | 1993-04-23 | 1995-07-25 | Motorola, Inc. | Method and apparatus for digital modulation using pulse addition |
EP0629933A1 (en) * | 1993-06-15 | 1994-12-21 | International Business Machines Corporation | An auto-sequenced state machine |
DE4498746T1 (en) * | 1993-11-09 | 1997-07-31 | Motorola Inc | Device and method for releasing elements of a phase-locked loop |
US5432521A (en) * | 1994-01-14 | 1995-07-11 | Motorola, Inc. | Satellite receiver system having doppler frequency shift tracking |
US5551071A (en) * | 1994-02-15 | 1996-08-27 | Uniden Corp. | Channel sorting scanning receiver |
US5483684A (en) * | 1994-03-03 | 1996-01-09 | Uniden America Corporation | Automatic frequency search and storage method |
US5465402A (en) * | 1994-03-23 | 1995-11-07 | Uniden America Corp. | Automatic frequency transfer and storage method |
US5485129A (en) * | 1995-01-20 | 1996-01-16 | Motorola, Inc. | Method and apparatus for digital modulation using pulse deletion |
US5721842A (en) * | 1995-08-25 | 1998-02-24 | Apex Pc Solutions, Inc. | Interconnection system for viewing and controlling remotely connected computers with on-screen video overlay for controlling of the interconnection switch |
US5630222A (en) * | 1995-12-04 | 1997-05-13 | Motorola Inc. | Method and apparatus for generating multiple signals at multiple frequencies |
JPH09294088A (en) * | 1996-04-26 | 1997-11-11 | Toshiba Corp | Tuner circuit |
US6209071B1 (en) | 1996-05-07 | 2001-03-27 | Rambus Inc. | Asynchronous request/synchronous data dynamic random access memory |
GB2336731A (en) | 1998-04-22 | 1999-10-27 | Thomson Multimedia Sa | A video tuner in which data representing a PLL division is used to control other circuit parameters |
JP4146089B2 (en) * | 1998-09-22 | 2008-09-03 | アボセント ハンツヴィル コーポレーション | System for remote access to personal computers |
US6704556B1 (en) | 2000-09-25 | 2004-03-09 | Motorola Inc. | Communication device utilizing channel based oscillator aging compensation and method therefor |
US6806729B2 (en) * | 2001-01-19 | 2004-10-19 | Dell Products L.P. | Ground bounce detection circuit for use in data error reduction |
US9606795B1 (en) * | 2005-05-05 | 2017-03-28 | Alcatel-Lucent Usa Inc. | Providing intelligent components access to an external interface |
WO2007099875A1 (en) * | 2006-02-24 | 2007-09-07 | Nihon Dempa Kogyo Co., Ltd. | Pll circuit |
TWI404340B (en) * | 2009-11-23 | 2013-08-01 | Mstar Semiconductor Inc | Offset phase-locked loop transmitter and method thereof |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5637779A (en) * | 1979-09-05 | 1981-04-11 | Sony Corp | Television picture receiver |
EP0033390A1 (en) * | 1979-12-27 | 1981-08-12 | DEBEG GmbH | Scanning radio receiver and transmitter |
US4280140A (en) * | 1980-02-19 | 1981-07-21 | Zenith Radio Corporation | Microcomputer-controlled one-step-back automatic frequency control tuning system |
US4476580A (en) * | 1980-06-17 | 1984-10-09 | Sanyo Electric Co., Ltd. | Automatic continuous tuning control apparatus for a receiver |
JPS5732123A (en) * | 1980-08-05 | 1982-02-20 | Toshiba Corp | Channel selector |
US4516170A (en) * | 1982-04-12 | 1985-05-07 | Zenith Electronics Corporation | Dual mode UHF tuning system |
JPS59218049A (en) * | 1983-07-27 | 1984-12-08 | Nec Corp | Channel selecting device |
JPS6093826A (en) * | 1983-10-27 | 1985-05-25 | Toshiba Corp | Data correcting device of variable frequency generator |
JPS60220627A (en) * | 1984-04-17 | 1985-11-05 | Matsushita Electric Ind Co Ltd | Phase locked loop |
JPH0659018B2 (en) * | 1985-07-25 | 1994-08-03 | ソニー株式会社 | PLL control device |
JP2747583B2 (en) * | 1987-06-04 | 1998-05-06 | セイコーエプソン株式会社 | Liquid crystal panel drive circuit and liquid crystal device |
-
1989
- 1989-06-29 US US07/372,997 patent/US4901036A/en not_active Expired - Lifetime
-
1990
- 1990-05-18 EP EP90917819A patent/EP0479932B1/en not_active Expired - Lifetime
- 1990-05-18 DE DE69028113T patent/DE69028113T2/en not_active Expired - Fee Related
- 1990-05-18 CA CA002050901A patent/CA2050901C/en not_active Expired - Fee Related
- 1990-05-18 AT AT90917819T patent/ATE141452T1/en not_active IP Right Cessation
- 1990-05-18 JP JP2509504A patent/JPH04506592A/en active Pending
- 1990-05-18 KR KR1019910701964A patent/KR950010143B1/en not_active IP Right Cessation
- 1990-05-18 WO PCT/US1990/002701 patent/WO1991000651A1/en active IP Right Grant
- 1990-06-25 CN CN90103124A patent/CN1013628B/en not_active Expired
-
1998
- 1998-04-04 HK HK98102858A patent/HK1004583A1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
CN1048470A (en) | 1991-01-09 |
WO1991000651A1 (en) | 1991-01-10 |
JPH04506592A (en) | 1992-11-12 |
DE69028113D1 (en) | 1996-09-19 |
ATE141452T1 (en) | 1996-08-15 |
EP0479932A4 (en) | 1992-10-07 |
US4901036A (en) | 1990-02-13 |
KR950010143B1 (en) | 1995-09-07 |
CA2050901C (en) | 1995-03-21 |
EP0479932A1 (en) | 1992-04-15 |
HK1004583A1 (en) | 1998-11-27 |
KR920702802A (en) | 1992-10-06 |
DE69028113T2 (en) | 1997-03-06 |
EP0479932B1 (en) | 1996-08-14 |
CN1013628B (en) | 1991-08-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CA2050901A1 (en) | Frequency synthesizer with an interface controller and buffer memory | |
DE69022122D1 (en) | Frequency control circuit for VCO. | |
EP0322901A3 (en) | Semiconductor integrated circuit | |
CA2150744A1 (en) | Self Timed Interface | |
EP0335509A3 (en) | Broad band vco control system for clock recovery | |
JPS54118723A (en) | Phase converter | |
EP0432790A3 (en) | Data output buffer circuit for semiconductor integrated circuit | |
EP0368826A3 (en) | Data processing circuit | |
HK56695A (en) | Memory timing circuit employing models. | |
KR860004515A (en) | Phase-locked loop circuit and direct mixed-synchronous AM receiver | |
NO900115L (en) | INTEGRATED CIRCUIT TO PREVENT CHANGE OF STORED DATA. | |
EP0315260A3 (en) | Cellular telephone apparatus | |
EP0644658A3 (en) | PLL Frequency synthesizer circuit. | |
EP0102662A3 (en) | Non-pll concurrent carrier and clock synchronization | |
NO180698C (en) | Data input circuit with digital phase-locked loop | |
EP0778576A3 (en) | A synchronous semiconductor memory integrated circuit, a method for accessing said memory and a system comprising such a memory | |
AU582317B2 (en) | Method and arrangement for extracting an auxiliary data clock from the clock and/or the clock-phase of a synchronous or plesiochronous digital signal | |
AU618160B2 (en) | Data delay circuit and clock extraction circuit using the same | |
EP0377455A3 (en) | Test mode switching system for lsi | |
EP0355466A3 (en) | Integrated circuit with clock generator circuit | |
EP0654902A3 (en) | Symmetrical clock crystal oscillator circuit. | |
CA2064315A1 (en) | Selective calling receiver | |
US4722070A (en) | Multiple oscillation switching circuit | |
EP0512536A3 (en) | Programmable logic unit circuit and programmable logic circuit | |
AU589783B2 (en) | Phase-locked loop circuit |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
EEER | Examination request | ||
MKLA | Lapsed |