CA2065034A1 - Segmented memory transfer and message priority on a synchronous/asynchronous data bus - Google Patents

Segmented memory transfer and message priority on a synchronous/asynchronous data bus

Info

Publication number
CA2065034A1
CA2065034A1 CA2065034A CA2065034A CA2065034A1 CA 2065034 A1 CA2065034 A1 CA 2065034A1 CA 2065034 A CA2065034 A CA 2065034A CA 2065034 A CA2065034 A CA 2065034A CA 2065034 A1 CA2065034 A1 CA 2065034A1
Authority
CA
Canada
Prior art keywords
memory
valid data
synchronous
data bus
conveyed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2065034A
Other languages
French (fr)
Other versions
CA2065034C (en
Inventor
Gary Andrew Welsch
Donald Arthur Dorsey
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of CA2065034A1 publication Critical patent/CA2065034A1/en
Application granted granted Critical
Publication of CA2065034C publication Critical patent/CA2065034C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G06F13/4226Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus with asynchronous protocol
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • G06F12/1027Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1036Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] for multiple virtual address spaces, e.g. segmentation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation

Abstract

Apparatus and method for transferring segmented memory between memory units (756, 764) determines a need for memory transfer and searches a memory unit segment by segment until a valid data record is found. This valid data record is conveyed to another memory unit via the asynchronous mode. If a valid data record is not found within a predetermined amount of time, a message identifying the memory segment last searched is conveyed. If no remaining valid data records are found, a message with no information is conveyed. Priority is given to asynchronous messages.
CA002065034A 1990-07-30 1991-07-15 Segmented memory transfer and message priority on a synchronous/asynchronous data bus Expired - Fee Related CA2065034C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US559,873 1990-07-30
US07/559,873 US5214774A (en) 1990-07-30 1990-07-30 Segmented memory transfer and message priority on synchronous/asynchronous data bus

Publications (2)

Publication Number Publication Date
CA2065034A1 true CA2065034A1 (en) 1992-01-31
CA2065034C CA2065034C (en) 1996-12-24

Family

ID=24235408

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002065034A Expired - Fee Related CA2065034C (en) 1990-07-30 1991-07-15 Segmented memory transfer and message priority on a synchronous/asynchronous data bus

Country Status (7)

Country Link
US (1) US5214774A (en)
CA (1) CA2065034C (en)
DE (1) DE4191765C1 (en)
FR (1) FR2665276B1 (en)
GB (1) GB2252434B (en)
SE (1) SE502471C2 (en)
WO (1) WO1992002990A1 (en)

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US5483518A (en) * 1992-06-17 1996-01-09 Texas Instruments Incorporated Addressable shadow port and protocol for serial bus networks
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US5396654A (en) * 1992-09-04 1995-03-07 Motorola Inc. Data transfer method and apparatus having dual frequency operation
DE4315626C1 (en) * 1993-05-11 1994-07-14 Rexroth Mannesmann Gmbh Control for a hydraulic drive
FR2705820B1 (en) * 1993-05-26 1995-08-11 Solaic Sa Method for securing the writing of sensitive data in the EEPROM data storage memory of a memory card, and memory card for implementing this method.
JPH0844665A (en) * 1994-07-14 1996-02-16 Fujitsu Ltd Bus for supporting plural data transfer sizes and protocols
US5835785A (en) * 1994-11-14 1998-11-10 Motorola, Inc. Multiplexed three line synchronous/full-duplex asychronous data bus and method therefor
US5969538A (en) 1996-10-31 1999-10-19 Texas Instruments Incorporated Semiconductor wafer with interconnect between dies for testing and a process of testing
US5732387A (en) * 1995-12-04 1998-03-24 Motorola Method and apparatus for call establishment in a satellite communication system
US6018775A (en) * 1996-07-02 2000-01-25 Gateway 2000, Inc. System with a remote wireless mass storage which provides identification of a particular mass storage stored in a cradle to the system
US6405335B1 (en) 1998-02-25 2002-06-11 Texas Instruments Incorporated Position independent testing of circuits
US6728915B2 (en) 2000-01-10 2004-04-27 Texas Instruments Incorporated IC with shared scan cells selectively connected in scan path
US6769080B2 (en) 2000-03-09 2004-07-27 Texas Instruments Incorporated Scan circuit low power adapter with counter
US7366892B2 (en) * 2003-01-28 2008-04-29 Cellport Systems, Inc. Secure telematics
JP4411344B2 (en) * 2004-04-01 2010-02-10 バイエリッシェ モートーレン ウエルケ アクチエンゲゼルシャフト A method for recognizing incompatibility in a bus system with multiple control devices
US7346370B2 (en) * 2004-04-29 2008-03-18 Cellport Systems, Inc. Enabling interoperability between distributed devices using different communication link technologies
US8027293B2 (en) * 2007-07-16 2011-09-27 Cellport Systems, Inc. Communication channel selection and use
US20220190919A1 (en) * 2020-11-02 2022-06-16 Cisco Technology, Inc. Dispersing data rate to mitigate electromagnetic interference
FR3115957B1 (en) * 2020-11-05 2023-12-22 Thales Sa Method for exchanging data in a communications platform, associated computer program product and communications platform

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FR2466922A1 (en) * 1979-09-27 1981-04-10 Siemens Ag SYMMETRICAL TRANSMISSION DEVICE, IN PARTICULAR FOR BINARY INFORMATION
US4369516A (en) * 1980-09-15 1983-01-18 Motorola, Inc. Self-clocking data transmission system
US4631666A (en) * 1982-10-25 1986-12-23 Burroughs Corporation Data transfer network for variable protocol management
US4616314A (en) * 1983-05-12 1986-10-07 Motorola, Inc. Microcomputer controlled data receiver
US4615017A (en) * 1983-09-19 1986-09-30 International Business Machines Corporation Memory controller with synchronous or asynchronous interface
US4525865A (en) * 1983-10-03 1985-06-25 General Electric Company Programmable radio
US4593155A (en) * 1983-12-05 1986-06-03 Motorola, Inc. Portable telephone ID code transfer system
US4612415A (en) * 1984-08-03 1986-09-16 Motorola, Inc. Dynamic control of telephone traffic in a trunked radio system
US4680787A (en) * 1984-11-21 1987-07-14 Motorola, Inc. Portable radiotelephone vehicular converter and remote handset
US4672601A (en) * 1984-12-06 1987-06-09 Motorola, Inc. Duplex interconnect/dispatch trunked radio system
US4667191A (en) * 1984-12-21 1987-05-19 Motorola, Inc. Serial link communications protocol
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US4725836A (en) * 1986-01-27 1988-02-16 Snap Systems, Inc. Series port connection of a plurality of terminals to a master processor
DE3733680C2 (en) * 1986-10-06 1999-11-04 Canon Kk Central unit for a messaging system
US5029233A (en) * 1987-10-09 1991-07-02 Motorola, Inc. Radio arrangement having two radios sharing circuitry
NL8801120A (en) * 1988-04-29 1989-11-16 At & T & Philips Telecomm CROSS-POINT SWITCH FOR PACKAGING FORWARDING.
US4875230A (en) * 1988-07-25 1989-10-17 Gte Mobilnet Incorporated Cellular telephone unit having multiple memory location command language
US4972432A (en) * 1989-01-27 1990-11-20 Motorola, Inc. Multiplexed synchronous/asynchronous data bus
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US5060264A (en) * 1990-01-05 1991-10-22 Motorola, Inc. Radiotelephone controller configured for coresident secure and nonsecure modes

Also Published As

Publication number Publication date
GB2252434A (en) 1992-08-05
CA2065034C (en) 1996-12-24
SE9200948L (en) 1992-05-29
FR2665276B1 (en) 1995-12-22
FR2665276A1 (en) 1992-01-31
DE4191765C1 (en) 1995-01-26
GB9204505D0 (en) 1992-04-29
GB2252434B (en) 1994-04-06
US5214774A (en) 1993-05-25
SE9200948D0 (en) 1992-03-27
SE502471C2 (en) 1995-10-23
WO1992002990A1 (en) 1992-02-20

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