CA2066024A1 - Method of manufacturing a multilayered circuit board - Google Patents

Method of manufacturing a multilayered circuit board

Info

Publication number
CA2066024A1
CA2066024A1 CA002066024A CA2066024A CA2066024A1 CA 2066024 A1 CA2066024 A1 CA 2066024A1 CA 002066024 A CA002066024 A CA 002066024A CA 2066024 A CA2066024 A CA 2066024A CA 2066024 A1 CA2066024 A1 CA 2066024A1
Authority
CA
Canada
Prior art keywords
insulating sheet
circuit
insulating
layer
laser light
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA002066024A
Other languages
French (fr)
Inventor
Sadanobu Kawasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EIDP Inc
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of CA2066024A1 publication Critical patent/CA2066024A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4664Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
    • H05K3/4667Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders characterized by using an inorganic intermediate insulating layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06Lamination
    • H05K2203/068Features of the lamination press or of the lamination process, e.g. using special separator sheets
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/10Using electric, magnetic and electromagnetic fields; Using laser light
    • H05K2203/107Using laser light
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0017Etching of the substrate by chemical or physical means

Abstract

A method of manufacturing a multilayered circuit board, comprises the steps of: (a) laminating an insulating sheet on a lower layer (2) which reflects a laser light applied through the insulating sheet (4 and 6), said insulating sheet comprising a carrier film (4) and an insulating layer (6) formed on the carrier film; (b) forming via holes (8) in predetermined parts of said insulating sheet by applying a laser light thereto; (c) filling a conductive material (10) in the via holes formed in said insulating sheet;
(d) forming a circuit-pattern layer (12) on said insulating layer with the via holes filled with the conductive material; (e) repeating steps (a) to (c) on an uppermost insulating sheet, and repeating steps (a) to (d) until a desired number of circuit-pattern layers are formed below said insulating sheet, in the case where the board has at least two circuit-pattern layers; and (f) firing the layers of the multilayered structure formed in the step (e) at the same time.

Description

WO~1/0707~ ~fJ ~ '$~ 3 ~ PCT/US91~/0616 Tltle o~ the Inventlor~s . . . _.. .
M~thod o~ Manuf~cturLng a Multilayered Clrcult Board 955~e~ h~ _n 1. Field o~ th~ ~nventlon The pre~ent inv~ntion relates to a method of manu-~cturing a multil~yored c~rcuit bo~rd, by u~lng dielectr~ compo~ltion, and mors p~rti~ul~rly, t~ ~n improved m~thod o~ ~ormin~ vi~ holes an~ Yias for connectin~ the layer~ con~tltuting a multilaye~ed circult board.
2. De~crlptlon of the Prlor Art Gene~ally, A multllayerad cl~cult board ~omprl~es conductL~e laye~ whlch ~re insulat~d by insul~tior films ~ormed ~mon~ ~hem.
Metho~s of manu~acturing multilayered circui~ board~
ur~ roughly cl~ssified into the following ~wo type~
Meth~d 1 The method comprl~ the ~tep~ c~t ~ 1) formlng via hole~ in predetermined por~lons of eah in~ulat~ng 0heet m~de o~ in~ulatlve cer~ml~, by mechanical mesn~ such as a drill or a punch:
(2) ~Llllng the v~a hole~ with elect~ically c~n~
ductlva materlel~
(3) orming A conductor-pattern l~yer (1.~., an electric clrcuit) on each ln~ulating sheet, in p~rrnr~ln~ w.l.tl~ on n~ 1 h~ Vi~ l~ol ~:

. . .

W09l/n7073 ~ 3~ h ~ f, '~. PcT/usso/o6l6
(4) us~ng po~ltioning pin~, thereby allgntng the in~ulating ~hee~ wlth the po~itlonlng hol~ or notch~
already cut th~rein, ~nd then p~es~ing and ~orming the inBulating sheets together; and (~) fLring ~hs mul~ilAyered s~rucl;ure, thu~ pre~sed ~nd fo~me~, Rimultaneou~ly.
Me~hod 2 Thi~ methe~ compris~s the ~teps of:
~ 1~ orming a conductive l~yer by uslng pol~mer-ba~e material for forming thick f~lm, on a sub~trats m~de of ceramic dielectrlc mAteri~l euch as alumina, by means of scre~n-printing, ~nd firing to re~o~e ~olatile ~olvent, ~nd to ~lnter ~he solld componon :
(2) forming a required number of vi~ hole~ tn predetermined portion~ of Lnsulatlng ~heet, by mechanical me~ns ~uch as a drill or a punch;
(3) lamlnAtlng the in~ulating ~heet o~ ~hs ~tep (2) on, and p~eci~ely allgnlng the ln3ul~tin~ ~heet with, the sub~trate made by ~ha ~tep ( 1 ), an~ pre0~lng, and firing ~he xeaul~ant ~tructur~7 (4) ~llltng the vl~ hole~ wi~h conductive p~te for ~orming khick film, by mean~ o~ screQn printing, and firin~ the conductive paste iill~d in the vLa hol~;
(5) forming ~ conductor-pattern layer (~.e., ~n electrlc clrcult) on ~he fired ins~lating Bhee~ in ~coord~nce wlth the regl~tration o~ the via~, and fixin~ and WO9l/07073 ;.,.~3,~ PCT/ ~S9~)/0616 (6~ repe~tlng the 0~epa (2) ~o (5), ~hereby ~ormin~
de~ired number of other conductor-pattern la~ers.
Methods 1 and 2 have their respe~tive ~harac~erizing f~a~u~Qs " n the way how the componen~s of the circui~
bo~rd ~hrlnk while belng fired. Method 1 l~ to form.
multilayered ~tructure compria1ng a plur~ y of insu lat~.ng ~heet~ ~nd a plural~ty of conductor-pat~ern laycrs. When fired, they each are ~inter~d, and they hrink in three dimen~ion~, formlng an in~egral multL-l~yexed c~rcuik board (integraL-type clrcuit b~a~cl). In method 2, ~ plurality of ~n~ul~ting shee~s a~e laid on the Hub~tr~te, one ùpon ~nother. ~he sub~ra~ls ~oe~ no~
~hrink when the whole s~ucture i~ ~lr~d. Only the multll~yered ~tructu~e on the ~ub~tr~ hxink~ in the directlon of thLcXness, whereby a mult~layered cir~ult board fixed ~o a ~ubstrAte i8 provided ~compo~i~e type circul~ board).
M~thod~ 1 ~nd 2 h~ve dr~wb~k~ whic~ re0ult from thelx respectlvQ cha~acter~zing feature~. Me~hod 1, wh~re~n ~n0~1atlng ~heet~ are laid one upon another, i~
dl~ad~an~geou~ ln the ~ollowing re~peot~l a) A ~ig i~ required for allgnlng the in~ula~ing ~heetB, ~nd it 1B dificult ~o allgn th~ ~he~t~ with preci~lon.
b) ~ h-preci~ion proce~ requise~ to ~11 the ViA hole8 with conductive mAter~ and the yleld o~ the circuit board 1~ low if th~ ~ro~lit fo~mod thereon lla~ a :

' .

W091/0707~ PCT/~ISgo/06l6 hlgh ~ ntegratl on den~ity.
Method 2, whersin the in~ulating l3heet having v~a hole~ 1B lald on a ~ubstr2te wlth ~ conduct~r-pattern layex on it, and then the ~heet and tile su~tr~te ~re f i~ed, iB disadvsnt~g~ou~ in the follewin~ respec~s:
c) The insulatlng sheet having via hole~ m~t be preci~ly all~nod wlth the conductor-pattarn layer fonmed on the au~trate. This alLgnment ~nevitably re~ulres ~ complex and, hence,-expen~lve app~r~tu~, and re~ult~ ln a low yield of the circuit board.
d) Tho ~hrlnking of thQ ln~ul~ting she3t, result-~ rom the f lring, ~dvereely influenca~ the allgnment bet~e~n th~ ~hee~.
Mo~eov~x, method~ 1 and ~ ha~e the followln~ dr~w-back in c~mmon ~
e ) Sln~e eac~ via hole cut $n the ~neulatin~ ~heet by the m~chan~.cal meAn8 has a eylindric~l ~hape~ ~ir i~
likely fillsd ~n the hole along with the conductlve mater~l. Th~ 8 ~eopardlzQs the ~le~trio~l connection between the ~onductor-pattern layers achlavad by th~

via .
~ ecau~e of the drawback2 mentioned ~bove, the mult~-layered cixcuit boarde which can be made by e~ther method have 80m~ llmltation~. ~or ex~mple, the circuit board~ canno~ be ~uffLcLently dense ln a Z axl~ (i.e., ln the di~ection of lamin~tion), ox the in~NlatLng eh~ete incorpor~ted in the bo~rds mu~ have ~ thickne '` `'' Wo 91/0707~ ~J ~ ' PCT~ US9~/0616 ~alllng w~thln a 0pecl~ic range ~e.g., 300 to ~00,~ m), ~o th~t the sh~et: a~n be ea~Lly proae~led.
~!IL~n It i~ the ob~sct of the pre~ent in~ention to lp~ovic~e a method of manuacturing ~ mul~ilay~red ~lrcuit board, wherel~s ~heet~ may be handled eas~ ly, without any rleed of alignment ~tep for l~mination of insul~tlng sheets, and without any naed f or consid4ratlon of any in~lu~nce on the alignmen~c by ~che shrinkage - of the ~heet re~ultin~
f rom f ire .

It i~ ~nother ob~ec~ o~ the invention to pro~v~e a method c~ mMnufHcturing ~ high-p~eai~ion~ high-densi'c~
multilayered cixcuit boArd, by means of an apparatlls of slmple struc~ure, s~herein, vla holes ~re relisbly filled wlth conduct~v~ m~ter~al t~ ~or~n vias ~ultabl~ ~or clrcult pattern layers, and thelr f illlng ~ep i~ ~implified.
Accordlng to 'che pre~ent lnvention, t:here is providQd a meth~d o~ ~ mul~ yered circuit bo~d by using sn in~ulAting ~heet containing, as main component, powder oP ceramic ~nd/or gla6~ and an organlc bLnder, ~aid method comprising the ~tep~ of:
1 ) laying the insula~ ~ ng . ~heet on~o ~ ~ub~Srate, wlth a cArrier f ilm placed c~n it~ upper surf ace;
~ ) forrni.nq VIA hol~r in p~d~termin~3d portiOn~ o~

.. ., . . ", ,, : . , ~- .

wo sl/n707~ s ~ Pcr/~isso/06l6n
- 6 the in~ul~tlng ~he~t and filling the vi~ holes, thereb~
~ormlng vias therein; and 3) foxmlng on ~he in~ulating Yhee~ an el0ctric circuit conn~ct~d to ~ lower el~ctric circuit by the via~.
Further, the ~tep~ l ), 2) ~nd 3) and the like are repested ~ num~r o~ timea equ~l to thst of de~Lred clrcuLts, thu~ forming ~ multil~yer~d structure. rha ~tructure 18 flred, thus forming a multilayered .. .. .. .
l~minated circuit bo~rd. The via hole~ are formed by removlng pr~dQtermined part~ of the 1n~ula~ing ~heet laid on the hubstrate, by applying photo-th~mo ~nergy onto the~e part~ of the ln~ul~tin~ sheet.
Mor00v0r, ln the method Qf manu~cturin~ a mul~i-la~ered circuit bo~rd, according to the invention, ~onductive m~terlal can ea~ily be filled in tho holo~
formed in the ~nsul~ting ~hset ~nd the carrier fllm, b~
means of screen prin~ing, wherein use i~ mAde of the c~rrier film ~nd ~ second~ry maek.
Tha ~eramic, gla~s, organlc pol~ne~ blnder~ all being the materlal~ of the in~ultin~ ~heet, can be tho~e u3ed hitherto.
~ 8 has been describ~d, the pre~nt in~ention pro-v~des a method of manufacturing ~ circuit board com-prislng a plurall~y Q~ conduckive layers insul~ted by lnsula~lng ~ilm~ lnterpo~od between the conductive layers. In thl0 method, th~ l~yer~ nead not be ~ligned WO 91/07073 r.~ PCT/US90/0616~ i in connection witll ~ormlng ~ia hole~ t.hareln.
Therefore, neither speci~l technology nor ~pe~ial ~ig~
are requir~d ko allgn tlle layer~. Nor i~ to necas~ary to pre-proces~ e~ch lnsulati~ heet.
Al~o, in the method of the pre~ent: inven~lon, via hole~ need not be formed in each ln~ulRtlng shee~, at ~o preci~ po~itlons ~ 1B requlred in the eon~entional method in order to compe~sate the ~hrinka~e of the ~acke~ in~ulatlng ~heet. Hence, ths handlin~ e~ficiency of ~he ln~ulation ~JI~et~ 18 htgh during the l~mination of the Rheet~.
Moroovsr, 1~ 10 po~ible wlth the method o~ the ~ d .
lnven~lon to flre the~insulatiny s~e~ts and the conduc~ve laye~ (i.e., clrcult~pattern), all laminated together, ln a ~lngle ~tep. ~lence, the time r~qulred ~o manufactuxe a multLlayered circul~ board i~ shorter ~han o~h~rwlee.
In the lnven~ion, ~ia holes are formed ~n the ~nsu-lating ~heet, by applylng photo thermo energy suah a~ a lfl~er light to the predetexmined parts of the sheet.
Ea~h vl~ hole, ~llu~ formed, has a sh~pe o~ a ~runcated cene whose d~am~ter gradually decrea~es in the d~re~tlon o~ apply~ng the l~e~ l~ght. Due ~o it~ ~peoi~ic ~h~pe, the vl~ hole can be filled the ~onductlve m~terial, wi~hout ~rappin~ air, thereby forming a vi~ which ha~ a good con~uctlvity.
Fl.~t.l~q~, ~r~ tl~ ~r~q~l ; 11t~ r), ~ r~

.

PCr/ ~lS9t)/~6 1 6(~
; r J ~; 5 h~

la~r light is ~bsorbed into the ln~ulating shae~, achi~ving a the~mal e~ect, thu~ ~ormln~ hole~ in the ~heet. Tha light ls reflected from tho metal compvnent of tho conductive layer formlng the el~ctrlc circui~
located below the insulating ~hee~. Therefore, the ls~er light doe~ no damage to the elec~ric clrcuit, whether or not the con~uc~ive layo~ has besn fired.
Bri_ Descriptlon o the Drawin~a Fig~. lA to lD are aect1on~1 view~ ~ -explalning the 8teps o~ a method of manufacturlng a multil~yered circuit boar~, which i~ an embodiment of the pre~ent inven~int Fig~, 2A to 2D a~e soctional vle~s, explalning the 0tep~ o~ ~ method of manuf~cturing a multilayerQd cir~uit board, whlch i~ n eecond embodiment o~ the present invention~ ' Flgs. 3A snd 3B are ~ectional View8, explaining ~teps of lamlnatlng a plurality o~ insul~ting ~h~et~ in the method of the fir~t embod~ment of the invantion; and Fig~. 4A And 4~ are sectionAl view~, explainlng ~tepB o~ ~ f llin~ the via hole~ o~ each l~ulating ~heot with conductlve m~0rl~1 in ~ep~ of manufacturing a multilayered cir~ui~ board, whlch i~ A ~hird embodlmsnt of th~ lnvent~on.
DetRiled De8cri tien of ~he Prefer~ed Embodlm~n~s Methoda o~ m~nuf~cturing multil~yered circu1t bo~rd~, ac~ording to the pre~ent inven~ion, will now WO 91 /07073 PCr/US9~/061 6 de~cribed with the accompanylng drawing~.
The in~ulating ~he~t ueed in the pr~ent in~ention 1B made of a ~ompoaitien colnpri~lng prepar~ 1 by mixlng ~
binder of polymer ~n~ powder of dielec~ric material ~uch ~s alum~ na c~x gla~s by mean~ of a ball mill . ~he pol~- -mer ~5 t~lerm~lly d~compo~ed when the ~heet i~ flr~ . in an oxldizing atmo~ph~r~ or a non-oxldizlng ~tmoRpher~
a~er the sh~et h~ been laminated, ~m~ - . . .. . .
A~ is ~hown ln Fig . lP~, in tho ~teE~ ( a ), an in~ulAting sh~e 6 c~oated wlth a ~arrler f ilm 4 i~
lamlnat~d to a make~hi~t sub~trate 2 made o~ stainle~
eteel at 70'C ~or t~n mlnu~e~ unde~ pres~ur~ o~ 100 kg/cm2 . 'rhen, the ce.rrier f ~lm 4, which 18 made o~
polye~ter, polypropy ~ ene or the like, 1~ peeled f ~om the insulatLng ~hs~et 6.
The insulatlng eheet 6, u~d here, i8 a ~hset hAving a thickne~s ~ abou~ 100~ m ~nd made o by ~low-coatlng a ~lip compo~itlon on ~ polyes~ fllm having a thiclc~
nes~ , for example, 75~L m, and by dryinçl ~he ~lip compoeitlon. The slip compo~ition has been p~epared by ball-milling the ollowlng component~ u~ed in the ~pecl~ic ameuntg apocified below, ~or a predeterlslined : .
time .

Gla~s compo~l'cion 3~1 All3min~ powder 17 .

~ . . , , ' .
- . ~ .
': ' ' ~ ' : , ' . " ' ' wosl/n7073 ,,i~3~ ; PCT/~Issn/06l6n Quartz ~ a powder 4 Acryl-base polymex 4 Phthala~ pl~stl~ze~ 2 ~ethyl ethyl k~one 20 l.l,l-~richloroethylene ~
Total lC0 The gl~8 G~mpo8itiQn ~ m~de up o~ ths Pollowing c~mponents ~
Table 2 - ~ila~s C~mpo~l~lon PbO 17.2 ~
~3 4.~ %
SlO2 56.5 %
2o3 9 . 1 C~O R.6 N~2O 2.4 K20 _ _ ~ 1.7 To~al 100.0 ~
Then, ~e ~ ~hown in Flg. 1~, ln th~ ~tep (b), ~la hole~ B ~re made ln pr~det~rmlned par~s , by apply~ng a a~
la~er light ~r~m A 3W c~rbonic~h~ er driven by ~ pul~e h~vln~ a 0.1 mlllLmetor ~ize. The llght l~ de~ocuea~d ~uch th~t vla hole wlll have a dl~meter of 180 mlcrons.
Next, aæ 1~ 0hown Ln Fig. lC, ln the ~tep (c), - ailYe~-b~3e c~nduct~ve mat~ l for milling Vi8 hol~, 6141D manufactured by E.I. Du Pont, l~ applled lnto ~he vl~ hol~ by means o~ a ~hlc~-~ilm screen-prlntlng WO 91/07073 , ~ ~ J,~' i . PCr/US9(~/O~i1 6(~

machLne, through a me~al m~k which i~ 50 mlcrons thick ~nd ha~ hole~ loaated ~t the po~itlon~ ~orresp~nd~ng ~o, the ~ria hol~ and havlng a diameter of 200 Inicrens. A~
a re~ult, ~ias~are formed in the ~tia hole~. The BtructUr~ ~ 9 le~t to ~tand at lOO~C for 10 minute~, whersby the Ylas ar~ d~ied.
,n~hest~(d)~
Th~n, ~ is ~hown Ln FLg. lr~rcult:-pnttern layer 12 (i.e., an electric c~xcuit) made o~ eilver-base conductlvQ m~terial for forrning intern~l electrlc cl~cuits, 6142D m~nuf~ctured by E.I. D~ Pont, ~n the ~ n~ul~ ng ~heet with the vl~ hole~ ~$11~d with the conducti~e materl~l, by mean~ of s~r~en-printing. Th~
~tructure ~hown i71 Fig . lD 1~ lQf t to s~And a~ lOO~C ~or 10 mlnute~, and ~ the~eby drled.
Thereq~tex, the ~tep~ ~) to (d) Are repeated, thereby f ormlng ~e~ren -l~yer~JA, la ~ d one UpOIl the other .
Then, ~he ~op~ (a) to tc) ~re per~ormed, thereby fonning an eigh~-layer~d 8tructuI~. Fin~lly, the make~hif t aub~ t~ 2 L~ remo~red, ~nd the eigh~ yered ~tructure lnclu~lng the in~u1at~ng sheets i~ pre~ed with pre~sure of 210 kg/cm2 for 10 mlnutes. The ~ght-l~y~red ~tructure i0 mounted on an alumins ~upport, and 1~ then flred under the fo11Owlng c~ndltion~ s ( 1 ) RAi~e temperatu~e from 25 C to 350'C, ~pendlng 30 minute~.
( 2 ~ H~ld the 'cemp~ratu~o at 350 C ~or 60 mlnute~ .
(3) nai~e the temperatllre from 350'C to ~50C, .
. . ~, , , .:
'. ' :

1 ~ n ; ! PCT/ 1~ S 9l~/06 1 6 ~pending t S mlnute~ .
( 4 ) Hold the ~cempar~tur~ A~ ~50~f or 1~ minu~eA .
s) Lowe~: ~he t~ F~ra~rom 850'C to lOO~C, ~pend~ng 30 m~ nutes, The fi~ing iB perfo~Ted within a pr.ogr~ ble box furn~ce, whereby a s~ntered"nultilayer.ed elrc:uit board 8 ob~cained which i~ compri~ed o~ eigh~. in~ulAting and ~even lnternal c~rcul~-pattern lay~r~ and which ha~ ~rL~e, f orD~ed ln both ~urf ao~ .
Ex~ple -2 ~ ~~
Wlth ref2rerlce to Flg~. ~A to 2D, a me~hod o~ m~nu-f ~cturin~ ~ multil~yered clrcult bc>~rd will be de~crlbed wlth , ln ~h~ h ~n in~ulllting ~heet i~ ~on a sub-~trate wlth a conduc~or-pa~tern l~yer ~lre~dy ~vrmed on lt/ ~nd the stxu~ture thus ormed 1~ tered.
Aq 1~ ~hown ln Fly. 2A, a conductor-pat~ern layer 14 ~ dr f~ fil~
made c~E ~ilvcr-b~o conductlve mat~rLal 6160 manu~ao-o~Q
tur~d by E. I . Du Pont, i~ fo~med ~y mefins o~s~ree u~
prlnt~ng/\a sub~trate 12 m~d6~ o~ ~b% ~}~tmLn~ ~nd having a thlckne~ o$ ~b~ut 0. 63 mm. Then, the layer 14 1B dried O'C for 10 mlnute~. Ne3xt, an ln0ulatlng ~hee~ 16 18 lamina'ced on the substrate under pres~ure of ~0 kg/am2 ~t ~O'C fo~ 2 minutes . The ~heet 16 hA~ been made by ca~tlng ~ ~llp compo~ltlon prepared b~ ball-mllling the components ~pecif ied ln Table ~ u~ed in the ~pecif~c amoun~s specified ~l~o ln T~ble 3, fo~ a Wo 9l/07073 ~ PCr/US9()/0616 prsdetennined peri od of time . A.~ Ln ~xample l, a l8 carrie~ , which ha~ been coated Gn the sheet, L~
peeled from the in~ul~ting ~he~t. Then, as i~ ~hown in Fig . 213 ~ia hol~a 20 ~re made in the f ir~t in6ulating ~heet 16 in the ~tep (b), in the ~ame way ~B in thf3 ~tep ( b ) o~ the example i ( the method of manuf~cturlng a multll~yered circuit board cosnprl~ing in~ul~t~ ng ~hee~ only) .
Then, a~ 13 shown in ~ig. 2C, in ~he ~cep (c) ~ilver-base conducti~re material, 6160 manufacture~ by E. I . Du Pont, iB applied into th~ via holes, thereby ~orming ViA~3 21 t ln the s~me w~y a~ in ~che ~tep ( c ) wh~h haa been de~cribQd w~'ch re~er~nce to ~ig. tC.
~ble 3 - Sli~s~n 2 Gla~a compo~ltion 29 Alumina powder 18 guartz sillca pc>~dex 4 A~ryl-base polymer 7 Ph~halate-baoe pla~ic~zer MHthyl ethyl k~kone 17 1,1,1,-~ri.chloroeth~len~ _ _ 17 Total lO0 Next~ a~ ie shown in Figl~ 2D~
'r7~ stel~ /t 1 , ~n electrlc circult 2~ 1B prlnted by u~ing ~ilver-ba~e corlductive mater~ al, 61S0 manuf acture~ by E . I . Du Pont, on the inaulting ~h~7~t wi~h the vl~ hole~ filled~
StQp(~ )Q4 ~ dQsc~4 ~4) ~f~ ~ ~;q, 1 D, .

' 0~07~ - PC~ ssn/o6l6n ~ 14 The~ea~ter, the eteps (~) to.(d) dR~cx~bed ebove with reference to Flgs. 2~ ~o 2D ar~ per~ormed ~n a second lnBulat~n~ sheet 26, ~ is sho~n in Fi~. 3A~
thereby formlng ~ circul~ board comprilslng two lnsu-latlng aheete a~ i~ illuetrated in Flg. 3B. Flnal~y, ra)t4 t~) the st~p3~descrlbed with re~erence to ~Figs. 2A to 2C are performed, thereby ~orming a mllltilayered ~tructure hAving three insulstin~ ~heets on the subetrate. The multilayered 0tructure ~ re~, - together with the substrate, under the ~ollowin~
condit~on~
~1) Heat ~50~ to 860~ , for lO mlnute~.
(2) He~t at 800~ or more for Z~ minute~.
(3) He~t ~t 600~ or more ~or 30 mlnute~.
(4) ~eAt ~t 100~ or more for 60 minu~e~.
~ ha flrlng l~ performed by me~ne of a conveyer firlng furnace commonly u~ed to fo~m thlcX ~llms. The product of the flrlng i8 a 9 ~ ntered multllay2red ~tru~ture comprl~ing on~ a1umlna sub~trate, thre~
~n~ulatLng ~heet~, three lnternal circul~pntte~n l~yer~, and via~ ~ormed in Plnm contaa~ wlth the ln~ulatlng layer.
Flnally, ~ circuit-pattern layer made of p~lladium~
~llve~ con~uatlv~ materiRl ~r formlng ~hlak fllm/ i.e., 613~ manufactursd by E.I. ~u Pont, i8 fonmed ~n the in~ul~tlng ~h~et of the multllay~r~d atru~ture. AH a rseult, ~ multllayered circu~t board having four Wo 91/0707~ , . , Pcr/usso/o6l6(~
"

clrcult-pa~ct~rn l~yer~ 1B c~t~ineà.
The~eaf ter, the boflrd ~B PU'C ~0 ele~trical te~t~, to determine whe~her or not each of the f our c ~ r~ult-pa~ta~n lay~rs include~ di~connecti~n or ~hort-circulted part~.
Thls embod~ment haY an ~n~ul~ing ~hee~ l~mina~ced on the clrcul~-pattern layer fo;~med sn enly one ~urfaoe of a sub~trate . In~tead, two 1 n~ul~ting ~heet~ (:an be lamlnated on the cLrcult-pattern layers f oxmed on both surf~ce~ o~ the substrate, in whlch ca~e the substra~e muYt h~ve through hole~ ~ th~t the circult-pat~ern laycra can be ~lectrleAlly connecte~. 6uah a mul.tl- .
layered clxcult boA~cl, wi~h the ~ubsltrate ~andwlched between the ~n8ulntlng layers, is manu~actuxed by perform~ng the s~me step~ a~ ln ~he ax~rnple~ de~ribed abov~ .
In the exa~nple deacrlbed above, the ~tep8 ( a ) ~o ( d ) ~re p~r~o~Ted on eAch ~n~ulat~ng ~heet, or the ~tep~ ~a) to ~c) ~re perfonned on the uppermost in~ulating aheet, and then ~he resultnnt ~tructur~ i~ flred.
Neverthelo~, Lt a~ pen.fo~ he~
i~ posn~ble th~t tha ~ItE~pB ~a) and ~b)~on eAch ~nsula~ing ~heet, the r~su~; ~e ,~ ~rr~bC, Q~ t;h~
l;l,e 5t~p /~ IL peJl fOJV~
IJI the p~e~en't lnventlon, the ~onductl~te material ~llllng the ~ia hol~s and ~orming the clrcult-p~t ern layers ~ ba~ically one prep~ d for formlng thick film~. Th~ materlal 1~ a coanmonly used ~llv~r alloy for WO 9 l /0~07? r~ ./ PCI / I.~IS91)/06 1 6 ~orming thl ck film, ~uch ~ ilver-ba~e one ~nd th~
llke, ~ ~ilver-palladlum one, or ~ ~llver-platlnum one.
AlternAtlvely, it can be ~ gold-b~e one or a copper-ba~e one, eith~r u~ed i~or o~n1ng ~hlck f ~ lm~ .
Hc)wever, in Ex~mpl~3 1, a mul~Ll~yel~ed ~tructure comprl ~ing ~everal in~ul~tf ng BheetB 18 formed on the makeshl~t ~u~stl:ate, the makesh~ ft ~ubstrate L~ removed from th~ mulkilay0red structure, ~nd ~he multilay~red ~tructure 1~ îlrsd. When flred, th~ multil~yered truc'cure shrinks ~n ~ha direction~ of lt~ thiakr~e~ and the plan~ , i . e ., all three dlmension~ . Hence , Th~
conductlve mAter~.~l filled ln the vla hole~ ~nd formlng the circult-p~ttern layer~ mus~ be on~ whlah matches wlth the ~hrinklng o~ the multil~yered ~trllcture, ao th~t the ~t~uc'cure doea not w~rp, cr~ck, or d~lamln~te.
Al~o ~ n Example 2, a multllayered ~tructuro co3rl-pr~ing ~ev~ral ln~ulatlng sheets formed on ~ sub~tr3te I ~; Eired to~ether wi~h the sub~rate. Hence, ~t ahrinks only in the dLrect~on of ~ t~ 'chi~knes~, no~ in the pl~ne Therefore, the conductive m~terlal flllod ln th~ ~la hole~ and ~onnlng 'che ~ir~uit-pattern l~yers mus~c ther~fore be on~ whlch can match with the 3hr~nklng o~
the multliayex~d ~tructure.
The ~ubstr~te us0d ln Ex~mple 1, 1~ u~ed temporarlly during l~mLnAtlng, ~nd 1~ ~ltimately removed. ~here-f ore, lt can be made of flny m~texi~l ~ha~ can r~f leet the photo-thermo energy and ~ su:Efici~ntly heat-
7~ PCr/ ~lS90/06 16~) re~lstan~. It o~n he a m~tal pl~te. Tha ~ubetr~ usrad~n Exampl~ 2, however, 1~ ~iir~L ~long with the multi~ ~ ~ b layered ~truc~ure of in~ulating 8he~, and 1~ a pArt~
In ~lew o~ thl~, the ~ub~trate ~hould bette~ be msde o one ~ tho~e material~ ~or forming thlok fll~5. More sp~clP~c~lly, the ~ub~trate c~n be made of a varie~y of material~, such ~ one of alumin~s ef ~a~lou~ grade~
~a.g., 90%-alum~n~, 96~-alumina~ ~r 99~-~lumlna)5 ~aramic ~uch ~ ~luminum nltrlde o~ ~ilic~n c~rblde;
-- - iron-bR~ed me~ uch a~ ~t~inl~5 ~teel or Incon~lt or a met~l plywood cone~ 3tLng of c~ppor-In~ar-oopper, or coppor-mol~b~enum-copper.
A c~bonlo acld g~ la~er or a 0e~ic~ndu~tor la0er ~uch a~ )~AG~ whloh emlt0 lnfrar0d ray8, iB ~erl~
u~d as the ~ourc~ of the photo-thermo Qne~gy for formin~ vi~ hol~s. Al~ern~tl~ely, variou~ sh li~h~-~OurOOB whlch emlt ~nfra~ed r~ys can be us~d ~8 well.
When a la~er li~ht 1~ u~ed, vi~ hole~ o~ a suffL~iently good eh~p~ can be ~rmed without the u~e of a llght-~r~n~mltt~ng m&~k, merely by controlling the focal po~nt of tlle li~h~ ~ln~e the l~er light iB aoherent.
A~ a me~-hod o~ perform~ng po~i~loning in ordor to form v~a hol~s ln the ~heet ~t desired posltlon~, one ~1~ hole ~ ~lr~t made ~n th~ ~he~t by ~pplying on~ or more la~er pulses, th~n a ~able 1B po~ltl~ned by me~n6 e ~ flxed head. Alternatlvaly, ~ er llght i~
r~dlated through a mlrro~ and applied to ~he ~heet, ao WO 91~07073 r~ P~/l.,l~9(~/0616~) that the light can ea~ily be appl~ed to sn~ d~sLr~d part of the aheet by changing the Lnclina~i~n of the m:Lrror.
The po~itLonal relat~onship beSwean the ocal poln~
snd each in~ula~ing sheet i0 not limlt~d. It i8 de~ira-ble tha~ the focal point ~e ~et with~n or above the in6ulting ~heet, thereby to mlnimlze the tharmAl damage to the conductlve layer locatad bel~w.
When fla~h light ~ ser light no~ fo~ue~d) iB
applled, use i9 m~de o~ a ma~k, ~uch a~ a metal ma~k .. . . . . . ..
having holo~ cut at the po~itions corresponding to the vi~ holes whlch are to be formed. The ph~o-thermo ene~gy pa~e~ through the ho1es of the m~sk ~o ~orm via hole~ ~n the aorre0pondiny part~ of the ineu1~tin~ shee~
on the lower ~urf~ce of the ma~k. Although thi~ me~hod c~nnot u~e energy wlth hlgh efflclency, it iB advanta-geous in ~hat ~ number o~ vi~ hvle~ can be fo~n~d by applyLng Plash l$ght to the ~heet only onoe.
Ih ~
the enHrgy requlred t~ ~orm one vl~ hole ln each in~ul~tin~ ~heet i~ fa~ le88 th~n the ener~y needod to scrl~e a ceramlc ~ub~trat~, such ~e an alumina aub~tr~te, to cut a via hole therein.
The prlnclple of forming via hole~ ~ appl~ing pho~o-thermo en~rgy, such a~ a la~er light, will now be axplained. When photo-thermo ~ner~y, partlculaxly thermo en~rgy, 18 applied to the predetermln~d parta of an lnsulating ~heat, the or~anic bin~e~ contalned ln wo sl/o7o73 ~ pcr/us9o/o616~

the~e p~rt6 o~ the ~heet explo~ i v~ly hurn~ he blnder ~pr~d~ in the ~orm of H gaB ~r ~ine p~rticle~.
Although 30me inoryan~ c ~ub~nce seems to gas~ fiecl ox changed ln~o flne p~r~c~ cles, slmul~cAneou~ly, 1~ 1~ the .organic blnder ~h~ ef~ctlvely cont:r~bute ~o the f orm~ ng of vla h~les . Hence, ~ holE!6 can be f o~mecl wlth ~ rel~tl~ly sm~ll amount o energy.
AB may be ea~ily ~s~umed from th~ ~bo~re, the ~urface of 'che sheet remains clean, and the clean ~urf ace of the he~t i~ exposed by pealing off the c~rrler ~llm, if light i5 ~pplled ~co ~he ~heet ~hrough the eArrier ~ilm ~uch aa polye~tor film, rather thAn directly to 'C~e lnsul~tin~ ~he61t, bec~u~e if th~ llgh~ pplied to the sh~t ~hrough the carrler 11m, the ~preadin~ or~nic and lnorganlc f ino particle~ ~t~c3c onto ~h~ c~rrler sheets, no'c onto the the ~urf~ce o~ the ~ n~ul~lng ~he~t .
Fur~cher, it 1~ ea~y to vacuum-cle~n or wlpe the carr~er f ilm So m~ke the f ~ lm clean al~o when the ln~ulatlng ~heet ha~ring tl2 hol~ uacd a~ a ma~k in ~he pxoce~s o~ ~lllLng 'che vi~ hole~.
The vla hol~a h~ve ~ d~ameter ranging from about 20 ~o abou'c 700 mlcrorle ln mo~t c~e~. The 11108t co~r~non dl~meter i8 about S0 micron~ to al:out 400 mlGrons.
Accordln~ to the invention, vi~ hole~ h~rlng a diameter of about 50 m1 cron~ to ~bout 4~ m~crone are mo~ e~y to form by applying photo-thermo energy to the Wogl/07073 ~ PCT/US9()/0616 ~

~sulat~ng ~he~t. Thl~ r~nge of dlam~ter i~ identloal to the value mo0t common in pr~tice.
Ex~nple ~
Another exampl* of ~ method of m~nufaa~uring a multlla~red cirauit bo~r~, ~cco~dlng t~ the p~esent ln~entlon 1~ to f ~11 a conduct~ve materlal in the ~a hole~ made ~n a c~rri~r ~ilm 4 ~nd an in~ul~t~ng ahoet 6 by mean~ of 0cr~en.printing, by u~lng the~fllm and ~
eec~ndary ma~k, a~ llu~trstad in Figs, 4A ~nd 4~.
- I n thl~ m~thod, ~la hole~ ~re formed ~n ~n insu-ia~inq 3hs~t 6 by perf~nming the ~tep~ nd ~b~ A~ i8 descrlb0d wlth re~erence to F~ga. 1~ ~nd ~ to mRnu~sctu~e fln lntegr~l-type ~lrcult bo~r~ r and by performlng the stap~ ~a~ ~nd (b) a~ i9 described with re~erence to Flgs. 2A ~nd 2~ to m~nu~cture a c~po~ite~
type circult boGrd.
At this tim~, ~ carrier film 4 ha~ hol~ al~gned wlth the v$~ holeh ~ made ln the in~ul~tlng ~h~et 6.
The fllm 4 la ussd as pximary ma~k. U~ed as ~econdary mR8k iB a met~l mAsk 24 wh~ch 1~ 50~ m thlck and h~ a hole ha~lng a d~am~ter ~f 2 rnm ~nd beln~ concen~rl~ w~th the center vi~ hole. The m~k 24 1~ roughly aligned, ~nd ~ conductive ~terlal, i.e., 6141D or 6160 manu f actured 5~y E.~. Du Pont, ~ f~lled ln th~ vl~ hole~
by ~creen pri~ting, a~ 18 lllustr~ted ln F$g. 4A. The structure 18 drl~d ~t 100~ Por 5 minute~. Then, ~ 18 ~5~own in Flg. 4~, the carxier f~lm 4 la peeled off ~rom .

wo 91/07073 ~ ; pcr/~!s9~/o6l6~ -the ~tructur~. Fu~thar, the ~t~p ln tha example~
ds~cribed above ie per~ormed, the~eby ~orm5 n~ an electric circult on the insul~tlng sheet ha~ing the via holes n~w fillad with the conductive m~te!~ial. 1~ fl r~ lt, elther ~n ~ nte~ral-type circult bo~rd or a compo~ite-type cix~uit ho~rd can be manufactur~d. The circult board, thus m~nufActured, perforTtl the aame elec~rical function a~ tho~e made in the examples de~crlbed above.
- - ~he u~e of the carrier f llm and the ~ecendary 3nask ~~
Ln ~ ng the vla hole~ fac~lit~tes the ~llgnln~
vexy much, ~nd help~ ~o achieve the f illlng of ~ holes with no mi~-all~nment.

Claims (13)

What is claimed is:
1. A method of manufacturing a multilayered circuit board, comprising the steps of:
(a) laminating an insulating sheet on a lower layer which reflects a laser light applied through the insulating sheet, said insulating sheet comprising a carrier film and an insulating layer formed on the carrier film and said insulating layer containing, as main components, ceramic and/or glass powder and an organic polymer binder;
(b) forming via holes in predetermined parts of said insulating sheet by applying a laser light thereto;
(c) filling a conductive material in the via holes formed in said insulating sheet by using, as a mask of screen-printing, said carrier film and a secondary mask;
(d) peeling said carrier film from said insulating layer;
(e) forming a circuit-pattern layer on said insulating layer with the via holes filled with the conductive material;
(f) repeating steps (a) to (d) on an uppermost insulating sheet, and repeating steps (a) to (e) until a desired number of circuit-pattern layers are formed below said insulating sheet, in the case where the board has at least two circuit-pattern layers; and (g) firing the layers of the multilayered laminated structure formed in the step (f) at the same time.
2. A method of manufacturing a multilayered circuit board, comprising the steps of:
(a) laminating an insulating sheet on a lower layer which reflects a laser light applied through the insulating sheet, said insulating sheet containing, as main components, ceramic and/or glass powder and an organic polymer binder;
(b) forming via holes in predetermined parts of said insulating sheet by applying a laser light thereto;
(c) filling a conductive material in the via holes formed in said insulating sheet;
(d) forming a circuit-pattern layer on said insulating layer with the via holes filled with the conductive material;
(e) repeating steps (a) to (c) on an uppermost insulating sheet, and repeating steps (a) to (d) until a desired number of circuit-pattern layers are formed below said insulating sheet, in the case where the board has at least tow circuit-pattern layers; and (f) firing the layers of the multilayered structure formed in the step (e) at the same time.
3. The method according to claim 2, further com-prising the step of firing said insulating sheet with via holes formed therein, after the step (b) and before the step (c).
4. The method according to any of claims 1 to 3, wherein said lower layer in step (a) for reflecting the laser light applied through the insulating sheet laminated on the lower layer comprises a substrate made of a material to be fired along with said laminated structure of insulating sheet, or a substrate to be removed from said laminated structure of the insulating sheets before the step of firing .
5. The method according to any one of claims 1 to 3, wherein said lower layer in the step (a) for reflecting the laser light applied through said insulating sheet formed on the lower layer in the step (a) comprises a substrate having a circuit-pattern layer and made of a material to be fired along with said laminated structure of the insulating sheets.
6. The method according to claim 1 or 2, further comprising the step of separating and removing the lower layer for reflecting the laser light applied through said insulating sheet, from said laminated structure of the insulating sheets, before firing the laminated structure.
7. The method according to any one of claims 1 to 6, wherein said laser light used in the step (b) is an infrared laser light.
8. The method according to claim 7, wherein, in the step (b), via holes are formed in said insulating sheet after positioning said insulating sheet off the focal point of a laser light.
9. The method according to any one of claims 1 to 6, wherein flash-light exposure is performed in the step (b).
10. The method according to claim 1 or 2, further comprising the step of forming a circuit-pattern layer on the laminated structure comprising the insulating sheet and the circuit-pattern layer which have been fired simultaneously, and performing firing.
11. The method according to claim 5, wherein said substrate in the step (a) is a substrate having two circuit-pattern layers formed on both surfaces and electrically connected to each other by means of through holes, and the insulating sheet is laminated on each of these circuit-pattern layers.
12. The method according to claim 2, wherein the steps (a) to (d) are repeated on the insulating sheets including the uppermost insulating sheet, until a desired number of circuit-pattern layers are formed in step (e).
13. The method according to claim 2, wherein the steps (a) to (e) are repeated on the insulating sheets including the uppermost insulating sheet, until a desired number of circuit-pattern layers are formed in step (f).
CA002066024A 1989-10-25 1990-10-25 Method of manufacturing a multilayered circuit board Abandoned CA2066024A1 (en)

Applications Claiming Priority (2)

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JP1/278292 1989-10-25
JP1278292A JP2761776B2 (en) 1989-10-25 1989-10-25 Method for manufacturing multilayer circuit board

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JPH03148195A (en) 1991-06-24
WO1991007073A1 (en) 1991-05-16
EP0497871A1 (en) 1992-08-12
JP2761776B2 (en) 1998-06-04
EP0497871A4 (en) 1993-01-27

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