CA2083304A1 - Equalization and decoding for digital communication channel - Google Patents

Equalization and decoding for digital communication channel

Info

Publication number
CA2083304A1
CA2083304A1 CA2083304A CA2083304A CA2083304A1 CA 2083304 A1 CA2083304 A1 CA 2083304A1 CA 2083304 A CA2083304 A CA 2083304A CA 2083304 A CA2083304 A CA 2083304A CA 2083304 A1 CA2083304 A1 CA 2083304A1
Authority
CA
Canada
Prior art keywords
channel
communication channel
subchannels
estimates
equalization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2083304A
Other languages
French (fr)
Other versions
CA2083304C (en
Inventor
Stephen R. Huszar
Nambirajan Seshadri
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
American Telephone and Telegraph Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by American Telephone and Telegraph Co Inc filed Critical American Telephone and Telegraph Co Inc
Publication of CA2083304A1 publication Critical patent/CA2083304A1/en
Application granted granted Critical
Publication of CA2083304C publication Critical patent/CA2083304C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H04L1/0054—Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H04L1/0047—Decoding adapted to other signal detection operation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0202—Channel estimation
    • H04L25/0212—Channel estimation of impulse response
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0202—Channel estimation
    • H04L25/024—Channel estimation channel estimation algorithms
    • H04L25/025—Channel estimation channel estimation algorithms using least-mean-square [LMS] method
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03178—Arrangements involving sequence estimation techniques
    • H04L25/03248—Arrangements for operating in conjunction with other apparatus
    • H04L25/03254—Operation with other circuitry for removing intersymbol interference
    • H04L25/03267—Operation with other circuitry for removing intersymbol interference with decision feedback equalisers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03178—Arrangements involving sequence estimation techniques
    • H04L25/03248—Arrangements for operating in conjunction with other apparatus
    • H04L25/03292—Arrangements for operating in conjunction with other apparatus with channel estimation circuitry
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03178—Arrangements involving sequence estimation techniques
    • H04L25/03312—Arrangements specific to the provision of output signals
    • H04L25/03324—Provision of tentative decisions

Abstract

An equalizer/decoder for a communication channel presenting impairments to error-free reception of transmitted symbols includes a modified Viterbi decoder operating on samples of received signals in a plurality of equivalent subchannels. Estimates of each of the subchannels are updated using a locally best estimate in the Viterbi trellis processing, thereby avoiding delay in updating channel estimates in a rapidly changing channel such as a digital cellular communications channels. A leaky predictor channel updating technique also proves advantageous in an alternative embodiment.
CA002083304A 1991-12-31 1992-11-19 Equalization and decoding for digital communication channel Expired - Fee Related CA2083304C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US81651091A 1991-12-31 1991-12-31
US816,510 1991-12-31

Publications (2)

Publication Number Publication Date
CA2083304A1 true CA2083304A1 (en) 1993-07-01
CA2083304C CA2083304C (en) 1999-01-26

Family

ID=25220833

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002083304A Expired - Fee Related CA2083304C (en) 1991-12-31 1992-11-19 Equalization and decoding for digital communication channel

Country Status (7)

Country Link
US (2) US5774504A (en)
EP (1) EP0550143B1 (en)
JP (1) JP3260870B2 (en)
KR (1) KR100281149B1 (en)
CA (1) CA2083304C (en)
DE (1) DE69230722T2 (en)
FI (1) FI113925B (en)

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US7072392B2 (en) * 2000-11-13 2006-07-04 Micronas Semiconductors, Inc. Equalizer for time domain signal processing
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Also Published As

Publication number Publication date
KR930015472A (en) 1993-07-24
DE69230722D1 (en) 2000-04-06
EP0550143B1 (en) 2000-03-01
JPH05344008A (en) 1993-12-24
KR100281149B1 (en) 2001-02-01
DE69230722T2 (en) 2000-11-02
FI925933A0 (en) 1992-12-30
EP0550143A3 (en) 1993-09-29
FI925933A (en) 1993-07-01
US5774504A (en) 1998-06-30
EP0550143A2 (en) 1993-07-07
US5862156A (en) 1999-01-19
FI113925B (en) 2004-06-30
CA2083304C (en) 1999-01-26
JP3260870B2 (en) 2002-02-25

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