CA2114268A1 - Clock Synchronizing Circuit - Google Patents

Clock Synchronizing Circuit

Info

Publication number
CA2114268A1
CA2114268A1 CA2114268A CA2114268A CA2114268A1 CA 2114268 A1 CA2114268 A1 CA 2114268A1 CA 2114268 A CA2114268 A CA 2114268A CA 2114268 A CA2114268 A CA 2114268A CA 2114268 A1 CA2114268 A1 CA 2114268A1
Authority
CA
Canada
Prior art keywords
signal
phase
phase difference
synchronizing circuit
difference signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2114268A
Other languages
French (fr)
Other versions
CA2114268C (en
Inventor
Toshiya Nezu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Toshiya Nezu
Nec Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiya Nezu, Nec Corporation filed Critical Toshiya Nezu
Publication of CA2114268A1 publication Critical patent/CA2114268A1/en
Application granted granted Critical
Publication of CA2114268C publication Critical patent/CA2114268C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/14Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted
    • H03L7/146Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted by using digital means for generating the oscillator control signal
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L1/00Stabilisation of generator output against variations of physical values, e.g. power supply
    • H03L1/02Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only
    • H03L1/022Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only by indirect stabilisation, i.e. by generating an electrical correction signal which is a function of the temperature
    • H03L1/026Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only by indirect stabilisation, i.e. by generating an electrical correction signal which is a function of the temperature by using a memory for digitally storing correction values
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/0079Receiver details
    • H04L7/0083Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks

Abstract

A clock synchronizing circuit comprises a voltage controlled oscillator (VCO) for producing an output signal whose oscillation frequency changes in response to control signals. A phase comparator compares a phase of an input signal and a phase of the output signal to thereby generate a phase difference signal. A filter filters the phase difference signal to thereby output a filtered phase difference signal. A frequency synchronizing circuit responsive to the filtered phase difference signal generates a first compensation signal for controlling a frequency of the output signal. A phase synchronizing circuit responsive to the filtered phase difference signal generates a second compensation signal for controlling a phase of the output signal. A signal supplying circuit feeds the first and second compensation signals as said control signals.
CA002114268A 1993-03-12 1994-01-26 Clock synchronizing circuit Expired - Fee Related CA2114268C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP5077475A JP2518148B2 (en) 1993-03-12 1993-03-12 Clock dependent synchronization method
JP77475/1993 1993-03-12

Publications (2)

Publication Number Publication Date
CA2114268A1 true CA2114268A1 (en) 1994-09-13
CA2114268C CA2114268C (en) 1999-08-10

Family

ID=13635019

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002114268A Expired - Fee Related CA2114268C (en) 1993-03-12 1994-01-26 Clock synchronizing circuit

Country Status (4)

Country Link
US (1) US5475325A (en)
EP (1) EP0615360A3 (en)
JP (1) JP2518148B2 (en)
CA (1) CA2114268C (en)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07336784A (en) * 1994-06-08 1995-12-22 Toshiba Corp Clock synchronization device
US5723998A (en) * 1994-08-10 1998-03-03 Yamaha Corporation Electronic circuit with operation self-control function
JP3109560B2 (en) * 1995-02-10 2000-11-20 日本電気株式会社 Semiconductor integrated circuit using variation compensation technology
US5646519A (en) * 1995-06-07 1997-07-08 Symmetricom, Inc. Digital phase detector employing a digitally controllable delay line
JP2891149B2 (en) * 1995-11-20 1999-05-17 日本電気株式会社 Phase control loop method
JPH1056329A (en) * 1996-08-12 1998-02-24 Matsushita Electric Ind Co Ltd Frequency control oscillator
US5982835A (en) * 1997-02-04 1999-11-09 Samsung Electronics Co., Ltd. Digital processing phase lock loop for synchronous digital micro-wave apparatus
US5986486A (en) * 1997-11-10 1999-11-16 Adc Telecommunications, Inc. Circuits and methods for a phase lock loop for synchronous reference clocks
KR100400314B1 (en) * 2001-06-29 2003-10-01 주식회사 하이닉스반도체 Clock synchronization device
US6711230B1 (en) * 2002-09-27 2004-03-23 Nortel Networks Limited Reference timing signal oscillator with frequency stability
US7792121B2 (en) * 2003-01-03 2010-09-07 Microsoft Corporation Frame protocol and scheduling system
US7181701B2 (en) * 2003-01-03 2007-02-20 Microsoft Corporation Glanceable information system and method
US6974252B2 (en) * 2003-03-11 2005-12-13 Intel Corporation Failsafe mechanism for preventing an integrated circuit from overheating
US7015762B1 (en) 2004-08-19 2006-03-21 Nortel Networks Limited Reference timing signal apparatus and method
US7424069B1 (en) 2004-08-19 2008-09-09 Nortel Networks Limited Reference timing signal apparatus and method
KR101448917B1 (en) * 2007-09-11 2014-10-13 삼성전자주식회사 Apparatus and Method for converting Analogue to Digital using pseudo multiple sampling
CN103752110A (en) * 2013-11-22 2014-04-30 天脊煤化工集团股份有限公司 Impulse-type deduster mud discharge device

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3725789A (en) * 1970-12-21 1973-04-03 Sperry Rand Corp Temperature controlled clocking of logic circuits
US3882412A (en) * 1974-03-29 1975-05-06 North Electric Co Drift compensated phase lock loop
JPS5126452A (en) * 1974-08-29 1976-03-04 Fujitsu Ltd
JPS5931901B2 (en) * 1976-04-23 1984-08-04 株式会社東芝 Wideband phase locked loop circuit
US4310804A (en) * 1978-02-06 1982-01-12 Motorola, Inc. Input activated frequency synthesizer
US4563657A (en) * 1982-03-15 1986-01-07 Codex Corporation Frequency synthesizer and digital phase lock loop
US4454483A (en) * 1982-03-25 1984-06-12 Cubic Corporation Temperature compensation of an oscillator by fractional cycle synthesis
US4808884A (en) * 1985-12-02 1989-02-28 Western Digital Corporation High order digital phase-locked loop system
JPH0824259B2 (en) * 1986-07-31 1996-03-06 株式会社日立製作所 Phase synchronizer
JP2526633B2 (en) * 1987-05-14 1996-08-21 日本電気株式会社 Phase synchronization circuit
JPH0719440B2 (en) * 1987-08-20 1995-03-06 パイオニア株式会社 PLL circuit
US4855683A (en) * 1987-11-18 1989-08-08 Bell Communications Research, Inc. Digital phase locked loop with bounded jitter
JP2537799Y2 (en) * 1987-11-18 1997-06-04 日立電子株式会社 Frequency discriminator
GB2232841B (en) * 1989-05-19 1994-01-26 Quantel Ltd An amplification circuit with temperature compensation
US5018170A (en) * 1989-11-21 1991-05-21 Unisys Corporation Variable data rate clock synthesizer
US5024535A (en) * 1989-12-20 1991-06-18 United Technologies Corporation Semiconductor light source temperature measurement
JPH0410711A (en) * 1990-04-27 1992-01-14 Nec Corp Semiconductor logic circuit
EP0479237B1 (en) * 1990-10-02 1997-08-20 Nec Corporation Phase-locked oscillation circuit system with measure against shut-off of input clock
JP3225530B2 (en) * 1991-03-13 2001-11-05 ソニー株式会社 Digital PLL circuit for CD
US5168245A (en) * 1991-10-30 1992-12-01 International Business Machines Corporation Monolithic digital phaselock loop circuit having an expanded pull-in range

Also Published As

Publication number Publication date
EP0615360A2 (en) 1994-09-14
CA2114268C (en) 1999-08-10
JPH06268516A (en) 1994-09-22
EP0615360A3 (en) 1997-07-16
US5475325A (en) 1995-12-12
JP2518148B2 (en) 1996-07-24

Similar Documents

Publication Publication Date Title
CA2114268A1 (en) Clock Synchronizing Circuit
US5053723A (en) Phase-locked loop with pulse-duration modulation fine frequency control
CA2152180A1 (en) Phase locked loop synchronization circuit and method
CA2296312A1 (en) Frequency synthesizer systems and methods for three-point modulation with a dc response
MY109097A (en) An adaptive phase locked loop
KR950022154A (en) Clock signal generation circuit
WO2001001577A8 (en) Adjustable bandwidth phase locked loop with fast settling time
CA2019778A1 (en) Charge pump circuit
KR870011522A (en) Clock control circuit
EP0170207A3 (en) A write clock pulse generator used for a time base corrector
CA2209290A1 (en) Frequency synthesizer
IE821957L (en) Phase-locked loop circuit
US4841255A (en) Frequency synthesizer
CA2112290A1 (en) A clock recovery circuit for serial digital video
KR910005582A (en) Analog Digital PLL
EP0358175A3 (en) Reference signal producing circuit for phase servo control
WO1995029482A3 (en) Arrangement for reproducing n digital signals from n adjacent tracks on a record carrier
EP0357374A3 (en) Phase-locked loop
EP0766404A3 (en) Clock generator utilizing phase locked loop circuit
KR920013933A (en) PLL Synthesis Circuit
ES2048681A1 (en) digital frequency synthesizer.
WO2002082656A3 (en) High frequency vcxo structure
EP0206247A3 (en) Pll frequency synthesizer
JPS6392169A (en) Horizontal deflector
EP0346623A3 (en) A circuit for high-efficiency tuning video frequencies

Legal Events

Date Code Title Description
EEER Examination request
MKLA Lapsed