CA2118147A1 - Method for Lowering the Phase Transformation Temperature of a Metal Silicide - Google Patents

Method for Lowering the Phase Transformation Temperature of a Metal Silicide

Info

Publication number
CA2118147A1
CA2118147A1 CA2118147A CA2118147A CA2118147A1 CA 2118147 A1 CA2118147 A1 CA 2118147A1 CA 2118147 A CA2118147 A CA 2118147A CA 2118147 A CA2118147 A CA 2118147A CA 2118147 A1 CA2118147 A1 CA 2118147A1
Authority
CA
Canada
Prior art keywords
metal
refractory metal
precursory
wafer
temperature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2118147A
Other languages
French (fr)
Other versions
CA2118147C (en
Inventor
Cyril Cabral Jr.
Lawrence A. Clevenger
Francois M. D'heurle
James M.E. Harper
Randy W. Mann
Glen L. Miles
Donald W.D. Rakowski
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of CA2118147A1 publication Critical patent/CA2118147A1/en
Application granted granted Critical
Publication of CA2118147C publication Critical patent/CA2118147C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/42—Silicides
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B1/00—Single-crystal growth directly from the solid state
    • C30B1/02—Single-crystal growth directly from the solid state by thermal treatment, e.g. strain annealing
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
    • H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System the conductive layers comprising silicides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/665—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/04—Dopants, special
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/147—Silicides

Abstract

The phase transformation temperature of a metal silicide layer formed overlying a silicon layer on a semiconductor wafer is lowered.
First, a refractory metal is disposed proximate to the surface of the silicon layer, a precursory metal is deposited in a layer overlying the refractory metal, and the wafer is heated to a temperature sufficient to form the metal silicide from the precursory metal. The precursory metal may be a refractory metal, and is preferably titanium, tungsten, or cobalt. The concentration of the refractory metal at the surface of the silicon layer is preferably less than about 101 atoms/cm3. The refractory metal may be Mo, Co, W, Ta, Nb, Ru, or Cr, and more preferably is Mo or Co. The heating step used to form the silicide is performed at a temperature less than about 700°C, and more preferably between about 600-700°C. Optionally, the wafer is annealed following the step of disposing the refractory metal and prior to the step of depositing the precursory metal layer. Preferably, this annealing step is performed at a wafer temperature of at least about 900°C.
CA002118147A 1993-10-29 1994-10-14 Method for lowering the phase transformation temperature of a metal silicide Expired - Fee Related CA2118147C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US145,921 1980-05-02
US08/145,921 US5510295A (en) 1993-10-29 1993-10-29 Method for lowering the phase transformation temperature of a metal silicide

Publications (2)

Publication Number Publication Date
CA2118147A1 true CA2118147A1 (en) 1995-04-30
CA2118147C CA2118147C (en) 2000-05-16

Family

ID=22515130

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002118147A Expired - Fee Related CA2118147C (en) 1993-10-29 1994-10-14 Method for lowering the phase transformation temperature of a metal silicide

Country Status (10)

Country Link
US (1) US5510295A (en)
EP (1) EP0651076B1 (en)
JP (1) JP2673103B2 (en)
KR (1) KR0155587B1 (en)
AT (1) ATE183251T1 (en)
BR (1) BR9404247A (en)
CA (1) CA2118147C (en)
DE (1) DE69420004T2 (en)
ES (1) ES2136148T3 (en)
TW (1) TW262573B (en)

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US6284633B1 (en) * 1997-11-24 2001-09-04 Motorola Inc. Method for forming a tensile plasma enhanced nitride capping layer over a gate electrode
US6242333B1 (en) * 1998-01-06 2001-06-05 Texas Instruments Incorporated Method to enhance the formation of nucleation sites on silicon structures and an improved silicon structure
US6022801A (en) 1998-02-18 2000-02-08 International Business Machines Corporation Method for forming an atomically flat interface for a highly disordered metal-silicon barrier film
US6048791A (en) * 1998-03-31 2000-04-11 Kabushiki Kaisha Toshiba Semiconductor device with electrode formed of conductive layer consisting of polysilicon layer and metal-silicide layer and its manufacturing method
US6492266B1 (en) * 1998-07-09 2002-12-10 Advanced Micro Devices, Inc. Method of forming reliable capped copper interconnects
US6156615A (en) * 1998-09-30 2000-12-05 Advanced Micro Devices, Inc. Method for decreasing the contact resistance of silicide contacts by retrograde implantation of source/drain regions
US6204177B1 (en) 1998-11-04 2001-03-20 Advanced Micro Devices, Inc. Method of forming junction leakage free metal silicide in a semiconductor wafer by alloying refractory metal
US6165903A (en) * 1998-11-04 2000-12-26 Advanced Micro Devices, Inc. Method of forming ultra-shallow junctions in a semiconductor wafer with deposited silicon layer to reduce silicon consumption during salicidation
US5970370A (en) * 1998-12-08 1999-10-19 Advanced Micro Devices Manufacturing capping layer for the fabrication of cobalt salicide structures
KR100329769B1 (en) * 1998-12-22 2002-07-18 박종섭 method for forming titanium polycide gate electrode
US6180521B1 (en) 1999-01-06 2001-01-30 International Business Machines Corporation Process for manufacturing a contact barrier
US6274511B1 (en) 1999-02-24 2001-08-14 Advanced Micro Devices, Inc. Method of forming junction-leakage free metal silicide in a semiconductor wafer by amorphization of refractory metal layer
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US6383906B1 (en) * 1999-08-19 2002-05-07 Advanced Micro Devices, Inc. Method of forming junction-leakage free metal salicide in a semiconductor wafer with ultra-low silicon consumption
US6297148B1 (en) 1999-08-19 2001-10-02 Advanced Micro Devices, Inc. Method of forming a silicon bottom anti-reflective coating with reduced junction leakage during salicidation
US6440851B1 (en) 1999-10-12 2002-08-27 International Business Machines Corporation Method and structure for controlling the interface roughness of cobalt disilicide
US6281117B1 (en) 1999-10-25 2001-08-28 Chartered Semiconductor Manufacturing Ltd. Method to form uniform silicide features
US6096647A (en) * 1999-10-25 2000-08-01 Chartered Semiconductor Manufacturing Ltd. Method to form CoSi2 on shallow junction by Si implantation
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TW531803B (en) * 2000-08-31 2003-05-11 Agere Syst Guardian Corp Electronic circuit structure with improved dielectric properties
US6972932B2 (en) * 2000-09-06 2005-12-06 Seagate Technology Llc High-efficiency single-turn write head for high-speed recording
US6645861B2 (en) 2001-04-18 2003-11-11 International Business Machines Corporation Self-aligned silicide process for silicon sidewall source and drain contacts
US6534871B2 (en) * 2001-05-14 2003-03-18 Sharp Laboratories Of America, Inc. Device including an epitaxial nickel silicide on (100) Si or stable nickel silicide on amorphous Si and a method of fabricating the same
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Also Published As

Publication number Publication date
US5510295A (en) 1996-04-23
EP0651076B1 (en) 1999-08-11
DE69420004D1 (en) 1999-09-16
JPH07169711A (en) 1995-07-04
ATE183251T1 (en) 1999-08-15
JP2673103B2 (en) 1997-11-05
EP0651076A1 (en) 1995-05-03
KR0155587B1 (en) 1998-11-16
TW262573B (en) 1995-11-11
KR950011644A (en) 1995-05-15
ES2136148T3 (en) 1999-11-16
CA2118147C (en) 2000-05-16
BR9404247A (en) 1995-06-20
DE69420004T2 (en) 2000-03-30

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