CA2152714A1 - Method and apparatus for manipulating an atm cell - Google Patents
Method and apparatus for manipulating an atm cellInfo
- Publication number
- CA2152714A1 CA2152714A1 CA002152714A CA2152714A CA2152714A1 CA 2152714 A1 CA2152714 A1 CA 2152714A1 CA 002152714 A CA002152714 A CA 002152714A CA 2152714 A CA2152714 A CA 2152714A CA 2152714 A1 CA2152714 A1 CA 2152714A1
- Authority
- CA
- Canada
- Prior art keywords
- atm cell
- memory array
- switch
- atm
- input ports
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/10—Packet switching elements characterised by the switching fabric construction
- H04L49/104—Asynchronous transfer mode [ATM] switching fabrics
- H04L49/105—ATM switching elements
- H04L49/107—ATM switching elements using shared medium
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/10—Packet switching elements characterised by the switching fabric construction
- H04L49/104—Asynchronous transfer mode [ATM] switching fabrics
- H04L49/105—ATM switching elements
- H04L49/108—ATM switching elements using shared central buffer
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/30—Peripheral units, e.g. input or output ports
- H04L49/3081—ATM peripheral units, e.g. policing, insertion or extraction
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
- H04Q11/0428—Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals
- H04Q11/0478—Provisions for broadband connections
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
- H04L2012/5681—Buffer or queue management
Abstract
The present invention pertains to an apparatus for manipulating ATM cells. The apparatus comprises a memory array in which an entire ATM cell can be read or written in one read or write cycle. The apparatus is also comprised of a mechanism for reading or writing the entire ATM cell from or into the memory array. The present invention pertains to a method for switching an ATM cell. The method comprises the steps of receiving the ATM cell at a first input port of a switch from the ATM network. Then there can be the step of storing the ATM cell in one clock cycle in a memory array of the switch. Next there is the step of reading the ATM cell in the memory array in one clock cycle. Next there is the step of transferring the ATM cell from the memory array to a first output port of the switch. Next there is the step of transmitting the ATM cell from the first output port to the ATM network. The present invention pertains to a switch for an ATM cell. The switch comprises I input ports which receive ATM cells from an ATM
network, where I > 1 and is an integer. The switch is also comprised of a memory array connected to the I input ports for storing an ATM cell received by one of the I input ports in one clock cycle. The switch also comprises o output ports connected to the memory array, where O > 1 and is an integer. One of the O
output ports transmit an ATM cell which is received from the memory array to the ATM network. Additionally, the switch comprises a controller connected to the memory array, I input ports and O
output ports for controlling the storage of an ATM cell from one of the input ports into the memory array in one clock cycle. The switch can be used for normal switching operation, multicasting, demultiplexing or multiplexing.
network, where I > 1 and is an integer. The switch is also comprised of a memory array connected to the I input ports for storing an ATM cell received by one of the I input ports in one clock cycle. The switch also comprises o output ports connected to the memory array, where O > 1 and is an integer. One of the O
output ports transmit an ATM cell which is received from the memory array to the ATM network. Additionally, the switch comprises a controller connected to the memory array, I input ports and O
output ports for controlling the storage of an ATM cell from one of the input ports into the memory array in one clock cycle. The switch can be used for normal switching operation, multicasting, demultiplexing or multiplexing.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/381,110 US5541918A (en) | 1995-01-31 | 1995-01-31 | Method and apparatus for manipulating an ATM cell |
US381,110 | 1995-01-31 |
Publications (2)
Publication Number | Publication Date |
---|---|
CA2152714A1 true CA2152714A1 (en) | 1996-08-01 |
CA2152714C CA2152714C (en) | 2002-01-01 |
Family
ID=23503702
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA002152714A Expired - Fee Related CA2152714C (en) | 1995-01-31 | 1995-06-27 | Method and apparatus for manipulating an atm cell |
Country Status (5)
Country | Link |
---|---|
US (3) | US5541918A (en) |
EP (1) | EP0725555B1 (en) |
CA (1) | CA2152714C (en) |
DE (1) | DE69637187T2 (en) |
MX (1) | MX9504680A (en) |
Families Citing this family (49)
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US5926482A (en) | 1994-05-05 | 1999-07-20 | Sprint Communications Co. L.P. | Telecommunications apparatus, system, and method with an enhanced signal transfer point |
CZ286974B6 (en) | 1994-05-05 | 2000-08-16 | Sprint Communications Co | Method and apparatus for control of signaling processing system |
US6430195B1 (en) | 1994-05-05 | 2002-08-06 | Sprint Communications Company L.P. | Broadband telecommunications system interface |
US6181703B1 (en) | 1995-09-08 | 2001-01-30 | Sprint Communications Company L. P. | System for managing telecommunications |
US6172977B1 (en) | 1994-05-05 | 2001-01-09 | Sprint Communications Company, L. P. | ATM direct access line system |
US6023474A (en) | 1996-11-22 | 2000-02-08 | Sprint Communications C.O.L.P. | Broadband telecommunications system interface |
US5920562A (en) | 1996-11-22 | 1999-07-06 | Sprint Communications Co. L.P. | Systems and methods for providing enhanced services for telecommunication call |
US6031840A (en) | 1995-12-07 | 2000-02-29 | Sprint Communications Co. L.P. | Telecommunications system |
US6633561B2 (en) | 1994-05-05 | 2003-10-14 | Sprint Communications Company, L.P. | Method, system and apparatus for telecommunications control |
US5991301A (en) | 1994-05-05 | 1999-11-23 | Sprint Communications Co. L.P. | Broadband telecommunications system |
US6314103B1 (en) | 1994-05-05 | 2001-11-06 | Sprint Communications Company, L.P. | System and method for allocating bandwidth for a call |
US5541918A (en) * | 1995-01-31 | 1996-07-30 | Fore Systems, Inc. | Method and apparatus for manipulating an ATM cell |
FR2736737B1 (en) * | 1995-07-12 | 1997-08-14 | Alcatel Nv | DEVICE FOR MANAGING RELATIONSHIPS BETWEEN OBJECTS |
US5764641A (en) * | 1995-09-08 | 1998-06-09 | Cisco Systems, Inc. | Early and integrated tail packet discard system |
US5691997A (en) * | 1995-09-28 | 1997-11-25 | Cisco Systems, Inc. | Encoder for use in asynchronous transfer mode systems |
WO1997028622A1 (en) | 1996-02-02 | 1997-08-07 | Sprint Communications Company, L.P. | Atm gateway system |
US8117298B1 (en) | 1996-02-26 | 2012-02-14 | Graphon Corporation | Multi-homed web server |
US5748630A (en) * | 1996-05-09 | 1998-05-05 | Maker Communications, Inc. | Asynchronous transfer mode cell processing system with load multiple instruction and memory write-back |
US5748631A (en) * | 1996-05-09 | 1998-05-05 | Maker Communications, Inc. | Asynchronous transfer mode cell processing system with multiple cell source multiplexing |
US6128303A (en) * | 1996-05-09 | 2000-10-03 | Maker Communications, Inc. | Asynchronous transfer mode cell processing system with scoreboard scheduling |
US5794025A (en) * | 1996-05-09 | 1998-08-11 | Maker Communications, Inc. | Method and device for performing modulo-based arithmetic operations in an asynchronous transfer mode cell processing system |
US5940393A (en) | 1996-05-28 | 1999-08-17 | Sprint Communications Co. L.P. | Telecommunications system with a connection processing system |
US5898687A (en) * | 1996-07-24 | 1999-04-27 | Cisco Systems, Inc. | Arbitration mechanism for a multicast logic engine of a switching fabric circuit |
US6014378A (en) | 1996-11-22 | 2000-01-11 | Sprint Communications Company, L.P. | Telecommunications tandem system for circuit-based traffic |
AU718960B2 (en) | 1996-11-22 | 2000-05-04 | Sprint Communications Company, L.P. | System and method for transporting a call in a telecommunication network |
US6115380A (en) | 1996-11-22 | 2000-09-05 | Sprint Communications Co., L.P. | Broadband telecommunications system |
US6002689A (en) | 1996-11-22 | 1999-12-14 | Sprint Communications Co. L.P. | System and method for interfacing a local communication device |
US6038694A (en) * | 1997-03-24 | 2000-03-14 | Cisco Systems, Inc. | Encoder for producing a checksum associated with changes to a frame in asynchronous transfer mode systems |
US6067299A (en) | 1997-04-16 | 2000-05-23 | Sprint Communications Company, L.P. | Communications system for providing ATM connections and echo cancellation |
US6137800A (en) | 1997-05-09 | 2000-10-24 | Sprint Communications Company, L. P. | System and method for connecting a call |
US6704327B1 (en) | 1997-05-09 | 2004-03-09 | Sprint Communications Company, L.P. | System and method for connecting a call |
US6178170B1 (en) | 1997-05-13 | 2001-01-23 | Sprint Communications Company, L. P. | System and method for transporting a call |
JP3313051B2 (en) * | 1997-11-26 | 2002-08-12 | 正一郎 浅野 | Address resolution method |
US6483837B1 (en) | 1998-02-20 | 2002-11-19 | Sprint Communications Company L.P. | System and method for connecting a call with an interworking system |
US6470019B1 (en) | 1998-02-20 | 2002-10-22 | Sprint Communications Company L.P. | System and method for treating a call for call processing |
US6563918B1 (en) | 1998-02-20 | 2003-05-13 | Sprint Communications Company, LP | Telecommunications system architecture for connecting a call |
US6160871A (en) | 1998-04-10 | 2000-12-12 | Sprint Communications Company, L.P. | Communications test system |
US6724765B1 (en) | 1998-12-22 | 2004-04-20 | Sprint Communications Company, L.P. | Telecommunication call processing and connection system architecture |
US6982950B1 (en) | 1998-12-22 | 2006-01-03 | Sprint Communications Company L.P. | System and method for connecting a call in a tandem architecture |
US6888833B1 (en) | 1998-12-22 | 2005-05-03 | Sprint Communications Company L.P. | System and method for processing call signaling |
US6785282B1 (en) | 1998-12-22 | 2004-08-31 | Sprint Communications Company L.P. | System and method for connecting a call with a gateway system |
US6957346B1 (en) | 1999-06-15 | 2005-10-18 | Ssh Communications Security Ltd. | Method and arrangement for providing security through network address translations using tunneling and compensations |
US6535963B1 (en) * | 1999-06-30 | 2003-03-18 | Cisco Technology, Inc. | Memory apparatus and method for multicast devices |
FR2818066B1 (en) * | 2000-12-12 | 2003-10-10 | Eads Airbus Sa | METHOD AND DEVICE FOR DETERMINISTIC TRANSMISSION OF PACKED ASYNCHRONOUS DATA |
US6661730B1 (en) | 2000-12-22 | 2003-12-09 | Matrix Semiconductor, Inc. | Partial selection of passive element memory cell sub-arrays for write operation |
US7103049B2 (en) * | 2002-01-02 | 2006-09-05 | Adtran, Inc. | Mechanism for providing octet alignment in serial ATM data stream |
US7177183B2 (en) | 2003-09-30 | 2007-02-13 | Sandisk 3D Llc | Multiple twin cell non-volatile memory array and logic block structure and method therefor |
US7924845B2 (en) * | 2003-09-30 | 2011-04-12 | Mentor Graphics Corporation | Message-based low latency circuit emulation signal transfer |
US20080099133A1 (en) * | 2006-11-01 | 2008-05-01 | United States Gypsum Company | Panel smoothing process and apparatus for forming a smooth continuous surface on fiber-reinforced structural cement panels |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01233858A (en) | 1988-03-15 | 1989-09-19 | Fujitsu Ltd | Digital exchange |
US5233603A (en) | 1988-04-21 | 1993-08-03 | Nec Corporation | Packet switch suitable for integrated circuit implementation |
JP2596087B2 (en) | 1988-08-31 | 1997-04-02 | 日本電気株式会社 | Packet switching method |
JP2879981B2 (en) | 1991-02-04 | 1999-04-05 | 富士通株式会社 | ATM cell synchronization method |
US5241536A (en) * | 1991-10-03 | 1993-08-31 | Northern Telecom Limited | Broadband input buffered atm switch |
US5309432A (en) * | 1992-05-06 | 1994-05-03 | At&T Bell Laboratories | High-speed packet switch |
US5394361A (en) * | 1992-10-22 | 1995-02-28 | At&T Corp. | Read/write memory |
US5309395A (en) * | 1992-10-22 | 1994-05-03 | At&T Bell Laboratories | Synchronous static random access memory |
TW252248B (en) * | 1994-08-23 | 1995-07-21 | Ibm | A semiconductor memory based server for providing multimedia information on demand over wide area networks |
US5619500A (en) * | 1994-09-01 | 1997-04-08 | Digital Link Corporation | ATM network interface |
US5602853A (en) * | 1994-11-03 | 1997-02-11 | Digital Equipment Corporation | Method and apparatus for segmentation and reassembly of ATM packets using only dynamic ram as local memory for the reassembly process |
US5568651A (en) * | 1994-11-03 | 1996-10-22 | Digital Equipment Corporation | Method for detection of configuration types and addressing modes of a dynamic RAM |
US5517495A (en) * | 1994-12-06 | 1996-05-14 | At&T Corp. | Fair prioritized scheduling in an input-buffered switch |
US5541918A (en) * | 1995-01-31 | 1996-07-30 | Fore Systems, Inc. | Method and apparatus for manipulating an ATM cell |
-
1995
- 1995-01-31 US US08/381,110 patent/US5541918A/en not_active Expired - Lifetime
- 1995-06-27 CA CA002152714A patent/CA2152714C/en not_active Expired - Fee Related
- 1995-11-08 MX MX9504680A patent/MX9504680A/en not_active IP Right Cessation
-
1996
- 1996-01-31 DE DE69637187T patent/DE69637187T2/en not_active Expired - Lifetime
- 1996-01-31 EP EP96300672A patent/EP0725555B1/en not_active Expired - Lifetime
- 1996-07-26 US US08/687,888 patent/US6278711B1/en not_active Expired - Lifetime
-
2001
- 2001-07-26 US US09/916,096 patent/US7046673B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JP3598335B2 (en) | 2004-12-08 |
US7046673B2 (en) | 2006-05-16 |
EP0725555A2 (en) | 1996-08-07 |
US5541918A (en) | 1996-07-30 |
MX9504680A (en) | 1997-04-30 |
EP0725555A3 (en) | 1999-05-19 |
DE69637187T2 (en) | 2008-04-10 |
CA2152714C (en) | 2002-01-01 |
DE69637187D1 (en) | 2007-09-13 |
US20020009087A1 (en) | 2002-01-24 |
JPH08340340A (en) | 1996-12-24 |
EP0725555B1 (en) | 2007-08-01 |
US6278711B1 (en) | 2001-08-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EEER | Examination request | ||
MKLA | Lapsed |
Effective date: 20150629 |