CA2170758A1 - Flexible destination address mapping mechanism in a cell switching communication controller - Google Patents
Flexible destination address mapping mechanism in a cell switching communication controllerInfo
- Publication number
- CA2170758A1 CA2170758A1 CA002170758A CA2170758A CA2170758A1 CA 2170758 A1 CA2170758 A1 CA 2170758A1 CA 002170758 A CA002170758 A CA 002170758A CA 2170758 A CA2170758 A CA 2170758A CA 2170758 A1 CA2170758 A1 CA 2170758A1
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- Canada
- Prior art keywords
- cell
- communication
- circuit
- identifier
- addressable memory
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/30—Peripheral units, e.g. input or output ports
- H04L49/3081—ATM peripheral units, e.g. policing, insertion or extraction
- H04L49/309—Header conversion, routing tables or routing tags
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L45/00—Routing or path finding of packets in data switching networks
- H04L45/74—Address processing for routing
- H04L45/745—Address table lookup; Address filtering
- H04L45/7453—Address table lookup; Address filtering using hashing
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/30—Peripheral units, e.g. input or output ports
- H04L49/3009—Header conversion, routing tables or routing tags
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/30—Peripheral units, e.g. input or output ports
- H04L49/3081—ATM peripheral units, e.g. policing, insertion or extraction
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
- H04Q11/0428—Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals
- H04Q11/0478—Provisions for broadband connections
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2212/00—Encapsulation of packets
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/30—Peripheral units, e.g. input or output ports
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
Abstract
A mechanism for routing a communication cell in a cell switching communication controller that employs multiple path identifier masking functions selected by a header control field in the communication cell and that employs a content addressable memory comprising a plurality of entries, wherein each entry stores a pre-configured local termination identifier and a pre-configured pass through identifier.
Description
~ wo 95/08233 2 ~ 7 ~ ~ 5 g PCT/US94/08619 FLE~aBLE DEST~ATION ADDRESS MAPP~G MECHANISM
IN A CELL SWITCH~G COMMUNICATION CONTROLLER
FIELD OF THE INVENTION:
The present invention pertains to the field of digital communication controllers. More particularly, this invention relates to a flexible destination address mapping me~h~ni~rn for routing communication cells in a communication controller.
BACKGROUND OF THE INVENTION
Cell relay networks are commonly employed to transfer digital information over long distances. A typical cell relay network is comprised of a set of communication controllers coupled together for communication over common carrier communication links. A
variety of communication devices may be coupled to the communication controllers over local communication links.
Such a cell relay network enables a variety of communication devices coupled to the communication controllers to share the common carrier communication links. The communication devices transfer digital information in the form of communication cells or packets over the common carrier communication links on a demand driven basis. The demand driven sharing of the common carrier communication links in such a cell relay network reduces the cost of maintaining a long distance communication network.
Typically, each communication cell transferred over such a cell relay network contains a cell header that specifies a destination address. The destination address identifies a virtual circuit WO 95/08233 PCT/US94/08619 ~
IN A CELL SWITCH~G COMMUNICATION CONTROLLER
FIELD OF THE INVENTION:
The present invention pertains to the field of digital communication controllers. More particularly, this invention relates to a flexible destination address mapping me~h~ni~rn for routing communication cells in a communication controller.
BACKGROUND OF THE INVENTION
Cell relay networks are commonly employed to transfer digital information over long distances. A typical cell relay network is comprised of a set of communication controllers coupled together for communication over common carrier communication links. A
variety of communication devices may be coupled to the communication controllers over local communication links.
Such a cell relay network enables a variety of communication devices coupled to the communication controllers to share the common carrier communication links. The communication devices transfer digital information in the form of communication cells or packets over the common carrier communication links on a demand driven basis. The demand driven sharing of the common carrier communication links in such a cell relay network reduces the cost of maintaining a long distance communication network.
Typically, each communication cell transferred over such a cell relay network contains a cell header that specifies a destination address. The destination address identifies a virtual circuit WO 95/08233 PCT/US94/08619 ~
2 1 ~ 8 connection on the cell relay network. The cell header specifies a virtual circuit (or a group of virtual circuits) which interconnect a source and destination pair.
For example, a prior cell network interface standard provides a 32 bit destination address format. The destination address comprises a virtual path identifier field (VPI), a virtual circuit identifier field (VCI), and a standard specific control field. The destination address optionally comprises a generic flow control field. The VPI is commonly used to group communication cell transmission through the cell relay network for a set of communication devices. The VCI is commonly used to uniquely identify communication devices within the VPI groups.
A communication controller in such a cell network typically decodes the destination address of an inbound communication cell to determine whether the communication cell is a pass through communication cell or a locally terminated communication cell. A
locally terminated communication cell contains a destination address that specifies a local circuit connection to the communication controller. A pass through communication cell contains a destination address that specifies a circuit connection to some other communication controller in the cell relay network.
For example, such a communication controller may decode the VPI and VCI portions of the destination address to determine whether an inbound communication cell is locally terminated. The communication controller may decode the VPI portion of the ~ WO 95/08233 2 ~ 7 B 7 5 8 PCT/US94/08619 destination address to route a pass through communication cell to the appropriate destination.
Typical prior communication controllers implement a look-up table mechanism to decode the destination address of inbound communication cells. Howeverj a look-up table that fully decodes the VPI and VCI fields of an inbound communication cell requires an extremely large look-up table. Such a large look-up table greatly increases the cost of the communication controller, and reduces the speed of communication cell processing.
As a consequence, prior communication controllers usually simplify the look-up table mechanism by limiting the number of useful destination address bits. ~or example, one prior communication controller limits the VCI field to 10 valid bits and the VPI to 5 valid bits. Such limitations simplify the look-up function, and reduce the amount of memory required to implement the look-up table.
Unfortunately, such prior communication controllers having a limited number of useful destination address bits severely limit the flexibility of cell relay network configuration. Such prior communication controllers limit the number of available destination addresses, and thereby impose limits on the assignment of destination addresses to communication devices. Such prior communication controllers also impose limits on the grouping of cell transmissions by limiting the usefulness of virtual path identifiers.
2~ l ~7c~
SUMMARY AND OBTECTS OF THE INVENTION
One object of the present invention is to provide a flexible destination address mapping mechanism for a cell switching communication controller.
Another object of the present invention is to provide a destination address mapping mechanism that fully decodes the entire destination address range of communication cells in a cell relay network.
A further object of the present invention is to decode the destination address by employing multiple sets of local termination masking functions and pass through masking functions that are selected by a header control field in the cell header of the communication cell.
Another object of the present invention is to map the decoded destination address to a cell frame header for routing the communication cell through an internal switching fabric by employing a two pass content addressable memory match, wherein each entry in the content addressable memory stores a local termination identifier and a pass through identifier.
Another object of the present invention is to enable a user to pre configure the masking functions, the local termination and pass through identifiers, and the cell frame headers according to the topology of the cell relay network.
These and other objects of the invention are provided by a method for routing a communication cell in a cell switching ~ wo 9s/08233 2 17 ~ ~5 8 PCT/US94/08619 communication controller. A communication module in the communication controller receives the communication cell over a first communication link in a cell relay network. The communication cell comprises a cell header that specifies a destination address for the communication cell. The communication module generates a path identifier by performing a path identifier masking function on the destination address. The path identifier masking function is defined by a set of predetermined mask data values stored in a mask function memory of the communication module.
The communication module matches the path identifier to a content addressable memory such that a match address in the content addressable memory specifies a cell frame header block in a cell frame header table. The content addressable memory comprises a plurality of entries, wherein each entry stores a pre configured local termination identifier and a pre configured pass through identifier.
The communication module reads the cell frame header block from the cell frame header table according to the match address, and generates a cell frame comprising the cell frame header, the cell header, and a cell payload from the communication cell.
The communication module then transfers the cell frame to a destination communication module specified by the cell frame header, such that the destination communication module transfers the communication cell over a second communication link.
For example, a prior cell network interface standard provides a 32 bit destination address format. The destination address comprises a virtual path identifier field (VPI), a virtual circuit identifier field (VCI), and a standard specific control field. The destination address optionally comprises a generic flow control field. The VPI is commonly used to group communication cell transmission through the cell relay network for a set of communication devices. The VCI is commonly used to uniquely identify communication devices within the VPI groups.
A communication controller in such a cell network typically decodes the destination address of an inbound communication cell to determine whether the communication cell is a pass through communication cell or a locally terminated communication cell. A
locally terminated communication cell contains a destination address that specifies a local circuit connection to the communication controller. A pass through communication cell contains a destination address that specifies a circuit connection to some other communication controller in the cell relay network.
For example, such a communication controller may decode the VPI and VCI portions of the destination address to determine whether an inbound communication cell is locally terminated. The communication controller may decode the VPI portion of the ~ WO 95/08233 2 ~ 7 B 7 5 8 PCT/US94/08619 destination address to route a pass through communication cell to the appropriate destination.
Typical prior communication controllers implement a look-up table mechanism to decode the destination address of inbound communication cells. Howeverj a look-up table that fully decodes the VPI and VCI fields of an inbound communication cell requires an extremely large look-up table. Such a large look-up table greatly increases the cost of the communication controller, and reduces the speed of communication cell processing.
As a consequence, prior communication controllers usually simplify the look-up table mechanism by limiting the number of useful destination address bits. ~or example, one prior communication controller limits the VCI field to 10 valid bits and the VPI to 5 valid bits. Such limitations simplify the look-up function, and reduce the amount of memory required to implement the look-up table.
Unfortunately, such prior communication controllers having a limited number of useful destination address bits severely limit the flexibility of cell relay network configuration. Such prior communication controllers limit the number of available destination addresses, and thereby impose limits on the assignment of destination addresses to communication devices. Such prior communication controllers also impose limits on the grouping of cell transmissions by limiting the usefulness of virtual path identifiers.
2~ l ~7c~
SUMMARY AND OBTECTS OF THE INVENTION
One object of the present invention is to provide a flexible destination address mapping mechanism for a cell switching communication controller.
Another object of the present invention is to provide a destination address mapping mechanism that fully decodes the entire destination address range of communication cells in a cell relay network.
A further object of the present invention is to decode the destination address by employing multiple sets of local termination masking functions and pass through masking functions that are selected by a header control field in the cell header of the communication cell.
Another object of the present invention is to map the decoded destination address to a cell frame header for routing the communication cell through an internal switching fabric by employing a two pass content addressable memory match, wherein each entry in the content addressable memory stores a local termination identifier and a pass through identifier.
Another object of the present invention is to enable a user to pre configure the masking functions, the local termination and pass through identifiers, and the cell frame headers according to the topology of the cell relay network.
These and other objects of the invention are provided by a method for routing a communication cell in a cell switching ~ wo 9s/08233 2 17 ~ ~5 8 PCT/US94/08619 communication controller. A communication module in the communication controller receives the communication cell over a first communication link in a cell relay network. The communication cell comprises a cell header that specifies a destination address for the communication cell. The communication module generates a path identifier by performing a path identifier masking function on the destination address. The path identifier masking function is defined by a set of predetermined mask data values stored in a mask function memory of the communication module.
The communication module matches the path identifier to a content addressable memory such that a match address in the content addressable memory specifies a cell frame header block in a cell frame header table. The content addressable memory comprises a plurality of entries, wherein each entry stores a pre configured local termination identifier and a pre configured pass through identifier.
The communication module reads the cell frame header block from the cell frame header table according to the match address, and generates a cell frame comprising the cell frame header, the cell header, and a cell payload from the communication cell.
The communication module then transfers the cell frame to a destination communication module specified by the cell frame header, such that the destination communication module transfers the communication cell over a second communication link.
3 PCT/US94/08619 ~
2~758 Other objects, features and advantages of the present invention will be apparent from the accompanying drawings, and from the detailed description that follows below.
WO 9S/08233 217 0 7 ~ 8 PCT/US94/08619 BRIEF DESCRIPTION OF THE DRAWINGS
The present invention is illustrated by way of example and not limitation in the figures of the accompanying drawings in which like re~lences indicate similar elements, and in which:
Figure 1 illustrates one communication network comprising of a set of communication devices and a set of broadband cell exchange units (BCX);
Figure 2 is a block diagram of a broadband cell exchange unit comprising a set of communication modules, along with a control processor, an arbiter, and a switching circuit;
Figure 3 illustrates the format of an inbound communication cell for one embodiment;
Figures 4 illustrates the format for a cell frame for one embodiment, wherein the cell frame comprises a cell frame header, a cell header from an encapsulated inbound communication cell, a header error code, a cell payload from an encapsulated inbound communication cell, and a payload error code;
Figure 5 illustrates the encapsulation of the inbound communication cell into the cell frame by the communication module;
Figure 6 illustrates a communication module comprising a serial interface unit (SIU), a communication interface formatter (CIF), and a communication interface module (CIM);
Figure 7 illustrates an inbound cell circuit comprising a physical layer interface circuit, a physical layer protocol processor (PLPP) circuit, WO 95/08233 ' PCT/US94108619 ~
~ ~ 7 ~ 8 a cell input circuit, a cell frame header (CFH) memory, a content addressable memory (CAM), and a mask function memory;
Figure 8 illustrates an arrangement of masked data values in the mask function memory for one embodiment;
Figure 9 illustrates a CAM circuit comprising a CAM mask register and a set of 1024 CAM entries;
Figure 10 is a flow diagram illustrating a method for selecting a cell frame header for an inbound communication cell.
W0 95/08233 2 i ~ 0 7~ 8 PCTIUS94/0861~
DETAILED DESCRIPTION
Figure 1 illustrates one communication network 200. The communication network 200 is comprised of a set of broadband cell exchange units (BCX) 20-24. The broadband cell exchange units 20-24 enable communication over a set of broadband communication links 30-35 according to a cell switching communication protocol. For one embodiment, each BCX 20-24 enables high speed communication over thirty-six separate broadband communication links.
For example, the BCX 20 enables communication over the broadband communication links 30 and 32, and the BCX 23 enables communication over the broadband communication links 33-35.
The broadband cell exchange units 20-24 also enable long distance communication among a wide variety of communication devices over the communication network 200. The communication devices are coupled to the broadband cell exchange units 20-24 via local communication links.
For example, the BCX 20 enables communication over the communication network 200 by a private branch exchange (PBX) 25.
The BCX 20 is coupled for communication with the PBX 25 over a local communication link 15.
The BCX 20 also enables communication with a video communication controller (VIDEO) 27 over the communication network 200. The BCX 20 is coupled for communication with the video communication controller 27 over a local communication link 17.
WO 95/08233 ' . PCT/US94/08619 2 1 ~
The BCX 23 enables communication with a local area network controller (LAN) 26 over the communication network 200. The BCX
23 is coupled for communication with the local area network controller 26 over a local communication link 16. Also, the BCX 24 enables communication with a local area network controller 28 over a local communication link 18.
The BCX's 20-24 also perform tandem cell switching for the communication network 200. For example, the video communication controller 27 communicates with the local area network controller 28 by transferring communication cells through the BCX's 20, 21 24. The BCX 2 performs tandem cell switching for communication cell transfer between the video communication controller 27 and the local area network controller 28.
The video communication controller 27 may alternatively communicate with the local area network controller 28 by transferring communication cells through the BCX's 20, 22, 23 and 24, such that the BCX's 22 and 23 perform tandem cell switching.
Figure 2 is a block diagram of the BCX Z0. The BCX 20 comprises a set of communication modules 50-53, along with a control processor 40, an arbiter 41, and a switching circuit 42.
The communication modules 50-53 enable high speed communication over a variety of communication links according to a cell switching communication protocol. For example, the communication modules 50 and 51 enable communication over the broadband communication links 30 and 32, respectively. The W0 95/08233 2 17 ~ 7 5 8 PCT/US94/08619 communication module 52 enables communication over the local communication link 15, and the communication module 53 enables communication over the local communication link 17.
The communication modules 50-53 exchange communication cells by transferring cell frames over a set of cell exchange lines 62.
The cell exchange lines 62 comprise multiple pairs of transmit and receive data lines. The cell exchange lines 62 provide a pair of transmit and receive data lines for each of the communication modules 50-53. The cell exchange lines 62 enable concurrent tr~n~mi~sion of multiple serial data streams among the communication modules 50-53.
The switching circuit 42 provides full serial communication connectivity among the communication modules 50-53. through the cell exchange lines 62.
The arbiter 41 controls the configuration of the switching circuit 42. The arbiter 41 determines transmission requests by polling the communication modules 50-53 over an arbitration/control bus 63.
The arbiter 41 configures the switching circuit 42 for single-destination transmissions and multicast transmissions.
A single-destination configuration of the switching circuit 42 provides a serial data transfer link between one source communication module and one destination communication module. A multicast configuration of the switching circuit 42 provides multiple serial data transfer links from one source ~ ~ 7 ~ r~s ~
communication module to multiple destination communication modules.
The communication modules 50-53 function as source communication modules by receiving inbound communication cells over the communication network 200, encaps~ ting the inbound communication cells into cell frames having an internal cell frame format, and transferring the cell frames through serial data transfer links in the cell exchange lines 62 to the appropriate destination communication modules.
Each cell frame contains a cell frame header that specifies the appropriate destination communication module from among the communication modules 50-53. The cell frame header specifies a primary and a secondary destination communication module for a single destination communication cell, or a set of destination communication modules for a multicast communication cell. The cell frame header also specifies a queue channel in the destination communication module to buffer the communication cell prior to outbound transfer.
The communication modules 50-53 function as destination communication modules by receiving the cell frames through the serial data transfer links in the cell exchange lines 62, and extracting the communication cells from the cell frames. The destination communication modules buffer the disassembled communication cells in the specified queue channels, and then transfer the communication cells over the communication network 200 as wo gs/08233 2 1 7 D 7~ ~ PCT/US94/08619 outbound communication cells according to pre defined service parameters for the queue channels.
The communication modules 50-53 determine the cell frame headers required to properly navigate the inbound communication cells through the BCX 20. The communication modules 50-53 determine the cell frame headers by mapping the cell headers of the inbound communication cells to a set of pre configured cell frame headers. Each communication module 50-53 contains a cell frame header table that stores the pre configured cell frame headers. The control processor 40 writes the pre configured cell frame headers into the cell frame header tables over a control processor bus 61.
For example, the communication module 50 contains a preprogrammed cell frame header table that stores a set cell frame header blocks. Each cell frame header block defines a cell frame path through the BCX 20. Each cell frame header block specifies one or more destination communication modules from among the communication modules 51-53 for the corresponding cell frame. Each cell frame header block also specifies a queue channel in the destination communication module.
The communication module 50 receives an inbound communication cell over the broadband communication link 30 and extracts the cell header. The communication module 50 determines whether the cell header of the inbound communication cell specifies a path through the BCX 20 or whether the inbound communication cell terminates locally on the BCX 20.
WO 95/08233 PCT/US94/08619 ~
2~ ~7~8 The communication module 50 then selects a cell frame header for the inbound communication cell by mapping the destination address of the cell header to the cell frame header table. The selected cell frame header specifies a destination communication module coupled to the appropriate broadband communication link if the inbound communication cell specifies a path through the BCX 20.
The selected cell frame header specifies a destination communication module coupled to the appropriate local communication link if the inbound communication cell specifies a local termination on the BCX
20.
The communication module 50 encapsulates the inbound communication cell into a cell frame having the selected cell frame header. The communication module 50 then generates a transmission request in response to a poll by the arbiter 41. The transmission request to the arbiter 41 specifies the communication module indicated by the cell frame header as the destination for the cell frame. The arbiter 41 then configures the switching circuit 42 to create a serial data transfer link in the switching circuit 42 according to the transmission request.
Thereafter, the communication module 50 transmits the cell frame containing the inbound communication cell over the configured serial data transfer link in the cell exchange lines 62 to the destination communication module.
The destination communication module receives the cell frame over the configured serial data transfer link, removes the W095/08233 2~ 7~75~ PCT/US94/08619 encapsulated communication cell from the cell frame, and stores the communication cell in the queue channel specified by the cell frame header. The destination communication module then transmits the commllni--~tion cell over a broadband communication link or a local cornmunication link according to the cell service parameters for the queue channel.
The arbiter 41 polls the communication modules 50-53 according to a sequence determined by the control processor 40. The control processor 40 determines the poll sequence ordering and priority to ensure that each of the communication modules 50-53 has sufficient access to serial data transfer links through the switching circuit 42.
Figure 3 illustrates the format of an inbound communication cell 110 for one embodiment. The inbound communication cell 110 comprises a 12 bit virtual path identifier (VPI[11:0]) and a 16 bit virtual circuit identifier (VCI[16:0]). The virtual path identifier may be used to specify a virtual path through the communication network 200 for the inbound communication cell 110. The virtual circuit identifier may be used to specify a local termination on the communication network 200 for the inbound communication cell 110.
The inbound communication cell 110 further comprises a standard specific header field (SSH), a header cyclic redundancy code (CRC), and a cell payload. The cell payload contains the payload data for the inbound communication cell 110.
7 ~ ~
The inbound communication cell 110 illustrates a communication cell for a network-network interface (NNI) standard.
An alternative user network interface (UNI) standard provides of an 8 bit virtual path identifier for the inbound communication cell 110.
The VPI [11:8] is replaced with a generic flow control (GFC) field for the UNI version of the inbound communication cell 110.
Figure 4 illustrates the format for a cell frame 120 for one embodiment. The cell frame 120 comprises a cell frame header, a cell header from an encapsulated inbound communication cell, a header error code, a cell payload from an encapsulated inbound communication cell, an a payload error code.
The cell frame header includes a destination field comprising a type field, and either a primary (PRI) and secondary (SEC) communication module identifier or a multicast group number. The type field specifies whether the cell frame 120 is a single destination cell frame or a multicast cell frame. If the type field specifies a single destination cell frame, the primary communication module identifier specifies the primary destination for the cell frame 120 and the secondary communication module identifier specifies a backup destination for the cell frame 120. If the type field specifies a multicast cell, the multicast group number specifies a group of destination communication modules.
The cell frame header further comprises a queue channel field and a control field. The queue channel field specifies one of the queue ch~nnPl~ contained in the destination communication module. The ~ WO 95108233 2 ~ ~ 0 7 5 8 PCT/US94/08619 specified queue channel buffers the encapsulated communication cell prior to outbound trAn~mi~sic-n. The control field contains parameters that are employed during queue channel servicing to control cell queue congestion in the communication network 200.
The cell frame header further comprises a source field that indicates the source communication module from among the communication modules 50-53 for the cell frame 120.
Figure 5 illustrates the encapsulation of the inbound communication cell 110 into the cell frame 120 by the communication module 50. The communication module 50 receives the inbound communication cell 110 over the broadband communication link 30.
The communication module 50 assembles the cell frame 120 comprising a cell frame header, the cell header from the inbound commllnic~tion cell 110, a header error code, the cell payload from the inbound communication cell 110, and a payload error code.
The communication module 50 decodes a portion of the cell header of the inbound communication cell 110 as a header control field (HCF). For one embodiment, the upper two bits of the cell header comprise the header control field HCF.
The header error code provides a bit by bit parity check of the cell frame header and the cell header portions of the cell frame 120.
The header error code enables verification of the header information in the cell frame 120 by the destination communication module.
The payload error code provides a bit by bit parity check of the cell payload contained in the cell frame 120. The payload error code 2i~a~8 enables verification of the cell frame 120 payload data by the destination communication module.
The commllnic~tion module 50 extracts a path identifier from the inbound communication cell 110 by performing a path identifier masking function on the cell header. For one embodiment, the HCF
portion of the cell header selects the path identifier masking function from a set of preprogrammed path identifier masking functions implemented in the communication module 50. For another embodiment, a single preprogrammed masking function for a standard cell header format is implemented in the communication module 50.
The control processor 40 programs the path identifier masking functions into the communication module 50 over the control processor bus 61. The path identifier masking function extracts a local termination path identifier and a pass through path identifier for the inbound communication cell 110.
The local termination path identifier indicates a local termination for the communication cell 110 on the communication network 200. Por example, the path identifier masking functions may be preprogrammed to extract the combined VPI and VCI bits of the inbound communication cell 110 as the local termination path identifier.
The pass through path identifier indicates a virtual path for the communication cell 110 through the communication network 200.
For example, the path identifier masking functions may be ~ WO 95/08233 21~ 0 75 ~ PCT/US94/08619 preprogrammed to extract the VPI bits of the inbound communication cell 110 as the pass through path identifier.
The local termination path identifiers and the pass through path i~l~ntifi~rs specify cell frame header blocks in a cell frame header table 130. The cell frame header table 130 contains a set of preprogrammed cell frame header blocks. The control processor 40 programs the cell frame header blocks into the cell frame header table 130 over the control processor bus 61.
The local termination path identifiers and the pass through path identifiers map to the cell frame header table 130 via a content addressable memory (CAM). The control processor 40 programs the local termination path identifiers and the pass through path identifiers into the CAM over the control processor bus 61.
The local termination path identifiers and the pass through path identifiers provide data inputs the CAM. The CAM generates match addresses corresponding to the local termination path identifiers and the pass through path identifiers. The match address indicates the CAM entry that stores the local termination path i(l~ntifiers or the pass through path identifiers. The match address provides a pointer to a cell frame header block in the cell frame header table 130. The selected cell frame header block provides the cell frame header for the cell frame 120.
Figure 6 illustrates the communication module 50. The communication module 50 comprises a serial interface unit (SIU) 75, a WO 95/08233 PCT/US94/08619 ~
21 7 ~
communication interface formatter (CIF) 77, and a communication interface module (CIM) 290.
The SIU 75 enables serial communication through configured serial data transfer links in the switching circuit 42 over the cell exchange lines 62. The cell exchange lines 62 comprise multiple pairs of transmit and receive data lines. The cell exchange lines 62 include a transmit data line 80 and a receive data line 81 coupled to the SIU 75.
The CIF 77 enables transfer of communication cells between the SIU 75 and the CIM 290. The CIF 77 also handles polls from the arbiter 41 over the arbitration/control bus 63.
The CIM 290 enables transfer of communication cells over the broadband communication link 30. The CIM 290 implements queue chAnn~l~ for buffering outbound communication cells prior to transfer over the communication network 200.
The CIM 290 receives inbound communication cells over the broadband communication link 30, encapsulates the inbound communication cells into cell frames, and transfers the cell frames to the CIF 77. The CIF 77 then generates an appropriate transmission request in response to a poll by the arbiter 41. The arbiter 41 configures the switching circuit 42 to create a serial data transfer link in the switching circuit 42 according to the transmission request. The CIF 77 then transfers the cell frame to the SIU 75, and the sru 75 serially transmits the cell frame through the configured serial data transfer link on the cell exchange lines 62 to the destination communication module.
W095/08233 ~ ~ 7 075 8 PCT/US94/08619 The SIU 75 receives the cell frames through the serial data transfer links in the cell exchange lines 62, performs clock and data recovery, and transfers the cell frames to the CIF 77. The CIF 77 disassembles the encapsulated communication cells from the cell frames, and transfers the communication cells to the CIM 290. The CIM 290 buffers the disassembled communication cells in the queue channels spedfied by the cell frame headers. The CIM 290 then transfers the communication cells over the broadband communication link 30 as outbound communication cells according to pre defined queue service parameters for the queue channels.
Figure 7 illustrates an inbound cell circuit in the CIM 290 for one embodiment. The inbound cell circuit comprises a physical layer interface receiver 100, a physical layer protocol processor (PLPP) receiver 102, a cell input circuit 104, a cell frame header (CFH) memory 106, a content addressable memory (CAM) circuit 108, and a mask function memory 112.
The physical layer interface receiver 100 receives inbound communication cells over the broadband communication link 30.
The physical layer interface receiver 100 performs analog signal level to digital signal level conversion on the inbound communication cell signal. The physical layer interface receiver 100 transfers the serial bit stream over a signal line 130. For one embodiment, the broadband communication link 30 comprises a T3 communication line, and the physical layer interface receiver 100 is a T3 receiver.
2 ~ 8 The PLPP receiver 102 receives the serial bit stream from the physical layer interface receiver 100, and locates the cell boundaries of the inbound communication cells. The PLPP receiver 102 places a byte stream comprising the inbound communication cells in an internal first-in-first-out (~O) memory. The FIFO is read by the cell input circuit 104 over a cell bus 132. The PLPP receiver 102 also transfers sync signals over the cell bus 132 to notify the cell input circuit 104 that a complete cell is assembled in the internal FIFO.
The cell input circuit 104 fetches the inbound communication cell byte stream over the cell bus 132, and encapsulates the inbound communication cells into cell frames. The cell input circuit 104 receives cell frame headers for the cell frames from the CFH memory 106 over a CFH bus 134.
The CFH memory 106 is a random access memory that stores the cell frame header table 130. The cell frame header table 130 contains a set of preprogrammed cell frame header blocks. The control processor 40 programs the cell frame header blocks into the CFH memory 106 over the control processor bus 61.
The mask function memory 112 performs the path identifier masking functions to extract the local termination path identifier and the pass through path identifier for each inbound communication cell. The mask function memory 112 stores mask data values for each byte of the cell header. For one embodiment, each mask data value in the mask function memory 112 comprises 8 bits. The control wo 95/08233 ~ ~ 7 ~ 7 5 8 PCT/U$94~08619 processor 40 programs the mask data values into the mask function memory 112 over the control processor bus 61.
- The cell input circuit 104 selects the mask data values from the mask fllnction memory 112 through a mask function input bus 140.
The mask function input bus 140 provides an address for the mask data values stored in the mask function memory 112. The mask function input bus 140 comprises a pass select signal, an HCF select signal, a header byte select signal, and a header byte data value.
The pass select signal selects either a set of pass through identifier masking functions or local termination identifier masking functions. The cell input circuit 104 sets the pass select signal = 0 to perform the local termination masking functions, and sets the pass select signal = 1 to perform the pass through identifier masking functions.
The HCF select signal reflects the HCF field of the inbound communication cells. For one embodiment, the 2 bit HCF field selects a set of masking functions from 4 available sets of masking functions.
The header byte select signal maps each byte of the cell header to the mask function memory 112. For one embodiment, the header byte select signal ranges between 0 and 3 because the cell header comprises 4 bytes and the mask data values are 8 bits wide.
The header byte data value successively carries each byte of the cell header. The cell input circuit 104 transfers each byte of the cell header sequentially over the mask function input bus 140 as the WO9S/~Q~3 PCTrUS94/08619 2~7~75~
header byte data value to perform the selected path identifier mA~king function on the destination address.
The mask function memory 112 transfers the mask data values s~lecte-l via the mask function input bus 140 to the CAM circuit 108 over a path identifier bus 138. The CAM circuit 108 assembles the mask data values into a 32 bit path identifier. The CAM circuit 108 then performs a CAM look-up for the path identifier. The CAM
circuit 108 transfers a match address to the CFH memory 106 over a CFH pointer bus 136 if a CAM match for the path identifier occurs.
The match address on the CFH pointer bus 136 provides a pointer to a cell frame header block stored in the CFH memory 106.
The cell input circuit 104 receives the selected cell frame header block over the CFH bus 134. The cell input circuit 104 then inserts the cell frame header into a cell frame as described above. The cell input circuit 104 transfers the cell frame to the CIF 77 over a bus 432.
Figure 8 illustrates an arrangement of masked data values in the mask function memory 112 for one embodiment. The mask function input bus 140 provides an 13 bit address for the mask data values. The pass select signal provides address bit 12 (the most significant bit), the HCF select signal provides address bits 11:10, the header byte select signal provides address bits 9:8, and the header byte data value provides address bits 7:0.
The mask function memory 112 contains mask data values for the local termination masking functions (PASS = 0) and the pass through masking functions (PASS = 1) for all possible HCF values and ~ W095/08233 2 ~ ~ ~ 7 5 ~ PCTrUS94/08619 header byte values. For example, address 0 of the mask function memory 112 stores a mask data value for a header byte value = 0, a header byte select = 0, and an HCF = 0, and a PASS = 0. Likewise, address lC40 hex of the mask function memory 112 stores a mask data value for a header byte value = 40 hex, a header byte select = 0, and an HCF = 3, and a PASS = 1.
Figure 9 illustrates the CAM circuit 108. The CAM circuit 108 comprises a CAM mask register 160 and a set of 1024 CAM entries.
The CAM mask register 160 comprises 64 bits, and each CAM entry comprises 64 bits.
For one embodiment, each CAM entry stores a pair of path identifiers; a local termination path identifier (LTPID) and a pass through path identifier (PTPID). For example, the CAM entry 0 stores a LTPID_0 and a PTPID_0. The path identifiers in the CAM circuit 108 are programmed by the control processor 40 over the control processor bus 41.
For a local termination identifier CAM look-up, the cell input circuit 104 sets the upper 32 bits of the CAM mask register 160 to all one's and sets the lower 32 bits of the CAM mask register 160 to all zeros. The local termination identifier CAM look-up matches to the path identifiers LTPID_0 through LTPID_3FF.
For a pass through identifier CAM look-up, the cell input circuit 104 sets the upper 32 bits of the CAM mask register 160 to all zeros and sets the lower 32 bits of the CAM mask register 160 to all ~ ~ ~
one's. The pass through identifier CAM look-up matches to the path identifiers PTPID_0 through PTPID_3FF.
Por other embodiments, a variety of LTPID and PTPID
arrangements in the CAM circuit 108 are possible. The CAM mask register 160 i~lentifie5 the appropriate bits in each CAM entry for either a LTPID match or a PTPID match.
Figure 10 is a flow diagram illustrating a method for selecting a cell frame header for an inbound communication cell. At block 300, the cell input circuit 104 receives an inbound communication cell over the broadband communication link 30.
At block 302, the cell input circuit 104 selects the PASS = 0 masking function by setting the pass select signal on the mask function input bus 140 to access the local termination mask data values in the mask function memory 112. The cell input circuit 104 also sets the HCF select signal on the mask function input bus 140 according to the HCF field of inbound communication cell.
At block 304, the cell input circuit 104 performs the selected path identifier masking function on the cell header by transferring the header bytes and corresponding header byte select signals to the mask function memory 112 via the mask function input bus 140. The mask function memory 112 transfers the selected mask data values to the CAM circuit 108 over path identifier bus 138.
At block 306, the cell input circuit 104 sets the upper 32 bits of the CAM mask register 160 to all one's and sets the lower 32 bits of the CAM mask register 160 to all zeros to match to the path identifiers ~1~ WO 95/08233 ~ ~L 7 ~ 7 ~ 8 PCT/US94/08619 LTPID_0 through LTPID_3FF. The CAM circuit 108 assembles the mask data values corresponding to the destination address of the cell header into a 32 bit path identifier and then performs a CAM look-up for the path i~l~nhfier. If a CAM match is detected at decision block 308, then control proceeds to block 310.
At block 310, the CAM circuit 108 transfers the match address to the CFH memory 106 over the CFH pointer bus 136 to access a cell frame header block from the CFH memory 106. Thereafter at block 312, the cell input circuit 104 receives the selected cell frame header block over the CFH bus 134, and assembles the cell frame as previously described.
If a CAM match does not occur at decision block 308, then control proceeds to block 314. At block 314, the cell input circuit 104 selects the PASS = 1 masking functions by setting the pass select signal on the mask function input bus 140 to access the pass through mask data values in the mask function memory 112.
At block 316, the cell input circuit 104 performs the selected path identifier masking function on the cell header by again transferring the header bytes and corresponding header byte select signals to the mask function memory 112 via the mask function input bus 140. The cell input circuit 104 sets the upper 32 bits of the CAM
mask register 160 to all zeros and sets the lower 32 bits of the CAM
mask register 160 to all one's to match to the path identifiers PTPID_0 through PTPID_3FF. The CAM circuit 108 assembles the mask data values corresponding to the destination address of the cell header into 2~7~8 a 32 bit path i~ntifi~r and then performs a CAM look-up for the new path i~ ntifier.
If a CAM match is detected at decision block 318, then control proceeds to block 310 to access a pass through cell header block from the CFH memory 106.
In the foregoing spe~ifi~tion, the invention has been described with refeL~lLce to specific exemplary embodiments thereof. It will, however, be evident that various modifications and changes may be made thereto without departing from the broader spirit and scope of the invention as set forth in the appended claims. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense.
2~758 Other objects, features and advantages of the present invention will be apparent from the accompanying drawings, and from the detailed description that follows below.
WO 9S/08233 217 0 7 ~ 8 PCT/US94/08619 BRIEF DESCRIPTION OF THE DRAWINGS
The present invention is illustrated by way of example and not limitation in the figures of the accompanying drawings in which like re~lences indicate similar elements, and in which:
Figure 1 illustrates one communication network comprising of a set of communication devices and a set of broadband cell exchange units (BCX);
Figure 2 is a block diagram of a broadband cell exchange unit comprising a set of communication modules, along with a control processor, an arbiter, and a switching circuit;
Figure 3 illustrates the format of an inbound communication cell for one embodiment;
Figures 4 illustrates the format for a cell frame for one embodiment, wherein the cell frame comprises a cell frame header, a cell header from an encapsulated inbound communication cell, a header error code, a cell payload from an encapsulated inbound communication cell, and a payload error code;
Figure 5 illustrates the encapsulation of the inbound communication cell into the cell frame by the communication module;
Figure 6 illustrates a communication module comprising a serial interface unit (SIU), a communication interface formatter (CIF), and a communication interface module (CIM);
Figure 7 illustrates an inbound cell circuit comprising a physical layer interface circuit, a physical layer protocol processor (PLPP) circuit, WO 95/08233 ' PCT/US94108619 ~
~ ~ 7 ~ 8 a cell input circuit, a cell frame header (CFH) memory, a content addressable memory (CAM), and a mask function memory;
Figure 8 illustrates an arrangement of masked data values in the mask function memory for one embodiment;
Figure 9 illustrates a CAM circuit comprising a CAM mask register and a set of 1024 CAM entries;
Figure 10 is a flow diagram illustrating a method for selecting a cell frame header for an inbound communication cell.
W0 95/08233 2 i ~ 0 7~ 8 PCTIUS94/0861~
DETAILED DESCRIPTION
Figure 1 illustrates one communication network 200. The communication network 200 is comprised of a set of broadband cell exchange units (BCX) 20-24. The broadband cell exchange units 20-24 enable communication over a set of broadband communication links 30-35 according to a cell switching communication protocol. For one embodiment, each BCX 20-24 enables high speed communication over thirty-six separate broadband communication links.
For example, the BCX 20 enables communication over the broadband communication links 30 and 32, and the BCX 23 enables communication over the broadband communication links 33-35.
The broadband cell exchange units 20-24 also enable long distance communication among a wide variety of communication devices over the communication network 200. The communication devices are coupled to the broadband cell exchange units 20-24 via local communication links.
For example, the BCX 20 enables communication over the communication network 200 by a private branch exchange (PBX) 25.
The BCX 20 is coupled for communication with the PBX 25 over a local communication link 15.
The BCX 20 also enables communication with a video communication controller (VIDEO) 27 over the communication network 200. The BCX 20 is coupled for communication with the video communication controller 27 over a local communication link 17.
WO 95/08233 ' . PCT/US94/08619 2 1 ~
The BCX 23 enables communication with a local area network controller (LAN) 26 over the communication network 200. The BCX
23 is coupled for communication with the local area network controller 26 over a local communication link 16. Also, the BCX 24 enables communication with a local area network controller 28 over a local communication link 18.
The BCX's 20-24 also perform tandem cell switching for the communication network 200. For example, the video communication controller 27 communicates with the local area network controller 28 by transferring communication cells through the BCX's 20, 21 24. The BCX 2 performs tandem cell switching for communication cell transfer between the video communication controller 27 and the local area network controller 28.
The video communication controller 27 may alternatively communicate with the local area network controller 28 by transferring communication cells through the BCX's 20, 22, 23 and 24, such that the BCX's 22 and 23 perform tandem cell switching.
Figure 2 is a block diagram of the BCX Z0. The BCX 20 comprises a set of communication modules 50-53, along with a control processor 40, an arbiter 41, and a switching circuit 42.
The communication modules 50-53 enable high speed communication over a variety of communication links according to a cell switching communication protocol. For example, the communication modules 50 and 51 enable communication over the broadband communication links 30 and 32, respectively. The W0 95/08233 2 17 ~ 7 5 8 PCT/US94/08619 communication module 52 enables communication over the local communication link 15, and the communication module 53 enables communication over the local communication link 17.
The communication modules 50-53 exchange communication cells by transferring cell frames over a set of cell exchange lines 62.
The cell exchange lines 62 comprise multiple pairs of transmit and receive data lines. The cell exchange lines 62 provide a pair of transmit and receive data lines for each of the communication modules 50-53. The cell exchange lines 62 enable concurrent tr~n~mi~sion of multiple serial data streams among the communication modules 50-53.
The switching circuit 42 provides full serial communication connectivity among the communication modules 50-53. through the cell exchange lines 62.
The arbiter 41 controls the configuration of the switching circuit 42. The arbiter 41 determines transmission requests by polling the communication modules 50-53 over an arbitration/control bus 63.
The arbiter 41 configures the switching circuit 42 for single-destination transmissions and multicast transmissions.
A single-destination configuration of the switching circuit 42 provides a serial data transfer link between one source communication module and one destination communication module. A multicast configuration of the switching circuit 42 provides multiple serial data transfer links from one source ~ ~ 7 ~ r~s ~
communication module to multiple destination communication modules.
The communication modules 50-53 function as source communication modules by receiving inbound communication cells over the communication network 200, encaps~ ting the inbound communication cells into cell frames having an internal cell frame format, and transferring the cell frames through serial data transfer links in the cell exchange lines 62 to the appropriate destination communication modules.
Each cell frame contains a cell frame header that specifies the appropriate destination communication module from among the communication modules 50-53. The cell frame header specifies a primary and a secondary destination communication module for a single destination communication cell, or a set of destination communication modules for a multicast communication cell. The cell frame header also specifies a queue channel in the destination communication module to buffer the communication cell prior to outbound transfer.
The communication modules 50-53 function as destination communication modules by receiving the cell frames through the serial data transfer links in the cell exchange lines 62, and extracting the communication cells from the cell frames. The destination communication modules buffer the disassembled communication cells in the specified queue channels, and then transfer the communication cells over the communication network 200 as wo gs/08233 2 1 7 D 7~ ~ PCT/US94/08619 outbound communication cells according to pre defined service parameters for the queue channels.
The communication modules 50-53 determine the cell frame headers required to properly navigate the inbound communication cells through the BCX 20. The communication modules 50-53 determine the cell frame headers by mapping the cell headers of the inbound communication cells to a set of pre configured cell frame headers. Each communication module 50-53 contains a cell frame header table that stores the pre configured cell frame headers. The control processor 40 writes the pre configured cell frame headers into the cell frame header tables over a control processor bus 61.
For example, the communication module 50 contains a preprogrammed cell frame header table that stores a set cell frame header blocks. Each cell frame header block defines a cell frame path through the BCX 20. Each cell frame header block specifies one or more destination communication modules from among the communication modules 51-53 for the corresponding cell frame. Each cell frame header block also specifies a queue channel in the destination communication module.
The communication module 50 receives an inbound communication cell over the broadband communication link 30 and extracts the cell header. The communication module 50 determines whether the cell header of the inbound communication cell specifies a path through the BCX 20 or whether the inbound communication cell terminates locally on the BCX 20.
WO 95/08233 PCT/US94/08619 ~
2~ ~7~8 The communication module 50 then selects a cell frame header for the inbound communication cell by mapping the destination address of the cell header to the cell frame header table. The selected cell frame header specifies a destination communication module coupled to the appropriate broadband communication link if the inbound communication cell specifies a path through the BCX 20.
The selected cell frame header specifies a destination communication module coupled to the appropriate local communication link if the inbound communication cell specifies a local termination on the BCX
20.
The communication module 50 encapsulates the inbound communication cell into a cell frame having the selected cell frame header. The communication module 50 then generates a transmission request in response to a poll by the arbiter 41. The transmission request to the arbiter 41 specifies the communication module indicated by the cell frame header as the destination for the cell frame. The arbiter 41 then configures the switching circuit 42 to create a serial data transfer link in the switching circuit 42 according to the transmission request.
Thereafter, the communication module 50 transmits the cell frame containing the inbound communication cell over the configured serial data transfer link in the cell exchange lines 62 to the destination communication module.
The destination communication module receives the cell frame over the configured serial data transfer link, removes the W095/08233 2~ 7~75~ PCT/US94/08619 encapsulated communication cell from the cell frame, and stores the communication cell in the queue channel specified by the cell frame header. The destination communication module then transmits the commllni--~tion cell over a broadband communication link or a local cornmunication link according to the cell service parameters for the queue channel.
The arbiter 41 polls the communication modules 50-53 according to a sequence determined by the control processor 40. The control processor 40 determines the poll sequence ordering and priority to ensure that each of the communication modules 50-53 has sufficient access to serial data transfer links through the switching circuit 42.
Figure 3 illustrates the format of an inbound communication cell 110 for one embodiment. The inbound communication cell 110 comprises a 12 bit virtual path identifier (VPI[11:0]) and a 16 bit virtual circuit identifier (VCI[16:0]). The virtual path identifier may be used to specify a virtual path through the communication network 200 for the inbound communication cell 110. The virtual circuit identifier may be used to specify a local termination on the communication network 200 for the inbound communication cell 110.
The inbound communication cell 110 further comprises a standard specific header field (SSH), a header cyclic redundancy code (CRC), and a cell payload. The cell payload contains the payload data for the inbound communication cell 110.
7 ~ ~
The inbound communication cell 110 illustrates a communication cell for a network-network interface (NNI) standard.
An alternative user network interface (UNI) standard provides of an 8 bit virtual path identifier for the inbound communication cell 110.
The VPI [11:8] is replaced with a generic flow control (GFC) field for the UNI version of the inbound communication cell 110.
Figure 4 illustrates the format for a cell frame 120 for one embodiment. The cell frame 120 comprises a cell frame header, a cell header from an encapsulated inbound communication cell, a header error code, a cell payload from an encapsulated inbound communication cell, an a payload error code.
The cell frame header includes a destination field comprising a type field, and either a primary (PRI) and secondary (SEC) communication module identifier or a multicast group number. The type field specifies whether the cell frame 120 is a single destination cell frame or a multicast cell frame. If the type field specifies a single destination cell frame, the primary communication module identifier specifies the primary destination for the cell frame 120 and the secondary communication module identifier specifies a backup destination for the cell frame 120. If the type field specifies a multicast cell, the multicast group number specifies a group of destination communication modules.
The cell frame header further comprises a queue channel field and a control field. The queue channel field specifies one of the queue ch~nnPl~ contained in the destination communication module. The ~ WO 95108233 2 ~ ~ 0 7 5 8 PCT/US94/08619 specified queue channel buffers the encapsulated communication cell prior to outbound trAn~mi~sic-n. The control field contains parameters that are employed during queue channel servicing to control cell queue congestion in the communication network 200.
The cell frame header further comprises a source field that indicates the source communication module from among the communication modules 50-53 for the cell frame 120.
Figure 5 illustrates the encapsulation of the inbound communication cell 110 into the cell frame 120 by the communication module 50. The communication module 50 receives the inbound communication cell 110 over the broadband communication link 30.
The communication module 50 assembles the cell frame 120 comprising a cell frame header, the cell header from the inbound commllnic~tion cell 110, a header error code, the cell payload from the inbound communication cell 110, and a payload error code.
The communication module 50 decodes a portion of the cell header of the inbound communication cell 110 as a header control field (HCF). For one embodiment, the upper two bits of the cell header comprise the header control field HCF.
The header error code provides a bit by bit parity check of the cell frame header and the cell header portions of the cell frame 120.
The header error code enables verification of the header information in the cell frame 120 by the destination communication module.
The payload error code provides a bit by bit parity check of the cell payload contained in the cell frame 120. The payload error code 2i~a~8 enables verification of the cell frame 120 payload data by the destination communication module.
The commllnic~tion module 50 extracts a path identifier from the inbound communication cell 110 by performing a path identifier masking function on the cell header. For one embodiment, the HCF
portion of the cell header selects the path identifier masking function from a set of preprogrammed path identifier masking functions implemented in the communication module 50. For another embodiment, a single preprogrammed masking function for a standard cell header format is implemented in the communication module 50.
The control processor 40 programs the path identifier masking functions into the communication module 50 over the control processor bus 61. The path identifier masking function extracts a local termination path identifier and a pass through path identifier for the inbound communication cell 110.
The local termination path identifier indicates a local termination for the communication cell 110 on the communication network 200. Por example, the path identifier masking functions may be preprogrammed to extract the combined VPI and VCI bits of the inbound communication cell 110 as the local termination path identifier.
The pass through path identifier indicates a virtual path for the communication cell 110 through the communication network 200.
For example, the path identifier masking functions may be ~ WO 95/08233 21~ 0 75 ~ PCT/US94/08619 preprogrammed to extract the VPI bits of the inbound communication cell 110 as the pass through path identifier.
The local termination path identifiers and the pass through path i~l~ntifi~rs specify cell frame header blocks in a cell frame header table 130. The cell frame header table 130 contains a set of preprogrammed cell frame header blocks. The control processor 40 programs the cell frame header blocks into the cell frame header table 130 over the control processor bus 61.
The local termination path identifiers and the pass through path identifiers map to the cell frame header table 130 via a content addressable memory (CAM). The control processor 40 programs the local termination path identifiers and the pass through path identifiers into the CAM over the control processor bus 61.
The local termination path identifiers and the pass through path identifiers provide data inputs the CAM. The CAM generates match addresses corresponding to the local termination path identifiers and the pass through path identifiers. The match address indicates the CAM entry that stores the local termination path i(l~ntifiers or the pass through path identifiers. The match address provides a pointer to a cell frame header block in the cell frame header table 130. The selected cell frame header block provides the cell frame header for the cell frame 120.
Figure 6 illustrates the communication module 50. The communication module 50 comprises a serial interface unit (SIU) 75, a WO 95/08233 PCT/US94/08619 ~
21 7 ~
communication interface formatter (CIF) 77, and a communication interface module (CIM) 290.
The SIU 75 enables serial communication through configured serial data transfer links in the switching circuit 42 over the cell exchange lines 62. The cell exchange lines 62 comprise multiple pairs of transmit and receive data lines. The cell exchange lines 62 include a transmit data line 80 and a receive data line 81 coupled to the SIU 75.
The CIF 77 enables transfer of communication cells between the SIU 75 and the CIM 290. The CIF 77 also handles polls from the arbiter 41 over the arbitration/control bus 63.
The CIM 290 enables transfer of communication cells over the broadband communication link 30. The CIM 290 implements queue chAnn~l~ for buffering outbound communication cells prior to transfer over the communication network 200.
The CIM 290 receives inbound communication cells over the broadband communication link 30, encapsulates the inbound communication cells into cell frames, and transfers the cell frames to the CIF 77. The CIF 77 then generates an appropriate transmission request in response to a poll by the arbiter 41. The arbiter 41 configures the switching circuit 42 to create a serial data transfer link in the switching circuit 42 according to the transmission request. The CIF 77 then transfers the cell frame to the SIU 75, and the sru 75 serially transmits the cell frame through the configured serial data transfer link on the cell exchange lines 62 to the destination communication module.
W095/08233 ~ ~ 7 075 8 PCT/US94/08619 The SIU 75 receives the cell frames through the serial data transfer links in the cell exchange lines 62, performs clock and data recovery, and transfers the cell frames to the CIF 77. The CIF 77 disassembles the encapsulated communication cells from the cell frames, and transfers the communication cells to the CIM 290. The CIM 290 buffers the disassembled communication cells in the queue channels spedfied by the cell frame headers. The CIM 290 then transfers the communication cells over the broadband communication link 30 as outbound communication cells according to pre defined queue service parameters for the queue channels.
Figure 7 illustrates an inbound cell circuit in the CIM 290 for one embodiment. The inbound cell circuit comprises a physical layer interface receiver 100, a physical layer protocol processor (PLPP) receiver 102, a cell input circuit 104, a cell frame header (CFH) memory 106, a content addressable memory (CAM) circuit 108, and a mask function memory 112.
The physical layer interface receiver 100 receives inbound communication cells over the broadband communication link 30.
The physical layer interface receiver 100 performs analog signal level to digital signal level conversion on the inbound communication cell signal. The physical layer interface receiver 100 transfers the serial bit stream over a signal line 130. For one embodiment, the broadband communication link 30 comprises a T3 communication line, and the physical layer interface receiver 100 is a T3 receiver.
2 ~ 8 The PLPP receiver 102 receives the serial bit stream from the physical layer interface receiver 100, and locates the cell boundaries of the inbound communication cells. The PLPP receiver 102 places a byte stream comprising the inbound communication cells in an internal first-in-first-out (~O) memory. The FIFO is read by the cell input circuit 104 over a cell bus 132. The PLPP receiver 102 also transfers sync signals over the cell bus 132 to notify the cell input circuit 104 that a complete cell is assembled in the internal FIFO.
The cell input circuit 104 fetches the inbound communication cell byte stream over the cell bus 132, and encapsulates the inbound communication cells into cell frames. The cell input circuit 104 receives cell frame headers for the cell frames from the CFH memory 106 over a CFH bus 134.
The CFH memory 106 is a random access memory that stores the cell frame header table 130. The cell frame header table 130 contains a set of preprogrammed cell frame header blocks. The control processor 40 programs the cell frame header blocks into the CFH memory 106 over the control processor bus 61.
The mask function memory 112 performs the path identifier masking functions to extract the local termination path identifier and the pass through path identifier for each inbound communication cell. The mask function memory 112 stores mask data values for each byte of the cell header. For one embodiment, each mask data value in the mask function memory 112 comprises 8 bits. The control wo 95/08233 ~ ~ 7 ~ 7 5 8 PCT/U$94~08619 processor 40 programs the mask data values into the mask function memory 112 over the control processor bus 61.
- The cell input circuit 104 selects the mask data values from the mask fllnction memory 112 through a mask function input bus 140.
The mask function input bus 140 provides an address for the mask data values stored in the mask function memory 112. The mask function input bus 140 comprises a pass select signal, an HCF select signal, a header byte select signal, and a header byte data value.
The pass select signal selects either a set of pass through identifier masking functions or local termination identifier masking functions. The cell input circuit 104 sets the pass select signal = 0 to perform the local termination masking functions, and sets the pass select signal = 1 to perform the pass through identifier masking functions.
The HCF select signal reflects the HCF field of the inbound communication cells. For one embodiment, the 2 bit HCF field selects a set of masking functions from 4 available sets of masking functions.
The header byte select signal maps each byte of the cell header to the mask function memory 112. For one embodiment, the header byte select signal ranges between 0 and 3 because the cell header comprises 4 bytes and the mask data values are 8 bits wide.
The header byte data value successively carries each byte of the cell header. The cell input circuit 104 transfers each byte of the cell header sequentially over the mask function input bus 140 as the WO9S/~Q~3 PCTrUS94/08619 2~7~75~
header byte data value to perform the selected path identifier mA~king function on the destination address.
The mask function memory 112 transfers the mask data values s~lecte-l via the mask function input bus 140 to the CAM circuit 108 over a path identifier bus 138. The CAM circuit 108 assembles the mask data values into a 32 bit path identifier. The CAM circuit 108 then performs a CAM look-up for the path identifier. The CAM
circuit 108 transfers a match address to the CFH memory 106 over a CFH pointer bus 136 if a CAM match for the path identifier occurs.
The match address on the CFH pointer bus 136 provides a pointer to a cell frame header block stored in the CFH memory 106.
The cell input circuit 104 receives the selected cell frame header block over the CFH bus 134. The cell input circuit 104 then inserts the cell frame header into a cell frame as described above. The cell input circuit 104 transfers the cell frame to the CIF 77 over a bus 432.
Figure 8 illustrates an arrangement of masked data values in the mask function memory 112 for one embodiment. The mask function input bus 140 provides an 13 bit address for the mask data values. The pass select signal provides address bit 12 (the most significant bit), the HCF select signal provides address bits 11:10, the header byte select signal provides address bits 9:8, and the header byte data value provides address bits 7:0.
The mask function memory 112 contains mask data values for the local termination masking functions (PASS = 0) and the pass through masking functions (PASS = 1) for all possible HCF values and ~ W095/08233 2 ~ ~ ~ 7 5 ~ PCTrUS94/08619 header byte values. For example, address 0 of the mask function memory 112 stores a mask data value for a header byte value = 0, a header byte select = 0, and an HCF = 0, and a PASS = 0. Likewise, address lC40 hex of the mask function memory 112 stores a mask data value for a header byte value = 40 hex, a header byte select = 0, and an HCF = 3, and a PASS = 1.
Figure 9 illustrates the CAM circuit 108. The CAM circuit 108 comprises a CAM mask register 160 and a set of 1024 CAM entries.
The CAM mask register 160 comprises 64 bits, and each CAM entry comprises 64 bits.
For one embodiment, each CAM entry stores a pair of path identifiers; a local termination path identifier (LTPID) and a pass through path identifier (PTPID). For example, the CAM entry 0 stores a LTPID_0 and a PTPID_0. The path identifiers in the CAM circuit 108 are programmed by the control processor 40 over the control processor bus 41.
For a local termination identifier CAM look-up, the cell input circuit 104 sets the upper 32 bits of the CAM mask register 160 to all one's and sets the lower 32 bits of the CAM mask register 160 to all zeros. The local termination identifier CAM look-up matches to the path identifiers LTPID_0 through LTPID_3FF.
For a pass through identifier CAM look-up, the cell input circuit 104 sets the upper 32 bits of the CAM mask register 160 to all zeros and sets the lower 32 bits of the CAM mask register 160 to all ~ ~ ~
one's. The pass through identifier CAM look-up matches to the path identifiers PTPID_0 through PTPID_3FF.
Por other embodiments, a variety of LTPID and PTPID
arrangements in the CAM circuit 108 are possible. The CAM mask register 160 i~lentifie5 the appropriate bits in each CAM entry for either a LTPID match or a PTPID match.
Figure 10 is a flow diagram illustrating a method for selecting a cell frame header for an inbound communication cell. At block 300, the cell input circuit 104 receives an inbound communication cell over the broadband communication link 30.
At block 302, the cell input circuit 104 selects the PASS = 0 masking function by setting the pass select signal on the mask function input bus 140 to access the local termination mask data values in the mask function memory 112. The cell input circuit 104 also sets the HCF select signal on the mask function input bus 140 according to the HCF field of inbound communication cell.
At block 304, the cell input circuit 104 performs the selected path identifier masking function on the cell header by transferring the header bytes and corresponding header byte select signals to the mask function memory 112 via the mask function input bus 140. The mask function memory 112 transfers the selected mask data values to the CAM circuit 108 over path identifier bus 138.
At block 306, the cell input circuit 104 sets the upper 32 bits of the CAM mask register 160 to all one's and sets the lower 32 bits of the CAM mask register 160 to all zeros to match to the path identifiers ~1~ WO 95/08233 ~ ~L 7 ~ 7 ~ 8 PCT/US94/08619 LTPID_0 through LTPID_3FF. The CAM circuit 108 assembles the mask data values corresponding to the destination address of the cell header into a 32 bit path identifier and then performs a CAM look-up for the path i~l~nhfier. If a CAM match is detected at decision block 308, then control proceeds to block 310.
At block 310, the CAM circuit 108 transfers the match address to the CFH memory 106 over the CFH pointer bus 136 to access a cell frame header block from the CFH memory 106. Thereafter at block 312, the cell input circuit 104 receives the selected cell frame header block over the CFH bus 134, and assembles the cell frame as previously described.
If a CAM match does not occur at decision block 308, then control proceeds to block 314. At block 314, the cell input circuit 104 selects the PASS = 1 masking functions by setting the pass select signal on the mask function input bus 140 to access the pass through mask data values in the mask function memory 112.
At block 316, the cell input circuit 104 performs the selected path identifier masking function on the cell header by again transferring the header bytes and corresponding header byte select signals to the mask function memory 112 via the mask function input bus 140. The cell input circuit 104 sets the upper 32 bits of the CAM
mask register 160 to all zeros and sets the lower 32 bits of the CAM
mask register 160 to all one's to match to the path identifiers PTPID_0 through PTPID_3FF. The CAM circuit 108 assembles the mask data values corresponding to the destination address of the cell header into 2~7~8 a 32 bit path i~ntifi~r and then performs a CAM look-up for the new path i~ ntifier.
If a CAM match is detected at decision block 318, then control proceeds to block 310 to access a pass through cell header block from the CFH memory 106.
In the foregoing spe~ifi~tion, the invention has been described with refeL~lLce to specific exemplary embodiments thereof. It will, however, be evident that various modifications and changes may be made thereto without departing from the broader spirit and scope of the invention as set forth in the appended claims. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense.
Claims (18)
1. A method for routing a communication cell in a cell switching communication controller, comprising the steps of:
receiving the communication cell over a first communication link in a cell relay network, the communication cell having a cell header that specifies a destination address;
generating a path identifier by performing a path identifier masking function on the destination address, the path identifier masking function defined by a set of predetermined mask data values;
matching the path identifier to a content addressable memory such that a match address in the content addressable memory specifies a virtual circuit destination in a communication network for the communication cell, the content addressable memory comprising a plurality of entries, wherein each entry stores a preconfigured local termination identifier and a preconfigured pass through identifier;
transferring the communication cell to the virtual circuit destination over the communication network.
receiving the communication cell over a first communication link in a cell relay network, the communication cell having a cell header that specifies a destination address;
generating a path identifier by performing a path identifier masking function on the destination address, the path identifier masking function defined by a set of predetermined mask data values;
matching the path identifier to a content addressable memory such that a match address in the content addressable memory specifies a virtual circuit destination in a communication network for the communication cell, the content addressable memory comprising a plurality of entries, wherein each entry stores a preconfigured local termination identifier and a preconfigured pass through identifier;
transferring the communication cell to the virtual circuit destination over the communication network.
2. The method of claim 1, wherein the match address in the content addressable memory specifies a preconfigured cell frame header block stored in a cell frame header table.
3. The method of claim 2, wherein the step of transferring the communication cell to the virtual circuit destination over the communication network comprises the steps of:
reading the cell frame header block from the cell frame header table according to the match address, and generating a cell frame comprising the cell frame header, the cell header, and a cell payload from the communication cell;
transferring the cell frame to a destination communication module specified by the cell frame header, such that the destination communication module transfers the communication cell over a second communication link.
reading the cell frame header block from the cell frame header table according to the match address, and generating a cell frame comprising the cell frame header, the cell header, and a cell payload from the communication cell;
transferring the cell frame to a destination communication module specified by the cell frame header, such that the destination communication module transfers the communication cell over a second communication link.
4. The method of claim 3, wherein the step of generating a path identifier by performing a path identifier masking function on the destination address comprises the step of masking the destination address according to a local termination masking function defined by the predetermined mask data values, the local termination masking function generating a local termination identifier.
5. The method of claim 4, wherein the local termination masking function is specified from a plurality of predetermined local termination masking functions by a header control field of the cell header.
6. The method of claim 5, wherein the step of matching the path identifier to a content addressable memory comprises the steps of:
setting a CAM mask register in the content addressable memory to mask off the preconfigured pass through identifier of each entry;
matching the local termination identifier to the content addressable memory such that the match address specifies the cell frame header block.
if the local termination identifier is stored in a content addressable memory, then selecting a cell frame header from a cell frame header table, such that the cell frame header is specified by a content addressable memory address corresponding to the local termination identifier.
setting a CAM mask register in the content addressable memory to mask off the preconfigured pass through identifier of each entry;
matching the local termination identifier to the content addressable memory such that the match address specifies the cell frame header block.
if the local termination identifier is stored in a content addressable memory, then selecting a cell frame header from a cell frame header table, such that the cell frame header is specified by a content addressable memory address corresponding to the local termination identifier.
7. The method of claim 3, wherein the step of generating a path identifier by performing a path identifier masking function on the destination address comprises the step of masking the destination address according to a pass through masking function defined by the predetermined mask data values, the pass through masking function generating a pass through identifier.
8. The method of claim 7, wherein the pass through masking function is specified from a plurality of predetermined pass through masking functions by a header control field of the cell header.
9. The method of claim 8, wherein the step of matching the path identifier to a content addressable memory comprises the steps of:
setting a CAM mask register in the content addressable memory to mask off the preconfigured local termination identifier of each entry;
matching the pass through identifier to the content addressable memory such that the match address specifies the cell frame header block.
if the pass through identifier is stored in a content addressable memory, then selecting a cell frame header from a cell frame header table, such that the cell frame header is specified by a content addressable memory address corresponding to the local termination identifier.
setting a CAM mask register in the content addressable memory to mask off the preconfigured local termination identifier of each entry;
matching the pass through identifier to the content addressable memory such that the match address specifies the cell frame header block.
if the pass through identifier is stored in a content addressable memory, then selecting a cell frame header from a cell frame header table, such that the cell frame header is specified by a content addressable memory address corresponding to the local termination identifier.
10. A circuit for routing a communication cell in a cell switching communication controller, comprising:
circuit for receiving the communication cell over a first communication link in a cell relay network, the communication cell having a cell header that specifies a destination address;
circuit for generating a path identifier by performing a path identifier masking function on the destination address, the path identifier masking function defined by a set of predetermined mask data values;
circuit for matching the path identifier to a content addressable memory such that a match address in the content addressable memory specifies a virtual circuit destination in a communication network for the communication cell, the content addressable memory comprising a plurality of entries, wherein each entry stores a preconfigured local termination identifier and a preconfigured pass through identifier;
circuit for transferring the communication cell to the virtual circuit destination over the communication network.
circuit for receiving the communication cell over a first communication link in a cell relay network, the communication cell having a cell header that specifies a destination address;
circuit for generating a path identifier by performing a path identifier masking function on the destination address, the path identifier masking function defined by a set of predetermined mask data values;
circuit for matching the path identifier to a content addressable memory such that a match address in the content addressable memory specifies a virtual circuit destination in a communication network for the communication cell, the content addressable memory comprising a plurality of entries, wherein each entry stores a preconfigured local termination identifier and a preconfigured pass through identifier;
circuit for transferring the communication cell to the virtual circuit destination over the communication network.
11. The circuit of claim 10, wherein the match address in the content addressable memory specifies a preconfigured cell frame header block stored in a cell frame header table.
12. The circuit of claim 11, wherein the circuit for transferring the communication cell to the virtual circuit destination over the communication network comprises:
circuit for reading the cell frame header block from the cell frame header table according to the match address, and circuit for generating a cell frame comprising the cell frame header, the cell header, and a cell payload from the communication cell;
circuit for transferring the cell frame to a destination communication module specified by the cell frame header, such that the destination communication module transfers the communication cell over a second communication link.
circuit for reading the cell frame header block from the cell frame header table according to the match address, and circuit for generating a cell frame comprising the cell frame header, the cell header, and a cell payload from the communication cell;
circuit for transferring the cell frame to a destination communication module specified by the cell frame header, such that the destination communication module transfers the communication cell over a second communication link.
13. The circuit of claim 12, wherein the circuit for generating a path identifier by performing a path identifier masking function on the destination address comprises circuit for masking the destination address according to a local termination masking function defined by the predetermined mask data values, the local termination masking function generating a local termination identifier.
14. The circuit of claim 13, wherein the local termination masking function is specified from a plurality of predetermined local termination masking functions by a header control field of the cell header.
15. The circuit of claim 14, wherein the circuit for matching the path identifier to a content addressable memory comprises:
circuit for setting a CAM mask register in the content addressable memory to mask off the preconfigured pass through identifier of each entry;
circuit for matching the local termination identifier to the content addressable memory such that the match address specifies the cell frame header block.
circuit for selecting a cell frame header from a cell frame header table if the local termination identifier is stored in a content addressable memory, such that the cell frame header is specified by a content addressable memory address corresponding to the local termination identifier.
circuit for setting a CAM mask register in the content addressable memory to mask off the preconfigured pass through identifier of each entry;
circuit for matching the local termination identifier to the content addressable memory such that the match address specifies the cell frame header block.
circuit for selecting a cell frame header from a cell frame header table if the local termination identifier is stored in a content addressable memory, such that the cell frame header is specified by a content addressable memory address corresponding to the local termination identifier.
16. The circuit of claim 12, wherein the circuit for generating a path identifier by performing a path identifier masking function on the destination address comprises circuit for masking the destination address according to a pass through masking function defined by the predetermined mask data values, the pass through masking function generating a pass through identifier.
17. The circuit of claim 16, wherein the pass through masking function is specified from a plurality of predetermined pass through masking functions by a header control field of the cell header.
18. The circuit of claim 17, wherein the circuit for matching the path identifier to a content addressable memory comprises:
circuit for setting a CAM mask register in the content addressable memory to mask off the preconfigured local termination identifier of each entry;
circuit for matching the pass through identifier to the content addressable memory such that the match address specifies the cell frame header block.
circuit for selecting a cell frame header from a cell frame header table if the pass through identifier is stored in a content addressable memory, such that the cell frame header is specified by a content addressable memory address corresponding to the local termination identifier.
circuit for setting a CAM mask register in the content addressable memory to mask off the preconfigured local termination identifier of each entry;
circuit for matching the pass through identifier to the content addressable memory such that the match address specifies the cell frame header block.
circuit for selecting a cell frame header from a cell frame header table if the pass through identifier is stored in a content addressable memory, such that the cell frame header is specified by a content addressable memory address corresponding to the local termination identifier.
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Families Citing this family (133)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5553302A (en) * | 1993-12-30 | 1996-09-03 | Unisys Corporation | Serial I/O channel having independent and asynchronous facilities with sequence recognition, frame recognition, and frame receiving mechanism for receiving control and user defined data |
JP3129143B2 (en) * | 1994-05-31 | 2001-01-29 | 松下電器産業株式会社 | Data transfer method |
JPH08102747A (en) * | 1994-09-30 | 1996-04-16 | Toshiba Corp | Lsi for communication |
US5602844A (en) * | 1994-11-15 | 1997-02-11 | Xerox Corporation | Self routing crossbar switch suitable for use as a switching fabric in an ATM switch |
US5793978A (en) * | 1994-12-29 | 1998-08-11 | Cisco Technology, Inc. | System for routing packets by separating packets in to broadcast packets and non-broadcast packets and allocating a selected communication bandwidth to the broadcast packets |
US5867666A (en) | 1994-12-29 | 1999-02-02 | Cisco Systems, Inc. | Virtual interfaces with dynamic binding |
US5940392A (en) * | 1994-12-30 | 1999-08-17 | Advanced Micro Devices, Inc. | Programmable address mapping matrix for secure networks |
JP3150864B2 (en) * | 1995-02-27 | 2001-03-26 | 三菱電機株式会社 | ATM communication network system and ATM communication device |
US5729546A (en) * | 1995-06-21 | 1998-03-17 | Cisco Systems, Inc. | Expandable communication cell bus for multiplexing and concentrating communication cell traffic onto high speed lines |
US6094525A (en) * | 1995-07-06 | 2000-07-25 | Novell, Inc. | Network addressing arrangement for backward compatible routing of an expanded address space |
US6097718A (en) | 1996-01-02 | 2000-08-01 | Cisco Technology, Inc. | Snapshot routing with route aging |
US6147996A (en) | 1995-08-04 | 2000-11-14 | Cisco Technology, Inc. | Pipelined multiple issue packet switch |
US5907552A (en) * | 1995-09-08 | 1999-05-25 | Nextlevel Communications | FTTC interface circuitry as a physical layer entity |
US6182224B1 (en) | 1995-09-29 | 2001-01-30 | Cisco Systems, Inc. | Enhanced network services using a subnetwork of communicating processors |
US5793763A (en) * | 1995-11-03 | 1998-08-11 | Cisco Technology, Inc. | Security system for network address translation systems |
US7113508B1 (en) | 1995-11-03 | 2006-09-26 | Cisco Technology, Inc. | Security system for network address translation systems |
US6091725A (en) | 1995-12-29 | 2000-07-18 | Cisco Systems, Inc. | Method for traffic management, traffic prioritization, access control, and packet forwarding in a datagram computer network |
US6035105A (en) | 1996-01-02 | 2000-03-07 | Cisco Technology, Inc. | Multiple VLAN architecture system |
GB2309362B (en) * | 1996-01-20 | 2000-07-05 | Northern Telecom Ltd | Telecommunications system |
JP3202160B2 (en) * | 1996-01-25 | 2001-08-27 | 富士通株式会社 | Identifier conversion device |
US5724358A (en) * | 1996-02-23 | 1998-03-03 | Zeitnet, Inc. | High speed packet-switched digital switch and method |
US5757796A (en) * | 1996-04-26 | 1998-05-26 | Cascade Communications Corp. | ATM address translation method and apparatus |
US5745488A (en) * | 1996-04-29 | 1998-04-28 | Motorola, Inc. | Method and apparatus for detection of packet types in a communications network |
US6243667B1 (en) | 1996-05-28 | 2001-06-05 | Cisco Systems, Inc. | Network flow switching and flow data export |
US6308148B1 (en) | 1996-05-28 | 2001-10-23 | Cisco Technology, Inc. | Network flow data export |
US6212182B1 (en) | 1996-06-27 | 2001-04-03 | Cisco Technology, Inc. | Combined unicast and multicast scheduling |
US6434120B1 (en) | 1998-08-25 | 2002-08-13 | Cisco Technology, Inc. | Autosensing LMI protocols in frame relay networks |
US6240084B1 (en) | 1996-10-10 | 2001-05-29 | Cisco Systems, Inc. | Telephony-enabled network processing device with separate TDM bus and host system backplane bus |
US6904037B2 (en) | 1996-11-05 | 2005-06-07 | Cisco Technology, Inc. | Asymmetric implementation of DSVD for voice/data internet access |
US6304546B1 (en) | 1996-12-19 | 2001-10-16 | Cisco Technology, Inc. | End-to-end bidirectional keep-alive using virtual circuits |
US6151325A (en) * | 1997-03-31 | 2000-11-21 | Cisco Technology, Inc. | Method and apparatus for high-capacity circuit switching with an ATM second stage switch |
US5949784A (en) * | 1997-05-01 | 1999-09-07 | 3Com Corporation | Forwarding mechanism for multi-destination packets to minimize per packet scheduling overhead in a network forwarding engine |
US6094708A (en) | 1997-05-06 | 2000-07-25 | Cisco Technology, Inc. | Secondary cache write-through blocking mechanism |
US6356530B1 (en) | 1997-05-23 | 2002-03-12 | Cisco Technology, Inc. | Next hop selection in ATM networks |
US6122272A (en) | 1997-05-23 | 2000-09-19 | Cisco Technology, Inc. | Call size feedback on PNNI operation |
US5999535A (en) * | 1997-05-28 | 1999-12-07 | 3Com Corporation | Short cut forwarding of local cells-in-frames traffic within local-area-networks |
JP3003779B2 (en) * | 1997-06-24 | 2000-01-31 | 日本電気株式会社 | Communications system |
US6078590A (en) | 1997-07-14 | 2000-06-20 | Cisco Technology, Inc. | Hierarchical routing knowledge for multicast packet routing |
JPH1141242A (en) * | 1997-07-18 | 1999-02-12 | Fujitsu Ltd | Path audit control method for exchange |
US5991297A (en) * | 1997-08-28 | 1999-11-23 | Ascend Communications | Independently sizable memory pages for a plurality of connection ID types in a network switch |
US6330599B1 (en) | 1997-08-05 | 2001-12-11 | Cisco Technology, Inc. | Virtual interfaces with dynamic binding |
US6512766B2 (en) | 1997-08-22 | 2003-01-28 | Cisco Systems, Inc. | Enhanced internet packet routing lookup |
US6157641A (en) | 1997-08-22 | 2000-12-05 | Cisco Technology, Inc. | Multiprotocol packet recognition and switching |
US6212183B1 (en) | 1997-08-22 | 2001-04-03 | Cisco Technology, Inc. | Multiple parallel packet routing lookup |
US6141348A (en) * | 1997-08-25 | 2000-10-31 | Cisco Technology, Inc. | Constant-time programmable field extraction system and method |
US6366582B1 (en) | 1997-09-19 | 2002-04-02 | Hitachi, Ltd. | Connection switching apparatus, connection switching network control system and connection switching network control method |
US6343072B1 (en) | 1997-10-01 | 2002-01-29 | Cisco Technology, Inc. | Single-chip architecture for shared-memory router |
US6252878B1 (en) | 1997-10-30 | 2001-06-26 | Cisco Technology, Inc. | Switched architecture access server |
US6111877A (en) | 1997-12-31 | 2000-08-29 | Cisco Technology, Inc. | Load sharing across flows |
US6208649B1 (en) | 1998-03-11 | 2001-03-27 | Cisco Technology, Inc. | Derived VLAN mapping technique |
US6115385A (en) | 1998-03-11 | 2000-09-05 | Cisco Technology, Inc. | Method and system for subnetting in a switched IP network |
US6738814B1 (en) * | 1998-03-18 | 2004-05-18 | Cisco Technology, Inc. | Method for blocking denial of service and address spoofing attacks on a private network |
US6370121B1 (en) | 1998-06-29 | 2002-04-09 | Cisco Technology, Inc. | Method and system for shortcut trunking of LAN bridges |
US6407985B1 (en) | 1998-06-29 | 2002-06-18 | Cisco Technology, Inc. | Load sharing over blocked links |
US6377577B1 (en) | 1998-06-30 | 2002-04-23 | Cisco Technology, Inc. | Access control list processing in hardware |
US6351454B1 (en) | 1998-07-24 | 2002-02-26 | Cisco Technology, Inc. | Apparatus and method for maintaining packet ordering over parallel links of a crossbar based switch fabric |
US6182147B1 (en) | 1998-07-31 | 2001-01-30 | Cisco Technology, Inc. | Multicast group routing using unidirectional links |
US6308219B1 (en) | 1998-07-31 | 2001-10-23 | Cisco Technology, Inc. | Routing table lookup implemented using M-trie having nodes duplicated in multiple memory banks |
US6101115A (en) | 1998-08-07 | 2000-08-08 | Cisco Technology, Inc. | CAM match line precharge |
US6389506B1 (en) | 1998-08-07 | 2002-05-14 | Cisco Technology, Inc. | Block mask ternary cam |
US6269096B1 (en) | 1998-08-14 | 2001-07-31 | Cisco Technology, Inc. | Receive and transmit blocks for asynchronous transfer mode (ATM) cell delineation |
US6535520B1 (en) | 1998-08-14 | 2003-03-18 | Cisco Technology, Inc. | System and method of operation for managing data communication between physical layer devices and ATM layer devices |
US6381245B1 (en) * | 1998-09-04 | 2002-04-30 | Cisco Technology, Inc. | Method and apparatus for generating parity for communication between a physical layer device and an ATM layer device |
US6785274B2 (en) | 1998-10-07 | 2004-08-31 | Cisco Technology, Inc. | Efficient network multicast switching apparatus and methods |
US6243749B1 (en) | 1998-10-08 | 2001-06-05 | Cisco Technology, Inc. | Dynamic network address updating |
US6490289B1 (en) | 1998-11-03 | 2002-12-03 | Cisco Technology, Inc. | Multiple network connections from a single PPP link with network address translation |
US7165117B1 (en) | 1998-11-12 | 2007-01-16 | Cisco Technology, Inc. | Dynamic IP addressing and quality of service assurance |
US6427174B1 (en) | 1998-11-12 | 2002-07-30 | Cisco Technology, Inc. | Dynamic IP addressing and quality of service assurance |
US7165122B1 (en) | 1998-11-12 | 2007-01-16 | Cisco Technology, Inc. | Dynamic IP addressing and quality of service assurance |
US7616640B1 (en) | 1998-12-02 | 2009-11-10 | Cisco Technology, Inc. | Load balancing between service component instances |
US6442165B1 (en) | 1998-12-02 | 2002-08-27 | Cisco Technology, Inc. | Load balancing between service component instances |
US6427170B1 (en) | 1998-12-08 | 2002-07-30 | Cisco Technology, Inc. | Integrated IP address management |
US6700872B1 (en) | 1998-12-11 | 2004-03-02 | Cisco Technology, Inc. | Method and system for testing a utopia network element |
US6490290B1 (en) | 1998-12-30 | 2002-12-03 | Cisco Technology, Inc. | Default internet traffic and transparent passthrough |
US6453357B1 (en) * | 1999-01-07 | 2002-09-17 | Cisco Technology, Inc. | Method and system for processing fragments and their out-of-order delivery during address translation |
US6535511B1 (en) | 1999-01-07 | 2003-03-18 | Cisco Technology, Inc. | Method and system for identifying embedded addressing information in a packet for translation between disparate addressing systems |
US6449655B1 (en) | 1999-01-08 | 2002-09-10 | Cisco Technology, Inc. | Method and apparatus for communication between network devices operating at different frequencies |
US6771642B1 (en) | 1999-01-08 | 2004-08-03 | Cisco Technology, Inc. | Method and apparatus for scheduling packets in a packet switch |
US6247062B1 (en) | 1999-02-01 | 2001-06-12 | Cisco Technology, Inc. | Method and apparatus for routing responses for protocol with no station address to multiple hosts |
US6337861B1 (en) | 1999-02-02 | 2002-01-08 | Cisco Technology, Inc. | Method and apparatus to properly route ICMP messages in a tag-switching network |
US6587468B1 (en) | 1999-02-10 | 2003-07-01 | Cisco Technology, Inc. | Reply to sender DHCP option |
US6512768B1 (en) | 1999-02-26 | 2003-01-28 | Cisco Technology, Inc. | Discovery and tag space identifiers in a tag distribution protocol (TDP) |
US6331978B1 (en) * | 1999-03-09 | 2001-12-18 | Nokia Telecommunications, Oy | Generic label encapsulation protocol for carrying label switched packets over serial links |
US6434627B1 (en) | 1999-03-15 | 2002-08-13 | Cisco Technology, Inc. | IP network for accomodating mobile users with incompatible network addressing |
US6757791B1 (en) | 1999-03-30 | 2004-06-29 | Cisco Technology, Inc. | Method and apparatus for reordering packet data units in storage queues for reading and writing memory |
US6603772B1 (en) | 1999-03-31 | 2003-08-05 | Cisco Technology, Inc. | Multicast routing with multicast virtual output queues and shortest queue first allocation |
US6760331B1 (en) | 1999-03-31 | 2004-07-06 | Cisco Technology, Inc. | Multicast routing with nearest queue first allocation and dynamic and static vector quantization |
US6570877B1 (en) | 1999-04-07 | 2003-05-27 | Cisco Technology, Inc. | Search engine for forwarding table content addressable memory |
US6839348B2 (en) | 1999-04-30 | 2005-01-04 | Cisco Technology, Inc. | System and method for distributing multicasts in virtual local area networks |
US6553028B1 (en) | 1999-04-30 | 2003-04-22 | Cisco Technology, Inc. | Method and apparatus for multicast switching using a centralized switching engine |
US6993048B1 (en) | 2000-07-31 | 2006-01-31 | Cisco Technology, Inc. | ATM permanent virtual circuit and layer 3 auto-configuration for digital subscriber line customer premises equipment |
US6917626B1 (en) * | 1999-11-30 | 2005-07-12 | Cisco Technology, Inc. | Apparatus and method for automatic cluster network device address assignment |
US6636499B1 (en) | 1999-12-02 | 2003-10-21 | Cisco Technology, Inc. | Apparatus and method for cluster network device discovery |
US7249186B1 (en) | 2000-01-20 | 2007-07-24 | Cisco Technology, Inc. | System and method for identifying a subscriber for connection to a communication network |
US7216175B1 (en) | 2000-01-20 | 2007-05-08 | Cisco Systems, Inc. | System and method for determining subscriber information |
US6725264B1 (en) | 2000-02-17 | 2004-04-20 | Cisco Technology, Inc. | Apparatus and method for redirection of network management messages in a cluster of network devices |
US7577725B1 (en) | 2000-02-25 | 2009-08-18 | Cisco Technology, Inc. | IP address allocation in a network environment |
US7016351B1 (en) | 2000-02-29 | 2006-03-21 | Cisco Technology, Inc. | Small group multicast in a computer network |
US7123620B1 (en) * | 2000-04-25 | 2006-10-17 | Cisco Technology, Inc. | Apparatus and method for scalable and dynamic traffic engineering in a data communication network |
US7065079B1 (en) | 2000-05-04 | 2006-06-20 | Cisco Technology, Inc. | VC sharing for multicast in a computer network |
US6850980B1 (en) | 2000-06-16 | 2005-02-01 | Cisco Technology, Inc. | Content routing service protocol |
US7126969B1 (en) * | 2000-07-06 | 2006-10-24 | Cisco Technology, Inc. | Scalable system and method for reliably sequencing changes in signaling bits in multichannel telecommunication lines transmitted over a network |
US7411981B1 (en) | 2000-08-31 | 2008-08-12 | Cisco Technology, Inc. | Matching of radius request and response packets during high traffic volume |
US6771665B1 (en) | 2000-08-31 | 2004-08-03 | Cisco Technology, Inc. | Matching of RADIUS request and response packets during high traffic volume |
US6771651B1 (en) * | 2000-09-29 | 2004-08-03 | Nortel Networks Limited | Providing access to a high-capacity packet network |
US6874030B1 (en) | 2000-11-13 | 2005-03-29 | Cisco Technology, Inc. | PPP domain name and L2TP tunnel selection configuration override |
US7325058B1 (en) | 2000-11-13 | 2008-01-29 | Cisco Technology, Inc. | Method and system for controlling subscriber access in a network capable of establishing connections with a plurality of domain sites |
US6856591B1 (en) | 2000-12-15 | 2005-02-15 | Cisco Technology, Inc. | Method and system for high reliability cluster management |
US6788896B1 (en) * | 2000-12-26 | 2004-09-07 | Guo-Qiang Wang | Technique for all-optical packet switching |
US6988148B1 (en) | 2001-01-19 | 2006-01-17 | Cisco Technology, Inc. | IP pool management utilizing an IP pool MIB |
US7139276B1 (en) | 2001-02-27 | 2006-11-21 | Cisco Technology, Inc. | Load sharing between L2TP tunnels |
US7023879B1 (en) | 2001-03-09 | 2006-04-04 | Cisco Technology, Inc. | Dynamic multi-hop ingress to egress L2TP tunnel mapping |
US20020181453A1 (en) * | 2001-06-01 | 2002-12-05 | Norman Richard S. | Cell-based switch fabric with distributed arbitration |
US7788345B1 (en) | 2001-06-04 | 2010-08-31 | Cisco Technology, Inc. | Resource allocation and reclamation for on-demand address pools |
US7334049B1 (en) | 2001-12-21 | 2008-02-19 | Cisco Technology, Inc. | Apparatus and methods for performing network address translation (NAT) in a fully connected mesh with NAT virtual interface (NVI) |
US7443865B1 (en) | 2002-04-04 | 2008-10-28 | Cisco Technology, Inc. | Multiple network connections from a single PPP link with network address translation |
US7386632B1 (en) | 2002-06-07 | 2008-06-10 | Cisco Technology, Inc. | Dynamic IP addressing and quality of service assurance |
US7274699B2 (en) * | 2002-09-20 | 2007-09-25 | Caterpillar Inc | Method for setting masks for message filtering |
US20040071139A1 (en) * | 2002-10-10 | 2004-04-15 | Burnett Charles James | Method and apparatus for efficient administration of memory resources in a data network tester |
US7864780B1 (en) | 2003-04-29 | 2011-01-04 | Cisco Technology, Inc. | Apparatus and methods for handling name resolution over IPV6 using NAT-PT and DNS-ALG |
US7729267B2 (en) * | 2003-11-26 | 2010-06-01 | Cisco Technology, Inc. | Method and apparatus for analyzing a media path in a packet switched network |
US7564381B1 (en) * | 2004-02-16 | 2009-07-21 | Cisco Technology, Inc. | System and method for code-based compression in a communications environment |
US7751339B2 (en) | 2006-05-19 | 2010-07-06 | Cisco Technology, Inc. | Method and apparatus for simply configuring a subscriber appliance for performing a service controlled by a separate service provider |
US7738383B2 (en) * | 2006-12-21 | 2010-06-15 | Cisco Technology, Inc. | Traceroute using address request messages |
US7706278B2 (en) * | 2007-01-24 | 2010-04-27 | Cisco Technology, Inc. | Triggering flow analysis at intermediary devices |
US8774010B2 (en) | 2010-11-02 | 2014-07-08 | Cisco Technology, Inc. | System and method for providing proactive fault monitoring in a network environment |
US8559341B2 (en) | 2010-11-08 | 2013-10-15 | Cisco Technology, Inc. | System and method for providing a loop free topology in a network environment |
US8982733B2 (en) | 2011-03-04 | 2015-03-17 | Cisco Technology, Inc. | System and method for managing topology changes in a network environment |
US8670326B1 (en) | 2011-03-31 | 2014-03-11 | Cisco Technology, Inc. | System and method for probing multiple paths in a network environment |
US8724517B1 (en) | 2011-06-02 | 2014-05-13 | Cisco Technology, Inc. | System and method for managing network traffic disruption |
US8830875B1 (en) | 2011-06-15 | 2014-09-09 | Cisco Technology, Inc. | System and method for providing a loop free topology in a network environment |
US9450846B1 (en) | 2012-10-17 | 2016-09-20 | Cisco Technology, Inc. | System and method for tracking packets in a network environment |
US9270583B2 (en) * | 2013-03-15 | 2016-02-23 | Cisco Technology, Inc. | Controlling distribution and routing from messaging protocol |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0714164B2 (en) * | 1987-02-19 | 1995-02-15 | 富士通株式会社 | Header driven packet switch |
IT1237302B (en) * | 1989-11-30 | 1993-05-27 | Vinicio Vercellone | BASIC ELEMENT FOR THE CONNECTION NETWORK OF A FAST CELL SWITCHING NODE. |
JP3001953B2 (en) * | 1990-10-20 | 2000-01-24 | 富士通株式会社 | Virtual identifier conversion device |
US5191582A (en) * | 1991-08-14 | 1993-03-02 | Transwitch Corporation | Method and apparatus for the high speed modification of a packet address field of a transmitted packet in a frame relay system |
ES2164042T3 (en) * | 1991-12-23 | 2002-02-16 | Cit Alcatel | PROCEDURE TO REDUCE THE NUMBER OF BITS OF A BINARY WORD THAT REPRESENTS A SERIES OF ADDRESSES. |
US5243596A (en) * | 1992-03-18 | 1993-09-07 | Fischer & Porter Company | Network architecture suitable for multicasting and resource locking |
-
1993
- 1993-09-15 US US08/121,608 patent/US5430715A/en not_active Expired - Lifetime
-
1994
- 1994-08-02 AU AU74089/94A patent/AU7408994A/en not_active Abandoned
- 1994-08-02 WO PCT/US1994/008619 patent/WO1995008233A1/en not_active Application Discontinuation
- 1994-08-02 JP JP7509163A patent/JPH09505697A/en active Pending
- 1994-08-02 CA CA002170758A patent/CA2170758A1/en not_active Abandoned
- 1994-08-02 EP EP94924082A patent/EP0719486A1/en not_active Ceased
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AU7408994A (en) | 1995-04-03 |
JPH09505697A (en) | 1997-06-03 |
US5430715A (en) | 1995-07-04 |
WO1995008233A1 (en) | 1995-03-23 |
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