CA2181678A1 - A termination network and a control circuit - Google Patents
A termination network and a control circuitInfo
- Publication number
- CA2181678A1 CA2181678A1 CA002181678A CA2181678A CA2181678A1 CA 2181678 A1 CA2181678 A1 CA 2181678A1 CA 002181678 A CA002181678 A CA 002181678A CA 2181678 A CA2181678 A CA 2181678A CA 2181678 A1 CA2181678 A1 CA 2181678A1
- Authority
- CA
- Canada
- Prior art keywords
- control circuit
- network
- termination
- impedance
- termination network
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 230000005540 biological transmission Effects 0.000 claims abstract description 5
- 238000004519 manufacturing process Methods 0.000 abstract description 8
- 238000005516 engineering process Methods 0.000 description 5
- 238000000034 method Methods 0.000 description 4
- 230000004075 alteration Effects 0.000 description 1
- 230000001702 transmitter Effects 0.000 description 1
- 238000009966 trimming Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H11/00—Networks using active elements
- H03H11/02—Multiple-port networks
- H03H11/28—Impedance matching networks
Abstract
A termination network in an integrated circuit and a control circuit for controlling the impedance of the termination network is described. The termination network comprises transistors for matching the impedance of the termination network with the characteristic impedance of a transmission line, which is connected to the termination network. The control circuit comprises a reference transistor which is integrated on the same integrated circuit as the termination network. The control circuit senses the impedance of the reference transistor and controls the reference transistor and the transistors in the termination network in such a way that the impedance is not affected by variations in temperature and in the manufacturing process of the integrated circuit.
Description
21~78 O WO 9s/24089 ~ 5 146 A Termination Network and a Control Circuit TPrhni rAl Field of the Invention The invention relates to a termination network for electrical AnrP matching at the receiving end of a trRnomi ~;Ri nn line.
5 Descri~tion of PriDr Art Receiving of high frequency electrical signals carried over a trAn~m1R~1nn line requires a termination network at the receiving end of the trRnC~m; Ro~1 r,n line. Such a termination network can be integrated with a receiver, for receiving said electrical lO signals, in an integrated circuit. Passive components, such as resistors, are typically used in the termination network. For a given feasible integrated-circuit technology, the received frequency at which the integrated circuit can be guaranteed to operate reliably is limite~ by manufacturing-process variations 15 and thermal variations. This limited frequency capability is the result of impedance mismatch between the trRnomi R.i rn line and the termination network, because the variations in manufacturing process and temperature affect the termination-network imrP~lAnrl~.
With a termination network having an input impedance that 20 accurately matches the characteristic impedance of the transmiss-ion line, regardless of L~ elc!Lul~: variations and process variations, the maximum frequency at which the integrated circuit can be guaranteed to operate would increase.
The problem in the art is hence to implement a termination 25 network in an integrated circuit, such that the frequency at which the integrated circuit can be guaranteed to operate reliably is increased for a given integrated-circuit tPrhnnl o~y, US 4,837,459 describes a voltage generator which is insensitive to process variations and thermal variations.
30 It is also known in the art that transistors, e g Field Ef fect Transistors ( FET: s ), can be used as resistors in a termination network. By controlling these transistors, the 1 ,'?'lRnrP of a termination network can be programmed to match various charac-teristic i mrP~1Anres of connected trRn~ m; oci r,n lines .
W0 95l24089 2 1 8 ~ 6 ~ 8 E~~ 46 Descri~tion of the Invention The ob~ect of the invention Ls to solve the aforementioned;
problem of implementing a termination network in an integrated circuit, such that the fretauency at which the integrated circuit 5 can be guaranteed to operate reliably is increased for a given integrated-circuit technology.
This ob~ect has been a~ hPrl by provision of a termination network comprising one or more transistors, and a control circuit for controlling the i wrerlslnr~ of these transistors . The control 10 circuit comprises a reference transistor which is integrated on the same integrated circuit as the transistors in the termination network. The control circuit comprises means for sensing and' controlling the impedance of the reference transistor.
~ccording to the invention, a control circuit hence controls the 15 ; ~ nre of at least one transistor which is included in a termination network. The control circuit compensates for variations in the properties of said transistor, in order: to uphold a constant i , 51~nrF. of said transistor.: These variations are caused by e g thermal variations, and by variations in the 20 manufacturing process ( tolerances ) .
The control circuit comprises a reference transistor which is located on the same integrated circuit as the transistor in the termination network. Both transistors are hence processed together during manufacturing. The transistors are located in 25 such proximity, that they operate in the same thermal environ-ment. The properties of the reference transistor reflect the properties of the transistor in the termination network, since both transistors are processed together during manufacturing, and operate in the same thermal environment. The transistors are 30 typically of the same type, thereby having essentially identical properties .
The control circuit has a feedhack arrangement which çontrols the reference transistor in such a way, that the;, ':qnr.o of the reference translstor is kept constant. The control signal thereby 35 retauired to control the reference transistor is also used for _ = _ . . .. . . .. . . ... . _ .. _ . . . . . .. ...
2181~7~
O W0 9512408s r~ 146 controlling the transisto]- in the termination network. Both transistors hence share the same control signal, and having essentially identical properties, the transistor in the termina-tion network will also exhibit a constant impedance, i e an 5 impedance which is not affected by variations in temperature and by variatlons in the manufacturing process.
The impedance of the termination network can hence be made to always accurately match the characteristic 1 mr~ nre of the tri~nrm1 r~rl r,n line, which in turn permits higher operating lO frequencies.
By exerclsing the invention, the development of new process technologies needs not be stressed as hard. Other advantages of the invention include usage of cheaper process technologies. lmhe advantages of the invention will become clearer from the 15 description of the various embodiments of the invention.
Brief Description of Drawinqs The invention will now be described in closer detail, with reference to the attached drawings, in which Fig. l shows a schematic of a first embodiment of the invention, 20 comprising a termination network and a control circuit, Fig. 2 shows a second embodiment of the invention which is slightly modified from the first embodiment, Fig. 3 shows a termination network comprising more than one transistor .
25 Detailed DescriPtion of Embr-l i r t~ of the Invention A f irst embodiment of the irlvention is shown in f ig . l . The input of a current generator l is connected to a supply voltage 2, and the output of the current generator is connected to the drain terminal of an NMOS transistor 3, and to the positive input of an 30 operational amplifier 4. T]~e source terminal of the transistor 3is connected to ground 5. The positive terminal of a voltage generator 6 is connected to the negative input of the operational W0 95/24089 2 ~ 8 r~ l46 amplifier. The negative tPrmtnAl of the voltage generator is ne~,L~d to ground. The output of the operational amplifier is connected to the gate oi the transistor 3, and to the gate of an NMOS transistor 7 of the same type as transistor 3. The output terminal of a tr~ncm; ccl nn line 8 is connected to the drain tPrm;nAl of the transistor 7, and to the input of a buffer g. The ground tPrm;n~l of the trAn~micc;nn line is connected to ground, although not necessarily as shown. The source tPrmtnAl of the transistor 7 is connected to ground.
10 The function of the circuitry will now be P~rrlA;nPd. A trans-mitter, not shown, sends signals through the transmission line 8.
These signals are being received by the buffer 9. A termination network 10 terminates the transmission line. The termination network comprises, for the sake of simplicity, the single 15 transistor 7 . A control circuit 11 keeps the ; mrPtlAnrP of this transistor 7 constant, irrespective o variations in the manufacturing process or variations in temperature. This constant impedance is set to match the characteristic impedance of the trAn~m; cc; nn line. The impedance is set by properly choosing the 20 voltage of voltage generator 6 and the current of current generator 1, which will be further explained.
,mLhe operational amplifier operates in a negative feedback mode.
The voltage UDS across the reference transistor 3 is hence virtually the same as the voltage of the voltage generator.
25 Furthermore, the current ID through the reference transistor 3 is virtually the same as the current sourced by the current generator 1. The impedance of the reference transistor 3 is therefore dictated by the voltage/current ratio (UDS/ID)' It is essential that this ratio is kept constant, while otherwise 30 the impedance of the reference transistor will not be constant.
A constant voltage/current ratio can be achieved by accurate voltage and current generators, which are known per se.
The; ~-~lAnrP of transistor 3 will be reflected in transistor 7, as both transistors 3, 7 have identical properties and both 2 ~ 8 1 6 78 O Wo 9~/24089 F~~ 146 transistors 3, 7 are controlled by the same control voltage U~;
from the output of the operational amplifier.
The impedance of the transistor 7 is hence constant ( within a relevant operating range ) and equal to the aforementioned 5 voltage/current ratio.
A second embodiment of the invention, which is shown in fig. 2, eases a stringent requirement of accurate generation of voltage and current.
The circuitry differs in that the current generator 1 is replaced lO by a resistor 13, and the voltage generator 6 is replaced by a resistor network consisting of a resistor 12 connected to the supply voltage and to the negative input of the operational amplifier, and a res$stor 14 connécted to ground and to the same negative input of the operational amplifier.
15 The two resistors 12,13 have, for the sake of Simrl;r~ty, the same nominal impedance. They are integrated on the same in-tegrated circuit, typicall~ on the same integrated circuit which accommodates the termination network. The impedance of these resistors 12 ,13 will hence be virtually identical, although not 20 necessarily constant.
As in the previous embodiment, the electrical balance attained through the feedback arrangement results in virtually identical voltages on both inputs of the operational amplifier. The currents Il,I2 through the resistors 12,13 are therefore virtually 25 equal .
Since the currents Il, I2 through the resistors 12,13 are virtually equal, the current I~ through the resistor 14 will be virtually equal to the current ID through the transistor 3.
Since also the voltage U2 across the resistor 14 is virtually 30 equal to the voltage UDS across the transistor 3, the; ~ nc~
of the reference transistor 3 will be virtually equal to the i mrp~ nre of the resistor 14 .
, .
WO 95124089 '~, l 3 ~ b 7 8 PCr1SE95100146 ~he impedance of transistor 7 is hence also e~aual to the i mrPrl~nr~ of resistor 14 . The impedance of transistor 7 is ; n~l~rPn~l~nt of variations in the supply voltage, and depends only on the ~ mr~ nr~ of the resistor 14 .
5 The resistor 14 may be located outside the integrated circuit, in whlch case its impedance is independent of the properties of the integrated circult.
In an integrated-circuit technology less sensitive to thermal variations, the resistor 14 can be integrated on the integrated lO circuit, provided the impedance of said resistor 14 can be ad~usted ( trimmed ), e 9 by laser.
The advantage may not be apparent at f irst, as a resistor based termination network can then also be trimmed, but considering that the termination network may accommodate several resistors, 15 of which each one would have to be trimmed, it is clear that trimming of a single resistor is advantageous.
A termination network for terminating balanced signals is shown in fig. 3. The termination network comprises four transistors.
Both N-channel and P-channel transistors can be used without 20 departing from the scope and the spirit of the invention. It is also within the scope and the spirit of the invention that the reference transistor and the transistors in the termination network are of different types, and that the current I1 is proportional to the current I,. The necessary alterations that 25 would have to be carried out on the circuitry are obvious to a person skilled in the art. It is also obvious to a person skilled in the art, that more than one termination network pertaining to different signal receivers can be controlled by the same control circuit. The ground reference can be set to arly level, and the 30 termination network needs not be grounded as shown.
5 Descri~tion of PriDr Art Receiving of high frequency electrical signals carried over a trAn~m1R~1nn line requires a termination network at the receiving end of the trRnC~m; Ro~1 r,n line. Such a termination network can be integrated with a receiver, for receiving said electrical lO signals, in an integrated circuit. Passive components, such as resistors, are typically used in the termination network. For a given feasible integrated-circuit technology, the received frequency at which the integrated circuit can be guaranteed to operate reliably is limite~ by manufacturing-process variations 15 and thermal variations. This limited frequency capability is the result of impedance mismatch between the trRnomi R.i rn line and the termination network, because the variations in manufacturing process and temperature affect the termination-network imrP~lAnrl~.
With a termination network having an input impedance that 20 accurately matches the characteristic impedance of the transmiss-ion line, regardless of L~ elc!Lul~: variations and process variations, the maximum frequency at which the integrated circuit can be guaranteed to operate would increase.
The problem in the art is hence to implement a termination 25 network in an integrated circuit, such that the frequency at which the integrated circuit can be guaranteed to operate reliably is increased for a given integrated-circuit tPrhnnl o~y, US 4,837,459 describes a voltage generator which is insensitive to process variations and thermal variations.
30 It is also known in the art that transistors, e g Field Ef fect Transistors ( FET: s ), can be used as resistors in a termination network. By controlling these transistors, the 1 ,'?'lRnrP of a termination network can be programmed to match various charac-teristic i mrP~1Anres of connected trRn~ m; oci r,n lines .
W0 95l24089 2 1 8 ~ 6 ~ 8 E~~ 46 Descri~tion of the Invention The ob~ect of the invention Ls to solve the aforementioned;
problem of implementing a termination network in an integrated circuit, such that the fretauency at which the integrated circuit 5 can be guaranteed to operate reliably is increased for a given integrated-circuit technology.
This ob~ect has been a~ hPrl by provision of a termination network comprising one or more transistors, and a control circuit for controlling the i wrerlslnr~ of these transistors . The control 10 circuit comprises a reference transistor which is integrated on the same integrated circuit as the transistors in the termination network. The control circuit comprises means for sensing and' controlling the impedance of the reference transistor.
~ccording to the invention, a control circuit hence controls the 15 ; ~ nre of at least one transistor which is included in a termination network. The control circuit compensates for variations in the properties of said transistor, in order: to uphold a constant i , 51~nrF. of said transistor.: These variations are caused by e g thermal variations, and by variations in the 20 manufacturing process ( tolerances ) .
The control circuit comprises a reference transistor which is located on the same integrated circuit as the transistor in the termination network. Both transistors are hence processed together during manufacturing. The transistors are located in 25 such proximity, that they operate in the same thermal environ-ment. The properties of the reference transistor reflect the properties of the transistor in the termination network, since both transistors are processed together during manufacturing, and operate in the same thermal environment. The transistors are 30 typically of the same type, thereby having essentially identical properties .
The control circuit has a feedhack arrangement which çontrols the reference transistor in such a way, that the;, ':qnr.o of the reference translstor is kept constant. The control signal thereby 35 retauired to control the reference transistor is also used for _ = _ . . .. . . .. . . ... . _ .. _ . . . . . .. ...
2181~7~
O W0 9512408s r~ 146 controlling the transisto]- in the termination network. Both transistors hence share the same control signal, and having essentially identical properties, the transistor in the termina-tion network will also exhibit a constant impedance, i e an 5 impedance which is not affected by variations in temperature and by variatlons in the manufacturing process.
The impedance of the termination network can hence be made to always accurately match the characteristic 1 mr~ nre of the tri~nrm1 r~rl r,n line, which in turn permits higher operating lO frequencies.
By exerclsing the invention, the development of new process technologies needs not be stressed as hard. Other advantages of the invention include usage of cheaper process technologies. lmhe advantages of the invention will become clearer from the 15 description of the various embodiments of the invention.
Brief Description of Drawinqs The invention will now be described in closer detail, with reference to the attached drawings, in which Fig. l shows a schematic of a first embodiment of the invention, 20 comprising a termination network and a control circuit, Fig. 2 shows a second embodiment of the invention which is slightly modified from the first embodiment, Fig. 3 shows a termination network comprising more than one transistor .
25 Detailed DescriPtion of Embr-l i r t~ of the Invention A f irst embodiment of the irlvention is shown in f ig . l . The input of a current generator l is connected to a supply voltage 2, and the output of the current generator is connected to the drain terminal of an NMOS transistor 3, and to the positive input of an 30 operational amplifier 4. T]~e source terminal of the transistor 3is connected to ground 5. The positive terminal of a voltage generator 6 is connected to the negative input of the operational W0 95/24089 2 ~ 8 r~ l46 amplifier. The negative tPrmtnAl of the voltage generator is ne~,L~d to ground. The output of the operational amplifier is connected to the gate oi the transistor 3, and to the gate of an NMOS transistor 7 of the same type as transistor 3. The output terminal of a tr~ncm; ccl nn line 8 is connected to the drain tPrm;nAl of the transistor 7, and to the input of a buffer g. The ground tPrm;n~l of the trAn~micc;nn line is connected to ground, although not necessarily as shown. The source tPrmtnAl of the transistor 7 is connected to ground.
10 The function of the circuitry will now be P~rrlA;nPd. A trans-mitter, not shown, sends signals through the transmission line 8.
These signals are being received by the buffer 9. A termination network 10 terminates the transmission line. The termination network comprises, for the sake of simplicity, the single 15 transistor 7 . A control circuit 11 keeps the ; mrPtlAnrP of this transistor 7 constant, irrespective o variations in the manufacturing process or variations in temperature. This constant impedance is set to match the characteristic impedance of the trAn~m; cc; nn line. The impedance is set by properly choosing the 20 voltage of voltage generator 6 and the current of current generator 1, which will be further explained.
,mLhe operational amplifier operates in a negative feedback mode.
The voltage UDS across the reference transistor 3 is hence virtually the same as the voltage of the voltage generator.
25 Furthermore, the current ID through the reference transistor 3 is virtually the same as the current sourced by the current generator 1. The impedance of the reference transistor 3 is therefore dictated by the voltage/current ratio (UDS/ID)' It is essential that this ratio is kept constant, while otherwise 30 the impedance of the reference transistor will not be constant.
A constant voltage/current ratio can be achieved by accurate voltage and current generators, which are known per se.
The; ~-~lAnrP of transistor 3 will be reflected in transistor 7, as both transistors 3, 7 have identical properties and both 2 ~ 8 1 6 78 O Wo 9~/24089 F~~ 146 transistors 3, 7 are controlled by the same control voltage U~;
from the output of the operational amplifier.
The impedance of the transistor 7 is hence constant ( within a relevant operating range ) and equal to the aforementioned 5 voltage/current ratio.
A second embodiment of the invention, which is shown in fig. 2, eases a stringent requirement of accurate generation of voltage and current.
The circuitry differs in that the current generator 1 is replaced lO by a resistor 13, and the voltage generator 6 is replaced by a resistor network consisting of a resistor 12 connected to the supply voltage and to the negative input of the operational amplifier, and a res$stor 14 connécted to ground and to the same negative input of the operational amplifier.
15 The two resistors 12,13 have, for the sake of Simrl;r~ty, the same nominal impedance. They are integrated on the same in-tegrated circuit, typicall~ on the same integrated circuit which accommodates the termination network. The impedance of these resistors 12 ,13 will hence be virtually identical, although not 20 necessarily constant.
As in the previous embodiment, the electrical balance attained through the feedback arrangement results in virtually identical voltages on both inputs of the operational amplifier. The currents Il,I2 through the resistors 12,13 are therefore virtually 25 equal .
Since the currents Il, I2 through the resistors 12,13 are virtually equal, the current I~ through the resistor 14 will be virtually equal to the current ID through the transistor 3.
Since also the voltage U2 across the resistor 14 is virtually 30 equal to the voltage UDS across the transistor 3, the; ~ nc~
of the reference transistor 3 will be virtually equal to the i mrp~ nre of the resistor 14 .
, .
WO 95124089 '~, l 3 ~ b 7 8 PCr1SE95100146 ~he impedance of transistor 7 is hence also e~aual to the i mrPrl~nr~ of resistor 14 . The impedance of transistor 7 is ; n~l~rPn~l~nt of variations in the supply voltage, and depends only on the ~ mr~ nr~ of the resistor 14 .
5 The resistor 14 may be located outside the integrated circuit, in whlch case its impedance is independent of the properties of the integrated circult.
In an integrated-circuit technology less sensitive to thermal variations, the resistor 14 can be integrated on the integrated lO circuit, provided the impedance of said resistor 14 can be ad~usted ( trimmed ), e 9 by laser.
The advantage may not be apparent at f irst, as a resistor based termination network can then also be trimmed, but considering that the termination network may accommodate several resistors, 15 of which each one would have to be trimmed, it is clear that trimming of a single resistor is advantageous.
A termination network for terminating balanced signals is shown in fig. 3. The termination network comprises four transistors.
Both N-channel and P-channel transistors can be used without 20 departing from the scope and the spirit of the invention. It is also within the scope and the spirit of the invention that the reference transistor and the transistors in the termination network are of different types, and that the current I1 is proportional to the current I,. The necessary alterations that 25 would have to be carried out on the circuitry are obvious to a person skilled in the art. It is also obvious to a person skilled in the art, that more than one termination network pertaining to different signal receivers can be controlled by the same control circuit. The ground reference can be set to arly level, and the 30 termination network needs not be grounded as shown.
Claims (6)
1. A termination-network (10) and a control circuit (11) for controlling the termination network, which termination network is integrated on an integrated circuit and comprises one or more transistors (7) for electrical impedance matching at the receiving end of a transmission line (8), characterized in that the control circuit (11) comprises a reference transistor (3) which is integrated on tlhe same integrated circuit as the transistors (7) in the termination network (10), the control circuit (11) comprises means (1,4,6;4,12,13,14) for sensing and controlling the impedance of said reference trans-istor (3).
2. A termination-network and a control circult according to claim 1, characterized in that the control circuit comprises accurate voltage and current generators for controlling the impedance of the reference transistor (3).
3. A termination-network and a control circuit according to claim 1, characterized in that the control circuit comprises a reference resistor (14), and in that the impedance of said reference resistor (14) is used for controlling the impedance of said reference transistor (3).
4. A termination-network and a control circuit according to claim 1 or 3, characterized in tllat said reference resistor (14) is located on said integrated circuit, and in that said resistor is adjustable.
5. A termination-network and a control circuit according to claim or 3, characterized in that said resistor (14) is located outside the integrated circuit.
6. A termination-network and a control circuit according to any of claims 1-5, characterized in that the control circuit comprises an operational amplifier.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| SE9400657-4 | 1994-02-25 | ||
| SE9400657A SE9400657D0 (en) | 1994-02-25 | 1994-02-25 | One, a control voltage generating, circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA2181678A1 true CA2181678A1 (en) | 1995-09-08 |
Family
ID=20393085
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002181678A Abandoned CA2181678A1 (en) | 1994-02-25 | 1995-02-13 | A termination network and a control circuit |
Country Status (14)
| Country | Link |
|---|---|
| US (1) | US5726582A (en) |
| EP (1) | EP0746934B1 (en) |
| JP (1) | JPH09509806A (en) |
| KR (1) | KR100257850B1 (en) |
| CN (1) | CN1083195C (en) |
| AU (1) | AU686763B2 (en) |
| BR (1) | BR9506874A (en) |
| CA (1) | CA2181678A1 (en) |
| DE (1) | DE69531236T2 (en) |
| FI (1) | FI963296A (en) |
| MX (1) | MX9603267A (en) |
| NO (1) | NO963476L (en) |
| SE (1) | SE9400657D0 (en) |
| WO (1) | WO1995024089A2 (en) |
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| US6037798A (en) * | 1996-05-08 | 2000-03-14 | Telefonaktiebolaget Lm Ericsson | Line receiver circuit having termination impedances with transmission gates connected in parallel |
| DE19654221B4 (en) | 1996-12-23 | 2005-11-24 | Telefonaktiebolaget Lm Ericsson (Publ) | Line connection circuit |
| DE19735982C2 (en) * | 1997-08-19 | 2000-04-27 | Ericsson Telefon Ab L M | Line receiver circuit with line termination impedance |
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| KR100295154B1 (en) | 1998-06-12 | 2001-09-17 | 윤종용 | Impedance Matching Circuit |
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| US6418500B1 (en) * | 1999-02-12 | 2002-07-09 | Fujitsu Limited | Feedback control for termination adjustment |
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| JP4876987B2 (en) | 2007-03-12 | 2012-02-15 | 住友電気工業株式会社 | Receiver circuit |
| JP5369472B2 (en) * | 2008-03-31 | 2013-12-18 | 富士通株式会社 | Semiconductor device |
| US20100164471A1 (en) * | 2008-12-30 | 2010-07-01 | M2000 | Calibration of programmable i/o components using a virtual variable external resistor |
| JP2016188907A (en) * | 2015-03-30 | 2016-11-04 | セイコーエプソン株式会社 | Volume holographic element, method for manufacturing volume holographic element, and display device |
| JP6053997B1 (en) * | 2015-11-25 | 2016-12-27 | 三菱電機株式会社 | Filter device |
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| US11431334B2 (en) | 2020-04-06 | 2022-08-30 | Analog Devices International Unlimited Company | Closed loop switch control system and method |
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| CH628462A5 (en) * | 1978-12-22 | 1982-02-26 | Centre Electron Horloger | Source reference voltage. |
| US4719369A (en) * | 1985-08-14 | 1988-01-12 | Hitachi, Ltd. | Output circuit having transistor monitor for matching output impedance to load impedance |
| US4760292A (en) * | 1986-10-29 | 1988-07-26 | Eta Systems, Inc. | Temperature compensated output buffer |
| US4748426A (en) * | 1986-11-07 | 1988-05-31 | Rodime Plc | Active termination circuit for computer interface use |
| US4918336A (en) * | 1987-05-19 | 1990-04-17 | Gazelle Microcircuits, Inc. | Capacitor coupled push pull logic circuit |
| US4837459A (en) * | 1987-07-13 | 1989-06-06 | International Business Machines Corp. | CMOS reference voltage generation |
| US4924113A (en) * | 1988-07-18 | 1990-05-08 | Harris Semiconductor Patents, Inc. | Transistor base current compensation circuitry |
| US5030856A (en) * | 1989-05-04 | 1991-07-09 | International Business Machines Corporation | Receiver and level converter circuit with dual feedback |
| NL8901170A (en) * | 1989-05-10 | 1990-12-03 | Philips Nv | INTEGRATED CIRCUIT WITH A SIGNAL LEVEL CONVERTER. |
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| JP2902016B2 (en) * | 1989-11-21 | 1999-06-07 | 株式会社日立製作所 | Signal transmission method and circuit |
| US5175451A (en) * | 1990-10-08 | 1992-12-29 | Sharp Kabushiki Kaisha | Biasing circuit for sense amplifier |
| US5341039A (en) * | 1991-04-19 | 1994-08-23 | Mitsubishi Denki Kabushiki Kaisha | High frequency integrated circuit device including a circuit for decreasing reflected signals in wiring formed on a semiconductor substrate |
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| US5361038A (en) * | 1993-03-11 | 1994-11-01 | Trw Inc. | Active load applications for distributed circuits |
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| US5365197A (en) * | 1993-06-30 | 1994-11-15 | Texas Instruments Incorporated | Low-noise distributed amplifier |
-
1994
- 1994-02-25 SE SE9400657A patent/SE9400657D0/en unknown
-
1995
- 1995-02-13 JP JP7522850A patent/JPH09509806A/en not_active Ceased
- 1995-02-13 MX MX9603267A patent/MX9603267A/en unknown
- 1995-02-13 CN CN95191763A patent/CN1083195C/en not_active Expired - Fee Related
- 1995-02-13 WO PCT/SE1995/000146 patent/WO1995024089A2/en active IP Right Grant
- 1995-02-13 CA CA002181678A patent/CA2181678A1/en not_active Abandoned
- 1995-02-13 EP EP95910836A patent/EP0746934B1/en not_active Expired - Lifetime
- 1995-02-13 BR BR9506874A patent/BR9506874A/en not_active IP Right Cessation
- 1995-02-13 KR KR1019960704659A patent/KR100257850B1/en not_active IP Right Cessation
- 1995-02-13 DE DE69531236T patent/DE69531236T2/en not_active Expired - Lifetime
- 1995-02-13 AU AU18649/95A patent/AU686763B2/en not_active Ceased
- 1995-02-24 US US08/393,898 patent/US5726582A/en not_active Expired - Lifetime
-
1996
- 1996-08-21 NO NO963476A patent/NO963476L/en not_active Application Discontinuation
- 1996-08-23 FI FI963296A patent/FI963296A/en unknown
Also Published As
| Publication number | Publication date |
|---|---|
| WO1995024089A2 (en) | 1995-09-08 |
| BR9506874A (en) | 1997-09-09 |
| SE9400657D0 (en) | 1994-02-25 |
| CN1083195C (en) | 2002-04-17 |
| WO1995024089A3 (en) | 1995-10-05 |
| US5726582A (en) | 1998-03-10 |
| NO963476L (en) | 1996-08-21 |
| AU686763B2 (en) | 1998-02-12 |
| KR100257850B1 (en) | 2000-06-01 |
| EP0746934A1 (en) | 1996-12-11 |
| CN1141702A (en) | 1997-01-29 |
| EP0746934B1 (en) | 2003-07-09 |
| MX9603267A (en) | 1997-03-29 |
| DE69531236T2 (en) | 2004-05-27 |
| KR970701467A (en) | 1997-03-17 |
| DE69531236D1 (en) | 2003-08-14 |
| FI963296A0 (en) | 1996-08-23 |
| FI963296A (en) | 1996-08-23 |
| JPH09509806A (en) | 1997-09-30 |
| AU1864995A (en) | 1995-09-18 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EEER | Examination request | ||
| FZDE | Discontinued |