CA2196998A1 - Integrable clock obtaining circuit - Google Patents

Integrable clock obtaining circuit

Info

Publication number
CA2196998A1
CA2196998A1 CA002196998A CA2196998A CA2196998A1 CA 2196998 A1 CA2196998 A1 CA 2196998A1 CA 002196998 A CA002196998 A CA 002196998A CA 2196998 A CA2196998 A CA 2196998A CA 2196998 A1 CA2196998 A1 CA 2196998A1
Authority
CA
Canada
Prior art keywords
phase regulator
state
operating range
timing signal
integrable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA002196998A
Other languages
French (fr)
Other versions
CA2196998C (en
Inventor
Gerhard Trumpp
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Gerhard Trumpp
Siemens Aktiengesellschaft
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gerhard Trumpp, Siemens Aktiengesellschaft filed Critical Gerhard Trumpp
Publication of CA2196998A1 publication Critical patent/CA2196998A1/en
Application granted granted Critical
Publication of CA2196998C publication Critical patent/CA2196998C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B01—PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
    • B01D—SEPARATION
    • B01D53/00—Separation of gases or vapours; Recovering vapours of volatile solvents from gases; Chemical or biological purification of waste gases, e.g. engine exhaust gases, smoke, fumes, flue gases, aerosols
    • B01D53/22—Separation of gases or vapours; Recovering vapours of volatile solvents from gases; Chemical or biological purification of waste gases, e.g. engine exhaust gases, smoke, fumes, flue gases, aerosols by diffusion
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/07—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0016—Arrangements for synchronising receiver with transmitter correction of synchronization errors
    • H04L7/005—Correction by an elastic buffer
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0079—Receiver details
    • H04L7/0083—Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0091—Transmitter details

Abstract

A method and a completely integrable circuit arrangement are proposed for recovery of a timing signal from a data stream. Two groups of phase regulators are supplied with a locally existing reference timing signal, preferably in each case one of mutually complementary reference timing signals. One phase regulator is each case, which has assumed a state within its operating range, is selected to provide the recovered timing signal, while a phase regulator which is currently not selected in kept in the state within its operating range which is diametrically opposite to the state of the currently selected phase regulator. On reaching the limit of the operating range of the currently selected phase regulator, a changeover is made to the phase regulator which has been kept ready until this point.
CA002196998A 1994-08-08 1995-08-08 Integrable clock obtaining circuit Expired - Fee Related CA2196998C (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE4427972A DE4427972C1 (en) 1994-08-08 1994-08-08 Clock recovery from serial data stream by integrable phasing circuit
DEP4427972.8 1994-08-08
PCT/DE1995/001038 WO1996005672A1 (en) 1994-08-08 1995-08-08 Integrable clock recovery circuit

Publications (2)

Publication Number Publication Date
CA2196998A1 true CA2196998A1 (en) 1996-02-22
CA2196998C CA2196998C (en) 2004-01-20

Family

ID=6525145

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002196998A Expired - Fee Related CA2196998C (en) 1994-08-08 1995-08-08 Integrable clock obtaining circuit

Country Status (9)

Country Link
US (1) US5889423A (en)
EP (1) EP0775400B1 (en)
JP (1) JP2947937B2 (en)
KR (1) KR960006982A (en)
AT (1) ATE191109T1 (en)
CA (1) CA2196998C (en)
DE (3) DE4427972C1 (en)
RU (1) RU2127955C1 (en)
WO (1) WO1996005672A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6255048B1 (en) 1996-06-10 2001-07-03 Laboratory Of Molecular Biophotonics Highly sensitive fluoroassay

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69733108T2 (en) * 1996-09-13 2006-03-02 Nec Electronics Corp., Kawasaki Synchronous multiplexing delay circuit
DE69737748T2 (en) * 1997-05-16 2008-01-31 Fujitsu Ltd., Kawasaki Skew reducing circuit
DE19742170C2 (en) * 1997-09-24 2000-05-11 Siemens Ag Method for generating the work cycle in a module of a data transmission system, and correspondingly equipped data transmission system
US6522188B1 (en) * 1998-04-10 2003-02-18 Top Layer Networks, Inc. High-speed data bus for network switching
KR100468717B1 (en) * 2001-10-23 2005-01-29 삼성전자주식회사 Data receiver and data receiving method using signal integration
KR20020008092A (en) * 2001-11-06 2002-01-29 김홍열 Manufacture process of heatproof pet bottle and preform manufactured therewith and heatproof pet bottle
US6759881B2 (en) * 2002-03-22 2004-07-06 Rambus Inc. System with phase jumping locked loop circuit
US6911853B2 (en) * 2002-03-22 2005-06-28 Rambus Inc. Locked loop with dual rail regulation
US7135903B2 (en) * 2002-09-03 2006-11-14 Rambus Inc. Phase jumping locked loop circuit
US6922091B2 (en) * 2002-09-03 2005-07-26 Rambus Inc. Locked loop circuit with clock hold function
US6952123B2 (en) * 2002-03-22 2005-10-04 Rambus Inc. System with dual rail regulated locked loop
US7957498B2 (en) 2005-08-25 2011-06-07 Panasonic Corporation Data receiver device and data transmission/reception system
WO2007060756A1 (en) * 2005-11-22 2007-05-31 Matsushita Electric Industrial Co., Ltd. Phase comparator and regulation circuit

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5954344A (en) * 1982-09-22 1984-03-29 Fuji Electric Co Ltd Timing reproducer
JPH021620A (en) * 1987-11-30 1990-01-05 Toshiba Corp Voltage controlled oscillation circuit
AU604997B2 (en) * 1988-02-26 1991-01-03 Alcatel Australia Limited A digital phase locked loop
JP2629028B2 (en) * 1988-08-10 1997-07-09 株式会社日立製作所 Clock signal supply method and device
ATE120061T1 (en) * 1989-09-19 1995-04-15 Siemens Ag SYNCHRONIZING DEVICE FOR A DIGITAL SIGNAL.
DE59009188D1 (en) * 1990-06-08 1995-07-06 Siemens Ag Method and circuit arrangement for a phase comparator.
SE501190C2 (en) * 1993-04-28 1994-12-05 Ellemtel Utvecklings Ab Digitally controlled crystal oscillator

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6255048B1 (en) 1996-06-10 2001-07-03 Laboratory Of Molecular Biophotonics Highly sensitive fluoroassay

Also Published As

Publication number Publication date
JPH09508775A (en) 1997-09-02
CA2196998C (en) 2004-01-20
US5889423A (en) 1999-03-30
WO1996005672A1 (en) 1996-02-22
JP2947937B2 (en) 1999-09-13
KR960006982A (en) 1996-03-22
EP0775400A1 (en) 1997-05-28
EP0775400B1 (en) 2000-03-22
ATE191109T1 (en) 2000-04-15
DE4427972C1 (en) 1995-07-27
RU2127955C1 (en) 1999-03-20
DE19529179C2 (en) 1999-07-22
DE59508071D1 (en) 2000-04-27
DE19529179A1 (en) 1997-02-13

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Legal Events

Date Code Title Description
EEER Examination request
MKLA Lapsed