CA2216171A1 - High speed digital video serial link - Google Patents
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- CA2216171A1 CA2216171A1 CA002216171A CA2216171A CA2216171A1 CA 2216171 A1 CA2216171 A1 CA 2216171A1 CA 002216171 A CA002216171 A CA 002216171A CA 2216171 A CA2216171 A CA 2216171A CA 2216171 A1 CA2216171 A1 CA 2216171A1
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Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/20—Servers specifically adapted for the distribution of content, e.g. VOD servers; Operations thereof
- H04N21/23—Processing of content or additional data; Elementary server operations; Server middleware
- H04N21/238—Interfacing the downstream path of the transmission network, e.g. adapting the transmission rate of a video stream to network bandwidth; Processing of multiplex streams
- H04N21/2381—Adapting the multiplex stream to a specific network, e.g. an Internet Protocol [IP] network
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/20—Servers specifically adapted for the distribution of content, e.g. VOD servers; Operations thereof
- H04N21/23—Processing of content or additional data; Elementary server operations; Server middleware
- H04N21/236—Assembling of a multiplex stream, e.g. transport stream, by combining a video stream with other content or additional data, e.g. inserting a URL [Uniform Resource Locator] into a video stream, multiplexing software data into a video stream; Remultiplexing of multiplex streams; Insertion of stuffing bits into the multiplex stream, e.g. to obtain a constant bit-rate; Assembling of a packetised elementary stream
- H04N21/23602—Multiplexing isochronously with the video sync, e.g. according to bit-parallel or bit-serial interface formats, as SDI
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/434—Disassembling of a multiplex stream, e.g. demultiplexing audio and video streams, extraction of additional data from a video stream; Remultiplexing of multiplex streams; Extraction or processing of SI; Disassembling of packetised elementary stream
- H04N21/4342—Demultiplexing isochronously with video sync, e.g. according to bit-parallel or bit-serial interface formats, as SDI
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/436—Interfacing a local distribution network, e.g. communicating with another STB or one or more peripheral devices inside the home
- H04N21/4363—Adapting the video or multiplex stream to a specific local network, e.g. a IEEE 1394 or Bluetooth® network
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/438—Interfacing the downstream path of the transmission network originating from a server, e.g. retrieving MPEG packets from an IP network
- H04N21/4381—Recovering the multiplex stream from a specific network, e.g. recovering MPEG packets from ATM cells
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/18—Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast
- H04N7/181—Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast for receiving images from a plurality of remote sources
Abstract
A system for bi-directional digital serial communication and control of remote units including video cameras and input/output devices in machine vision systems. The communication system includes a main processor, communication hubs and remote units. The system is capable of monitoring and controlling the remote units in real-time while receiving video data images from the remote video cameras. Digital signals are transmitted in two different protocols; one for data communications, and one for control communications.
Description
W O96/31067 PCTrUS96/03763 HIGH SPEED DIGITAL VIDEO SERIAL LINK
Teehnical Field of the Invention The present invention relates generally to high speed digital serial r eommunication and in partieular to high speed digital communication for video data signals and control.
Rack~round of the Invention I 0 In conventional maehine vision eommùnieation and eontrol systems, a proeessor is eonnected to remote deviees such as video cameras using a cable having numerous eonduetors. The cable ineludes multiple eontrol lines for eontrollin~ operations of the eamera. These operations ean include foeusing the eamera, positioning the eamera, and capturing a picture. The cable also includesdata, synchronization and timing lines for transmitting video signals from the eamera to the processor and additional lines for supplying power to the eamera.
Different eontrol systems have been used to eontrol a plurality of cameras. One system uses a plurality of eameras, eaeh requiring a separate eontroller and a separate communication cable. This system becomes cost prohibitive to implement as the number of remote cameras increases. In another system. one eontroller ean eommunieate with more than one camera. This system. however, requires that all cameras be the same type and that only one eamera acquire an image at a time. Both of these systems have diffieulty aehieving the speed and flexibility required to control a plurality of cameras simultaneously and are limited in the number of eameras whieh ean be eontrolled. In a m~nuf~eturing setting where real-time eontrol of a number of different de~iees is needed, sueh conventional systems are impractical and oftenundesirably expensive.
,~ The distanee whieh a eontroller and eamera ean be separated is limited by 30 the cost and operating eharaeteristies of the cable. A eable llaving numerouseonduetors is expensive to purehase, install and m~int~in. Further, most video eameras' output signals are in an analog format ~vhieh is suseeptible to noise and attenuation losses, distortion, eross talk and ringing over long tr~ncmi.ccion eable distances. The cameras, therefore, must be located in proximity to the controller, ~ CA 02216171 1997-09-23 .: , .~ . . . ~ ~ ~ -- . . . ... ~ . .
.. ---- ~---- ~-- .. ..
further reducing the flexibility of such systems. A typical maYimum distance between a controller and a camera is approYimately 100 feet.
A further disadvantage of conventional systems is poor interchangeability of different types of cameras. That is, because a camera is connected to the S controller with a specific cable, ch~nging a camera may require a cable of a different configuration. If the new camera uses a different comrnunication format, further modifications to the controller are required. Finally, operatingcharacteristics which vary among cameras such as horizontal and vertical timing cannot be easily adjusted remotely. For a description of a conventional cable 10 television system see "The Use ofthe Reverse Channels on France Telecom's ~ OG Type Cable Networks" CABLE TV SESSIONS, MONTREUX, June 10-15, 1993, No. SY~fP. 18, 1 1 June 1993. See United States Patent No. 5,371,535 issued to Takizawa for a description of a conventional multipleYing television system, and see United States Patent No. 5,237,408 issued to Blum et al. for a description of a conventional security surveillance system. These systems are not intended for use in manufacturing environments to monitor manufactured components.
For the reasons stated above, and for other reasons stated below ~vhich will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for a fast, fleYible and ine,Ypensive communication and control system for video cameras and other remote devices.
Sllmm~ry of the Invention The above-mentioned problems with communication and control systems and other problems are addressed by the present invention and which will be understood by reading and studying the following specif1cation. A
communication and control system is described which provides real-time bi-directional communication and control of a plurality of remote devices, such as video cameras.
The present invention provides a high speed digital serial cornmunication and control system, and corresponding methods of operation, for use in machine AMENDED SHEET
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2a vision systems. The invention allows for real-time remote control of carneras and other input/output devices. The digital tr~nsmission of video data can include data error checking and have more noise immunity than conventional systems. The present invention uses simpler, cheaper cables, increases the 5 distance between the remote units and a main processor, allows for the easv mi.Ying of camera types and provides the option of e,Ypanding the system by adding additional second3ry hubs and cameras. The present invention simplifies the main processor and allows for the simultaneous acquisition of images from a AME?!OED SHEET
plurality of remote video cameras. The invention allows a plurality of remote units to communicate with a main processor either with or without an intermediate communication hub. The remote units can be video cameras transmitting digital signals. Video cameras tr~n~mitting analog signals can be 5 used, provided an intermediate communication hub is also used.
In particular, the present invention describes a vision control system using bi-directional high speed serial digital tr~n~mis~ions. The system comprises a main processor for receiving and transmitting packaged digital data or control signals, a primary communication hub having a first interface and a 10 plurality of second interfaces, the first interface connected to the main processor through a serial communication bus, and a plurality of remote video cameras having a third interface connected to one of the second interfaces. The third interface comprises a transmitter for transmitting packaged digital data or control signals and a receiver for receiving packaged digital signals. The primary 15 communication hub manages communications between the remote video cameras and the main processor and responds to high priority communications.
In an alternate embodiment~ at least one remote input/output unit is connected to one of the second interfaces allowing the main processor to communicate with any variety of remote devices.
~0 In another embodiment, at least one secondary communication hub is connected to the primary communication hub for m~n~ging communications between the primary communication hub and additional remote video cameras.
The packaged digital video data signals comprise a source address code for identifying an address origin of the digital video data signaL a destination'~ address code identifying a final address destination of the digital video data signal, a priority code identifying a priority of the tr~n~mission, and digital video data. The digital video data signals can further include a data error detection code for detecting errors in the digital video data, and a device identificationcode to identify a type of video camera origin~tinp the tr~n.~mis~ion.
The pacl~aged digital control signals comprise a source address code for identifying an address origin of the digital control signal, a destination address W O96/31067 PCTrUS96/03763 code identifying a final address destination of the digital control signal, a priority code identifying a priority of the tr~n~mi.ssion, and digital control comm~n~ls In still another embodiment, a vision control system using bi-directional high speed serial digital tr~nsmissions comprises a main processor, 5 communication hub and a plurality of remote units. The main processor comprises a receiver for receiving packaged digital signals including a header and either digital data or control signals, a memory for storing the received digital signals, and a trRnsmit1er for tr~nsmitting packaged serial digital signals.
The communication hub at least distributes tr~nsmis.sions between the main 10 processor and a plurality of remote video cameras. The hub comprises a main processor interface connected to the main processor for communicating with the main processor and a plurality of remote video camera interfaces connected to the plurality of remote video cameras for communication with the plurality of remote video cameras. A communication hub interface is located at each of the 15 remote video cameras for communication with the communication hub. Another embodiment describes a digital communication system comprising at least one camera and a processor.
Another embodiment describes a method of bi-directional communication in a vision control system between a plurality of remote video 20 cameras and a main processor. The method comprising the steps of serially transmitting digital signal packets comprising digital data or control signals and a first header from the remote video cameras to a communication hub, using the communication hub~ multiplexing the digital signal packets from the remote video cameras~ evaluating a destination address identifier included in the first25 header and transmitting at least some of the digital signal packets to the main processor, serially transmitting digital signal packets including a second header from the main processor to the communication hub, and using the communication hub. evaluating a destination address identifier included in the second header and transmitting at least some of the packets to at least one the 30 remote video cameras.
W O96131067 PCT~US96/03763 Still another embodiment includes the steps of transmitting a high priority digital signal packet comprising a header having a high priority identifier from a camera to the communication hub, interrupting a digital signal packet being transmitted by the communication hub to the main processor in response to the high priority digital signal packet and transmitting the high priority digital signal packet from the communication hub to the main processor, and completing the trAn.cmi~ion of the interrupted digital signal packet.
Another embodiment includes a communication protocol for trAn~mis~ions between a plurality of remote video cameras and a main processor.
The protocol comprises a beginning code indicating a beginning of a trAn~mis.~ion. a source address indicating an address of the trAn~mission origin. a destination address indicating a destination of the trAn~mi.~.cion, a priority code indicating a priority of the tr~n~mis~ion, data or control codes, and an ending code indicating the end of the trAn.~mi~sion.
Brief Description of the Drawings Figure 1 is a block diagram of the digital serial link system of the present invention including a main processor, communication hub and remote units;
Figure 2 is an alternate embodiment of the present invention including a main processor and a remote unit;
Figure 3 is a more detailed diagram of Figure 1;
Figure 4 illustrates a typical communication from the communication hub to the main processor of Figure 1;
Figure 5 is a block diagram of a main controller of the main processor of Figure 1;
Figure 6 is a detailed block diagram of a field programmable gate array (FPGA) controller of the main controller in Figure 5;
Figure 7 is a block diagram of the main processor interface of the communication hub of Figure 1;
Figure 8 is a detailed block diagram of a FPGA controller of the interface in Figure 7:
Figure 9 is a block diagram of the remote unit interface of the W O96/31067 PCTrUS96/03763 communication hub of Figure 1;
Figure 10 is a detailed block diagram of a FPGA controller of the interface in Figure 9;
Figure 11 is a block diagram of the interface of a remote camera of 5 Figure l;
Figure 12 is a detailed block diagram of a FPGA controller of the interface in Figure 1 1;
Figure 13 is a star configuration of a number of remote cameras and a communication hub of the present invention;
Figure 14 is a bi-directional daisy chain configuration of a number of remote cameras and a communication hub of the present invention; and Figure 15 is a single direction daisy chain configuration of a number of remote cameras and a communication hub of the present invention.
Detailed Description of the Invention In the following detailed description of the preferred embodiment.
reference is made to the accompanying drawings which form a part hereof~ and in which is shown by way of illustration specif1c preferred embodiments in which the inventions may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention. and it is to be understood that other embodiments ma~ be utilized and that logicah mechanical and electrical changes may be made witllout departing from the spiritand scope of the present inventions. The following detailed description is~
therefore, not to be taken in a limiting sense, and the scope of the present inventions is defined only by the appended claims.
The digital serial link (DSL) of the present invention is a vision control system having bi-directional serial communications bus for transmitting digital data and control signals between remote video cameras and a main processor.
The digital video data can be used by the main processor to generate a response based on the content of the video data. That is. the main processor can include a means for analyzing the video data so that the DSL can operate in a machine v ision or image processing system.
~NO96/31067 PCT~US96~03763 In the preferred embodiment, shown in Figure 1, the DSL system has a main processor 100 and remote units 102. 106 which are connected to the main processor through a primary communication hub 104. The remote units can be video cameras 102, or input/output devices such as sensors, conkols or strobe 5 lights, generally referred to as remote units 106. Other remote units are contemplated including, but not limited to, personal computers, devices connected with RS232, programmable logic controllers and industrial control networks. It will be understood that any remote unit capable of receiving signals and generating output signals can be used in the present system. The primary 10 hub 104 can also communicate with one or more secondary hubs 108. The secondary hubs function in a similar manner as the primary hub and are connected to additional remote units to thereby increase both the system's totalcapacity of remote units and the distance between remote units and the main processor. Distances of up to 250 feet can be achieved using low cost twisted 15 pairs of wires between a primary hub and either a secondary hub or a remote unit. This distance can be greatly increased using higher cost links such as fiber optic lines. The primary hub multiplexes data from the remote units and secondary hubs into a serial data stream connected to the main processor 100 over communication link 101. The primary hub also distributes and processes 20 the data transmitted from the main processor to the appropriate remote unit.
The communication link 101 between the main processor 100 and the primary hub 104 is preferably two twisted pairs of wires, with one pair being used for tr~n.~mi~ions from the main processor to the primary hub and the other pair used to transmit from the primary hub to the main processor. Alternatively,25 fiber optic, coax cables or other communication media such as radio tr~n~mi~sions can be used for the communication link. The use of two separate data paths allows for independent and simultaneous communication in either direction, thereby providing the option of controlling a camera while monitoringthe video signal transmitted by that camera. Alternatively~ such duplex 30 communication can be achieved with frequency multiplexing or other such techniques.
W O96t31067 PCTrUS96/03763 In an alternate embodiment where only one remote unit is used, as shown in Figure 2, one remote unit, eg. a camera 102, can be connected directly with amain controller 1 10 of the main processor 100. The communication link 1 14 in this configuration comprises two twisted pairs, one pair for each communication 5 direction and a pair of power supply lines (or similar communication connection for a different type of remote unit) to exchange digital video signals from the camera and control signals from the main processor.
Referring to Figure 3, the preferred embodiment is shown in further detail. The main processor 100 has a main controller 1 10 for transmitting data to 10 the primary hub and receiving data transmitted by the primary hub over link 101.
The primary hub 104 has a main controller interface circuit 1 18 for transmitting data to the main processor and receiving data from the main processor. A
plurality of remote unit interface circuits 120 connect the remote units 102, 106 and secondary hubs 108 to the primary hub 104. Each remote camera has an 15 interface circuit 1 12 for processing data transmitted to and received from a hub.
Direct input/output device 122 can communicate to the hub 104 directly without using a high speed serial link. These I/O devices can provide data directly to the hub which may then be used or further transmitted over the DSL.
The secondary hubs 108 are similar to the primary hub in that they have 20 an interface circuit 1 18 for communication with the primary hub 104 and remote unit interface circuits 120 for communication with remote units. Before describing the interface circuits of the main processor 100. primary hub 104 andremote units~ the protocol of digital serial tr~nsmi.csions in the system is described.
Communication Protocol Referring to Figure 4, data is communicated between the primary hub, the main processor and the remote devices using two distinct formats; a control packet, and a data packet. The control packet is a fixed length tr~nsmi~ion usedto provide control data. This control data can contain control information from the main processor which is directed to a remote unit to control, for example, avideo camera. The control packet can be used to control operating features of W O96/31067 PC~US96/~3763 the video camera such as gain, offset, shutter speed, zoom, focus, and iris aperture. The control packet can also contain requests from a remote unit for a particular service, for example, a camera may request that a strobe light be activated to assist in obtaining a video image. The control packet is preferably5 81 bits long comprising nine bytes (bits 1-8) and an appended ninth bit as shown in Table 1.
Bit 9 Bits 8 - 1 Start of control packet 0 Source Address 0 Destination Address 0 (1 bit) priority code/ (7 bit) device type 0 (3 bits) spare / (5 bit) data type 0 Data type index 0 Real Time Clock (lower byte) 0 Real Time Clock (upper byte) End of control packet Table I
20 The ninth bit is used as a signaling bit to identify the tr~n.cmi~.cion of control codes. A logical 1 indicates that a control code is included in the accompanyingbyte. The start of control packet is indicated by a unique identifier control code used to notify the receiver that a control packet is being transmitted. A different unique identifier can be used to indicate a high priority tr~n.~mi.~ion, as 25 described in greater detail below. That is, a high priority tr~n.~mi.~sion and a standard prioritv tr~n~mi~sion would have different "start of control packet"
indicators. The second byte of the control packet contains the address of the original transmitting source of the control packet and the third byte contains the address of the final destination of the packet. A one bit priority code is included 30 in the fourth b~ te of the control packet to indicate the priority of the W O96/31067 PCTrUS96103763 communication. If the priority bit is a logical 1 the communication is high priority and a logical 0 indicates low priority. The rem~ining seven bits of thefourth byte are used to identify the type of device transmitting data, for example, a digital camera, line scanner or I/O device. The next byte contains five bits 5 identifying the type of control being transmitted, for example, camera control.
Three spare bits are also included in this byte. The data type index byte provides a detailed description of the control process desired. If the data type indicates a camera control, the data type index can be used to reset the camera, trigger thecamera, or start and stop the tr~nsmis.sion of video data. The data type and data 10 type index can be considered a category and subcategory, respectively, thereby providing a means to communicate a multitude of control comm~n~s and requests. The real time clock is a 16 bit word contained in two bytes and used to identify the time in which the tr~nsmission was initiated. The real time clock can be used to monitor the efficiency of the DSL system by tracking the elapsed 15 time between tr~n~mi.ssion and receipt. The last byte is a unique control code to identify the end of the control packet tr:~n~mi.ssion.
The second communication format. a data packet~ is used to provide variable length data from the transmitting device. In a tr~nsmission origin~tingin a remote unit, such as a video camera~ the data is preferably a video image.
20 Alternatively~ in a trzln.smi.ssion originated at the main processor~ the data is preferably information needed by a remote unit. The data packet can contain up to ~048 bytes of data in addition to 12 bytes of control information. The data packet format is illustrated in Table 2.
W O96/31067 PCT~US96JD3763 Bit 9 Bits 8-1 ., 1 Start of data packet 0 Source address 0 Destination address 0 Priority (1 bit) / device type (7 bits) 0 Data type (5 bits) / data length (3 bits) 0 Lower 8 bits of data length 0 Real time clock (lower byte) 0 Real time clock (upper byte) 1 Start of data 0 Data I .. 2.048 bytes End of data 0 Cyclic redundancy check (lower byte) 0 Cyclic redundancy check (upper byte) 1 End of data packet.
Table 2 The first four bytes of the data packet are similar to the first four bytes of the 20 control packet. As with the data tr~nsmi.s.sions, a separate unique identifier can be used to indicate a high priority tr~nsmission. Therefore~ a high priority tr~nsmi.ssion and a standard priority tr~nsmission would have different "start of data packet" indicators. The three spare bits of the fourth byte in the control packet are used in the data packet as the upper three bits of an 11 bit word used S to indicate the length of the data being transmitted. The ninth bit of the data packet marks the tr~nsmission of a control code with a logic 1. The ninth bit and a unique control code are used to indicate the beginning of the data tr~nsn-is.sion.
The data tr~nsmis.sion can vary from one byte to 2048 bytes. The length of the tr~nsmission is primarily dependent upon the type of device transmitting. That W O 96/31067 PCTrUS96/03763 is, as seen in Figure 4, standard RS-l 70 video and double speed video transmit different length data packages as a result of the resolution of the video image captured by each type of video camera. Following the data tr~n.smission the ninth bit and a unique control code are used to indicate the end of the data tr~n~mission. Two bytes are used for a cyclic re~l--nc~ncy check (CRC). The last byte contains unique control code to signal the end of the data packet tr~n.~mi~ion.
To avoid erroneously processing tr~n~mis~ions from a remote unit, the ninth bit and a unique 'no-operate' code can be transmitted from the remote unitwhich indicates that the unit is not transmitting valid signals. This code, therefore, allows a remote unit to stop transmitting valid signals without confusing the receiver. When a receiver receives the no-operate code it remains in a hold state waiting for the no-operate code to end and valid signals to continue.
CRC is a standard data communication error detection technique incorporating the generation of a code at the trzln~mis.sion and the second generation of the code at the receiver using the transmitted data. The receiver compares the transmitted CRC and the second generated CRC to determine if errors occurred. A further description of CRC can be found in Cypress Semiconductor Applications Hand Book (April 1994) at 5-105. It will be understood by one skilled in the art that alternate error detection and correction techniques can be used.
The priority bit of both packets can be used to send urgent tr~n~mi.~sions over the DSL. The primary hub typically multiplexes tr~nsmi.~sions on a first-infirst-out basis. If a high priority packet is transmitted to the hub, however, the hub will insert the packet into a currently transmitted packet. The receiving circuitry will trigger on the ninth bit signal and the unique identifier codes to retrieve the high priority packet without missing any data from the currently transmitted packet. As illustrated in Figure 4, during the tr~nsmi.~sion of an RS-170 color video data packet, tr~nsmi~ion is interrupted and a high priority control packet is inserted in the data stream, after which the rem~ining data CA 022l6l7l l997-09-23 W ~96/31067 PCT~US96/03763 packet is transmitted. Real-time control of remote devices can, therefore, be achieved. To assist the receiving circuitry in detecting the presence of a high priority packet, the start control packet byte and start of data packet can be used to indicate the tr~n.~mi~.~ion of a priority packet, as described above.
Table 3 illustrates an alternative control packet which elimin~tes the priority bits. All control packets are therefore treated as high priority. The start of control packet identifier, however, can be used to identify super high priority packets if necessary. Two CRC bytes have been added to the control packet to allow for better error checking. Table 4 is an alternate data packet.
Bit 9 Bits ~ - I
Start of control packet 0 Destination Address 0 (5 bit) data type / (3 bits) spare 0 Datatype index 0 Real Time Clock (upper byte) 0 Real Time Clock (lower byte) 0 Source Address 0 CRC (upper byte) 0 CRC (lowerbyte) End of control packet Table 3 W O96/31067 PCTrUS96/03763 Bit 9 Bits 8-Start of data packet 0 Destination address 0 Data type (5 bits) / data length (3 bits) 0 N~. Of ~ataBytes 0 Real time clock (upper byte) 0 Real time clock (lower byte) 0 Source Address Start of data 0 Data ~.... ~048 bytes End of data O Cyclic re~ n~l~ncy check (upper byte) O Cyclic redundancy check (lower byte) End of data packet.
Table 4 Table 5 illustrates a short data packet which allows small amounts of data to be sent. The data is limited to 16 bytes. The short data packet can be useful for transmitting Input/Output data~ configuration data~ or status data.
~0 WO~ 96/31067 PCT~US96/03763 Bit 9 Bits 8-1 Start of data packet 0 Destination address 0 Data type (5 bits) / data length (3 bits) 0 No. Of Data Bytes 0 Real time clock (upper byte) 0 Real time clock (lower byte) 0 Source Address Start of data 0 Data 2 .. 16 bytes End of data O Cyclic reclnntl:~ncy check (upper byte) 0 Cyclic redundancy check (lower byte) End of data packet.
Table 5 Main Controller Interface Circuitry Referring to Figures 5-6, the main controller I 10 of the main processor 100 is described in detail. As described above, the main controller 1 10 connects 20 the primary communication hub 104 to the main processor. That is~ the main controller is an interface between the main processor and the rest of the DSL
system. The controller 1 10 transmits control and data packets to the DSL and receives and stores packets for retrieval by the main processor. The control packets transmitted to the DSL could, for example, be used to enable different 25 remote cameras, trigger cameras, request digital video outputs, or run built-in-self-tests (BIST) on the remote units. The control comm~n~l~ available are limited only by the type of remote units implemented and the above examples are not intended to limit the commands available for tr~n~mi~.cion from the maincontroller.
W O96/31067 PCTrUS96/03763 In the up-stream (toward the remote unit) direetion, the main proeessor is eonneeted to a DSL eontrol eireuit 130 to proeess upstream paekets. The eontrol 130 regulates upstream tr~n.~mi.c~ions and provides the paekets to transmitter 132 whieh transmits to a primary hub 104 over link 101 . The pl ~rt;~ d transmitters5 of the present system are HOTLinkTM CY7B923 k~n~mitters manufaetured by CYPRESS Semieonduetor Ine.~ San Jose, California. For detailed information and operation see HOTLinkTM User's Guide (May 1994). In the down-stream direetion tr~n~mic~ions are received from a primary hub bv reeeiver 134 and proeessed by a field programmable gate array (FPGA) 136. It will be understood 10 that a gate array or similar circuitry could be used in place of an FPGA. Thepreferred receivers of the present system are HOTLinkTM CY7B933 receivers manufactured by CYPRESS Semiconductor Inc.~ San Jose. California. For detailed information and operation see HOTLINK User's Guide (May 1994).
The tr~n~mi.csions received will typically be data packets including digital 15 camera video and digital inputs, but other data tr~n.smi~.sions are contemplated.
The FPGA strips the header and CRC information from the received control and data packets. The video or input data is stored in memories 138, l 40, 142 for access by the main processor either directly or through the FPGA. The memories are preferably synehronous dynamic random access memories 20 (SDRAM)~ but can be any type of memory including video random aecess memories (VRAM).
The FPGA 136, as seen in Figure 6, comprises a header deeoder l 44 for stripping the header and CRC generator 145 for generating the CRC eode from reeeived tr~n~n-i.c~ions. The header preferably comprises the source address, 25 destination address and the priority eode of either the eontrol or data paekets.
The CRC from the received tr~n~mi~ion is accessible by the main proeessor through buffer 146 to eheek for errors in the reeeived tr~n~mis~ion. A eopy of the header information is also stored in a buffer 146 for aecess by the main proeessor 100. Address decoder 150 is used to identify the address of tlle buffer 30 whieh the main processor is aecessing. First-in first-out (FIFO) buffer 148 provides an overflow protection for transferring the digital data to memories 138, W O96131067 PCT~US96/03763 140~ 142. The address decoder 150, memory select 152, memory address/timing 154, and refresh/memory control 156 circuits provide management control capabilities for the memories. The main processor, therefore, can select which memory is to be used for storing the received data.
Primarv Hub Interface Circuitr,v The primary hub 104 comprises a main processor interface 118 and a plurality of remote unit interfaces 120. Figures 7 and 8 illustrate block diagrams of the main processor interface 118. In the up-stream direction, tr~n.smissions from the main processor 100 are received by receiver 158 and processed at FPGA 160. An up-stream tr~n.smission intended for remote units is further transmitted by transmitter 162 through buffer 164 to all the remote units connected to the primary hub.
The FPGA controller 160 of Figure 7~ of the main processor interface has an input header decoder 166 to strip the header from the tr~n.smi.s~ion and store the tr~n.smi.ssion in FIFO buffer 168. Processor interface 170 determines if the primar! hub is the destination address of the transmission. If the hub is the destination address, the transmitted data and header are processed and the desired operation indicated in the packet is conducted by the hub. If the hub isnot the final destination~ the received transmission is queued in buffer 172 andre-encoded in encoder 174. Down-stream tr~nsmi.ssions are processed at processor interface 170 in substantially the same manner as up-stream tr~nsmi.ssions. If the main processor is the intended destination, data transferunit 176 transmits the signal to the main processor 100 through trarismitter 178.
I/O interrupt circuit 222 monitors direct I/O de~ices 122 and couples their outputs to the DSL. A power supply 181 is included in the primary hub to provide power to the remote units.
Each remote unit interface 120 preferably interfaces with two remote units~ as sho~ n in Figure 9. The remote unit interfaces are modular such that additional remote unit interfaces can be added to a hub to increase the number of remote units connected to the hub, see Figure 3. The modular nature of the interfaces allows for easy expansion as a system increases in size. Up-stream W 096/31067 PCT/U~r''~3763 tr~n~mi~ions merely pass through the interface and are not further processed. Inthe down-stream direction, however, the remote unit interface 120 has a receiver180, FPGA controller 182 and a memory 184 associated with each remote unit interfaced. The FPGA 182 and memory 184 operate substantially the same as FPGA 136 and memories 138,140,142 ofthe main controller 110. The memories allow for the acquisition of multiple images at one time. In addition, the memories buffer data rate differences between input and output. Prior art systems can only acquire images from a limited number of cameras at one time and therefore inhibit image acquisition from other cameras connected to the 10 system. This is a problem where the image may change during the time th~
camera is inhibited. Memory 184 allows the cameras to acquire an image without delaying the acquisition. The FPGA 182, as seen in Figure 10~ has a decoder 186 which strips the header from the received trzln~mi.~ion and stores acopy ofthe header in buffer 188. The received tr~n~mi~ion is placed in FIFO
15 buffer 190 for storage in memory 184. The hub processor 220, Figure 7~ can address buffer 188 using address decoder 192. The hub processor can also control memory 184 through memory control circuit 196 and memory address/timing circuit 194.
Camera Interface The following is the preferred embodiment for a remote unit comprising a video camera 102. Referring to Figures 1 1 and 1 7~ the camera has an interface 112 which contains a receiver 198 for receiving transmissions from the primary hub 104 and a transmitter 202 for transmitting to the primary hub. The interfaceis preferably a separate circuit which can be used with a plurality of different25 cameras. An alternative embodiment provides cameras cont~ining the interface circuitry. The FPGA controller 200 controls both reception and tr~n~mi~.sion forthe camera. Regulator 206 regulates power supplied by the power supply 181 of the primary hub. Analog to digital converter 204 converts an analog video signalgenerated by the camera into a digital video signal for tr~n~mi~sion to the 30 primary hub.
W 096131067 PC~/U~ v3/63 The FPGA 200 comprises a header decoder 208 for decoding the header and determinin~ if the camera is the intended destination of the received signal.
Preferably each remote unit has both a unique address and a global address for receiving tr~n~mi~ions. The unique address is used for a particular unit, while 5 the global address is used for all of the remote units. If either address is detected, the FPGA processes the signal. A built in self test circuit 210 provides the ability to test the camera and transmit the results to the primary hub. To transmit digital video data from analog to digital converter 204, CRC generator 212 produces the CRC code bytes used in the transmitted data packet. as 10 explained above, and encoder 214 encoded tl1e header for the transmission.
Horizontal timing generator 216 and v ertical timing generator ~18 are used to remotely adjust the timing of the camera depending on the type of camera used.
It will be recognized that additional operating characteristics of the camera can be remotely controlled by the DSL system. Figure 13 illustrates one preferred 15 configuration of remote cameras. A plurality of cameras, cameras 1-4, are arranged in a star configuration. That is, each camera has a separate communication link to the primary hub 104 and is independent of the other cameras. Figure 14 illustrates an alternative configuration of remote cameras. Aplurality of cameras. cameras 1-4, are arranged in a bi-directional daisy chain 20 configuration. That is, the communication hub communicates w ith the cameras over a common link. Figure 15 illustrates another alternate configuration of remote cameras. A plurality of cameras, cameras 1-4, are arranged in a single direction daisy chain configuration. That is, the communication hub transits to one camera and receives from a different camera, with each camera comlected in 25 series.
Alternately, one skilled in the art will recognize that analog video cameras can be used to transmit to a primary or secondary hub using analog signals. Because the signals are analog~ no analog-to-digital circuitry is needed at the camera. The analog signal is transformed into the digital signal as 30 described above at the remote unit interface 120. In this embodiment. the remote unit interface 120 comprises components comparable to the con~erter 204, CRC
W O96/31067 PCTrUS96/03763 generator 212 and the encoder 214 as described above. This embodiment allows for the economical use of analog cameras by not requiring a user to purchase digital camera interfaces. Further, both analog and digital cameras can be used in combination in a DSL.
Operation of the DSL System Remote Camera communication The DSL communication and control system as described above and shown in Figure 1 provides communication between remote units 102, 106, at least one communication hub 104 and a main processor 100. The operation of the communication system is best understood by first ex~mining the down stream communication from a remote video camera 102.
The camera interface 1 12 of Figures 1 1 and 12 receives analog video signals from the remote video camera 102 and converts the analog signal to digital using converter 204. Converting the analog signal to digital allows flexibility in camera selection. Different cameras can be used or exchanged without requiring extensive changes in cable connections as with a conventional system. Further. the horizontal and vertical timing generators 216, 218, as described in further detail below, allow for the use of different cameras without ch~n~ing the camera interface 112. The digital video signal is received at FPGA
controller 200 where the CRC generator 212 generates the CRC bytes of the data packet as shown above in Table 2. The digital video data and CRC are combined at the header encoder 214 to generate data packets as shown in Table 2 above. Alternatively~ the FPGA controller 200 can generate control packets as previously shown in Table 1. These control packets preferably request that either the primary hub l 04 or the main processor 100 perform some function, such as trigger a strobe light 106. The communications from the controller 200 are transmitted to the primary hub 104 via transmitter 202. The conductor cable between the remote video camera 102 and the primar~ hub 104 is shielded and preferably comprises six conductors; two for serial communication to the hub, two for serial communication from the hub and two power supply lines.
Referrin(7 to Figures 7 through 10, the transmitted packets from each camera are received at the primary hub by receiver 180 and processed by FPGA
W 09613~67 PCTAUS96~3763 controller 182. The header of the packet is decoded at header decoder 186 and a copy of the header is stored in buffer 188. The received packet is stored in theFIFO buffer 190 prior to being stored in the memory 184. Address decode 192 allows the hub processor 220 to read and control buffer 188, and control the 5 storage of the packet to the memory 184. I/O interrupt control circuit 222 monitors interrupt requests from a plurality of interrupt lines INT A through INT
H associated with the plurality of remote units. As stated above, I/O interrupt control circuit 222 monitors direct I/O devices 122. If an I/O device sends a si~nal to the hub, a specific response or operation may be started. For example,10 a direct sensor may send a signal indicating that a camera acquire a picture. In response the hub will send command to the camera to take a picture. The camera will then respond back to the hub and request that a strobe be triggered.
If a tr~n~mi~.~ion from a remote unit is received by the primary hub a signal is provided on the corresponding interrupt line and the control circuit 222 15 determines if the tr~n~mi~.~ion is a high priority. A high priority signal isprocessed as described above such that a standard tr~n~mi~.cion is interrupted temporarily. If a high priority control packet is received from a video camera requesting that a strobe light be triggered. the primary hub immediately transmits a strobe trigger signal to the strobe 106 associated with the requesting camera.The hub processor 220 controls the multiplexing of the data stored in the memories 184 ofthe remote unit interfaces 120 to the FPGA controller 160. As seen in Figure 8, the processor interface 170 takes the output from the hub processor 2~0 and relays the data to the high speed data transfer circuit 176. The digital serial packet is then transmitted to the main processor by transmitter 178 25 via cable linl; 101 at 330 Mbps (mega bits per second)~ however, speeds of 660 Mbps can be used. It will be understood that in speeds in excess of one giga bits per second are contemplated.
The tr~n.smi.c~ion is received by the main controller I 10 of the main processor 100 at receiver 134. The header of the received tr~n.~mi~ion is 30 decoded at decoder 144 and a copy of the header is stored in the buffer 146. The CRC code for received data packets is decoded at decoder 145 and a copy is also W 096/31067 PCT/U~r'~v~763 stored in buffer 146. The received packet is stored in FIFO buffer 148 prior to storage in one of the memor~ 138, 140, 142. Address decoder 150 allows the main processor 100 access to the header and CRC stored in the buffer 146. The main processor also controls the storage of the packets to the memory using circuits 152, 154, and 156. The main processor evaluates the received CRC code to determine if an error occurred in the tr~n~mis.sion.
As seen in Figure 1, secondary hubs 108 can be used to increase the number of remote units serviced by one main processor and increase the distance between a remote unit and the main processor. This hierarchical structure is implemented using the same principles as the primary hub, except the secondary hub will multiplex the remote units serviced thereby to the primary hub.
As can be seen, the present invention provides a communication and control system for receiving data and control requests from a plurality of remote units. Remote units which require immediate attention can be controlled without substantially interrupting communication with other remote units. thereby allowing image acquisition from an unlimited number of video cameras.
Communication hubs can be used to respond to some of the control requests from the remote units to reduce the trzln~mi.~cions to the main processor and increase the speed of the system. Real-time control can. therefore, be obtained.As will be seen below, the main processor can receive data from a camera while simultaneously controlling that camera.
Main processor communication The communication and control of upstream packets from the main processor is best understood starting with Figure 3. A transmission origin~ting 2~ at the main processor 100 is transmitted over the communication link 101 to the primary hub 104. If the intended receiving address is the primary hub. the tr~n~mi.~ion stops there. If ~ however, a remote unit 102 is the destination address, the tr~n~mi.~sion is broadcast to all remote units and the intended unit acts upon the received tr~n~mission.
Referring to Figures 5, 7-9, a communication packet origin~ting at the main processor is transmitted over the communication link 101 to the primary hub ~ 04 via the DSL control 130 and the transmitter 132. Receiver 158 of the main controller interface 118 receives the tr~n.~mi~ion packets and relays the packets to the FPGA controller 160. The headers of the packets are decoded by decoder 166 and the headers and data are stored in FIFO buffer 168. Each 5 decoded header is evaluated at processor interface 170. If the hub is the destination address of the communication, the requested action is performed by the hub processor. If, however, the destination address is not the hub, the decoded header is transferred to the header encoder 174 through data buffer 172.The re-encoded header and data are transmitted using transmitter 162 and buffer 10 164 to all of the remote units over serial data lines OUT A through OUT H.
Upstream tr~n~mi~ions effectively bypass the remote unit interfaces 120 to connect with the serial data conductor lines associated with each remote unit.
The receiver 198 of each remote camera 102 captures the up-stream tr~n~mi~sions and decoder 208 decodes the header. If the destination address 15 matches an address of the remote unit the command code is followed. If the address does not match, the tr~n~mis~ion is ignored. Each remote unit as described above preferably has a unique address and a global address such that remote units can be addressed individually or simultaneously. The command code can indicate a variety of desired operations, in particular a camera could run ~0 a self test using self test circuit 210 or the horizontal and vertical timing can be adjusted using generators 216 and 218. It will be understood that a variety of operations can be controlled remotely, and are not intended to be limited to those described.
As can be seen, the present invention provides a communication and 25 control system for transmitting data and control commands to a plurality of remote units. The main processor can control either the remote units directly, or instruct the primary or secondary hubs to perform a specified operation. Controloperations can be distributed to increase efficiency and communication speed.
Real-time communication and control can, therefore, be obtained. The main 30 processor can receive data from one camera while simultaneously controlling another camera.
W O96/31067 PCTrUS96/03763 Conclusion The present invention provides a high speed digital serial communication and control system~ and corresponding methods of operation, for use in machine vision systems. The invention allows for real-time remote control of cameras S and other input/output devices. The digital trzln~mi~ion of video data can include data error checking and has more noise immunity than conventional systems. The present invention uses simpler cheaper cables~ increases the distance between the remote units and a main processor, allows for the easy mixing of camera types and provides the option of expanding the system by 10 adding additional secondary hubs and cameras. The present invention simplifies the main processor and allows for the simultaneous acquisition of images from a plurality of remote video cameras. The invention allows a plurality of remote units to communicate with a main processor either with or without an intermediate communication hub. The remote units can be video cameras transmitting digital signals. Video Cameras transmitting analog signals can be used, provided an intermediate communication hub is also used.
Additional refinements can be included in the system without departing from the invention. For example. if a packet is received by a hub which is not the destination address~ the pacl;et will be forwarded without interrupting the hub 20 processor. Further. hubs can be prevented from communicating directly with another hub. In this system each hub will communicate a pacl;et to the main processor which will forward the packet to the ap~lopliate flestin~tion hub. It will be appreciated that packets may pass through an intermediate hub on the way to the processor or to the destination hub. Finally, han~h~king can be added between the system devices to reduce communication errors.
Teehnical Field of the Invention The present invention relates generally to high speed digital serial r eommunication and in partieular to high speed digital communication for video data signals and control.
Rack~round of the Invention I 0 In conventional maehine vision eommùnieation and eontrol systems, a proeessor is eonnected to remote deviees such as video cameras using a cable having numerous eonduetors. The cable ineludes multiple eontrol lines for eontrollin~ operations of the eamera. These operations ean include foeusing the eamera, positioning the eamera, and capturing a picture. The cable also includesdata, synchronization and timing lines for transmitting video signals from the eamera to the processor and additional lines for supplying power to the eamera.
Different eontrol systems have been used to eontrol a plurality of cameras. One system uses a plurality of eameras, eaeh requiring a separate eontroller and a separate communication cable. This system becomes cost prohibitive to implement as the number of remote cameras increases. In another system. one eontroller ean eommunieate with more than one camera. This system. however, requires that all cameras be the same type and that only one eamera acquire an image at a time. Both of these systems have diffieulty aehieving the speed and flexibility required to control a plurality of cameras simultaneously and are limited in the number of eameras whieh ean be eontrolled. In a m~nuf~eturing setting where real-time eontrol of a number of different de~iees is needed, sueh conventional systems are impractical and oftenundesirably expensive.
,~ The distanee whieh a eontroller and eamera ean be separated is limited by 30 the cost and operating eharaeteristies of the cable. A eable llaving numerouseonduetors is expensive to purehase, install and m~int~in. Further, most video eameras' output signals are in an analog format ~vhieh is suseeptible to noise and attenuation losses, distortion, eross talk and ringing over long tr~ncmi.ccion eable distances. The cameras, therefore, must be located in proximity to the controller, ~ CA 02216171 1997-09-23 .: , .~ . . . ~ ~ ~ -- . . . ... ~ . .
.. ---- ~---- ~-- .. ..
further reducing the flexibility of such systems. A typical maYimum distance between a controller and a camera is approYimately 100 feet.
A further disadvantage of conventional systems is poor interchangeability of different types of cameras. That is, because a camera is connected to the S controller with a specific cable, ch~nging a camera may require a cable of a different configuration. If the new camera uses a different comrnunication format, further modifications to the controller are required. Finally, operatingcharacteristics which vary among cameras such as horizontal and vertical timing cannot be easily adjusted remotely. For a description of a conventional cable 10 television system see "The Use ofthe Reverse Channels on France Telecom's ~ OG Type Cable Networks" CABLE TV SESSIONS, MONTREUX, June 10-15, 1993, No. SY~fP. 18, 1 1 June 1993. See United States Patent No. 5,371,535 issued to Takizawa for a description of a conventional multipleYing television system, and see United States Patent No. 5,237,408 issued to Blum et al. for a description of a conventional security surveillance system. These systems are not intended for use in manufacturing environments to monitor manufactured components.
For the reasons stated above, and for other reasons stated below ~vhich will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for a fast, fleYible and ine,Ypensive communication and control system for video cameras and other remote devices.
Sllmm~ry of the Invention The above-mentioned problems with communication and control systems and other problems are addressed by the present invention and which will be understood by reading and studying the following specif1cation. A
communication and control system is described which provides real-time bi-directional communication and control of a plurality of remote devices, such as video cameras.
The present invention provides a high speed digital serial cornmunication and control system, and corresponding methods of operation, for use in machine AMENDED SHEET
. .
2a vision systems. The invention allows for real-time remote control of carneras and other input/output devices. The digital tr~nsmission of video data can include data error checking and have more noise immunity than conventional systems. The present invention uses simpler, cheaper cables, increases the 5 distance between the remote units and a main processor, allows for the easv mi.Ying of camera types and provides the option of e,Ypanding the system by adding additional second3ry hubs and cameras. The present invention simplifies the main processor and allows for the simultaneous acquisition of images from a AME?!OED SHEET
plurality of remote video cameras. The invention allows a plurality of remote units to communicate with a main processor either with or without an intermediate communication hub. The remote units can be video cameras transmitting digital signals. Video cameras tr~n~mitting analog signals can be 5 used, provided an intermediate communication hub is also used.
In particular, the present invention describes a vision control system using bi-directional high speed serial digital tr~n~mis~ions. The system comprises a main processor for receiving and transmitting packaged digital data or control signals, a primary communication hub having a first interface and a 10 plurality of second interfaces, the first interface connected to the main processor through a serial communication bus, and a plurality of remote video cameras having a third interface connected to one of the second interfaces. The third interface comprises a transmitter for transmitting packaged digital data or control signals and a receiver for receiving packaged digital signals. The primary 15 communication hub manages communications between the remote video cameras and the main processor and responds to high priority communications.
In an alternate embodiment~ at least one remote input/output unit is connected to one of the second interfaces allowing the main processor to communicate with any variety of remote devices.
~0 In another embodiment, at least one secondary communication hub is connected to the primary communication hub for m~n~ging communications between the primary communication hub and additional remote video cameras.
The packaged digital video data signals comprise a source address code for identifying an address origin of the digital video data signaL a destination'~ address code identifying a final address destination of the digital video data signal, a priority code identifying a priority of the tr~n~mission, and digital video data. The digital video data signals can further include a data error detection code for detecting errors in the digital video data, and a device identificationcode to identify a type of video camera origin~tinp the tr~n.~mis~ion.
The pacl~aged digital control signals comprise a source address code for identifying an address origin of the digital control signal, a destination address W O96/31067 PCTrUS96/03763 code identifying a final address destination of the digital control signal, a priority code identifying a priority of the tr~n~mi.ssion, and digital control comm~n~ls In still another embodiment, a vision control system using bi-directional high speed serial digital tr~nsmissions comprises a main processor, 5 communication hub and a plurality of remote units. The main processor comprises a receiver for receiving packaged digital signals including a header and either digital data or control signals, a memory for storing the received digital signals, and a trRnsmit1er for tr~nsmitting packaged serial digital signals.
The communication hub at least distributes tr~nsmis.sions between the main 10 processor and a plurality of remote video cameras. The hub comprises a main processor interface connected to the main processor for communicating with the main processor and a plurality of remote video camera interfaces connected to the plurality of remote video cameras for communication with the plurality of remote video cameras. A communication hub interface is located at each of the 15 remote video cameras for communication with the communication hub. Another embodiment describes a digital communication system comprising at least one camera and a processor.
Another embodiment describes a method of bi-directional communication in a vision control system between a plurality of remote video 20 cameras and a main processor. The method comprising the steps of serially transmitting digital signal packets comprising digital data or control signals and a first header from the remote video cameras to a communication hub, using the communication hub~ multiplexing the digital signal packets from the remote video cameras~ evaluating a destination address identifier included in the first25 header and transmitting at least some of the digital signal packets to the main processor, serially transmitting digital signal packets including a second header from the main processor to the communication hub, and using the communication hub. evaluating a destination address identifier included in the second header and transmitting at least some of the packets to at least one the 30 remote video cameras.
W O96131067 PCT~US96/03763 Still another embodiment includes the steps of transmitting a high priority digital signal packet comprising a header having a high priority identifier from a camera to the communication hub, interrupting a digital signal packet being transmitted by the communication hub to the main processor in response to the high priority digital signal packet and transmitting the high priority digital signal packet from the communication hub to the main processor, and completing the trAn.cmi~ion of the interrupted digital signal packet.
Another embodiment includes a communication protocol for trAn~mis~ions between a plurality of remote video cameras and a main processor.
The protocol comprises a beginning code indicating a beginning of a trAn~mis.~ion. a source address indicating an address of the trAn~mission origin. a destination address indicating a destination of the trAn~mi.~.cion, a priority code indicating a priority of the tr~n~mis~ion, data or control codes, and an ending code indicating the end of the trAn.~mi~sion.
Brief Description of the Drawings Figure 1 is a block diagram of the digital serial link system of the present invention including a main processor, communication hub and remote units;
Figure 2 is an alternate embodiment of the present invention including a main processor and a remote unit;
Figure 3 is a more detailed diagram of Figure 1;
Figure 4 illustrates a typical communication from the communication hub to the main processor of Figure 1;
Figure 5 is a block diagram of a main controller of the main processor of Figure 1;
Figure 6 is a detailed block diagram of a field programmable gate array (FPGA) controller of the main controller in Figure 5;
Figure 7 is a block diagram of the main processor interface of the communication hub of Figure 1;
Figure 8 is a detailed block diagram of a FPGA controller of the interface in Figure 7:
Figure 9 is a block diagram of the remote unit interface of the W O96/31067 PCTrUS96/03763 communication hub of Figure 1;
Figure 10 is a detailed block diagram of a FPGA controller of the interface in Figure 9;
Figure 11 is a block diagram of the interface of a remote camera of 5 Figure l;
Figure 12 is a detailed block diagram of a FPGA controller of the interface in Figure 1 1;
Figure 13 is a star configuration of a number of remote cameras and a communication hub of the present invention;
Figure 14 is a bi-directional daisy chain configuration of a number of remote cameras and a communication hub of the present invention; and Figure 15 is a single direction daisy chain configuration of a number of remote cameras and a communication hub of the present invention.
Detailed Description of the Invention In the following detailed description of the preferred embodiment.
reference is made to the accompanying drawings which form a part hereof~ and in which is shown by way of illustration specif1c preferred embodiments in which the inventions may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention. and it is to be understood that other embodiments ma~ be utilized and that logicah mechanical and electrical changes may be made witllout departing from the spiritand scope of the present inventions. The following detailed description is~
therefore, not to be taken in a limiting sense, and the scope of the present inventions is defined only by the appended claims.
The digital serial link (DSL) of the present invention is a vision control system having bi-directional serial communications bus for transmitting digital data and control signals between remote video cameras and a main processor.
The digital video data can be used by the main processor to generate a response based on the content of the video data. That is. the main processor can include a means for analyzing the video data so that the DSL can operate in a machine v ision or image processing system.
~NO96/31067 PCT~US96~03763 In the preferred embodiment, shown in Figure 1, the DSL system has a main processor 100 and remote units 102. 106 which are connected to the main processor through a primary communication hub 104. The remote units can be video cameras 102, or input/output devices such as sensors, conkols or strobe 5 lights, generally referred to as remote units 106. Other remote units are contemplated including, but not limited to, personal computers, devices connected with RS232, programmable logic controllers and industrial control networks. It will be understood that any remote unit capable of receiving signals and generating output signals can be used in the present system. The primary 10 hub 104 can also communicate with one or more secondary hubs 108. The secondary hubs function in a similar manner as the primary hub and are connected to additional remote units to thereby increase both the system's totalcapacity of remote units and the distance between remote units and the main processor. Distances of up to 250 feet can be achieved using low cost twisted 15 pairs of wires between a primary hub and either a secondary hub or a remote unit. This distance can be greatly increased using higher cost links such as fiber optic lines. The primary hub multiplexes data from the remote units and secondary hubs into a serial data stream connected to the main processor 100 over communication link 101. The primary hub also distributes and processes 20 the data transmitted from the main processor to the appropriate remote unit.
The communication link 101 between the main processor 100 and the primary hub 104 is preferably two twisted pairs of wires, with one pair being used for tr~n.~mi~ions from the main processor to the primary hub and the other pair used to transmit from the primary hub to the main processor. Alternatively,25 fiber optic, coax cables or other communication media such as radio tr~n~mi~sions can be used for the communication link. The use of two separate data paths allows for independent and simultaneous communication in either direction, thereby providing the option of controlling a camera while monitoringthe video signal transmitted by that camera. Alternatively~ such duplex 30 communication can be achieved with frequency multiplexing or other such techniques.
W O96t31067 PCTrUS96/03763 In an alternate embodiment where only one remote unit is used, as shown in Figure 2, one remote unit, eg. a camera 102, can be connected directly with amain controller 1 10 of the main processor 100. The communication link 1 14 in this configuration comprises two twisted pairs, one pair for each communication 5 direction and a pair of power supply lines (or similar communication connection for a different type of remote unit) to exchange digital video signals from the camera and control signals from the main processor.
Referring to Figure 3, the preferred embodiment is shown in further detail. The main processor 100 has a main controller 1 10 for transmitting data to 10 the primary hub and receiving data transmitted by the primary hub over link 101.
The primary hub 104 has a main controller interface circuit 1 18 for transmitting data to the main processor and receiving data from the main processor. A
plurality of remote unit interface circuits 120 connect the remote units 102, 106 and secondary hubs 108 to the primary hub 104. Each remote camera has an 15 interface circuit 1 12 for processing data transmitted to and received from a hub.
Direct input/output device 122 can communicate to the hub 104 directly without using a high speed serial link. These I/O devices can provide data directly to the hub which may then be used or further transmitted over the DSL.
The secondary hubs 108 are similar to the primary hub in that they have 20 an interface circuit 1 18 for communication with the primary hub 104 and remote unit interface circuits 120 for communication with remote units. Before describing the interface circuits of the main processor 100. primary hub 104 andremote units~ the protocol of digital serial tr~nsmi.csions in the system is described.
Communication Protocol Referring to Figure 4, data is communicated between the primary hub, the main processor and the remote devices using two distinct formats; a control packet, and a data packet. The control packet is a fixed length tr~nsmi~ion usedto provide control data. This control data can contain control information from the main processor which is directed to a remote unit to control, for example, avideo camera. The control packet can be used to control operating features of W O96/31067 PC~US96/~3763 the video camera such as gain, offset, shutter speed, zoom, focus, and iris aperture. The control packet can also contain requests from a remote unit for a particular service, for example, a camera may request that a strobe light be activated to assist in obtaining a video image. The control packet is preferably5 81 bits long comprising nine bytes (bits 1-8) and an appended ninth bit as shown in Table 1.
Bit 9 Bits 8 - 1 Start of control packet 0 Source Address 0 Destination Address 0 (1 bit) priority code/ (7 bit) device type 0 (3 bits) spare / (5 bit) data type 0 Data type index 0 Real Time Clock (lower byte) 0 Real Time Clock (upper byte) End of control packet Table I
20 The ninth bit is used as a signaling bit to identify the tr~n.cmi~.cion of control codes. A logical 1 indicates that a control code is included in the accompanyingbyte. The start of control packet is indicated by a unique identifier control code used to notify the receiver that a control packet is being transmitted. A different unique identifier can be used to indicate a high priority tr~n.~mi.~ion, as 25 described in greater detail below. That is, a high priority tr~n.~mi.~sion and a standard prioritv tr~n~mi~sion would have different "start of control packet"
indicators. The second byte of the control packet contains the address of the original transmitting source of the control packet and the third byte contains the address of the final destination of the packet. A one bit priority code is included 30 in the fourth b~ te of the control packet to indicate the priority of the W O96/31067 PCTrUS96103763 communication. If the priority bit is a logical 1 the communication is high priority and a logical 0 indicates low priority. The rem~ining seven bits of thefourth byte are used to identify the type of device transmitting data, for example, a digital camera, line scanner or I/O device. The next byte contains five bits 5 identifying the type of control being transmitted, for example, camera control.
Three spare bits are also included in this byte. The data type index byte provides a detailed description of the control process desired. If the data type indicates a camera control, the data type index can be used to reset the camera, trigger thecamera, or start and stop the tr~nsmis.sion of video data. The data type and data 10 type index can be considered a category and subcategory, respectively, thereby providing a means to communicate a multitude of control comm~n~s and requests. The real time clock is a 16 bit word contained in two bytes and used to identify the time in which the tr~nsmission was initiated. The real time clock can be used to monitor the efficiency of the DSL system by tracking the elapsed 15 time between tr~n~mi.ssion and receipt. The last byte is a unique control code to identify the end of the control packet tr:~n~mi.ssion.
The second communication format. a data packet~ is used to provide variable length data from the transmitting device. In a tr~nsmission origin~tingin a remote unit, such as a video camera~ the data is preferably a video image.
20 Alternatively~ in a trzln.smi.ssion originated at the main processor~ the data is preferably information needed by a remote unit. The data packet can contain up to ~048 bytes of data in addition to 12 bytes of control information. The data packet format is illustrated in Table 2.
W O96/31067 PCT~US96JD3763 Bit 9 Bits 8-1 ., 1 Start of data packet 0 Source address 0 Destination address 0 Priority (1 bit) / device type (7 bits) 0 Data type (5 bits) / data length (3 bits) 0 Lower 8 bits of data length 0 Real time clock (lower byte) 0 Real time clock (upper byte) 1 Start of data 0 Data I .. 2.048 bytes End of data 0 Cyclic redundancy check (lower byte) 0 Cyclic redundancy check (upper byte) 1 End of data packet.
Table 2 The first four bytes of the data packet are similar to the first four bytes of the 20 control packet. As with the data tr~nsmi.s.sions, a separate unique identifier can be used to indicate a high priority tr~nsmission. Therefore~ a high priority tr~nsmi.ssion and a standard priority tr~nsmission would have different "start of data packet" indicators. The three spare bits of the fourth byte in the control packet are used in the data packet as the upper three bits of an 11 bit word used S to indicate the length of the data being transmitted. The ninth bit of the data packet marks the tr~nsmission of a control code with a logic 1. The ninth bit and a unique control code are used to indicate the beginning of the data tr~nsn-is.sion.
The data tr~nsmis.sion can vary from one byte to 2048 bytes. The length of the tr~nsmission is primarily dependent upon the type of device transmitting. That W O 96/31067 PCTrUS96/03763 is, as seen in Figure 4, standard RS-l 70 video and double speed video transmit different length data packages as a result of the resolution of the video image captured by each type of video camera. Following the data tr~n.smission the ninth bit and a unique control code are used to indicate the end of the data tr~n~mission. Two bytes are used for a cyclic re~l--nc~ncy check (CRC). The last byte contains unique control code to signal the end of the data packet tr~n.~mi~ion.
To avoid erroneously processing tr~n~mis~ions from a remote unit, the ninth bit and a unique 'no-operate' code can be transmitted from the remote unitwhich indicates that the unit is not transmitting valid signals. This code, therefore, allows a remote unit to stop transmitting valid signals without confusing the receiver. When a receiver receives the no-operate code it remains in a hold state waiting for the no-operate code to end and valid signals to continue.
CRC is a standard data communication error detection technique incorporating the generation of a code at the trzln~mis.sion and the second generation of the code at the receiver using the transmitted data. The receiver compares the transmitted CRC and the second generated CRC to determine if errors occurred. A further description of CRC can be found in Cypress Semiconductor Applications Hand Book (April 1994) at 5-105. It will be understood by one skilled in the art that alternate error detection and correction techniques can be used.
The priority bit of both packets can be used to send urgent tr~n~mi.~sions over the DSL. The primary hub typically multiplexes tr~nsmi.~sions on a first-infirst-out basis. If a high priority packet is transmitted to the hub, however, the hub will insert the packet into a currently transmitted packet. The receiving circuitry will trigger on the ninth bit signal and the unique identifier codes to retrieve the high priority packet without missing any data from the currently transmitted packet. As illustrated in Figure 4, during the tr~nsmi.~sion of an RS-170 color video data packet, tr~nsmi~ion is interrupted and a high priority control packet is inserted in the data stream, after which the rem~ining data CA 022l6l7l l997-09-23 W ~96/31067 PCT~US96/03763 packet is transmitted. Real-time control of remote devices can, therefore, be achieved. To assist the receiving circuitry in detecting the presence of a high priority packet, the start control packet byte and start of data packet can be used to indicate the tr~n.~mi~.~ion of a priority packet, as described above.
Table 3 illustrates an alternative control packet which elimin~tes the priority bits. All control packets are therefore treated as high priority. The start of control packet identifier, however, can be used to identify super high priority packets if necessary. Two CRC bytes have been added to the control packet to allow for better error checking. Table 4 is an alternate data packet.
Bit 9 Bits ~ - I
Start of control packet 0 Destination Address 0 (5 bit) data type / (3 bits) spare 0 Datatype index 0 Real Time Clock (upper byte) 0 Real Time Clock (lower byte) 0 Source Address 0 CRC (upper byte) 0 CRC (lowerbyte) End of control packet Table 3 W O96/31067 PCTrUS96/03763 Bit 9 Bits 8-Start of data packet 0 Destination address 0 Data type (5 bits) / data length (3 bits) 0 N~. Of ~ataBytes 0 Real time clock (upper byte) 0 Real time clock (lower byte) 0 Source Address Start of data 0 Data ~.... ~048 bytes End of data O Cyclic re~ n~l~ncy check (upper byte) O Cyclic redundancy check (lower byte) End of data packet.
Table 4 Table 5 illustrates a short data packet which allows small amounts of data to be sent. The data is limited to 16 bytes. The short data packet can be useful for transmitting Input/Output data~ configuration data~ or status data.
~0 WO~ 96/31067 PCT~US96/03763 Bit 9 Bits 8-1 Start of data packet 0 Destination address 0 Data type (5 bits) / data length (3 bits) 0 No. Of Data Bytes 0 Real time clock (upper byte) 0 Real time clock (lower byte) 0 Source Address Start of data 0 Data 2 .. 16 bytes End of data O Cyclic reclnntl:~ncy check (upper byte) 0 Cyclic redundancy check (lower byte) End of data packet.
Table 5 Main Controller Interface Circuitry Referring to Figures 5-6, the main controller I 10 of the main processor 100 is described in detail. As described above, the main controller 1 10 connects 20 the primary communication hub 104 to the main processor. That is~ the main controller is an interface between the main processor and the rest of the DSL
system. The controller 1 10 transmits control and data packets to the DSL and receives and stores packets for retrieval by the main processor. The control packets transmitted to the DSL could, for example, be used to enable different 25 remote cameras, trigger cameras, request digital video outputs, or run built-in-self-tests (BIST) on the remote units. The control comm~n~l~ available are limited only by the type of remote units implemented and the above examples are not intended to limit the commands available for tr~n~mi~.cion from the maincontroller.
W O96/31067 PCTrUS96/03763 In the up-stream (toward the remote unit) direetion, the main proeessor is eonneeted to a DSL eontrol eireuit 130 to proeess upstream paekets. The eontrol 130 regulates upstream tr~n.~mi.c~ions and provides the paekets to transmitter 132 whieh transmits to a primary hub 104 over link 101 . The pl ~rt;~ d transmitters5 of the present system are HOTLinkTM CY7B923 k~n~mitters manufaetured by CYPRESS Semieonduetor Ine.~ San Jose, California. For detailed information and operation see HOTLinkTM User's Guide (May 1994). In the down-stream direetion tr~n~mic~ions are received from a primary hub bv reeeiver 134 and proeessed by a field programmable gate array (FPGA) 136. It will be understood 10 that a gate array or similar circuitry could be used in place of an FPGA. Thepreferred receivers of the present system are HOTLinkTM CY7B933 receivers manufactured by CYPRESS Semiconductor Inc.~ San Jose. California. For detailed information and operation see HOTLINK User's Guide (May 1994).
The tr~n~mi.csions received will typically be data packets including digital 15 camera video and digital inputs, but other data tr~n.smi~.sions are contemplated.
The FPGA strips the header and CRC information from the received control and data packets. The video or input data is stored in memories 138, l 40, 142 for access by the main processor either directly or through the FPGA. The memories are preferably synehronous dynamic random access memories 20 (SDRAM)~ but can be any type of memory including video random aecess memories (VRAM).
The FPGA 136, as seen in Figure 6, comprises a header deeoder l 44 for stripping the header and CRC generator 145 for generating the CRC eode from reeeived tr~n~n-i.c~ions. The header preferably comprises the source address, 25 destination address and the priority eode of either the eontrol or data paekets.
The CRC from the received tr~n~mi~ion is accessible by the main proeessor through buffer 146 to eheek for errors in the reeeived tr~n~mis~ion. A eopy of the header information is also stored in a buffer 146 for aecess by the main proeessor 100. Address decoder 150 is used to identify the address of tlle buffer 30 whieh the main processor is aecessing. First-in first-out (FIFO) buffer 148 provides an overflow protection for transferring the digital data to memories 138, W O96131067 PCT~US96/03763 140~ 142. The address decoder 150, memory select 152, memory address/timing 154, and refresh/memory control 156 circuits provide management control capabilities for the memories. The main processor, therefore, can select which memory is to be used for storing the received data.
Primarv Hub Interface Circuitr,v The primary hub 104 comprises a main processor interface 118 and a plurality of remote unit interfaces 120. Figures 7 and 8 illustrate block diagrams of the main processor interface 118. In the up-stream direction, tr~n.smissions from the main processor 100 are received by receiver 158 and processed at FPGA 160. An up-stream tr~n.smission intended for remote units is further transmitted by transmitter 162 through buffer 164 to all the remote units connected to the primary hub.
The FPGA controller 160 of Figure 7~ of the main processor interface has an input header decoder 166 to strip the header from the tr~n.smi.s~ion and store the tr~n.smi.ssion in FIFO buffer 168. Processor interface 170 determines if the primar! hub is the destination address of the transmission. If the hub is the destination address, the transmitted data and header are processed and the desired operation indicated in the packet is conducted by the hub. If the hub isnot the final destination~ the received transmission is queued in buffer 172 andre-encoded in encoder 174. Down-stream tr~nsmi.ssions are processed at processor interface 170 in substantially the same manner as up-stream tr~nsmi.ssions. If the main processor is the intended destination, data transferunit 176 transmits the signal to the main processor 100 through trarismitter 178.
I/O interrupt circuit 222 monitors direct I/O de~ices 122 and couples their outputs to the DSL. A power supply 181 is included in the primary hub to provide power to the remote units.
Each remote unit interface 120 preferably interfaces with two remote units~ as sho~ n in Figure 9. The remote unit interfaces are modular such that additional remote unit interfaces can be added to a hub to increase the number of remote units connected to the hub, see Figure 3. The modular nature of the interfaces allows for easy expansion as a system increases in size. Up-stream W 096/31067 PCT/U~r''~3763 tr~n~mi~ions merely pass through the interface and are not further processed. Inthe down-stream direction, however, the remote unit interface 120 has a receiver180, FPGA controller 182 and a memory 184 associated with each remote unit interfaced. The FPGA 182 and memory 184 operate substantially the same as FPGA 136 and memories 138,140,142 ofthe main controller 110. The memories allow for the acquisition of multiple images at one time. In addition, the memories buffer data rate differences between input and output. Prior art systems can only acquire images from a limited number of cameras at one time and therefore inhibit image acquisition from other cameras connected to the 10 system. This is a problem where the image may change during the time th~
camera is inhibited. Memory 184 allows the cameras to acquire an image without delaying the acquisition. The FPGA 182, as seen in Figure 10~ has a decoder 186 which strips the header from the received trzln~mi.~ion and stores acopy ofthe header in buffer 188. The received tr~n~mi~ion is placed in FIFO
15 buffer 190 for storage in memory 184. The hub processor 220, Figure 7~ can address buffer 188 using address decoder 192. The hub processor can also control memory 184 through memory control circuit 196 and memory address/timing circuit 194.
Camera Interface The following is the preferred embodiment for a remote unit comprising a video camera 102. Referring to Figures 1 1 and 1 7~ the camera has an interface 112 which contains a receiver 198 for receiving transmissions from the primary hub 104 and a transmitter 202 for transmitting to the primary hub. The interfaceis preferably a separate circuit which can be used with a plurality of different25 cameras. An alternative embodiment provides cameras cont~ining the interface circuitry. The FPGA controller 200 controls both reception and tr~n~mi~.sion forthe camera. Regulator 206 regulates power supplied by the power supply 181 of the primary hub. Analog to digital converter 204 converts an analog video signalgenerated by the camera into a digital video signal for tr~n~mi~sion to the 30 primary hub.
W 096131067 PC~/U~ v3/63 The FPGA 200 comprises a header decoder 208 for decoding the header and determinin~ if the camera is the intended destination of the received signal.
Preferably each remote unit has both a unique address and a global address for receiving tr~n~mi~ions. The unique address is used for a particular unit, while 5 the global address is used for all of the remote units. If either address is detected, the FPGA processes the signal. A built in self test circuit 210 provides the ability to test the camera and transmit the results to the primary hub. To transmit digital video data from analog to digital converter 204, CRC generator 212 produces the CRC code bytes used in the transmitted data packet. as 10 explained above, and encoder 214 encoded tl1e header for the transmission.
Horizontal timing generator 216 and v ertical timing generator ~18 are used to remotely adjust the timing of the camera depending on the type of camera used.
It will be recognized that additional operating characteristics of the camera can be remotely controlled by the DSL system. Figure 13 illustrates one preferred 15 configuration of remote cameras. A plurality of cameras, cameras 1-4, are arranged in a star configuration. That is, each camera has a separate communication link to the primary hub 104 and is independent of the other cameras. Figure 14 illustrates an alternative configuration of remote cameras. Aplurality of cameras. cameras 1-4, are arranged in a bi-directional daisy chain 20 configuration. That is, the communication hub communicates w ith the cameras over a common link. Figure 15 illustrates another alternate configuration of remote cameras. A plurality of cameras, cameras 1-4, are arranged in a single direction daisy chain configuration. That is, the communication hub transits to one camera and receives from a different camera, with each camera comlected in 25 series.
Alternately, one skilled in the art will recognize that analog video cameras can be used to transmit to a primary or secondary hub using analog signals. Because the signals are analog~ no analog-to-digital circuitry is needed at the camera. The analog signal is transformed into the digital signal as 30 described above at the remote unit interface 120. In this embodiment. the remote unit interface 120 comprises components comparable to the con~erter 204, CRC
W O96/31067 PCTrUS96/03763 generator 212 and the encoder 214 as described above. This embodiment allows for the economical use of analog cameras by not requiring a user to purchase digital camera interfaces. Further, both analog and digital cameras can be used in combination in a DSL.
Operation of the DSL System Remote Camera communication The DSL communication and control system as described above and shown in Figure 1 provides communication between remote units 102, 106, at least one communication hub 104 and a main processor 100. The operation of the communication system is best understood by first ex~mining the down stream communication from a remote video camera 102.
The camera interface 1 12 of Figures 1 1 and 12 receives analog video signals from the remote video camera 102 and converts the analog signal to digital using converter 204. Converting the analog signal to digital allows flexibility in camera selection. Different cameras can be used or exchanged without requiring extensive changes in cable connections as with a conventional system. Further. the horizontal and vertical timing generators 216, 218, as described in further detail below, allow for the use of different cameras without ch~n~ing the camera interface 112. The digital video signal is received at FPGA
controller 200 where the CRC generator 212 generates the CRC bytes of the data packet as shown above in Table 2. The digital video data and CRC are combined at the header encoder 214 to generate data packets as shown in Table 2 above. Alternatively~ the FPGA controller 200 can generate control packets as previously shown in Table 1. These control packets preferably request that either the primary hub l 04 or the main processor 100 perform some function, such as trigger a strobe light 106. The communications from the controller 200 are transmitted to the primary hub 104 via transmitter 202. The conductor cable between the remote video camera 102 and the primar~ hub 104 is shielded and preferably comprises six conductors; two for serial communication to the hub, two for serial communication from the hub and two power supply lines.
Referrin(7 to Figures 7 through 10, the transmitted packets from each camera are received at the primary hub by receiver 180 and processed by FPGA
W 09613~67 PCTAUS96~3763 controller 182. The header of the packet is decoded at header decoder 186 and a copy of the header is stored in buffer 188. The received packet is stored in theFIFO buffer 190 prior to being stored in the memory 184. Address decode 192 allows the hub processor 220 to read and control buffer 188, and control the 5 storage of the packet to the memory 184. I/O interrupt control circuit 222 monitors interrupt requests from a plurality of interrupt lines INT A through INT
H associated with the plurality of remote units. As stated above, I/O interrupt control circuit 222 monitors direct I/O devices 122. If an I/O device sends a si~nal to the hub, a specific response or operation may be started. For example,10 a direct sensor may send a signal indicating that a camera acquire a picture. In response the hub will send command to the camera to take a picture. The camera will then respond back to the hub and request that a strobe be triggered.
If a tr~n~mi~.~ion from a remote unit is received by the primary hub a signal is provided on the corresponding interrupt line and the control circuit 222 15 determines if the tr~n~mi~.~ion is a high priority. A high priority signal isprocessed as described above such that a standard tr~n~mi~.cion is interrupted temporarily. If a high priority control packet is received from a video camera requesting that a strobe light be triggered. the primary hub immediately transmits a strobe trigger signal to the strobe 106 associated with the requesting camera.The hub processor 220 controls the multiplexing of the data stored in the memories 184 ofthe remote unit interfaces 120 to the FPGA controller 160. As seen in Figure 8, the processor interface 170 takes the output from the hub processor 2~0 and relays the data to the high speed data transfer circuit 176. The digital serial packet is then transmitted to the main processor by transmitter 178 25 via cable linl; 101 at 330 Mbps (mega bits per second)~ however, speeds of 660 Mbps can be used. It will be understood that in speeds in excess of one giga bits per second are contemplated.
The tr~n.smi.c~ion is received by the main controller I 10 of the main processor 100 at receiver 134. The header of the received tr~n.~mi~ion is 30 decoded at decoder 144 and a copy of the header is stored in the buffer 146. The CRC code for received data packets is decoded at decoder 145 and a copy is also W 096/31067 PCT/U~r'~v~763 stored in buffer 146. The received packet is stored in FIFO buffer 148 prior to storage in one of the memor~ 138, 140, 142. Address decoder 150 allows the main processor 100 access to the header and CRC stored in the buffer 146. The main processor also controls the storage of the packets to the memory using circuits 152, 154, and 156. The main processor evaluates the received CRC code to determine if an error occurred in the tr~n~mis.sion.
As seen in Figure 1, secondary hubs 108 can be used to increase the number of remote units serviced by one main processor and increase the distance between a remote unit and the main processor. This hierarchical structure is implemented using the same principles as the primary hub, except the secondary hub will multiplex the remote units serviced thereby to the primary hub.
As can be seen, the present invention provides a communication and control system for receiving data and control requests from a plurality of remote units. Remote units which require immediate attention can be controlled without substantially interrupting communication with other remote units. thereby allowing image acquisition from an unlimited number of video cameras.
Communication hubs can be used to respond to some of the control requests from the remote units to reduce the trzln~mi.~cions to the main processor and increase the speed of the system. Real-time control can. therefore, be obtained.As will be seen below, the main processor can receive data from a camera while simultaneously controlling that camera.
Main processor communication The communication and control of upstream packets from the main processor is best understood starting with Figure 3. A transmission origin~ting 2~ at the main processor 100 is transmitted over the communication link 101 to the primary hub 104. If the intended receiving address is the primary hub. the tr~n~mi.~ion stops there. If ~ however, a remote unit 102 is the destination address, the tr~n~mi.~sion is broadcast to all remote units and the intended unit acts upon the received tr~n~mission.
Referring to Figures 5, 7-9, a communication packet origin~ting at the main processor is transmitted over the communication link 101 to the primary hub ~ 04 via the DSL control 130 and the transmitter 132. Receiver 158 of the main controller interface 118 receives the tr~n.~mi~ion packets and relays the packets to the FPGA controller 160. The headers of the packets are decoded by decoder 166 and the headers and data are stored in FIFO buffer 168. Each 5 decoded header is evaluated at processor interface 170. If the hub is the destination address of the communication, the requested action is performed by the hub processor. If, however, the destination address is not the hub, the decoded header is transferred to the header encoder 174 through data buffer 172.The re-encoded header and data are transmitted using transmitter 162 and buffer 10 164 to all of the remote units over serial data lines OUT A through OUT H.
Upstream tr~n~mi~ions effectively bypass the remote unit interfaces 120 to connect with the serial data conductor lines associated with each remote unit.
The receiver 198 of each remote camera 102 captures the up-stream tr~n~mi~sions and decoder 208 decodes the header. If the destination address 15 matches an address of the remote unit the command code is followed. If the address does not match, the tr~n~mis~ion is ignored. Each remote unit as described above preferably has a unique address and a global address such that remote units can be addressed individually or simultaneously. The command code can indicate a variety of desired operations, in particular a camera could run ~0 a self test using self test circuit 210 or the horizontal and vertical timing can be adjusted using generators 216 and 218. It will be understood that a variety of operations can be controlled remotely, and are not intended to be limited to those described.
As can be seen, the present invention provides a communication and 25 control system for transmitting data and control commands to a plurality of remote units. The main processor can control either the remote units directly, or instruct the primary or secondary hubs to perform a specified operation. Controloperations can be distributed to increase efficiency and communication speed.
Real-time communication and control can, therefore, be obtained. The main 30 processor can receive data from one camera while simultaneously controlling another camera.
W O96/31067 PCTrUS96/03763 Conclusion The present invention provides a high speed digital serial communication and control system~ and corresponding methods of operation, for use in machine vision systems. The invention allows for real-time remote control of cameras S and other input/output devices. The digital trzln~mi~ion of video data can include data error checking and has more noise immunity than conventional systems. The present invention uses simpler cheaper cables~ increases the distance between the remote units and a main processor, allows for the easy mixing of camera types and provides the option of expanding the system by 10 adding additional secondary hubs and cameras. The present invention simplifies the main processor and allows for the simultaneous acquisition of images from a plurality of remote video cameras. The invention allows a plurality of remote units to communicate with a main processor either with or without an intermediate communication hub. The remote units can be video cameras transmitting digital signals. Video Cameras transmitting analog signals can be used, provided an intermediate communication hub is also used.
Additional refinements can be included in the system without departing from the invention. For example. if a packet is received by a hub which is not the destination address~ the pacl;et will be forwarded without interrupting the hub 20 processor. Further. hubs can be prevented from communicating directly with another hub. In this system each hub will communicate a pacl;et to the main processor which will forward the packet to the ap~lopliate flestin~tion hub. It will be appreciated that packets may pass through an intermediate hub on the way to the processor or to the destination hub. Finally, han~h~king can be added between the system devices to reduce communication errors.
Claims (29)
1. A machine vision control system for use in a manufacturing environment using two-directional high speed serial digital transmissions comprising:
a main processor for receiving packaged digital video data signals and transmitting packaged digital video data signals, the main processor including an analyzer circuit for analyzing received video image data and generating a response based upon content of the video image data;
a primary communication hub having a first interface and a plurality of second interfaces, the first interface connected to the main processor through aserial communication bus for transmitting the packaged digital video data signals received from the plurality of remote video cameras to the main processor;
a plurality of remote video cameras having a third interface connected to one of the second interfaces for two-directional communication with the primary communication hub;
a first trigger source for providing a signal commanding that one of the plurality of remote video cameras acquire an image; and the primary communication hub adapted to generate a response to a high priority request signal transmitted from the plurality of remote cameras or a trigger source, and generate a signal to acquire an image in response to the first trigger source.
a main processor for receiving packaged digital video data signals and transmitting packaged digital video data signals, the main processor including an analyzer circuit for analyzing received video image data and generating a response based upon content of the video image data;
a primary communication hub having a first interface and a plurality of second interfaces, the first interface connected to the main processor through aserial communication bus for transmitting the packaged digital video data signals received from the plurality of remote video cameras to the main processor;
a plurality of remote video cameras having a third interface connected to one of the second interfaces for two-directional communication with the primary communication hub;
a first trigger source for providing a signal commanding that one of the plurality of remote video cameras acquire an image; and the primary communication hub adapted to generate a response to a high priority request signal transmitted from the plurality of remote cameras or a trigger source, and generate a signal to acquire an image in response to the first trigger source.
2. The machine vision control system of claim 1 further including at least one secondary communication hub connected to one of the plurality of second interfaces of the primary communication hub and additional remote video cameras.
3. The machine vision control system of claim 2 further including a second trigger source for providing a signal to the secondary communication hub commanding that one of the additional remote video cameras acquire an image.
4. The machine vision control system of claim 1 further including at least one remote input / output unit connected to the primary communication hub for at least receiving transmissions from the primary communication hub.
5. The machine vision control system of claim 4 where the remote input /
output unit is an industrial control network.
output unit is an industrial control network.
6. The machine vision control system of claim 4 where the remote input /
output unit is a strobe light.
output unit is a strobe light.
7. The machine vision control system of claim 1 wherein the main processor further comprises:
a plurality of memory devices for storing received digital signals;
and a first circuit having a header decoder circuit for decoding a header of the digital signals, and an error code generator for generating an error code based upon received digital signals.
a plurality of memory devices for storing received digital signals;
and a first circuit having a header decoder circuit for decoding a header of the digital signals, and an error code generator for generating an error code based upon received digital signals.
8. The machine vision control system of claim 1 wherein the primary communication hub comprises:
a first receiver coupled to the main processor for receiving digital signals;
a second receiver coupled to a remote video camera for receiving digital signals;
a processor interface circuit for analyzing a header on received digital signals;
a first transmitter for transmitting digital signals to the main processor;
a second transmitter for transmitting digital signals to a remote video camera second interface;
a first circuit having a header decoder for decoding a header on received digital signals, and a header encoder for appending a header on output digital signals; and a memory circuit for storing received signals.
a first receiver coupled to the main processor for receiving digital signals;
a second receiver coupled to a remote video camera for receiving digital signals;
a processor interface circuit for analyzing a header on received digital signals;
a first transmitter for transmitting digital signals to the main processor;
a second transmitter for transmitting digital signals to a remote video camera second interface;
a first circuit having a header decoder for decoding a header on received digital signals, and a header encoder for appending a header on output digital signals; and a memory circuit for storing received signals.
9. The machine vision control system of claim 1 wherein the packaged digital video data signals comprise a source address code for identifying an address origin of the digital video data signal, a destination address code identifying a final address destination of the digital video data signal, and digital video data.
10. The machine vision control system of claim 9 wherein the packaged digital video data signals further include a data error detection code for detecting errors, and a device identification code to identify a type of camera originating the transmission.
11. The machine vision control system of claim 1 wherein the main processor, primary communication hub, and remote video cameras can receive and transmit packaged digital control signals comprising a source address code for identifying an address origin of the digital control signal, a destination address code identifying a final address destination of the digital control signal, and digital control commands.
12. The machine vision control system of claim 1 wherein the main processor comprises:
a receiver for receiving packaged digital signals having a minimum data rate of 200 mega bits per second including a header and either digital video data or digital control signals, a memory for storing the received digital signals, and a transmitter for transmitting packaged serial digital signals having a minimum data rate of 200 mega bits per second.
a receiver for receiving packaged digital signals having a minimum data rate of 200 mega bits per second including a header and either digital video data or digital control signals, a memory for storing the received digital signals, and a transmitter for transmitting packaged serial digital signals having a minimum data rate of 200 mega bits per second.
13. The machine vision control system of claim 1 wherein the first primary communication hub interface comprises:
a receiver for receiving digital transmissions from the main processor, a processor, a first transmitter for transmitting signals to at least one remote video camera, and a second transmitter for transmitting packaged signals to the main processor; and each one of the second primary communication hub interfaces comprises a receiver associated with each of the plurality of remote video cameras, a controller associated with each receiver for controlling transmissions from one remote video camera, and a memory for storing the transmissions.
a receiver for receiving digital transmissions from the main processor, a processor, a first transmitter for transmitting signals to at least one remote video camera, and a second transmitter for transmitting packaged signals to the main processor; and each one of the second primary communication hub interfaces comprises a receiver associated with each of the plurality of remote video cameras, a controller associated with each receiver for controlling transmissions from one remote video camera, and a memory for storing the transmissions.
14. The machine vision control system of claim 1 or 2 further including at least one analog video camera connected to the primary or secondary communication hub for transmitting analog video signals to the communication hub.
15. The machine vision control system of claim 1 wherein the main processor comprises:
a receiver for receiving packaged digital signals including a header, the packaged digital signals having a minimum data rate of 200 mega bits per second;
a controller for separating the header from the digital signals;
a memory for storing the digital signals; and a transmitter for transmitting packaged digital signals at a minimum data rate of 200 mega bits per second, the transmitted packaged digital signals including a header in response to the received packaged digital signals.
a receiver for receiving packaged digital signals including a header, the packaged digital signals having a minimum data rate of 200 mega bits per second;
a controller for separating the header from the digital signals;
a memory for storing the digital signals; and a transmitter for transmitting packaged digital signals at a minimum data rate of 200 mega bits per second, the transmitted packaged digital signals including a header in response to the received packaged digital signals.
16. The machine vision control system of claim 1 the third interface comprising:
a receiver for receiving packaged digital signals from the main processor having a minimum data rate of 200 mega bits per second;
a transmitter for transmitting packaged digital transmissions comprising a header and digital signals having a minimum data rate of 200 mega bits per second; and a controller for controlling signal transmission communication with the main processor.
a receiver for receiving packaged digital signals from the main processor having a minimum data rate of 200 mega bits per second;
a transmitter for transmitting packaged digital transmissions comprising a header and digital signals having a minimum data rate of 200 mega bits per second; and a controller for controlling signal transmission communication with the main processor.
17. The machine vision control system of claim 1 wherein the primary communication hub comprises:
a receiver for receiving digital transmissions from the main processor having a minimum data rate of 200 mega bits per second, a first transmitter for transmitting signals to at least one of the plurality of remote video cameras, and a second transmitter for transmitting packaged signals to the main processor having a minimum data rate of 200 mega bits per second; and a receiver associated with each of the plurality of remote video cameras, a controller associated with each receiver for controlling transmissions from one of the plurality of remote video cameras, and a memory for storing the transmissions.
a receiver for receiving digital transmissions from the main processor having a minimum data rate of 200 mega bits per second, a first transmitter for transmitting signals to at least one of the plurality of remote video cameras, and a second transmitter for transmitting packaged signals to the main processor having a minimum data rate of 200 mega bits per second; and a receiver associated with each of the plurality of remote video cameras, a controller associated with each receiver for controlling transmissions from one of the plurality of remote video cameras, and a memory for storing the transmissions.
18. The machine vision control system of claim 1 or 2 wherein the primary or secondary communication hub further includes a control circuit for directly communicating with at least one input/output device.
19. The machine vision control system of claim 1 wherein at least one of the plurality of remote video cameras is adapted to send a signal requesting that aninput/output device coupled to the primary communication hub be activated.
20. A method of operating a machine vision control system having a plurality of remote video cameras and a main processor, the method comprising the steps of:
receiving an input trigger signal from a trigger source;
generating a digital data packet based upon the input trigger signal;
capturing an image of an object with one of the plurality of remote video cameras in response to the digital data packet;
converting the image to digital video signal packets including an appended first header;
serially transmitting the digital video signal packets from one of the plurality of remote video cameras to a communication hub;
multiplexing digital video signal packets from the remote video cameras, evaluating a destination address identifier included in the first header, and transmitting at least some of the digital signal packets to the main processor; and analyzing the digital video signal packets with the main processor to evaluate the captured image and generating a response signal.
receiving an input trigger signal from a trigger source;
generating a digital data packet based upon the input trigger signal;
capturing an image of an object with one of the plurality of remote video cameras in response to the digital data packet;
converting the image to digital video signal packets including an appended first header;
serially transmitting the digital video signal packets from one of the plurality of remote video cameras to a communication hub;
multiplexing digital video signal packets from the remote video cameras, evaluating a destination address identifier included in the first header, and transmitting at least some of the digital signal packets to the main processor; and analyzing the digital video signal packets with the main processor to evaluate the captured image and generating a response signal.
21. The method of claim 20 further including the steps of:
serially transmitting digital control signal packets including a second header from the main processor to the communication hub; and using the communication hub, evaluating a destination address identifier included in the second header, and transmitting at least some of the packets to at least one the remote video cameras.
serially transmitting digital control signal packets including a second header from the main processor to the communication hub; and using the communication hub, evaluating a destination address identifier included in the second header, and transmitting at least some of the packets to at least one the remote video cameras.
22. The method of claim 20 further including the steps of:
transmitting a high priority digital signal comprising a header having a high priority identifier from a camera or other I/O device to the communication hub;
interrupting a digital signal being transmitted by the communication hub to the main processor in response to the high priority digital signal and transmitting the high priority digital signal from the communication hub to the main processor; and completing the transmission of the interrupted digital signal.
transmitting a high priority digital signal comprising a header having a high priority identifier from a camera or other I/O device to the communication hub;
interrupting a digital signal being transmitted by the communication hub to the main processor in response to the high priority digital signal and transmitting the high priority digital signal from the communication hub to the main processor; and completing the transmission of the interrupted digital signal.
23. The method of claim 20, further including the steps of;
transmitting a digital signal request packet from one of the remote video cameras or other I/O device where the destination address is an address corresponding to the communication hub;
evaluating the destination address identifier at the communication hub; and responding to the digital signal request packet with the communication hub.
transmitting a digital signal request packet from one of the remote video cameras or other I/O device where the destination address is an address corresponding to the communication hub;
evaluating the destination address identifier at the communication hub; and responding to the digital signal request packet with the communication hub.
24. The method of claim 20 further comprising the steps of:
transmitting a control signal from the communication hub to a camera requesting that the camera capture an image of an object;
transmitting from the camera to the communication hub a high priority signal requesting that a strobe light be activated; and analyzing the high priority signal with the communication hub and transmitting a control signal to the strobe light from the communication hub commanding the activation of the strobe light.
transmitting a control signal from the communication hub to a camera requesting that the camera capture an image of an object;
transmitting from the camera to the communication hub a high priority signal requesting that a strobe light be activated; and analyzing the high priority signal with the communication hub and transmitting a control signal to the strobe light from the communication hub commanding the activation of the strobe light.
25. The method of claim 20 further comprising the steps of:
generating camera activation command and transmitting the command from the communication hub to the one of the plurality of remote video cameras in response to the received input trigger signalignal;
generating a strobe light activation request signal with the one of the plurality of remote video cameras; and activating a strobe light in response to the strobe light activation request signal.
generating camera activation command and transmitting the command from the communication hub to the one of the plurality of remote video cameras in response to the received input trigger signalignal;
generating a strobe light activation request signal with the one of the plurality of remote video cameras; and activating a strobe light in response to the strobe light activation request signal.
26. A main processor for two-directional high speed digital serial communication in a machine vision control system for use in a manufacturing environment having a plurality of remote video cameras, the main processor comprising;
a receiver for receiving packaged digital video data or control signals including a header, the packaged digital video data or control signals having a minimum data rate of 200 mega bits per second;
a controller for separating the header from the digital video data or control signals;
a memory for storing the digital video data or control signals;
an analyzer circuit for analyzing received video image data and generating a response based upon content of the video image data; and a transmitter for transmitting packaged digital signals at a minimum data rate of 200 mega bits per second, the transmitted packaged digital signals including a header in response to the received packaged digital video data or control signals.
a receiver for receiving packaged digital video data or control signals including a header, the packaged digital video data or control signals having a minimum data rate of 200 mega bits per second;
a controller for separating the header from the digital video data or control signals;
a memory for storing the digital video data or control signals;
an analyzer circuit for analyzing received video image data and generating a response based upon content of the video image data; and a transmitter for transmitting packaged digital signals at a minimum data rate of 200 mega bits per second, the transmitted packaged digital signals including a header in response to the received packaged digital video data or control signals.
27. A video camera interface for two-directional high speed digital serial communication in a machine vision control system, the video camera interface comprising;
a receiver for receiving packaged digital signals from a processor having a minimum data rate of 200 mega bits per second;
a transmitter for transmitting packaged digital transmissions comprising a header and either digital video data or digital control signals having a minimum data rate of 200 mega bits per second;
a controller for controlling communication with the processor;
and the video camera interface is adapted to send a signal requesting that an external input/output device coupled to the primary communication hub be activated.
a receiver for receiving packaged digital signals from a processor having a minimum data rate of 200 mega bits per second;
a transmitter for transmitting packaged digital transmissions comprising a header and either digital video data or digital control signals having a minimum data rate of 200 mega bits per second;
a controller for controlling communication with the processor;
and the video camera interface is adapted to send a signal requesting that an external input/output device coupled to the primary communication hub be activated.
28. A communication hub for two-directional high speed digital serial communication in a machine vision control system between a plurality of remote video cameras and a processor, the hub comprising;
a processor interface connected to the processor; and a plurality of remote video camera interfaces connected to the plurality of remote video cameras;
the processor interface comprising a receiver for receiving digital transmissions from a main processor, a first transmitter for transmitting signals to at least one of the plurality of remote video cameras, and a second transmitter for transmitting packaged signals to the main processor;
each one of the plurality of remote video camera interfaces comprising a receiver associated with each of the plurality of remote video cameras, a controller associated with each receiver for controlling transmissions from one of the plurality of remote video cameras, and a memory for storing the transmissions; and the communication hub adapted to activate an external input/output device in response to a request signal transmitted from one of the plurality of remote video cameras.
a processor interface connected to the processor; and a plurality of remote video camera interfaces connected to the plurality of remote video cameras;
the processor interface comprising a receiver for receiving digital transmissions from a main processor, a first transmitter for transmitting signals to at least one of the plurality of remote video cameras, and a second transmitter for transmitting packaged signals to the main processor;
each one of the plurality of remote video camera interfaces comprising a receiver associated with each of the plurality of remote video cameras, a controller associated with each receiver for controlling transmissions from one of the plurality of remote video cameras, and a memory for storing the transmissions; and the communication hub adapted to activate an external input/output device in response to a request signal transmitted from one of the plurality of remote video cameras.
29. A machine vision control system for use in a manufacturing environment using two-directional high speed serial digital transmissions comprising:
a main processor for receiving packaged digital video data signals and transmitting packaged digital video data signals, the main processor including an analyzer circuit for analyzing received video image data and generating a response based upon content of the video image data;
a remote video camera connected to the main processor for two-directional communication, the remote video camera transmitting digital video image data to the main processor; and a trigger source for providing a signal commanding that the remote video camera acquire an image.
a main processor for receiving packaged digital video data signals and transmitting packaged digital video data signals, the main processor including an analyzer circuit for analyzing received video image data and generating a response based upon content of the video image data;
a remote video camera connected to the main processor for two-directional communication, the remote video camera transmitting digital video image data to the main processor; and a trigger source for providing a signal commanding that the remote video camera acquire an image.
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-
1996
- 1996-03-21 WO PCT/US1996/003763 patent/WO1996031067A1/en active IP Right Grant
- 1996-03-21 EP EP99202941A patent/EP0971541A3/en not_active Withdrawn
- 1996-03-21 DE DE69608264T patent/DE69608264T2/en not_active Expired - Fee Related
- 1996-03-21 CA CA002216171A patent/CA2216171A1/en not_active Abandoned
- 1996-03-21 AT AT96909790T patent/ATE192892T1/en not_active IP Right Cessation
- 1996-03-21 AU AU53176/96A patent/AU5317696A/en not_active Abandoned
- 1996-03-21 EP EP96909790A patent/EP0815688B1/en not_active Expired - Lifetime
-
1997
- 1997-04-02 US US08/825,774 patent/US6084631A/en not_active Expired - Fee Related
-
1999
- 1999-07-02 US US09/348,120 patent/US6061089A/en not_active Expired - Fee Related
-
2000
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US5838768A (en) * | 1996-10-03 | 1998-11-17 | Telefonaktiebolaget L M Ericsson | System and method for controlled media conversion in an intelligent network |
| US6005845A (en) * | 1996-10-03 | 1999-12-21 | Telefonaktiebolaget L/M Ericsson (Publ) | System and method for IP-activated call setup |
Also Published As
| Publication number | Publication date |
|---|---|
| EP0971541A3 (en) | 2000-08-23 |
| WO1996031067A1 (en) | 1996-10-03 |
| EP0815688B1 (en) | 2000-05-10 |
| AU5317696A (en) | 1996-10-16 |
| ATE192892T1 (en) | 2000-05-15 |
| US20020171741A1 (en) | 2002-11-21 |
| US6061089A (en) | 2000-05-09 |
| DE69608264T2 (en) | 2000-09-28 |
| EP0815688A1 (en) | 1998-01-07 |
| US6084631A (en) | 2000-07-04 |
| EP0971541A2 (en) | 2000-01-12 |
| DE69608264D1 (en) | 2000-06-15 |
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| Date | Code | Title | Description |
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| EEER | Examination request | ||
| FZDE | Discontinued | ||
| FZDE | Discontinued |
Effective date: 20021009 |