CA2271251A1 - Method and apparatus for testing field programmable gate arrays - Google Patents

Method and apparatus for testing field programmable gate arrays Download PDF

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Publication number
CA2271251A1
CA2271251A1 CA002271251A CA2271251A CA2271251A1 CA 2271251 A1 CA2271251 A1 CA 2271251A1 CA 002271251 A CA002271251 A CA 002271251A CA 2271251 A CA2271251 A CA 2271251A CA 2271251 A1 CA2271251 A1 CA 2271251A1
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CA
Canada
Prior art keywords
programmable
logic blocks
output response
programmable logic
test
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA002271251A
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French (fr)
Other versions
CA2271251C (en
Inventor
Miron Abramovici
Charles Eugene Stroud
Sajitha S. Wijesuriya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
University of Kentucky Research Foundation
Lattice Semiconductor Corp
Original Assignee
Lucent Technologies Inc
University of Kentucky Research Foundation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Lucent Technologies Inc, University of Kentucky Research Foundation filed Critical Lucent Technologies Inc
Publication of CA2271251A1 publication Critical patent/CA2271251A1/en
Application granted granted Critical
Publication of CA2271251C publication Critical patent/CA2271251C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3185Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318516Test of programmable logic devices [PLDs]
    • G01R31/318519Test of field programmable gate arrays [FPGA]

Abstract

A method of built-in self testing field programmable gate arrays (FPGAs) including the programmable logic blocks, the programmable routing networks and the programmable input/output cells or boundary ports at the device, board or system level includes testing the programmable logic blocks, reconfiguring a first group of he programmable logic blocks to include a test pattern generator and an output response analyzer, and configuring the programmable routing network into groups of wires under test. This step is followed by generating test patterns propagated along the wires under test and comparing the outputs utilizing the output response analyzer. Based on the result of the comparison a pass/fail test result indication is routed to the associated boundary port. The results from a plurality of output response analyzers can be compared utilizing an iterative comparator in order to reduce the number of boundary ports required during testing.
CA002271251A 1998-06-30 1999-05-06 Method and apparatus for testing field programmable gate arrays Expired - Fee Related CA2271251C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/109,123 US6202182B1 (en) 1998-06-30 1998-06-30 Method and apparatus for testing field programmable gate arrays
US09/109,123 1998-06-30

Publications (2)

Publication Number Publication Date
CA2271251A1 true CA2271251A1 (en) 1999-12-30
CA2271251C CA2271251C (en) 2002-03-19

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Family Applications (1)

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CA002271251A Expired - Fee Related CA2271251C (en) 1998-06-30 1999-05-06 Method and apparatus for testing field programmable gate arrays

Country Status (5)

Country Link
US (1) US6202182B1 (en)
EP (1) EP1063529B1 (en)
JP (1) JP2000055990A (en)
CA (1) CA2271251C (en)
DE (1) DE69925467D1 (en)

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Also Published As

Publication number Publication date
JP2000055990A (en) 2000-02-25
DE69925467D1 (en) 2005-06-30
EP1063529A1 (en) 2000-12-27
CA2271251C (en) 2002-03-19
US6202182B1 (en) 2001-03-13
EP1063529B1 (en) 2005-05-25

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