CA2420912A1 - Power amplifier saturation detection and compensation - Google Patents
Power amplifier saturation detection and compensation Download PDFInfo
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- CA2420912A1 CA2420912A1 CA002420912A CA2420912A CA2420912A1 CA 2420912 A1 CA2420912 A1 CA 2420912A1 CA 002420912 A CA002420912 A CA 002420912A CA 2420912 A CA2420912 A CA 2420912A CA 2420912 A1 CA2420912 A1 CA 2420912A1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/34—Negative-feedback-circuit arrangements with or without positive feedback
Abstract
A system for detecting and compensating for a saturation condition of a powe r amplifier where an error signal is produced by differencing a signal representative of or derived from a control signal for controlling the shape of the output of the power amplifier and a signal representative of or deriv ed from the output of the power amplifier. An integrator integrates the error signal to produce a cumulative error signal. A detection circuit detects a saturation condition when the value of the cumulative error equals or exceed s a predetermined value determined during device calibration. Upon the detecti on of a saturation condition, a compensation circuit derives a compensation val ue by multiplying the value of the error signal at the time saturation is detected by a predetermined constant, and subtracts this value from the control signal. The input to the power amplifier is derived from the adjuste d control signal.
Description
POWER AMPLIFIER SATURATION DETECTION
AND COMPENSATION
B~CKGROUMD OF THE I\~'E\TION
1. Field of the Invention.
This invention generally relates to power amplifiers (PAs), and more specifically, to detecting and compensating for saturation of power in PAs.
AND COMPENSATION
B~CKGROUMD OF THE I\~'E\TION
1. Field of the Invention.
This invention generally relates to power amplifiers (PAs), and more specifically, to detecting and compensating for saturation of power in PAs.
2. Related Art.
In GSM-compliant or TDMA-compliant mobile devices, such as wireless handsets, the transmitter needs to power up and down within a predetermined power vs.
time mask having predetermined noise characteristics. At the same time, in order to increase battery life and hence talk time, the device should be operated at maximum or near-maximum efficiency. These objectives are difficult to achieve if the power amplifier in the transmitter or transceiver becomes saturated.
Conventional'techniques for saturation compensation are open loop techniques ' in which, upon the detection of a saturation condition, the amplifier is backed off by a predetermined amount. Depending on the degree to which the amplifier has entered the saturation mode, the predetermined amount may be insufficient to bring the amplif er out of saturation, or may back the amplifier off by an amount which is greater than that necessary to exit the saturation mode. Thus, with the conventional techniques, there is a risk that the amplifier will not be operated at maximum or near-maximum efficiency.
SUMMARY
This invention provides a system for detecting and compensating for a saturation condition in a power amplifier. The system may include in series a saturation compensation circuit, a comparator, an integrator, and a saturation detection circuit.
The saturation compensation circuit receives a control signal for controlling the shape of the output of the power amplifier, and adjusts that signal when a saturation condition is detected by the saturation detection circuit. The comparator compares the output of the saturation compensation circuit with the output of the power amplifier and produces an error signal representative of the difference between the two. The integrator integrates the error signal to produce a cumulative error signal. The saturation detection circuit detects a saturation condition responsive to the integrated error signal, and signals the saturation compensation circuit when a saturation condition has been detected.
Responsive to the detection of a saturation condition, the saturation compensation circuit adjusts the control signal by a compensation value that is derived from the value of the error signal at the time the,, saturation condition is detected. In one implementation, the compensation value may be equal to the instantaneous error at the time saturation is detected multiplied by a predetermined constant. In another implementation, this compensation value may be the average error at the time saturation is detected multiplied by a predetermined constant. A signal derived from the output of the adjusted control signal forms the input to the power amplifier. In one 1 ~ implementation, the input to the power amplifier is derived from the output of the integrator. ' In another implementation, a saturation condition may be detected when the cumulative error output from the integrator equals or exceeds a predetermined value, INTEG MAX, determined during device calibration. In response, the saturation detection circuit sets a flag to 1. When the value is set to l, the saturation compensation circuit latches a compensation value equal to the instantaneous error output from the comparator by a predetermined calibration constant. The saturation compensation circuit subtracts this value from the signal representing the desired output of the power amplifier.
2~ A method for detecting a saturation condition of a power amplifier is also disclosed. A signal derived from or representative of a control signal for controlling the shape of the output of the power amplifier is compared to a signal representative of or derived from the actual output of the power amplifier, and the two are differenced to form an error signal. The error signal is then integrated to form a cumulative error signal. The saturation condition is detected if the cumulative error signal equals or exceeds a predetermined value.
Another method of the invention includes compensating for the saturation condition of a power amplifier. When a saturation condition is detected, a signal S representative of or derived from a control signal for controlling the shape of the output of the power amplifier is compared to a signal representative of or derived from the actual output of the power amplifier, and the two are subtracted to form an error signal.
A compensation value is derived from the error signal and is subtracted from the control signal. The input to the power amplifier, is derived from this adjusted signal.
The compensation value may be determined by multiplying the instantaneous error, at the time saturation is detected, by a predetermined constant. In another implementation, the compensation value may be determined by multiplying the average error signal, at the time saturation is detected, by a pr .edetermined constant.
Other systems, methods, features and advantages of the invention will be or will become apparent to one with skill in the art upon examination of the following figures and detailed description. It is intended that all such additional systems, methods, features and advantages be included within this description, be within the scope of the invention, and be protected by the accompanying claims BRIEF DESCRIPTIOi'' OF THE FIGURES
The invention can be better understood with reference to the following figures.
The components in the figures are not necessarily to scale, emphasis instead being placed upon illustrating the principles of the invention. Moreover, in the figures, like reference numbers designate corresponding parts throughout the different views.
Figure 1 is a block diagram illustrating one power amplifier saturation detection and compensation system.
Figure ? is a graph illustrating a predetermined power vs. time mask for the output of a power amplifier in a GSM-compliant transmitter.
In GSM-compliant or TDMA-compliant mobile devices, such as wireless handsets, the transmitter needs to power up and down within a predetermined power vs.
time mask having predetermined noise characteristics. At the same time, in order to increase battery life and hence talk time, the device should be operated at maximum or near-maximum efficiency. These objectives are difficult to achieve if the power amplifier in the transmitter or transceiver becomes saturated.
Conventional'techniques for saturation compensation are open loop techniques ' in which, upon the detection of a saturation condition, the amplifier is backed off by a predetermined amount. Depending on the degree to which the amplifier has entered the saturation mode, the predetermined amount may be insufficient to bring the amplif er out of saturation, or may back the amplifier off by an amount which is greater than that necessary to exit the saturation mode. Thus, with the conventional techniques, there is a risk that the amplifier will not be operated at maximum or near-maximum efficiency.
SUMMARY
This invention provides a system for detecting and compensating for a saturation condition in a power amplifier. The system may include in series a saturation compensation circuit, a comparator, an integrator, and a saturation detection circuit.
The saturation compensation circuit receives a control signal for controlling the shape of the output of the power amplifier, and adjusts that signal when a saturation condition is detected by the saturation detection circuit. The comparator compares the output of the saturation compensation circuit with the output of the power amplifier and produces an error signal representative of the difference between the two. The integrator integrates the error signal to produce a cumulative error signal. The saturation detection circuit detects a saturation condition responsive to the integrated error signal, and signals the saturation compensation circuit when a saturation condition has been detected.
Responsive to the detection of a saturation condition, the saturation compensation circuit adjusts the control signal by a compensation value that is derived from the value of the error signal at the time the,, saturation condition is detected. In one implementation, the compensation value may be equal to the instantaneous error at the time saturation is detected multiplied by a predetermined constant. In another implementation, this compensation value may be the average error at the time saturation is detected multiplied by a predetermined constant. A signal derived from the output of the adjusted control signal forms the input to the power amplifier. In one 1 ~ implementation, the input to the power amplifier is derived from the output of the integrator. ' In another implementation, a saturation condition may be detected when the cumulative error output from the integrator equals or exceeds a predetermined value, INTEG MAX, determined during device calibration. In response, the saturation detection circuit sets a flag to 1. When the value is set to l, the saturation compensation circuit latches a compensation value equal to the instantaneous error output from the comparator by a predetermined calibration constant. The saturation compensation circuit subtracts this value from the signal representing the desired output of the power amplifier.
2~ A method for detecting a saturation condition of a power amplifier is also disclosed. A signal derived from or representative of a control signal for controlling the shape of the output of the power amplifier is compared to a signal representative of or derived from the actual output of the power amplifier, and the two are differenced to form an error signal. The error signal is then integrated to form a cumulative error signal. The saturation condition is detected if the cumulative error signal equals or exceeds a predetermined value.
Another method of the invention includes compensating for the saturation condition of a power amplifier. When a saturation condition is detected, a signal S representative of or derived from a control signal for controlling the shape of the output of the power amplifier is compared to a signal representative of or derived from the actual output of the power amplifier, and the two are subtracted to form an error signal.
A compensation value is derived from the error signal and is subtracted from the control signal. The input to the power amplifier, is derived from this adjusted signal.
The compensation value may be determined by multiplying the instantaneous error, at the time saturation is detected, by a predetermined constant. In another implementation, the compensation value may be determined by multiplying the average error signal, at the time saturation is detected, by a pr .edetermined constant.
Other systems, methods, features and advantages of the invention will be or will become apparent to one with skill in the art upon examination of the following figures and detailed description. It is intended that all such additional systems, methods, features and advantages be included within this description, be within the scope of the invention, and be protected by the accompanying claims BRIEF DESCRIPTIOi'' OF THE FIGURES
The invention can be better understood with reference to the following figures.
The components in the figures are not necessarily to scale, emphasis instead being placed upon illustrating the principles of the invention. Moreover, in the figures, like reference numbers designate corresponding parts throughout the different views.
Figure 1 is a block diagram illustrating one power amplifier saturation detection and compensation system.
Figure ? is a graph illustrating a predetermined power vs. time mask for the output of a power amplifier in a GSM-compliant transmitter.
Figure 3 is a block diagram illustrating another embodiment of a power amplifier saturation detection and compensation system.
Figure 4 is a block diagram illustrating one implementation scheme of a power amplifier saturation detection and compensation system.
Figure 5 is a block diagram illustrating another implementation of a power amplifier saturation detection and compensation system.
Figure 6 is a flowchart illustrating a method of detecting for a saturation condition of a power amplifier.
Figure 7 is a flowchart illustrating a method of compensating for a saturation condition of a power amplifier.
Figure 8 is a flowchart illustrating a method of detecting for a saturation condition of a power amplifier.
Figure 9 is a flowchart illustrating a method of compensating for a saturation condition of a power amplifier.
DETAILED DESCRIPTION
Figure 1 is a block diagram illustrating a system having a power amplifier 100 with an input 102, and an output 104. The input helps determine the shape of the signal provided at the output 104. Circuitry 106 is also provided for detecting a saturation condition of the power amplifier 100, and then manipulating the input 102 of the power amplifier to compensate at least in part for the saturation condition.
The circuitry 106 may include a circuit 108 for providing a signal for controlling the shape of the output 104 of the power amplifier 100. The output of the circuit 108 is input to a summer 110, which subtracts from this signal the output of saturation equalization circuit 112. Summer 110 may be part of saturation equalization circuit 112 or may be separate. A signal derived from the output of summer 110 is input to comparator 114. In addition, a signal derived from the output 104 of the power amplifier is also input to the comparator. Comparator 114 produces an error signal representing the difference between the two signals.
This error signal is input to integrator 116 to provide a cumulative error signal.
The cumulative error output from integrator 116 is provided to saturation detection S circuit 118. From this cumulative error signal, saturation detection circuit 118 detects whether or not the power amplifier 100 has entered a saturation condition. A
signal representative of the cumulative error signal is provided to saturation equalization circuit 112 over signal line 120.
A signal derived from integrator,116 forms the input 102 to the power amplifier.
Upon the occurrence of a saturation condition, saturation equalization circuit determines a compensation value responsive to the error signal provided over signal line 122. The value is then subtracted by summer 110 from the signal provided by circuit 108. This adjustment is ultimately reflected in the input to the power amplifier.
Accordingly, amplifier 100 is prevented from entering saturation, or if it has entered 1 ~ saturation, is brought out of saturation after only a very short time.
The system is a closed loop system where the output of the power amplifier at about the time saturation is detected is used to determine the compensation value for adjusting the input of the power amplifier. Thus, the system is more robust compared to conventional open loop techniques. Moreover, since the system uses the cumulative error output from the integrator in detecting whether a saturation condition is present, it is more accurate in detecting a saturation condition that conventional approaches.
Figure 2 illustrates an example of an output signal profile bounded by pre specified power vs. time masks. One of the masks 200 provides an upper bound for the output of the power amplifier. The other mask 202 provides a lower bound for the 2~ power amplifier.
A second embodiment of a system is illustrated in Figure 3. The difference between the two embodiments represented in Figures 1 and 3 is that in Figure 3, the saturation equalization circuit 112, upon the detection of a saturation condition, determines a compensation value for saturation equalization responsive to the average cumulative error rather than the instantaneous error. This is why saturation equalization circuit 112 receives an input from integrator 116 (over signal line 300) rather than from comparator 114.
An implementation of the embodiment of Figure 1 is illustrated in Figure 4.
Ramp store 400 provides the reference input that enables the system to produce an output signal profile bounded by pre-specified power vs. time masks defined by a standards body such as ETSI (see Figure 2 for an example). The output of ramp store 400 is provided to summer 402 which subtracts the output, err val, of saturation equalization circuit 404. Saturation equalization circuit 404 includes a latch (not shown) which provides the output, err val. Saturation equalization circuit 404 updates the contents of the latch responsive to the output of saturation detection circuit 406 provided over signal line 408. The output of saturation detection circuit 406 is a flag, sat flag, which is a 1 if a saturation condition is present, and is a 0 otherwise. In the case in which sat_flag is l, the contents of the latch is set equal to a constant SAT CAL
1 S multiplied by the value of the instantaneous error signal, loopsub, provided over signal line 410 from the output of comparator 412.
In one implementation example, SAT CAL is set at 1.0, but it should be appreciated that values less than 1.0, and greater than 1.0 are possible. In the case in which sat flag is 0, the contents of the latch are not updated, but are kept equal to the value of err val that was determined and latched during the most previous saturation condition. Thus, it can be seen that in this implementation, saturation equalization circuit 404 sets err val to a value equal to the constant SAT CAL multiplied by the instantaneous error signal output from summer 412 when the power amplifier 414 is in saturation, and it maintains the previous value of err val in the case where the power ?~ amplif er 414 is not in saturation. In other words, a value for err val is subtracted from the output of ramp store 400 even when a saturation condition is not present.
However, it should be appreciated that implementations are possible where the saturation equalization circuit 404 provides an output that is subtracted from the output of ramp store 400 only when a saturation condition is present or imminent.
Figure 4 is a block diagram illustrating one implementation scheme of a power amplifier saturation detection and compensation system.
Figure 5 is a block diagram illustrating another implementation of a power amplifier saturation detection and compensation system.
Figure 6 is a flowchart illustrating a method of detecting for a saturation condition of a power amplifier.
Figure 7 is a flowchart illustrating a method of compensating for a saturation condition of a power amplifier.
Figure 8 is a flowchart illustrating a method of detecting for a saturation condition of a power amplifier.
Figure 9 is a flowchart illustrating a method of compensating for a saturation condition of a power amplifier.
DETAILED DESCRIPTION
Figure 1 is a block diagram illustrating a system having a power amplifier 100 with an input 102, and an output 104. The input helps determine the shape of the signal provided at the output 104. Circuitry 106 is also provided for detecting a saturation condition of the power amplifier 100, and then manipulating the input 102 of the power amplifier to compensate at least in part for the saturation condition.
The circuitry 106 may include a circuit 108 for providing a signal for controlling the shape of the output 104 of the power amplifier 100. The output of the circuit 108 is input to a summer 110, which subtracts from this signal the output of saturation equalization circuit 112. Summer 110 may be part of saturation equalization circuit 112 or may be separate. A signal derived from the output of summer 110 is input to comparator 114. In addition, a signal derived from the output 104 of the power amplifier is also input to the comparator. Comparator 114 produces an error signal representing the difference between the two signals.
This error signal is input to integrator 116 to provide a cumulative error signal.
The cumulative error output from integrator 116 is provided to saturation detection S circuit 118. From this cumulative error signal, saturation detection circuit 118 detects whether or not the power amplifier 100 has entered a saturation condition. A
signal representative of the cumulative error signal is provided to saturation equalization circuit 112 over signal line 120.
A signal derived from integrator,116 forms the input 102 to the power amplifier.
Upon the occurrence of a saturation condition, saturation equalization circuit determines a compensation value responsive to the error signal provided over signal line 122. The value is then subtracted by summer 110 from the signal provided by circuit 108. This adjustment is ultimately reflected in the input to the power amplifier.
Accordingly, amplifier 100 is prevented from entering saturation, or if it has entered 1 ~ saturation, is brought out of saturation after only a very short time.
The system is a closed loop system where the output of the power amplifier at about the time saturation is detected is used to determine the compensation value for adjusting the input of the power amplifier. Thus, the system is more robust compared to conventional open loop techniques. Moreover, since the system uses the cumulative error output from the integrator in detecting whether a saturation condition is present, it is more accurate in detecting a saturation condition that conventional approaches.
Figure 2 illustrates an example of an output signal profile bounded by pre specified power vs. time masks. One of the masks 200 provides an upper bound for the output of the power amplifier. The other mask 202 provides a lower bound for the 2~ power amplifier.
A second embodiment of a system is illustrated in Figure 3. The difference between the two embodiments represented in Figures 1 and 3 is that in Figure 3, the saturation equalization circuit 112, upon the detection of a saturation condition, determines a compensation value for saturation equalization responsive to the average cumulative error rather than the instantaneous error. This is why saturation equalization circuit 112 receives an input from integrator 116 (over signal line 300) rather than from comparator 114.
An implementation of the embodiment of Figure 1 is illustrated in Figure 4.
Ramp store 400 provides the reference input that enables the system to produce an output signal profile bounded by pre-specified power vs. time masks defined by a standards body such as ETSI (see Figure 2 for an example). The output of ramp store 400 is provided to summer 402 which subtracts the output, err val, of saturation equalization circuit 404. Saturation equalization circuit 404 includes a latch (not shown) which provides the output, err val. Saturation equalization circuit 404 updates the contents of the latch responsive to the output of saturation detection circuit 406 provided over signal line 408. The output of saturation detection circuit 406 is a flag, sat flag, which is a 1 if a saturation condition is present, and is a 0 otherwise. In the case in which sat_flag is l, the contents of the latch is set equal to a constant SAT CAL
1 S multiplied by the value of the instantaneous error signal, loopsub, provided over signal line 410 from the output of comparator 412.
In one implementation example, SAT CAL is set at 1.0, but it should be appreciated that values less than 1.0, and greater than 1.0 are possible. In the case in which sat flag is 0, the contents of the latch are not updated, but are kept equal to the value of err val that was determined and latched during the most previous saturation condition. Thus, it can be seen that in this implementation, saturation equalization circuit 404 sets err val to a value equal to the constant SAT CAL multiplied by the instantaneous error signal output from summer 412 when the power amplifier 414 is in saturation, and it maintains the previous value of err val in the case where the power ?~ amplif er 414 is not in saturation. In other words, a value for err val is subtracted from the output of ramp store 400 even when a saturation condition is not present.
However, it should be appreciated that implementations are possible where the saturation equalization circuit 404 provides an output that is subtracted from the output of ramp store 400 only when a saturation condition is present or imminent.
The output of summer 402, errsub, is provided as an input to low pass filter (LPF) 416 having the transfer function 1 a by1-~ . The output of LPF 416 is provided as an input to comparator 412. In addition, the output 418 of power amplifier 414 is fed into a feedback path circuit 420 which in turn adjusts the gain and dynamic range of the signal and digitizes it. The output of feedback path circuit 420 forms a second input to comparator 412.
Comparator 412 subtracts this signal from the output of LPF 416 The result is an error signal, loopsub, representative 9f the instantaneous error or difference between the control signal output from ramp store 1 and the output of power amplifier 414. As previously stated, this error signal is provided as an input to saturation equalization circuit 404 over signal line 410. In addition, it is provided as an input to integrator 422 which, as illustrated, has the transfer function 1 1 '~'. The output of integrator l I6 is a G
cumulative error signal representing the accumulation over time of the errors reflected in the error signal loopsub.
The output of integrator 422 is provided as an input to saturation detection circuit 406 which determines whether a saturation condition is present or imminent responsive to the accumulated error signal provided from integrator 422. In one implementation example, saturation detection circuit 406 functions by comparing the accumulated error signal with a value, INTEG MAX, determined during device calibration. If the accumulated error exceeds INTEG_MAX, a saturation condition is assumed to be present; if not, it is assumed not present. If a saturation condition is present, sat flag, is set to 1. If not, the flag is reset to 0.
The accumulated error signal from integrator 422 is also passed through saturation detection circuit 406 to amplifier 424. Amplifier 424 functions as the DAC
gain. The output of amplifier 424 is provided to power shaper 426. Power shaper 426 provides a programmable gain shaping function to the forward path of the PAC
loop.
The output of power shaper 426 is input to digital-to-analog converter (DAC) 428.
DAC 428 converts the incoming signal to analog, and the analog signal is provided as an input to RC LPF 430. RC LPF 430 smooths the analog signal. The output of RCLPF 430 is provided as an input to voltage output circuit 432. Voltage output circuit 432 functions to convert the incoming signal to a voltage mode signal. The voltage mode signal is then provided as an input to the input 434 of power amplifier 414.
An implementation of the embodiment of Figure 3 is illustrated in Figure S.
This implementation is identical to the implementation of Figure 4 except that the cumulative error from integrator 422 is provided over signal line 500 as an input to saturation equalization circuit 404 in lice of the instantaneous error output from summer 412. This instantaneous error signal is provided over signal Iine 410 to saturation equalization circuit 404 in the implementation of Figure 4.
In this implementation, saturation equalization circuit 404 divides the cumulative error by the duration of time over which the error was accumulated.
The result is an average cumulative error. In the case in which a saturation condition is 1 ~ present, the saturation equalization circuit 404 latches the product of the constant SAT CAL with the average cumulative error. In the case in which a saturation condition is not present, the saturation equalization circuit 404 does not update the latch.
In this case, the latch thus retains the value that was stored in it during the previous saturation condition. The output of the latch is the value err val which is provided to summer 402. Otherwise, this implementation is the same as that illustrated in Figure 4.
Consequently, no further explanation is needed.
Figure 6 illustrates an embodiment of a method of saturation detection. As illustrated, in step 600, a signal representative of or derived from a control signal for controlling the shape of the output of the power amplifier and a signal representative of or derived from the actual output of the power amplifier are differenced to produce an error signal. In step 602, the error signal is integrated to produce a cumulative error signal. In step 604, the cumulative error signal is analyzed to determine if a saturation condition is present. In one implementation, this step occurs by comparing the cumulative error with a predetermined constant determined during device calibration. If the cumulative error exceeds the predetermined constant, a saturation condition is assumed to be present. Otherwise, a saturation condition is assumed to be absent. If a saturation condition is present, step 606 is performed; otherwise, step 608 is performed.
In step 606, a flag is placed in a first state, indicating that a saturation condition is present. In step 608, the flag is placed in a second state, indicating that a saturation condition is not present. The process then repeats itself beginning with step 600.
Figure 7 illustrates an embodiment of a method of saturation equalization or compensation. In step 700, a signal representative of or derived from a control signal for controlling the shape of a power amplifier and a signal representative of or derived from the actual output of the power amplifier are differenced to produce an error signal.
In step 702, the error signal is integrated to produce a cumulative error signal. In step 704, the input to the power amplifier is derived from the cumulative error signal. In step 706, a flag indicative of whether a saturation condition is present is checked. If placed in a first state, indicating that a saturation condition is present, steps 708 and 710 are performed. In step 708, a compensation value is derived either from the instantaneous error signal produced in step 700 or the cumulative error signal produced in step 702. In one implementation, this step occurs by multiplying the instantaneous error from step 700 by a predetermined constant. In another implementation, this step occurs by multiplying the average error (equal to the cumulative error from step 702 divided by the duration of time over which the error was accumulated) by a predetermined constant. In step 710, the signal representative of or derived from the signal for controlling the shape of the PA output is manipulated responsive to the compensation value. In one implementation, this step occurs by subtracting the compensation value from the signal representative of or derived from the control signal.
A jump is then made to step 700. The process then repeats itself.
Turning back to step 706, if the flag is placed in a second state indicating that a saturation condition is not present, a jump is made to step 700. The process then repeats itself. Alternatively, in one implementation, the compensation value computed in step 708 during a previous onset of a saturation condition is retrieved and subtracted from the signal representative of the saturation condition. Then, the jump is made to step 700 to repeat the process.
An implementation of a method of detecting a saturation condition of a power amplifier is illustrated in Figure 8. In step 800, a signal representative of or derived from a signal for controlling the shape of the PA output and a signal representative of or derived from the PA output are differenced to produce an error signal. In step 802, the error signal is integrated to produce a cumulative error signal. In step 804, the cumulative error is compared to a predetermined constant, INTEG MAX, determined during device calibration. If the cumulative error exceeds INTEG MAX, indicating that a saturation condition is present, step 808 is performed. Otherwise, step 806 is performed. In step 808, a flag, sat flag, is set to 1, and then a jump is made to step 800.
The process then repeats itself. In step 806, sat flag is reset to 0, followed by a jump to step 800. The process then repeats itself.
An implementation of a method of equalizing or compensating for a saturation condition of a power amplifier is illustrated in Figure 9. In step 900, a flag, sat flag, is checked. In step 902, a determination is made whether sat flag is set to 1 or reset to 0.
If the flag is set to 1, indicating that a saturation condition is present, a jump is made to step 904. If the flag is reset to 0, indicating that a saturation condition is not present, a jump is made to step 906. In step 904, a value, err val, is computed by multiplying the instantaneous loop error and loopsub, by a predetermined constant, SAT CAL. In one implementation example, the loop error is computed by differencing a signal representative of or derivative of a signal for controlling the shape of the output of the PA and a signal representative of or derivative of the PA output. In this example example, the value err val, once computed, is latched. In step 906, the value of err val 2~ latched during a previous onset of a saturation condition is retrieved. In step 908, the value err val determined in one or the other of steps 904 and 906 is subtracted from ramp store, a signal for controlling the shape of the output of the power amplifier. In step 910, the input to the power amplifier is derived from err sub. In one implementation, this step occurs by integrating the loop error to produce a cumulative error signal, and then deriving the PA input from the cumulative error signal.
A jump is then made to step 900, where the process repeats itself.
While various embodiments of the invention have been described, it will be apparent to those of ordinary skill in the art that many more embodiments and implementations are possible that are within the scope of this invention.
Accordingly, the invention is not to be restricted except in light of the attached claims and their equivalents.
Comparator 412 subtracts this signal from the output of LPF 416 The result is an error signal, loopsub, representative 9f the instantaneous error or difference between the control signal output from ramp store 1 and the output of power amplifier 414. As previously stated, this error signal is provided as an input to saturation equalization circuit 404 over signal line 410. In addition, it is provided as an input to integrator 422 which, as illustrated, has the transfer function 1 1 '~'. The output of integrator l I6 is a G
cumulative error signal representing the accumulation over time of the errors reflected in the error signal loopsub.
The output of integrator 422 is provided as an input to saturation detection circuit 406 which determines whether a saturation condition is present or imminent responsive to the accumulated error signal provided from integrator 422. In one implementation example, saturation detection circuit 406 functions by comparing the accumulated error signal with a value, INTEG MAX, determined during device calibration. If the accumulated error exceeds INTEG_MAX, a saturation condition is assumed to be present; if not, it is assumed not present. If a saturation condition is present, sat flag, is set to 1. If not, the flag is reset to 0.
The accumulated error signal from integrator 422 is also passed through saturation detection circuit 406 to amplifier 424. Amplifier 424 functions as the DAC
gain. The output of amplifier 424 is provided to power shaper 426. Power shaper 426 provides a programmable gain shaping function to the forward path of the PAC
loop.
The output of power shaper 426 is input to digital-to-analog converter (DAC) 428.
DAC 428 converts the incoming signal to analog, and the analog signal is provided as an input to RC LPF 430. RC LPF 430 smooths the analog signal. The output of RCLPF 430 is provided as an input to voltage output circuit 432. Voltage output circuit 432 functions to convert the incoming signal to a voltage mode signal. The voltage mode signal is then provided as an input to the input 434 of power amplifier 414.
An implementation of the embodiment of Figure 3 is illustrated in Figure S.
This implementation is identical to the implementation of Figure 4 except that the cumulative error from integrator 422 is provided over signal line 500 as an input to saturation equalization circuit 404 in lice of the instantaneous error output from summer 412. This instantaneous error signal is provided over signal Iine 410 to saturation equalization circuit 404 in the implementation of Figure 4.
In this implementation, saturation equalization circuit 404 divides the cumulative error by the duration of time over which the error was accumulated.
The result is an average cumulative error. In the case in which a saturation condition is 1 ~ present, the saturation equalization circuit 404 latches the product of the constant SAT CAL with the average cumulative error. In the case in which a saturation condition is not present, the saturation equalization circuit 404 does not update the latch.
In this case, the latch thus retains the value that was stored in it during the previous saturation condition. The output of the latch is the value err val which is provided to summer 402. Otherwise, this implementation is the same as that illustrated in Figure 4.
Consequently, no further explanation is needed.
Figure 6 illustrates an embodiment of a method of saturation detection. As illustrated, in step 600, a signal representative of or derived from a control signal for controlling the shape of the output of the power amplifier and a signal representative of or derived from the actual output of the power amplifier are differenced to produce an error signal. In step 602, the error signal is integrated to produce a cumulative error signal. In step 604, the cumulative error signal is analyzed to determine if a saturation condition is present. In one implementation, this step occurs by comparing the cumulative error with a predetermined constant determined during device calibration. If the cumulative error exceeds the predetermined constant, a saturation condition is assumed to be present. Otherwise, a saturation condition is assumed to be absent. If a saturation condition is present, step 606 is performed; otherwise, step 608 is performed.
In step 606, a flag is placed in a first state, indicating that a saturation condition is present. In step 608, the flag is placed in a second state, indicating that a saturation condition is not present. The process then repeats itself beginning with step 600.
Figure 7 illustrates an embodiment of a method of saturation equalization or compensation. In step 700, a signal representative of or derived from a control signal for controlling the shape of a power amplifier and a signal representative of or derived from the actual output of the power amplifier are differenced to produce an error signal.
In step 702, the error signal is integrated to produce a cumulative error signal. In step 704, the input to the power amplifier is derived from the cumulative error signal. In step 706, a flag indicative of whether a saturation condition is present is checked. If placed in a first state, indicating that a saturation condition is present, steps 708 and 710 are performed. In step 708, a compensation value is derived either from the instantaneous error signal produced in step 700 or the cumulative error signal produced in step 702. In one implementation, this step occurs by multiplying the instantaneous error from step 700 by a predetermined constant. In another implementation, this step occurs by multiplying the average error (equal to the cumulative error from step 702 divided by the duration of time over which the error was accumulated) by a predetermined constant. In step 710, the signal representative of or derived from the signal for controlling the shape of the PA output is manipulated responsive to the compensation value. In one implementation, this step occurs by subtracting the compensation value from the signal representative of or derived from the control signal.
A jump is then made to step 700. The process then repeats itself.
Turning back to step 706, if the flag is placed in a second state indicating that a saturation condition is not present, a jump is made to step 700. The process then repeats itself. Alternatively, in one implementation, the compensation value computed in step 708 during a previous onset of a saturation condition is retrieved and subtracted from the signal representative of the saturation condition. Then, the jump is made to step 700 to repeat the process.
An implementation of a method of detecting a saturation condition of a power amplifier is illustrated in Figure 8. In step 800, a signal representative of or derived from a signal for controlling the shape of the PA output and a signal representative of or derived from the PA output are differenced to produce an error signal. In step 802, the error signal is integrated to produce a cumulative error signal. In step 804, the cumulative error is compared to a predetermined constant, INTEG MAX, determined during device calibration. If the cumulative error exceeds INTEG MAX, indicating that a saturation condition is present, step 808 is performed. Otherwise, step 806 is performed. In step 808, a flag, sat flag, is set to 1, and then a jump is made to step 800.
The process then repeats itself. In step 806, sat flag is reset to 0, followed by a jump to step 800. The process then repeats itself.
An implementation of a method of equalizing or compensating for a saturation condition of a power amplifier is illustrated in Figure 9. In step 900, a flag, sat flag, is checked. In step 902, a determination is made whether sat flag is set to 1 or reset to 0.
If the flag is set to 1, indicating that a saturation condition is present, a jump is made to step 904. If the flag is reset to 0, indicating that a saturation condition is not present, a jump is made to step 906. In step 904, a value, err val, is computed by multiplying the instantaneous loop error and loopsub, by a predetermined constant, SAT CAL. In one implementation example, the loop error is computed by differencing a signal representative of or derivative of a signal for controlling the shape of the output of the PA and a signal representative of or derivative of the PA output. In this example example, the value err val, once computed, is latched. In step 906, the value of err val 2~ latched during a previous onset of a saturation condition is retrieved. In step 908, the value err val determined in one or the other of steps 904 and 906 is subtracted from ramp store, a signal for controlling the shape of the output of the power amplifier. In step 910, the input to the power amplifier is derived from err sub. In one implementation, this step occurs by integrating the loop error to produce a cumulative error signal, and then deriving the PA input from the cumulative error signal.
A jump is then made to step 900, where the process repeats itself.
While various embodiments of the invention have been described, it will be apparent to those of ordinary skill in the art that many more embodiments and implementations are possible that are within the scope of this invention.
Accordingly, the invention is not to be restricted except in light of the attached claims and their equivalents.
Claims (30)
1. A system for detecting and compensating for a saturation condition in a power amplifier comprising:
a power amplifier having an input and an output;
a saturation compensation circuit for adjusting a control signal when a saturation condition is detected;
a comparator for comparing a signal representative of or derived from the control signal with a signal representative of or derived from the output of the power amplifier and producing an error signal representing the difference between the two;
an integrator for integrating the error signal to provide a cumulative error signal;
and a saturation detector for detecting, responsive to the cumulative error signal, a saturation condition of the power amplifier where a signal derived from the adjusted control signal is input to the power amplifier.
a power amplifier having an input and an output;
a saturation compensation circuit for adjusting a control signal when a saturation condition is detected;
a comparator for comparing a signal representative of or derived from the control signal with a signal representative of or derived from the output of the power amplifier and producing an error signal representing the difference between the two;
an integrator for integrating the error signal to provide a cumulative error signal;
and a saturation detector for detecting, responsive to the cumulative error signal, a saturation condition of the power amplifier where a signal derived from the adjusted control signal is input to the power amplifier.
2. The system of claim 1 wherein the comparator produces an error signal that is the difference between a signal representative of or derived from the adjusted control signal output from the saturation compensation circuit and the signal representative of or derived from the output of the power amplifier.
3. The system of claim 1 wherein the input to the power amplifier is derived from the output of the integrator.
4. The system of claim 1 wherein the saturation detector detects a saturation condition if the cumulative error signal exceeds a predetermined constant determined during device calibration.
5. The system of claim 1 wherein the detection of a saturation condition causes the saturation compensation circuit to derive a compensation value from the error signal and subtract the compensation value from the signal representative of or derived from the control signal.
6. The system of claim 5 wherein the saturation compensation circuit derives the compensation value from the instantaneous error provided from the comparator.
7. The system of claim 5 wherein the saturation compensation circuit derives the compensation value from the cumulative error provided by the integrator.
8. The system of claim 6 wherein the saturation compensation circuit derives the compensation value by multiplying the instantaneous error by a predetermined constant.
9. The system of claim 7 wherein the saturation compensation circuit derives the compensation value from the average error determined by dividing the cumulative error by the time period over which the error was accumulated.
10. The system of claim 9 wherein the saturation compensation circuit derives the compensation value by multiplying the average error by a predetermined constant.
11. The system of claim 1 in a communication device.
12. The communication device of claim 11 that is a GSM-compliant transmitter.
13. The communication device of claim 11 that is a mobile device.
14. The system of claim 1 further comprising circuitry for producing the control signal.
15. The system of claim 14 wherein the circuitry for producing the control signal is a ramp store.
16. The system of claim 14 wherein the control signal controls the shape of the output of the power amplifier.
17. A method for detecting a saturation condition of a power amplifier having an output, comprising the steps of:
differencing a signal representative of or derived from a control signal and a signal representative of or derived from the output of the power amplifier to produce an error signal;
integrating the error signal to produce a cumulative error signal; and detecting the saturation condition responsive to the cumulative error signal.
differencing a signal representative of or derived from a control signal and a signal representative of or derived from the output of the power amplifier to produce an error signal;
integrating the error signal to produce a cumulative error signal; and detecting the saturation condition responsive to the cumulative error signal.
18. The method of claim 17 wherein the detecting step comprises detecting the saturation condition if a cumulative error value derived from the cumulative error signal exceeds a predetermined constant determined during device calibration.
19. The method of claim 17 further comprising placing a flag in a first state if a saturation condition is detected, and otherwise placing the flag in a second state.
20. A method of compensating for a saturation condition of a power amplifier having an input and an output, comprising performing the following steps upon, during or after detecting a saturation condition:
differencing a signal representative of or derived from a control signal and a signal representative of or derived from the output of the power amplifier to form an error signal;
deriving a compensation value responsive to the error signal;
adjusting the control signal responsive to the compensation value; and deriving the input to the power amplifier from the adjusted signal.
differencing a signal representative of or derived from a control signal and a signal representative of or derived from the output of the power amplifier to form an error signal;
deriving a compensation value responsive to the error signal;
adjusting the control signal responsive to the compensation value; and deriving the input to the power amplifier from the adjusted signal.
21. The method of claim 20 wherein the adjusting step comprises subtracting the compensation value from the signal representative of or derived from the control signal.
22. The method of claim 20 wherein the first deriving step comprises deriving a compensation value responsive to an instantaneous error value derived from the error signal.
23. The method of claim 22 wherein the first deriving step comprises deriving a compensation value by multiplying an instantaneous error value derived from the error signal by a predetermined constant.
24. The method of claim 20 further comprising integrating the error signal to provide a cumulative error signal.
25. The method of claim 24 wherein the first deriving step comprises deriving an average error value from the cumulative error signal, and deriving the compensation value by multiplying the average error value by a predetermined constant.
26. The method of claim 20 wherein the second deriving step comprises integrating the error signal to provide a cumulative error signal, and deriving the input to the power amplifier from the cumulative error signal.
27. The method of claim 20 further comprising latching the compensation value.
28. The method of claim 27 further comprising retrieving the latched compensation value and adjusting the control signal responsive to the latched compensation value after the saturation condition has ceased.
29. The method of claim 20 comprising detecting the saturation condition by differencing a signal representative of or derived from a control signal and a signal representative of or derived from the output of the power amplifier to produce an error signal;
integrating the error signal to produce a cumulative error signal; and detecting the saturation condition responsive to the cumulative error signal.
integrating the error signal to produce a cumulative error signal; and detecting the saturation condition responsive to the cumulative error signal.
30. A system for detecting and compensating for a saturation condition in a power amplifier comprising:
a power amplifier having an input and an output;
saturation compensation means for adjusting a control signal when a saturation condition is detected;
comparator means for comparing a signal representative of or derived from the control signal with a signal representative of or derived from the output of the power amplifier and producing an error signal representing the difference between the two;
integrator means for integrating the error signal to provide a cumulative error signal; and saturation detection means for detecting, responsive to the cumulative error signal, a saturation condition of the power amplifier where a signal derived from the adjusted control signal is input to the power amplifier.
a power amplifier having an input and an output;
saturation compensation means for adjusting a control signal when a saturation condition is detected;
comparator means for comparing a signal representative of or derived from the control signal with a signal representative of or derived from the output of the power amplifier and producing an error signal representing the difference between the two;
integrator means for integrating the error signal to provide a cumulative error signal; and saturation detection means for detecting, responsive to the cumulative error signal, a saturation condition of the power amplifier where a signal derived from the adjusted control signal is input to the power amplifier.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/651,801 | 2000-08-30 | ||
| US09/651,801 US6476677B1 (en) | 2000-08-30 | 2000-08-30 | Power amplifier saturation detection and compensation |
| PCT/US2001/026823 WO2002019517A2 (en) | 2000-08-30 | 2001-08-30 | Power amplifier saturation detection and compensation |
Publications (1)
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| CA2420912A1 true CA2420912A1 (en) | 2002-03-07 |
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| EP (1) | EP1350311B1 (en) |
| KR (1) | KR100869401B1 (en) |
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| US7268990B1 (en) | 2003-05-15 | 2007-09-11 | Marvell International Ltd. | Power amplifier protection |
| ATE338376T1 (en) * | 2003-10-31 | 2006-09-15 | Freescale Semiconductor Inc | SATURATION DETECTION OF A POWER AMPLIFIER AND OPERATION AT MAXIMUM POWER |
| CN101124723B (en) * | 2004-11-29 | 2010-06-16 | Nxp股份有限公司 | Current limiting circuit for RF power amplifier |
| US7450916B1 (en) | 2005-04-06 | 2008-11-11 | Rf Micro Devices, Inc. | Excess current and saturation detection and correction in a power amplifier |
| US7333781B1 (en) | 2005-04-06 | 2008-02-19 | Rf Micro Devices, Inc. | Power correction loop for a power amplifier |
| US7977919B1 (en) | 2005-04-06 | 2011-07-12 | Rf Micro Devices, Inc. | Over-voltage protection accounting for battery droop |
| US7301402B2 (en) * | 2005-11-17 | 2007-11-27 | Freescale Semiconductor, Inc. | Soft saturation detection for power amplifiers |
| US7962109B1 (en) | 2007-02-27 | 2011-06-14 | Rf Micro Devices, Inc. | Excess current and saturation detection and correction in a power amplifier |
| US7956615B1 (en) | 2007-02-27 | 2011-06-07 | Rf Micro Devices, Inc. | Utilizing computed battery resistance as a battery-life indicator in a mobile terminal |
| CN101772887B (en) | 2007-07-05 | 2013-04-24 | 斯盖沃克斯瑟路申斯公司 | Systems and methods for saturation detection and correction in a power control loop |
| US8103226B2 (en) * | 2008-10-28 | 2012-01-24 | Skyworks Solutions, Inc. | Power amplifier saturation detection |
| CN101771386B (en) * | 2008-12-30 | 2012-09-19 | 龙鼎微电子(上海)有限公司 | Class D audio power amplifier with anti-saturation distortion circuit |
| US8351880B1 (en) * | 2009-07-22 | 2013-01-08 | Rf Micro Devices, Inc. | Saturation corrected power amplifier integration loop |
| FR2964477B1 (en) * | 2010-09-08 | 2012-10-05 | St Microelectronics Grenoble 2 | REFERENCE VOLTAGE GENERATOR FOR POLARIZING AN AMPLIFIER |
| US9655069B2 (en) * | 2011-09-09 | 2017-05-16 | Vixs Systems, Inc. | Dynamic transmitter calibration |
| KR101683457B1 (en) * | 2015-02-04 | 2016-12-09 | 한밭대학교 산학협력단 | Apparatus for digital predistortion in power amplifier considering saturation region and method thereof |
| KR102242034B1 (en) | 2015-02-04 | 2021-04-21 | 삼성디스플레이 주식회사 | Current sensing circuit and organic light emittng display device including the same |
| EP3581951A1 (en) * | 2018-06-12 | 2019-12-18 | Melexis Bulgaria Ltd. | Sensor saturation fault detection |
| US11916517B2 (en) | 2019-04-23 | 2024-02-27 | Skyworks Solutions, Inc. | Saturation detection of power amplifiers |
| US11664833B2 (en) | 2019-07-23 | 2023-05-30 | Skyworks Solutions, Inc. | Power detectors with enhanced dynamic range |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| NL8900507A (en) * | 1989-03-02 | 1990-10-01 | Philips Nv | AMPLIFIER CIRCUIT WITH SATURATION DETECTION. |
| GB2233517B (en) * | 1989-06-26 | 1994-04-06 | Orbitel Mobile Communications | Transmitter power control for radio telephone system |
| JP3112912B2 (en) * | 1989-12-05 | 2000-11-27 | 株式会社東芝 | Power control circuit of high frequency amplifier |
| US5150075A (en) * | 1991-06-03 | 1992-09-22 | Motorola, Inc. | Power amplifier ramp up method and apparatus |
| US5278994A (en) * | 1991-06-03 | 1994-01-11 | Motorola, Inc. | Power amplifier saturation detection and correction method and apparatus |
| US5448770A (en) * | 1993-04-05 | 1995-09-05 | Motorola, Inc. | Temperature-coefficient controlled radio frequency signal detecting circuitry |
| US5452473A (en) * | 1994-02-28 | 1995-09-19 | Qualcomm Incorporated | Reverse link, transmit power correction and limitation in a radiotelephone system |
| US5673001A (en) * | 1995-06-07 | 1997-09-30 | Motorola, Inc. | Method and apparatus for amplifying a signal |
-
2000
- 2000-08-30 US US09/651,801 patent/US6476677B1/en not_active Expired - Lifetime
-
2001
- 2001-08-30 KR KR1020037003042A patent/KR100869401B1/en active IP Right Grant
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- 2001-08-30 AU AU2001288461A patent/AU2001288461A1/en not_active Abandoned
- 2001-08-30 WO PCT/US2001/026823 patent/WO2002019517A2/en active IP Right Grant
- 2001-08-30 DK DK01968198T patent/DK1350311T3/en active
- 2001-08-30 CA CA002420912A patent/CA2420912A1/en not_active Abandoned
- 2001-08-30 DE DE60117578T patent/DE60117578T2/en not_active Expired - Lifetime
- 2001-08-30 TW TW090121460A patent/TWI229496B/en not_active IP Right Cessation
- 2001-08-30 CN CNB018183395A patent/CN1280983C/en not_active Expired - Lifetime
- 2001-08-30 EP EP01968198A patent/EP1350311B1/en not_active Expired - Lifetime
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| ATE319220T1 (en) | 2006-03-15 |
| AU2001288461A1 (en) | 2002-03-13 |
| KR100869401B1 (en) | 2008-11-21 |
| CN1280983C (en) | 2006-10-18 |
| DK1350311T3 (en) | 2006-06-19 |
| WO2002019517A2 (en) | 2002-03-07 |
| DE60117578D1 (en) | 2006-04-27 |
| EP1350311A2 (en) | 2003-10-08 |
| DE60117578T2 (en) | 2006-12-21 |
| US6476677B1 (en) | 2002-11-05 |
| EP1350311B1 (en) | 2006-03-01 |
| KR20030041983A (en) | 2003-05-27 |
| WO2002019517A3 (en) | 2003-06-12 |
| TWI229496B (en) | 2005-03-11 |
| CN1504016A (en) | 2004-06-09 |
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