CA2456086A1 - Telecommunications network - Google Patents

Telecommunications network Download PDF

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Publication number
CA2456086A1
CA2456086A1 CA002456086A CA2456086A CA2456086A1 CA 2456086 A1 CA2456086 A1 CA 2456086A1 CA 002456086 A CA002456086 A CA 002456086A CA 2456086 A CA2456086 A CA 2456086A CA 2456086 A1 CA2456086 A1 CA 2456086A1
Authority
CA
Canada
Prior art keywords
pointer
input
accordance
frame
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA002456086A
Other languages
French (fr)
Other versions
CA2456086C (en
Inventor
Sergio Lanzone
Orazio Toscano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ericsson AB
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of CA2456086A1 publication Critical patent/CA2456086A1/en
Application granted granted Critical
Publication of CA2456086C publication Critical patent/CA2456086C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0635Clock or time synchronisation in a network
    • H04J3/0685Clock or time synchronisation in a node; Intranode synchronisation
    • H04J3/0691Synchronisation in a TDM node
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0635Clock or time synchronisation in a network
    • H04J3/0682Clock or time synchronisation in a network by delay compensation, e.g. by compensation of propagation delay or variations thereof, by ranging

Abstract

A method for generation of a clock synchronized with time references derived from input signals in an apparatus of a telecommunications network comprising an input part receiving the input signals and a part for treatment of said input signals is described. In the input part the method comprises the steps of deriving the time reference signals from the input signals, reading an edge of the reference signals, establishing the position of this edge relative to the internal data frame, inserting in the frame heading a pointer representing the established position of the edge relative to the frame and sending the frame to the treatment part. In the treatment part the method comprises the steps of receiving the frame, extracting said pointer, generating said time reference clock and synchronizing it with the position in the frame indicated by the pointer. An apparatus applying this method is also proposed.

Claims (15)

1. Method for generation of a clock synchronized with time references derived from input signals in an apparatus of a telecommunications network, in which the telecommunications network comprises an input part receiving the input signals and a part for treatment of said input signals in which the input and treatment parts are interconnected by lines for the transport of the input signal in which the input signals comprise a frame structure in which the method comprises the following steps in the input part:
- deriving the time reference signals from the input signals, - reading an edge of the reference signals, creating an internal frame structure and synchronising the internal frame structure to a selected clock for transport of the input signal, - establishing the position of the edge relative to the internal frame structure, - inserting in the internal frame a pointer representing the established position of the edge relative to the frame, - sending the frame to the treatment part, and in which the method comprises the following steps in the treatment part:
- receiving the internal frame, - extracting said pointer, and generating said clock synchronized with the position in the frame indicated by the pointer.
2. Method in accordance with claim 1 in which in the input part enters additional pointer data in the frame.
3. Method in accordance with claim 2 in which the additional data contain data indicating whether the pointer in the frame is to be considered valid or not.
4. Method in accordance with any above claim in which the pointer is copied several times in the frame.
5. Method in accordance with any above claim in which in the treatment part compares the positions indicated by the pointer in two successive frames and the pointer of the second of the two frames is not considered valid for synchronisation if a shift in relation to the first frame pointer greater than a predetermined amount is detected.
6. Method in accordance with any above claim in which the treatment part requires said clock to be synchronized with said time references.
7. Method in accordance with any above claim in which the treatment part compares pointer values in successive internal frames and considers the pointers invalid if it detects a change above a preset amount.
8. Method in accordance with any above claim in which the internal frame structure comprises a heading and in which the pointer is inserted into the heading.
9. Method in accordance with any above claim in which in the input part oversamples the reference signals by means of a clock generated by an internal clock generator.
10. Telecommunications network apparatus comprising an input part for reception of input signals and a part for treatment of said input signals with the input and treatment parts being interconnected by transport lines for the input signals in which the input means comprises means for creating an internal frame structure synchronised to a selected clock for transport of the input signals;
characterized in that the input part comprises means for deriving time reference signals from the input signal, means for reading an edge of the reference signals and establishing the position of said edge relative to the internal frame structure, and means for inserting in the internal frame transported to the treatment part a pointer representing the established position of the edge relative to the internal frame;
and in which the treatment part comprises means for extracting said pointer from the received internal frame and means for generating a time reference clock synchronized with the position in the internal frame indicated by the pointer.
11. Apparatus in accordance with claim 10 in which the treatment part comprises means for comparison of the positions indicated by the pointer in two successive received frames and for commanding the clock generation means to not utilize the pointer of the second frame for generating the clock signal if, from the comparison of the pointers, it proves that a shift relative to the pointer of the first frame is greater than a predetermined amount.
12. Apparatus in accordance with one of claims 10 and 11 in which the means for reading the reference signal edge comprise an oversampler for oversampling the reference signals by means of a clock generated by an internal clock generator.
13. Apparatus in accordance with any one of claims 10 to 12 in which the treatment part requires a clock synchronized with time references derived from the input signals.
14. Apparatus in accordance with any one of claims 10 to 13 in which the internal frame structure comprises a heading and in which the inserting means comprises means for inserting the pointer into the heading.
15 15. A synchronous data transport network comprising the apparatus in accordance with any one of claims 10 to 14.
CA002456086A 2001-08-10 2002-08-09 Telecommunications network Expired - Fee Related CA2456086C (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
IT2001MI001782A ITMI20011782A1 (en) 2001-08-10 2001-08-10 METHOD FOR THE GENERATION OF A SYNCHRONIZED CLOCK WITH TEMPORAL REFERENCES DERIVED FROM INPUT SIGNALS IN A R EQUIPMENT
ITMI2001A001782 2001-08-10
PCT/IB2002/003619 WO2003015339A2 (en) 2001-08-10 2002-08-09 Telecommunications network

Publications (2)

Publication Number Publication Date
CA2456086A1 true CA2456086A1 (en) 2003-02-20
CA2456086C CA2456086C (en) 2010-01-12

Family

ID=11448284

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002456086A Expired - Fee Related CA2456086C (en) 2001-08-10 2002-08-09 Telecommunications network

Country Status (10)

Country Link
US (1) US7440765B2 (en)
EP (1) EP1419600B1 (en)
JP (1) JP2004538718A (en)
CN (1) CN100583701C (en)
AT (1) ATE445268T1 (en)
AU (1) AU2002329551A1 (en)
CA (1) CA2456086C (en)
DE (1) DE60233950D1 (en)
IT (1) ITMI20011782A1 (en)
WO (1) WO2003015339A2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4472585B2 (en) * 2005-06-14 2010-06-02 オリンパス株式会社 Transmission device and in-subject information acquisition system
CN101286762B (en) * 2007-04-10 2013-08-28 华为技术有限公司 Method for transmitting sounding pilot and transmitting device
US8804606B2 (en) 2008-08-11 2014-08-12 Gilat Satellite Networks Ltd. Transparent mesh overlay in hub-spoke satellite networks

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5184347A (en) * 1991-07-09 1993-02-02 At&T Bell Laboratories Adaptive synchronization arrangement
GB9114841D0 (en) 1991-07-10 1991-08-28 Gpt Ltd Sdh data transmission timing
JPH07336342A (en) * 1994-06-13 1995-12-22 Fujitsu Ltd Clock reproducing circuit
US5828670A (en) * 1995-06-06 1998-10-27 Symmetricom, Inc. Distribution of synchronization in a synchronous optical environment
US5732076A (en) * 1995-10-26 1998-03-24 Omnipoint Corporation Coexisting communication systems
IT1276166B1 (en) 1995-11-24 1997-10-27 Alcatel Italia METHOD AND NETWORK NODE FOR THE RESYNCHRONIZATION OF FRAMES IN A SYNCHRONOUS DIGITAL TRANSMISSION SYSTEM
JP3408720B2 (en) 1996-06-13 2003-05-19 富士通株式会社 High-speed synchronous multiplexer

Also Published As

Publication number Publication date
CA2456086C (en) 2010-01-12
ITMI20011782A0 (en) 2001-08-10
ATE445268T1 (en) 2009-10-15
AU2002329551A1 (en) 2003-02-24
DE60233950D1 (en) 2009-11-19
US20040240477A1 (en) 2004-12-02
CN100583701C (en) 2010-01-20
EP1419600A2 (en) 2004-05-19
US7440765B2 (en) 2008-10-21
ITMI20011782A1 (en) 2003-02-10
EP1419600B1 (en) 2009-10-07
WO2003015339A2 (en) 2003-02-20
WO2003015339A3 (en) 2003-11-06
CN1565097A (en) 2005-01-12
JP2004538718A (en) 2004-12-24

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Effective date: 20170809