CA2468764A1 - Time synchronization using dynamic thresholds - Google Patents
Time synchronization using dynamic thresholds Download PDFInfo
- Publication number
- CA2468764A1 CA2468764A1 CA002468764A CA2468764A CA2468764A1 CA 2468764 A1 CA2468764 A1 CA 2468764A1 CA 002468764 A CA002468764 A CA 002468764A CA 2468764 A CA2468764 A CA 2468764A CA 2468764 A1 CA2468764 A1 CA 2468764A1
- Authority
- CA
- Canada
- Prior art keywords
- clock
- latency
- time
- adjustment
- network
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
- H04J3/0658—Clock or time synchronisation among packet nodes
- H04J3/0661—Clock or time synchronisation among packet nodes using timestamps
- H04J3/0667—Bidirectional timestamps, e.g. NTP or PTP for compensation of clock drift and for compensation of propagation delays
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/14—Time supervision arrangements, e.g. real time clock
Abstract
Methods and apparatus for time synchronization using dynamic thresholds. A method for synchronizing network elements includes receiving at a network element a time synchronization message (102) sent from a master clock elemen t. The network element includes an internal clock to be synchronized with a master clock of the master clock element. The method includes calculating a latency (104) of the time synchronization message. The method includes estimating an adjustment (106) that may be made to the internal clock in response to the time synchronization message. The method includes determinin g whether the latency calculated is less than the adjustment estimated (108). The method includes adjusting the internal clock (110) when the latency calculated is less than the adjustment estimated.
Claims (21)
1. A method for synchronizing network elements, the method comprising:
receiving at a network element a time synchronization message sent from a master clock element, the network element including an internal clock to be synchronized with a master clock of the master clock element;
calculating a latency of the time synchronization message;
estimating an adjustment that may be made to the internal clock in response to the time synchronization message;
determining whether the latency calculated is less than the adjustment estimated; and adjusting the internal clock when the latency calculated is less than the adjustment estimated.
receiving at a network element a time synchronization message sent from a master clock element, the network element including an internal clock to be synchronized with a master clock of the master clock element;
calculating a latency of the time synchronization message;
estimating an adjustment that may be made to the internal clock in response to the time synchronization message;
determining whether the latency calculated is less than the adjustment estimated; and adjusting the internal clock when the latency calculated is less than the adjustment estimated.
2. The method of claim 1, wherein determining whether the calculated round trip latency is less than the estimated synchronization adjustment includes:
assuming that the latency is unbalanced.
assuming that the latency is unbalanced.
3. The method of claim 2, wherein the time synchronization message includes a time stamp specifying a time, as indicated by the master clock, when the master clock element sent the time synchronization message, and wherein assuming that the latency is imbalanced includes:
calculating an earliest current time of the master clock assuming that there is no latency; and calculating a latest current time of the master clock by adding all of the calculated latency to the time stamp.
calculating an earliest current time of the master clock assuming that there is no latency; and calculating a latest current time of the master clock by adding all of the calculated latency to the time stamp.
4. The method of claim 3, wherein determining whether the latency calculated is less than the adjustment estimated includes:
determining whether a current time as indicated by the internal clock is between the earliest and latest current time of the master clock.
determining whether a current time as indicated by the internal clock is between the earliest and latest current time of the master clock.
5. The method of claim 1, wherein:
calculating latency includes calculating latency that varies from one instance of synchronization to another instance of synchronization; and estimating adjustment includes estimating adjustment that varies from one instance of synchronization to another instance of synchronization.
calculating latency includes calculating latency that varies from one instance of synchronization to another instance of synchronization; and estimating adjustment includes estimating adjustment that varies from one instance of synchronization to another instance of synchronization.
6. The method of claim 1, wherein:
the time synchronization message includes a time stamp specifying a time, as indicated by the master clock, when the master clock element sent the time synchronization message; and adjusting the internal clock includes adjusting based on the time stamp.
the time synchronization message includes a time stamp specifying a time, as indicated by the master clock, when the master clock element sent the time synchronization message; and adjusting the internal clock includes adjusting based on the time stamp.
7. The method of claim 1, further comprising:
determining whether the latency calculated exceeds a threshold;
when the latency calculated does not exceed the threshold, applying a first set of criteria to determining whether the latency calculated is less than the adjustment estimated; and when the latency calculated exceeds the threshold, applying a second set of criteria to determining whether the latency calculated is less than the adjustment estimated.
determining whether the latency calculated exceeds a threshold;
when the latency calculated does not exceed the threshold, applying a first set of criteria to determining whether the latency calculated is less than the adjustment estimated; and when the latency calculated exceeds the threshold, applying a second set of criteria to determining whether the latency calculated is less than the adjustment estimated.
8. The method of claim 7, wherein applying the first set of criteria includes:
determining whether the master clock and the internal clock are sufficiently synchronized; and determining whether adjustment to the internal clock will cause an error in the network.
determining whether the master clock and the internal clock are sufficiently synchronized; and determining whether adjustment to the internal clock will cause an error in the network.
9. The method of claim 8, wherein:
determining whether the master clock and the internal clock are sufficiently synchronized includes determining whether a difference between a current time as indicated by the internal clock and the current time as estimated to be indicated by the master clock is less than five seconds; and determining whether adjustment to the internal clock will cause an error in the network includes determining whether there will be an error cause by adjusting the internal clock because a difference between the current time as indicated by the internal clock and the current time as estimated to be indicated by the master clock is too large.
determining whether the master clock and the internal clock are sufficiently synchronized includes determining whether a difference between a current time as indicated by the internal clock and the current time as estimated to be indicated by the master clock is less than five seconds; and determining whether adjustment to the internal clock will cause an error in the network includes determining whether there will be an error cause by adjusting the internal clock because a difference between the current time as indicated by the internal clock and the current time as estimated to be indicated by the master clock is too large.
10. The method of claim 9, wherein:
calculating a current time includes calculating the current time of when the network element receives the time synchronization message.
calculating a current time includes calculating the current time of when the network element receives the time synchronization message.
11. The method of claim 1, further comprising sending a request message from the network element to the master clock element, the request message causing the master clock element to send the time synchronization message, wherein calculating the latency includes:
recording a time when the network element sent the request message;
recording a time when the network element received the time synchronization message sent from the master clock element; and calculating a difference between the time when the network element sent the request message and the time when the network element received the time synchronization message sent from the master clock element.
recording a time when the network element sent the request message;
recording a time when the network element received the time synchronization message sent from the master clock element; and calculating a difference between the time when the network element sent the request message and the time when the network element received the time synchronization message sent from the master clock element.
12. A computer program product, tangibly stored on machine-readable medium, for synchronizing a first clock of a network with a second clock of the network, the product comprising instructions to cause a processor to:
calculate a latency between the first clock and the second clock;
estimate an adjustment of the first clock to synchronize the first clock with the second clock; and determine whether to adjust the first clock, the determining being based on whether the latency calculated is less than the adjustment estimated.
calculate a latency between the first clock and the second clock;
estimate an adjustment of the first clock to synchronize the first clock with the second clock; and determine whether to adjust the first clock, the determining being based on whether the latency calculated is less than the adjustment estimated.
13. The product of claim 12, further comprising instructions to:
adjust the first clock when a determination has been made to do so.
adjust the first clock when a determination has been made to do so.
14. The product of claim 12, further comprising instructions to:
calculate an earliest current time as indicated by the second clock and a latest current time as indicated by the second clock, the calculation assuming that the latency is completely imbalanced; and determine that the latency calculated is less than the adjustment estimated when a current time as indicated by the first clock is in between the earliest and latest current times.
calculate an earliest current time as indicated by the second clock and a latest current time as indicated by the second clock, the calculation assuming that the latency is completely imbalanced; and determine that the latency calculated is less than the adjustment estimated when a current time as indicated by the first clock is in between the earliest and latest current times.
15. The product of claim 12, further comprising instructions to determine that the first clock is to be adjusted when:
the first clock and the second clock are not synchronized within five seconds;
and adjustment does not cause an error in the network..
the first clock and the second clock are not synchronized within five seconds;
and adjustment does not cause an error in the network..
16. The product of claim 12, further comprising instructions to determine that the latency calculated is less than the adjustment estimated when:
adjustment does not cause an error in the network.
adjustment does not cause an error in the network.
17. The product of claim 12, wherein:
the first clock is include in a first network element and the second clock is included in a second network element; and calculating a latency between the first clock and the second clock includes calculating the time for a first message to travel from the second network element to the first network element.
the first clock is include in a first network element and the second clock is included in a second network element; and calculating a latency between the first clock and the second clock includes calculating the time for a first message to travel from the second network element to the first network element.
18. The product of claim 17, wherein, the product further comprising instructions to:
calculate a second time interval that it takes for a second message to travel from the first network element to the second network element, for the second element to process the second message, and for the second element to generate and send the first message;
and assume the second time interval is the latency.
calculate a second time interval that it takes for a second message to travel from the first network element to the second network element, for the second element to process the second message, and for the second element to generate and send the first message;
and assume the second time interval is the latency.
19. The product of claim 12, wherein:
the network is a wireless network; and the second clock is a master clock.
the network is a wireless network; and the second clock is a master clock.
20. The product of claim 19, wherein:
the network is a radio frequency network.
the network is a radio frequency network.
21. A computer program product, tangibly stored on machine-readable medium, for synchronizing a first clock of a network with a second clock of the network, the product comprising instructions to cause a processor to:
calculate a latency between the first clock and the second clock;
estimate an adjustment of the first clock to synchronize the first clock with the second clock;
calculate an earliest current time as indicated by the second clock and a latest current time as indicated by the second clock, the calculation assuming that the latency is completely imbalanced; and determine that the latency calculated is less than the adjustment estimated when a current time as indicated by the first clock is in between the earliest and latest current times.
calculate a latency between the first clock and the second clock;
estimate an adjustment of the first clock to synchronize the first clock with the second clock;
calculate an earliest current time as indicated by the second clock and a latest current time as indicated by the second clock, the calculation assuming that the latency is completely imbalanced; and determine that the latency calculated is less than the adjustment estimated when a current time as indicated by the first clock is in between the earliest and latest current times.
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US33736601P | 2001-11-30 | 2001-11-30 | |
| US60/337,366 | 2001-11-30 | ||
| US10/280,448 | 2002-10-25 | ||
| US10/280,448 US7352715B2 (en) | 2001-11-30 | 2002-10-25 | Time synchronization using dynamic thresholds |
| PCT/US2002/036799 WO2003049343A1 (en) | 2001-11-30 | 2002-11-14 | Time synchronization using dynamic thresholds |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CA2468764A1 true CA2468764A1 (en) | 2003-06-12 |
| CA2468764C CA2468764C (en) | 2011-02-08 |
Family
ID=26960310
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA2468764A Expired - Lifetime CA2468764C (en) | 2001-11-30 | 2002-11-14 | Time synchronization using dynamic thresholds |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US7352715B2 (en) |
| EP (1) | EP1456987B1 (en) |
| AT (1) | ATE401708T1 (en) |
| AU (1) | AU2002357733A1 (en) |
| CA (1) | CA2468764C (en) |
| DE (1) | DE60227698D1 (en) |
| MX (1) | MXPA04005111A (en) |
| WO (1) | WO2003049343A1 (en) |
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-
2002
- 2002-10-25 US US10/280,448 patent/US7352715B2/en active Active
- 2002-11-14 WO PCT/US2002/036799 patent/WO2003049343A1/en not_active Application Discontinuation
- 2002-11-14 AU AU2002357733A patent/AU2002357733A1/en not_active Abandoned
- 2002-11-14 CA CA2468764A patent/CA2468764C/en not_active Expired - Lifetime
- 2002-11-14 MX MXPA04005111A patent/MXPA04005111A/en active IP Right Grant
- 2002-11-14 DE DE60227698T patent/DE60227698D1/de not_active Expired - Lifetime
- 2002-11-14 AT AT02792271T patent/ATE401708T1/en not_active IP Right Cessation
- 2002-11-14 EP EP02792271A patent/EP1456987B1/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| ATE401708T1 (en) | 2008-08-15 |
| US7352715B2 (en) | 2008-04-01 |
| MXPA04005111A (en) | 2005-04-29 |
| EP1456987A4 (en) | 2006-03-29 |
| EP1456987A1 (en) | 2004-09-15 |
| DE60227698D1 (en) | 2008-08-28 |
| WO2003049343A1 (en) | 2003-06-12 |
| EP1456987B1 (en) | 2008-07-16 |
| CA2468764C (en) | 2011-02-08 |
| US20030103486A1 (en) | 2003-06-05 |
| AU2002357733A1 (en) | 2003-06-17 |
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| EEER | Examination request | ||
| MKEX | Expiry |
Effective date: 20221114 |