CA2468919A1 - Error detection code generating method and error detection code generator - Google Patents
Error detection code generating method and error detection code generator Download PDFInfo
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- CA2468919A1 CA2468919A1 CA002468919A CA2468919A CA2468919A1 CA 2468919 A1 CA2468919 A1 CA 2468919A1 CA 002468919 A CA002468919 A CA 002468919A CA 2468919 A CA2468919 A CA 2468919A CA 2468919 A1 CA2468919 A1 CA 2468919A1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0059—Convolutional codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0061—Error detection codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0064—Concatenated codes
- H04L1/0065—Serial concatenated codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0067—Rate matching
- H04L1/0068—Rate matching by puncturing
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0071—Use of interleaving
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0078—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
- H04L1/0083—Formatting with frames or packets; Protocol or part of protocol for error control
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/08—Arrangements for detecting or preventing errors in the information received by repeating transmission, e.g. Verdan system
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
- H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
- H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
Abstract
In a mobile communication system, an error detection code or a quality frame indicator (e.g., CRC) is generated using selectively frame information, and at least one of a WCA identifier of another terminal, and a corresponding terminal identifier. And the terminal identifier can be implicitly transmitt ed to the receiver.
Claims (50)
1. A method of generating an error indication code for a frame of a first prescribed bits to be transmitted over a prescribed channel, comprising:
generating a first error indication code of a first prescribed length based on masking of second prescribed bits corresponding to a prescribed field excluded from the frame; and generating a second error indication code of a second prescribed length.
generating a first error indication code of a first prescribed length based on masking of second prescribed bits corresponding to a prescribed field excluded from the frame; and generating a second error indication code of a second prescribed length.
2. The method of claim 1, wherein the first prescribed bits equals 13 bits and the prescribed channel is a packet data control channel.
3. The method of claim 1, wherein each of the first and second prescribed lengths is 8 bits and each of the first and second error indication codes is a cyclic redundancy check code.
4. The method of claim 1, wherein the first prescribed bits corresponding to a message format of the frame includes information corresponding to encoder packet size field, ARQ channel identifier field, subpacket identifier field, Walsh Code Allocation field and sequence number field of the message format
5. The method of claim 1, wherein the prescribed field is a terminal identifier intended to receive the frame over the prescribed channel.
6. The method of claim 1, wherein the second prescribed bits equals 8 bits.
7. The method of claim 1, wherein a modulo-2 operation is performed for masking of the second prescribed bits.
8. The method of claim 7, wherein the modulo-2 operation is an exclusive OR operation.
9. The method of claim 1, wherein ,the masking is performed by initializing a plurality of transition register of a code redundancy check code generator based on the second prescribed bits.
10. A method of determining a terminal identification and error detection of a received frame over a first prescribed channel, comprising:
obtaining a terminal identification from a first frame quality indicator; and determining an error of the received frame from a second frame quality indicator.
obtaining a terminal identification from a first frame quality indicator; and determining an error of the received frame from a second frame quality indicator.
11. The method of claim 10, wherein the prescribed channel is packet data control channel.
12. The method of claim 10, wherein each of the first and second frame quality indicators is a cyclic redundancy check code (CRC), and the first and second frame quality indicators are outer and inner CRCs, respectively.
13. The method of claim 10, wherein the frame comprises information bits corresponding to a message format having encoder packet size field, ARQ
channel identifier field, subpacket identifier field, Walsh Code Allocation field, and sequence number field.
channel identifier field, subpacket identifier field, Walsh Code Allocation field, and sequence number field.
14. The method of claim 13, wherein the frame further comprises the first and second quality frame indicators and encoder tail bits.
15. The method claim of 14, wherein the encoder packet size field comprises 3 bits, ARQ channel identifier field comprises 2 bits, subpacket identifier field comprises 2 bits, first Walsh Code Allocation field comprises 5 bits, sequence number field comprises 1 bit, each of the first and second quality frame indicators comprises 8 bits and encoder tail bits comprises 8 bits.
16. The method of claim 10, wherein the first terminal identification is masked within the first quality frame indicator by a modulo-2 operation.
17. A method of performing an error detection of a received frame over a prescribed channel, comprising:
performing a first error detection using a second frame quality indicator from the received frame; and performing a second error detection using a first quality indicator from the received frame and an assigned terminal identifier.
performing a first error detection using a second frame quality indicator from the received frame; and performing a second error detection using a first quality indicator from the received frame and an assigned terminal identifier.
18. The method of claim 17, wherein the first quality indicator is covered by the terminal identifier.
19. A channel transmission chain structure comprising:
an error detection code addition block coupled for receiving a frame of a first prescribed channel, and for generating a first error indication code having a masked terminal identification of a first prescribed channel and a second error indication code;
a tail bit generator coupled to the error detection code addition block for generating encoder tail bits;
an encoder coupled to the tail bit generator for encoding a frame received from the tail bit generator to output an encoded frame; and an output circuit for transmitting the encoded frame.
an error detection code addition block coupled for receiving a frame of a first prescribed channel, and for generating a first error indication code having a masked terminal identification of a first prescribed channel and a second error indication code;
a tail bit generator coupled to the error detection code addition block for generating encoder tail bits;
an encoder coupled to the tail bit generator for encoding a frame received from the tail bit generator to output an encoded frame; and an output circuit for transmitting the encoded frame.
20. The channel transmission chain structure of claim 19, wherein the error detection code addition block, comprising:
a first cyclic redundancy check code generator (first CRC generator) receiving information bits of the first prescribed channel and the terminal identification to output an outer CRC corresponding to the first error indication code; and a second cyclic redundancy check code generator (second CRC generator) coupled to the first CRC for generating an inner CRC corresponding to the second error indication code.
a first cyclic redundancy check code generator (first CRC generator) receiving information bits of the first prescribed channel and the terminal identification to output an outer CRC corresponding to the first error indication code; and a second cyclic redundancy check code generator (second CRC generator) coupled to the first CRC for generating an inner CRC corresponding to the second error indication code.
21. The channel transmission chain structure of claim 20, wherein the terminal identification is masked by a modulo-2 operation.
22. A channel frame structure of prescribed channel comprising:
a first prescribed number of first information bits of a prescribed channel;
a first quality frame indicator of a second prescribed number of bits, the first quality frame indicator being based on a second information bits of a prescribed channel and a second quality frame indicator of a third prescribed number of bits.
a first prescribed number of first information bits of a prescribed channel;
a first quality frame indicator of a second prescribed number of bits, the first quality frame indicator being based on a second information bits of a prescribed channel and a second quality frame indicator of a third prescribed number of bits.
23. The channel frame structure of claim 22, wherein the second information bits indicate a MAC identifier of a first terminal intended to receive the first information bits.
24. The channel frame structure of claim 23, the second information bits further indicates Walsh Code Allocation information for a second terminal.
25. The channel frame structure of claim 24, the first quality frame indicator is generated based on one of modulo-2 operation of the second information bits and initialization of a plurality of cyclic redundancy code generator registers with the second information bits.
26. The channel frame structure of claim 22, wherein the prescribed channel comprises a packet data control channel.
27. The channel frame structure of claim 22, wherein the first prescribed number is 13 bits.
28. The channel frame structure of claim 22, wherein the second information bits equals 8 bits.
29. The channel frame structure of claim 22, wherein each of the second and third prescribed number of bits equals 8 bits.
30. The channel frame structure of claim 22, further comprising an encoder tail bits of a fourth prescribed number of bits.
31. The channel frame structure of claim 30, wherein the fourth prescribed number of bits equals 8 bits.
32. The channel frame structure of claim 22, wherein the first information bits are scrambled information bits.
33. The channel frame structure of claim 22, wherein the first and second frame quality indicators comprises a cyclic redundancy check code (CRC).
34. The channel frame structure of claim 22, wherein the first frame quality indicator is based on modulo-2 operation using the second information bits.
35. The channel frame structure of claim 22, wherein the first information bits further includes Walsh Code Allocation information of a second packet data control channel, which is different from a first packet data control channel.
36. The channel frame structure of claim 35, wherein the first quality frame indicator is generated based on one of modulo-2 operation of the second information bits and initialization of a plurality of cyclic redundancy code generator registers with the second information bits.
37. The channel frame structure of claim 36, wherein the second information bits is indicative of a terminal identification of the first packet data control channel.
38. An apparatus for generating an error detection code for a mobile communication system, the improvement comprising an error detection code being generated by selective use of an information for data transmission on a first prescribed channel for a first terminal, a Walsh Code Allocation identifier of a second prescribed channel for a second terminal and a terminal identifier corresponding to the first terminal.
39. The apparatus of claim 38, wherein the error detection code is generated by an error detection code generator receiving the control information and the Walsh Code Allocation identifier selectively; and a modulo operator performing an exclusive OR operation based on the terminal identifier.
40. The apparatus of claim 38, wherein the error detection code is generated by a cyclic redundancy check code (CRC) generator having a plurality of transition registers, which are initialized based on the terminal identifier.
41. The apparatus of claim 40, wherein the plurality of transition registers are further initialized based on the Walsh Code Allocation identifier.
42 The apparatus of claim 38, wherein the error detection code is generated by an error detection code generator receiving the control information; and a modulo operator performing an exclusive OR operation based on the terminal identifier and the Walsh Code Allocation identifier alternatively.
43. A method of generating error indication codes for a frame to be transmitted over a prescribed channel, comprising:
generating a first masked error indication code of a first prescribed length based on masking a terminal identifier on a first error indication code generated based on a first information; and generating a second error indication code based on the first information and the first masked error indication code.
generating a first masked error indication code of a first prescribed length based on masking a terminal identifier on a first error indication code generated based on a first information; and generating a second error indication code based on the first information and the first masked error indication code.
44. The method of claim 43, wherein the prescribed channel is a packet data control channel.
45. The method of claim 43, wherein the first information have a variable length.
46. The method of claim 43, wherein the first masked error indication code and the second error indication code is the same length.
47. The method of claim 43, wherein the first error indication code and the second error indication code is generated by each different polynomial.
48. A method of receiving a data frame having two frame quality indicators over a prescribed channel, comprising:
determining whether the prescribed channel is assigned to a mobile station or not by detecting a terminal identification from a first frame quality indicator.
determining whether the prescribed channel is assigned to a mobile station or not by detecting a terminal identification from a first frame quality indicator.
49. The method of claim 48, further comprising the steps of:
checking whether the received frame is good or bad based the first frame quality indicator; and checking whether the received frame is good or bad based the second frame quality indicator.
checking whether the received frame is good or bad based the first frame quality indicator; and checking whether the received frame is good or bad based the second frame quality indicator.
50. The method of claim 48, wherein the prescribed channel is a packet data control channel.
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2001/76757 | 2001-12-05 | ||
| KR2001/76756 | 2001-12-05 | ||
| KR1020010076756A KR100833847B1 (en) | 2001-12-05 | 2001-12-05 | Method for generation cyclic redundancy check code and Apparatus for the same |
| KR20010076757 | 2001-12-05 | ||
| PCT/KR2002/002269 WO2003049308A1 (en) | 2001-12-05 | 2002-12-02 | Error detection code generating method and error detection code generator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CA2468919A1 true CA2468919A1 (en) | 2003-06-12 |
| CA2468919C CA2468919C (en) | 2010-03-09 |
Family
ID=26639499
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002468919A Expired - Lifetime CA2468919C (en) | 2001-12-05 | 2002-12-02 | Error detection code generating method and error detection code generator |
Country Status (8)
| Country | Link |
|---|---|
| US (4) | US7546511B2 (en) |
| CN (2) | CN100530991C (en) |
| AU (1) | AU2002365791B2 (en) |
| BR (1) | BRPI0215108A2 (en) |
| CA (1) | CA2468919C (en) |
| GB (1) | GB2383243B (en) |
| MX (1) | MXPA04005228A (en) |
| WO (1) | WO2003049308A1 (en) |
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2002
- 2002-12-02 GB GB0228090A patent/GB2383243B/en not_active Expired - Lifetime
- 2002-12-02 MX MXPA04005228A patent/MXPA04005228A/en active IP Right Grant
- 2002-12-02 AU AU2002365791A patent/AU2002365791B2/en not_active Expired
- 2002-12-02 CN CNB028244583A patent/CN100530991C/en not_active Expired - Lifetime
- 2002-12-02 BR BRPI0215108A patent/BRPI0215108A2/en not_active Application Discontinuation
- 2002-12-02 WO PCT/KR2002/002269 patent/WO2003049308A1/en not_active Application Discontinuation
- 2002-12-02 CN CN2009101504993A patent/CN101697503B/en not_active Expired - Lifetime
- 2002-12-02 CA CA002468919A patent/CA2468919C/en not_active Expired - Lifetime
- 2002-12-02 US US10/307,416 patent/US7546511B2/en active Active
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2008
- 2008-07-23 US US12/178,115 patent/US8418024B2/en active Active
- 2008-07-23 US US12/178,142 patent/US8332719B2/en active Active
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Also Published As
| Publication number | Publication date |
|---|---|
| CN1602593A (en) | 2005-03-30 |
| GB0228090D0 (en) | 2003-01-08 |
| GB2383243B (en) | 2004-09-22 |
| GB2383243A (en) | 2003-06-18 |
| US20080282131A1 (en) | 2008-11-13 |
| US8332719B2 (en) | 2012-12-11 |
| US7546511B2 (en) | 2009-06-09 |
| AU2002365791B2 (en) | 2007-02-15 |
| US20130254621A1 (en) | 2013-09-26 |
| MXPA04005228A (en) | 2004-10-11 |
| CN101697503A (en) | 2010-04-21 |
| WO2003049308A1 (en) | 2003-06-12 |
| US8418024B2 (en) | 2013-04-09 |
| AU2002365791A1 (en) | 2003-06-17 |
| CN100530991C (en) | 2009-08-19 |
| US20030103480A1 (en) | 2003-06-05 |
| US20080282137A1 (en) | 2008-11-13 |
| US9838039B2 (en) | 2017-12-05 |
| BRPI0215108A2 (en) | 2016-07-05 |
| CN101697503B (en) | 2013-11-20 |
| CA2468919C (en) | 2010-03-09 |
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