CA2519942A1 - Chip customized polish pads for chemical mechanical planarization (cmp) - Google Patents
Chip customized polish pads for chemical mechanical planarization (cmp) Download PDFInfo
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- CA2519942A1 CA2519942A1 CA002519942A CA2519942A CA2519942A1 CA 2519942 A1 CA2519942 A1 CA 2519942A1 CA 002519942 A CA002519942 A CA 002519942A CA 2519942 A CA2519942 A CA 2519942A CA 2519942 A1 CA2519942 A1 CA 2519942A1
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- chemical
- pad
- physical properties
- polishing
- planarization
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Classifications
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B53/00—Devices or means for dressing or conditioning abrasive surfaces
- B24B53/017—Devices or means for dressing, cleaning or otherwise conditioning lapping tools
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
- B24B37/042—Lapping machines or devices; Accessories designed for working plane surfaces operating processes therefor
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/11—Lapping tools
- B24B37/20—Lapping pads for working plane surfaces
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B49/00—Measuring or gauging equipment for controlling the feed movement of the grinding tool or work; Arrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation
- B24B49/02—Measuring or gauging equipment for controlling the feed movement of the grinding tool or work; Arrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation according to the instantaneous size and required size of the workpiece acted upon, the measuring or gauging being continuous or intermittent
Abstract
A polishing (102) pad for chemical mechanical planarization of a film on a substrate is customized by obtaining one or more characteristics of a structure on a substrate. For example, when the structure is a chip formed on a semiconductor wafer (104), the one or more characteristics of the structure can include chip size, pattern density, chip architecture, film material, film topography, and the like. Based on the one or more characteristics of the structure, a value for the one or more chemical or physical properties of the pad (102) is selected. For example, the one or more chemical or physical properties of the pad can include pad material hardness, thickness, surface grooving, pore size, porosity, Youngs modulus, compressibility, asperity, and the like.
Description
CUSTOMIZED POLISH PADS FOR CHEMICAL MECHANICAL PLANARIZA_TION
CROSS-REFERENCE TO RELATED APPLICATION
(0001] This application claims the benefit of U.S. Provisional Application No.
60/45'7,273, titled CHIP CUSTOMIZED POLISH PADS FOR CHEMICAL MECHANICAL
PLANARIZATION (CMP), filed March 25, 2003, the entire content of which is incorporated herein by reference.
BACKGROUND
Field of the Invention
CROSS-REFERENCE TO RELATED APPLICATION
(0001] This application claims the benefit of U.S. Provisional Application No.
60/45'7,273, titled CHIP CUSTOMIZED POLISH PADS FOR CHEMICAL MECHANICAL
PLANARIZATION (CMP), filed March 25, 2003, the entire content of which is incorporated herein by reference.
BACKGROUND
Field of the Invention
[0002] The present application relates to polishing pads for chemical mechanical planarization (CMP) of substrates and, more particularly, to polishing pads customized for structures on the substrates.
2. Related Art
2. Related Art
[0003] Chemical mechanical planarization (CMP) is used to planarize films on substzates, such as individual layers (dielectric or metal layers) during integrated circuit (IC) fabrication on a semiconductor wafer. CMP removes undesirable topographical features of the film on the substrate, such as metal deposits subsequent to damascene processes, or removal of excess oxide from shallow trench isolation steps.
(0004] CMP utilizes a reactive liquid medium and a polishing pad surface to provide the mechanical and chemical control necessary to achieve planarity. Either the liquid or the polishing surface (pad) can contain nano-size inorganic particles to enhance chemical reactivity and/or mechanical activity of the CMP process. The pad is typically made of a rigid, micro-porous polyurethane material capable of achieving both local and global planariza_tion.
[0005] Conventional open-pore and closed-pore polymeric pads with essentially homogeneous tribological, chemical and frictional characteristics were previously suitable for CMP, until the introduction of 250 mn CMOS technology. For sub 250 nm technology with increased design complexity and associated chip pattern density variations, especially with increased chip size, the chip yields, device performance and device reliability have deteriorated significantly. Recent attempts by various pad vendors to change the thickness (stacked amd unstacked) and surface grooving (perforated, K-groove, X-Y groove, and K-groove/X-Y
groove combinations) of the pads have failed to address the impact that chip pattern density, chip size, complexity of architecture, and dielectric/metal process flow have on chip-level uniformity directly impacting chip yield, device performance and reliability of integrated circuits.
SUMMARY
groove combinations) of the pads have failed to address the impact that chip pattern density, chip size, complexity of architecture, and dielectric/metal process flow have on chip-level uniformity directly impacting chip yield, device performance and reliability of integrated circuits.
SUMMARY
[0006] In one exemplary embodiment, a polishing pad for chemical mechanical planarization of a film on a substrate is customized by obtaining one or more characteristics of a structure on a substrate. For example, when the structure is a chip formed on a semiconductor wafer, the one or more characteristics of the structure can include chip size, pattern density, chip architecture, film material, film topography, and the like. Based on the one or more characteristics of the structure, a value for the one or more chemical or physical properties of the pad is selected. For example, the one or more chemical or physical properties of the pad can include pad material hardness, thickness, surface grooving, pore size, porosity, Youngs modulus, compressibility, asperity, and the like.
DESCRIPTION OF DRAWING FIGURES
DESCRIPTION OF DRAWING FIGURES
[0007] The present application can be best understood by reference to the following description taken in conjunction with the accompanying drawing figures, in which like parts may be referred to by like numerals:
[0008] Fig. 1 depicts an exemplary polishing pad used in a chemical mechanical planarization (CMP) process;
[0009] Figs. 2A and 2B depict an exemplary deposition layer formed on an underlying layer;
[0010] Figs. 3A and 3B depict dishing and erosion in a metal deposited within a trench in a dielectric layer;
[0011] Figs. 4A and 4B depict positive and negative deposition bias; and
[0012] Fig. 5 depicts an exemplary planarization length.
DETAILED DESCRIPTION
DETAILED DESCRIPTION
[0013] The following description sets forth numerous specific configurations, parameters, and the like. It should be recognized, however, that such description is not intended as a limitation on the scope of the present invention, but is instead provided as a description of exemplary embodiments.
[0014] With reference to Fig. 1, an exemplary polishing pad 102 for chemical mechanical planarization (CMP) processing of a semiconductor wafer 104 is depicted. To planarize a layer formed on wafer 104, a holder 106 holds wafer 104 on pad 102 while wafer 104 an_d pad 102 are rotated. As described above, in a typical CMP process, a reactive liquid medium (a sluury) is also used to enhance the CMP process. It should be recognized, however, pad 102 can be used for CMP processing of film on various types of structures and various types of substrates, such as optoelectronic devices, magnetic or optical disks, ceramic and nano-composite substrates, and the like.
[0015] In one exemplary embodiment, pad 102 is customized based on one or more chemical or physical properties of a structure on a substrates, such as a chip on wafer 104. It should be recognized that the one or more characteristics of the chips can be obtained from actual chips formed on a wafer. Alternatively, the one or more characteristics of the chips can be obtained from a design for chips to be formed on a wafer.
[0016] In the present exemplary embodiment, the one or more characteristics of a structure on the substrate are obtained. For example, when the structure is a chip formed on a wafer, the one or more characteristics of the chip can include chip size, pattern density, chip architecture, film material, film topography, and the like. Based on the one or more characteristics of the structure, a value for the one or more chemical or physical properties of the pad is selected.
The one or more chemical or physical properties of the pad can include pad material hardness, thickness, surface grooving, pore size, porosity, Youngs modulus, compressibility, asperity, and the like. The one or more chemical or physical properties of the pad also includes tribological or material properties, which can include one or more of the examples previously set forth.
The one or more chemical or physical properties of the pad can include pad material hardness, thickness, surface grooving, pore size, porosity, Youngs modulus, compressibility, asperity, and the like. The one or more chemical or physical properties of the pad also includes tribological or material properties, which can include one or more of the examples previously set forth.
[0017] For example, assuming that the structure is a chip and the substrate is a wafer, a pad for smaller chip size (e.g., less than 1 sq cm in area, notably less than 0.5 sq cm) can have different values for the one or more chemical or physical properties than for larger chip size (greater than 1 sq cm in area). One property of the pad that can be selected based on the chip size is the pad material hardness. In particular, harder pad material (e.g., hardness greater than 90b shore, notably greater than 60D shore hardness) is used for larger chip size than for smaller chip size. Another property of the pad that can be selected based on chip size is pore size. In particularly, smaller pore size is used for larger chip size than for smaller chip size.
Still another property of the pad that can be selected based on chip size is porosity. In particular, smaller porosity is used for larger chip size than for smaller chip size. Yet another property of the pad that can be selected based on chip size is asperity. In particular, a smaller asperity with larger distribution is used for larger chip size than for smaller chip size.
Still another property of the pad that can be selected based on chip size is porosity. In particular, smaller porosity is used for larger chip size than for smaller chip size. Yet another property of the pad that can be selected based on chip size is asperity. In particular, a smaller asperity with larger distribution is used for larger chip size than for smaller chip size.
[0018] Also, the pattern density of a chip can affect the film removal amount and the uniformity within a chip and across a wafer. (See, T. Lung, "A Method for die-scale simulation for CMP planarization," in Proc. SISPAD conf., Cambridge, MA, Sept.
1997.) With reference to Fig. 2A, underlying features 202, such as metal lines, of a deposited film 204 can create high regions 206 and low regions 208 in the topography. In particular, topography is strongly dependent on pattern density in copper based dual damascene structures because of the nature of electroplating in trenches that have different widths across a chip and the chemistry associated with the additives used in the electroplating process. In general, high regions 206 in the topography polish faster than the low regions 208. As depicted in Fig. 2A, an initial step height 210 is associated with deposited film 204 before polishing. As depicted in Fig. 2B, a final step height 212 is associated with deposited film 204 after polishing. 'The differential rate for high regions 206 and low regions 208 removal, indicated by the difference in initial step height 210 and final step height 212, is a figure of merit for planarization. The larger this difference, the better the planarity after the CMP process.
1997.) With reference to Fig. 2A, underlying features 202, such as metal lines, of a deposited film 204 can create high regions 206 and low regions 208 in the topography. In particular, topography is strongly dependent on pattern density in copper based dual damascene structures because of the nature of electroplating in trenches that have different widths across a chip and the chemistry associated with the additives used in the electroplating process. In general, high regions 206 in the topography polish faster than the low regions 208. As depicted in Fig. 2A, an initial step height 210 is associated with deposited film 204 before polishing. As depicted in Fig. 2B, a final step height 212 is associated with deposited film 204 after polishing. 'The differential rate for high regions 206 and low regions 208 removal, indicated by the difference in initial step height 210 and final step height 212, is a figure of merit for planarization. The larger this difference, the better the planarity after the CMP process.
[0019] One factor influencing planarity is the pad bending or viscoelastic behavior of most cross-linked polyurethane thermosets and elastomeric materials during the CMP
process.
Thus, a pad for lower pattern density can have different properties than for higher pattern density.
process.
Thus, a pad for lower pattern density can have different properties than for higher pattern density.
[0020] For example, lower pattern density exists for smaller chip size, such as a pattern density of less than 30 percent. Higher pattern density exists for larger chip size, such as a pattern density of greater than 50 percent. One property of the pad that can be selected based on the pattern density is the pad material hardness. In particular, harder pad material (e.g., hardness greater than 90D shore, notably greater than 60D shore hardness) is used for chips with higher pattern density than with lower pattern density. Another property of the pad that can be selected based on pattern density is asperity or asperity distribution.
In particular, a smaller asperity and/or larger asperity distribution is used for higher pattern density than for lower pattern density.
In particular, a smaller asperity and/or larger asperity distribution is used for higher pattern density than for lower pattern density.
[0021] The film material can also affect the uniformity within a chip and across a wafer.
In particular, dishing and/or erosion can occur in a CMP process involving multiple film materials because the different materials can have different polishing rates.
For example, with reference to Fig. 3A, a metal line 302 deposited within a trench in a dielectric layer 304 is depicted. With reference to Fig. 3B, dishing of metal line 302 is depicted as a deviation in height 306 of metal line 302 from planarity with dielectric layer 304. Also, erosion of dielectric layer 304 is depicted as a deviation in height 308 of dielectric layer 304 from its intended height. Dishing and/or erosion can exist in shallow trench isolation (STI), tungsten plug, and dual damascene process for copper based interconnects. Also, when copper is used, an additional film material is used as a barrier layer between the copper and the dielectric material. Because different film materials can have different polishing rates, dishing and/or erosion occur. Additionally, dishing and/or erosion can be aggravated when the CMP process involves over-polishing.
In particular, dishing and/or erosion can occur in a CMP process involving multiple film materials because the different materials can have different polishing rates.
For example, with reference to Fig. 3A, a metal line 302 deposited within a trench in a dielectric layer 304 is depicted. With reference to Fig. 3B, dishing of metal line 302 is depicted as a deviation in height 306 of metal line 302 from planarity with dielectric layer 304. Also, erosion of dielectric layer 304 is depicted as a deviation in height 308 of dielectric layer 304 from its intended height. Dishing and/or erosion can exist in shallow trench isolation (STI), tungsten plug, and dual damascene process for copper based interconnects. Also, when copper is used, an additional film material is used as a barrier layer between the copper and the dielectric material. Because different film materials can have different polishing rates, dishing and/or erosion occur. Additionally, dishing and/or erosion can be aggravated when the CMP process involves over-polishing.
[0022] Thus, when multiple film materials are used, a value for the one or more properties of the pad can be selected to reduce dishing and/or erosion. For example, a pad for greater numbers of different materials can have different properties than for fewer numbers of different materials. One property of the pad that can be selected based on the number of different material is the pad material hardness. In particular, to reduce dishing and/or erosion, harder pad material (e.g., hardness greater than 90D shore, notably greater than 60D shore hardness) is used for greater numbers of different materials than for fewer numbers of different materials.
[0023] It should be recognized that the one or more characteristics of the chips on the wafer can vary in different regions on the wafer. Thus, in one exemplary embodiment, the one or more chemical or physical properties of the pad are varied in different regions on the wafer.
For example, pattern density can vary from the center of the wafer to the edge of the wafer. In particular, because a wafer is typically circular and chips are designed to be either square or rectangular, there are regions on the wafer along the circumference area that have low or no pattern density. Thus, a pad can have a variation in one or more chemical or physical properties of the pad from the center of the wafer to the edge of the wafer.
For example, pattern density can vary from the center of the wafer to the edge of the wafer. In particular, because a wafer is typically circular and chips are designed to be either square or rectangular, there are regions on the wafer along the circumference area that have low or no pattern density. Thus, a pad can have a variation in one or more chemical or physical properties of the pad from the center of the wafer to the edge of the wafer.
[0024] In one exemplary embodiment, a value for the one or more chemical or physical properties of the pad can be selected based on one or more characteristics of the structure on the substrate by performing a simulation using a model of the CMP process. The simulation is performed using the one or more obtained characteristics of the structure and a range of values for the one or more chemical or physical properties of the pad. The model of the CMP process used in the simulations provides the effects of varying the values of the one or more chemical or physical properties of the pad on the planarization of the substrate. From the simulation, a correlation can be obtained between the one or more chemical or physical properties of the pad and the planarization of the substrate. Thus, a value for the one or more chemical or phy sical properties of the pad can be selected to optimize planarization of the substrate.
[0025] For example, assuming the structure is a chip and the substrate is a wafer, a pattern density dependent analytic model can be used in the simulation. (See, B.
Stine, et al., "Rapid Characterization and modeling of pattern dependent variation in chemical polishing," IEEE
Transactions on Semiconductor Manufacturing, vol. 11, pp 129-140, Feb. 1998;
and D.O.
Ouma, eta al., "Characterization and Modeling of Oxide Chemical Mechanical Polishing Using Planarization Length and Pattern Density Concepts," IEEE Transactions on Semiconductor Manufacturing, vol. 15, no. 2, pp 232-244, May 2002.) It should be recognized, however, that various types of models of the CMP process can be used.
Stine, et al., "Rapid Characterization and modeling of pattern dependent variation in chemical polishing," IEEE
Transactions on Semiconductor Manufacturing, vol. 11, pp 129-140, Feb. 1998;
and D.O.
Ouma, eta al., "Characterization and Modeling of Oxide Chemical Mechanical Polishing Using Planarization Length and Pattern Density Concepts," IEEE Transactions on Semiconductor Manufacturing, vol. 15, no. 2, pp 232-244, May 2002.) It should be recognized, however, that various types of models of the CMP process can be used.
[0026] One input to the model is the pattern density of the chips on the wafer. As noted above, the pattern density can be obtained from actual chips formed on the wafer or from chip design or architecture.
[0027] Another input to the model is a deposition bias associated with the layers of material deposited on the wafer. The deposition bias indicates the variation between the actual deposition profile "as deposited" and the predicted deposition profile "as drawn." For example, the pattern density "as deposited" (i.e., the pattern density that actually results on the chip may not necessarily reflect the pattern density "as drawn" (i.e., the pattern density a.s intended in the design of the chip). This is due, in part, to the fact that during the IC
processing steps, the film (either metal or insulating dielectrics) transfer the pattern in different ways depending on the deposition process used (e.g., electroplated, thermal chemical vapor depsotion - CVS, physical vapor deposition - PVD, plasma enhanced (PE), atmospheric (AP) or low pressure (LP) or subatmospheric (SA) chemical vapor deposition - PECVD, APCVD, LPCVD, SACVD, spin coating, atomic layer deposition - AVD, and the like). Each of t=hese processing methods can affect the underlaying pattern density differently. For example, PECVD deposited films have a negative bias compared to SACVD deposited films.
Furthermore, the types of film (fluorine doped silicate glass, FSG, compared to undoped silicate glass USG or Si02) have different effects on the pattern density. As depicted in Figs.
4A and 4B, Si02 or USG films can have a positive bias 402, while FSG films have a negative bias 404.
processing steps, the film (either metal or insulating dielectrics) transfer the pattern in different ways depending on the deposition process used (e.g., electroplated, thermal chemical vapor depsotion - CVS, physical vapor deposition - PVD, plasma enhanced (PE), atmospheric (AP) or low pressure (LP) or subatmospheric (SA) chemical vapor deposition - PECVD, APCVD, LPCVD, SACVD, spin coating, atomic layer deposition - AVD, and the like). Each of t=hese processing methods can affect the underlaying pattern density differently. For example, PECVD deposited films have a negative bias compared to SACVD deposited films.
Furthermore, the types of film (fluorine doped silicate glass, FSG, compared to undoped silicate glass USG or Si02) have different effects on the pattern density. As depicted in Figs.
4A and 4B, Si02 or USG films can have a positive bias 402, while FSG films have a negative bias 404.
[0028] As another input to the model, a set of test wafers can be polished using pads having different values for the one or more obtained properties. Film thicknesses and profiles of the planarized chips on the test wafers are obtained, such as final step height at specific pattern features and total indicated range (TIR - the maximum minus minimum measured thickness within a chip), which are then used as inputs to the model.
[0029] Based on the inputs, the model calculates an average or effective pattern density across a chip using a fast Fourier transform (FFT). Based on the effective pattern density, post-CMP film thickness and profile across patterned chips can be predicted, such as step height and TIR.
[0030] The model can also provide a calculation of a planarization length associated with a pad. Although definitions of planarization length (PL) vary, with reference to Fig. 5, one possible definition is as a characteristic length scale 502, a circle of which radius ensures uniformity of film thickness within 10 percent of the value at that certain location. As an example, a PL of 5 mm means all features (high and low) within 5 mm of any location within a chip are planarized with film thickness variation within 10 percent.
Essentially, a high PL is desirable for best planarity. Thus, PL is a figure of merit for a pad performance. A PL of 5 mm is well suited for a chip size, say 5 mm x 5 mm, but not for a chip size of 1 S mm x 15 mm (large chip size). The result will be non-uniformity of the film that gets severe upon film buildup as multi layers are deposited, and the result is loss of printing of device features, ultimately resulting in yield loss.
Essentially, a high PL is desirable for best planarity. Thus, PL is a figure of merit for a pad performance. A PL of 5 mm is well suited for a chip size, say 5 mm x 5 mm, but not for a chip size of 1 S mm x 15 mm (large chip size). The result will be non-uniformity of the film that gets severe upon film buildup as multi layers are deposited, and the result is loss of printing of device features, ultimately resulting in yield loss.
[0031] After planarization length is obtained from the model, a sensitivity analysis can be used to correlate the planarization length to the one or more chemical or physical properties of the pad. This correlation can then be used to select a value for the one or more chemical or physical properties of the pad to optimized planarization length.
[0032] The model can also identify dishing and/or erosion that may result from a CMP
process. In particular, the model predicts the location and amount of dishing and/or erosion that may result on the chip. A sensitivity analysis can be used to correlate dishing and/or erosion to the one or more chemical or physical properties of the pad. This correlation can then be used to select a value for the one or more chemical or physical properties of the pad to minimize dishing and/or erosion.
process. In particular, the model predicts the location and amount of dishing and/or erosion that may result on the chip. A sensitivity analysis can be used to correlate dishing and/or erosion to the one or more chemical or physical properties of the pad. This correlation can then be used to select a value for the one or more chemical or physical properties of the pad to minimize dishing and/or erosion.
[0033] The model can also identify over-polishing and/or under-polishing that may result from a CMP process. In particular, the model predicts the location and amount of over-polishing and/or under-polishing that may result on the chip. A sensitivity analysis can be used to correlate over-polishing and/or under-polishing to the one or more chemical or physical properties of the pad. This correlation can then be used to select a value for the one or more chemical or physical properties of the pad to minimize over-polishing and/or under-polishing.
[0034] A pad with the selected value for the one or more properties of the pad can be produced by adjusting the chemical formulations of the pad (e.g., use of extending agents, curing agents and cross linkers). For example, polish pads are preferably polyurethane based pads that may be either thermoplastic or thermosets. (See, A. Wilkinson and A.
Ryan, "Polymer Processing and Structure Development," Kluwer Academic publishers, 1999; and R.
B. Seymour and C.E. Carraher, Jr., "Polymer Chemistry: An Introduction.") To minimize pressure induced pad deformation, it is desirable to formulate rigid polyurethane foams. A
desirable formulation chemistry involves a polyol-isocyanate chemistry. The pads are desired to be porous; howver, they can be rigid as well, and can contain pores or can be formed without pores. Typical isocyantes can be TDI (toluene di-isocyanate), PMDI
(polymeric methylene di phenyl isocyanate). Polyols can be PPG (polypropylene glycol), PEG
(polyethylene glycol), TMP (trimethylol propane glycol), IBOH (hydroxyl terminated isobutylene). A variety of cross linking agents such as primary, secondary and tertiary polyamines, TMP, butane 1,4 diol, triethanol amine are useful for providing polymer cross linking adding to structural hardness. Chain extending agents such as MOCA
(methylene 'bis' orthochloroaniline, and theylene glycol are well suited for providing long-range or short range effects at the micro level. Curative agents such as diols and triols can be used to vary polymer properties. Catalysts such as Diaza (2,2,2) biscyclooctane facilitate reaction and affect the degree of polymerization. Surfactants are used to modulate the degree of interconnection.
Ryan, "Polymer Processing and Structure Development," Kluwer Academic publishers, 1999; and R.
B. Seymour and C.E. Carraher, Jr., "Polymer Chemistry: An Introduction.") To minimize pressure induced pad deformation, it is desirable to formulate rigid polyurethane foams. A
desirable formulation chemistry involves a polyol-isocyanate chemistry. The pads are desired to be porous; howver, they can be rigid as well, and can contain pores or can be formed without pores. Typical isocyantes can be TDI (toluene di-isocyanate), PMDI
(polymeric methylene di phenyl isocyanate). Polyols can be PPG (polypropylene glycol), PEG
(polyethylene glycol), TMP (trimethylol propane glycol), IBOH (hydroxyl terminated isobutylene). A variety of cross linking agents such as primary, secondary and tertiary polyamines, TMP, butane 1,4 diol, triethanol amine are useful for providing polymer cross linking adding to structural hardness. Chain extending agents such as MOCA
(methylene 'bis' orthochloroaniline, and theylene glycol are well suited for providing long-range or short range effects at the micro level. Curative agents such as diols and triols can be used to vary polymer properties. Catalysts such as Diaza (2,2,2) biscyclooctane facilitate reaction and affect the degree of polymerization. Surfactants are used to modulate the degree of interconnection.
[0035] In the present exemplary embodiment, validations of chemical formulations of a pad can be generated through testing in the field with wafers with test chips of varying pattern densities, linewidth and pitches that simulate small, medium and large chip products in the IC
manufacturing world. One such test chip typically used industry wide is the mask set designed by MIT Microelectronics lab.
manufacturing world. One such test chip typically used industry wide is the mask set designed by MIT Microelectronics lab.
[0036] Although exemplary embodiments have been described, various modifications can be made without departing from the spirit and/or scope of the present invention. Therefore, the present invention should not be construed as being limited to the specific forms shown in the drawings and described above.
Claims (31)
1. A method of customizing a polishing pad for chemical mechanical planarization of a substrate, the method comprising:
obtaining one or more characteristics of a structure on a substrate; and selecting a value for one or more chemical or physical properties for a pad to be used in chemical mechanical planarization of the substrate based on the obtained one or more characteristics of the structures on the substrate.
obtaining one or more characteristics of a structure on a substrate; and selecting a value for one or more chemical or physical properties for a pad to be used in chemical mechanical planarization of the substrate based on the obtained one or more characteristics of the structures on the substrate.
2. The method of claim 1, wherein the one or more characteristics of a structure includes a size of the structure.
3. The method of claim 1, wherein the one or more characteristics of a structure includes a pattern density of the structure.
4. The method of claim 1, wherein the one or more characteristics of a structure includes film material and a number of different materials.
5. The method of claim 1, wherein one or more chemical or physical properties for the pad includes hardness, thickness, surface grooving, porosity, thickness, Youngs modulus, compressibility, or asperity of the pad.
6. The method of claim 1, wherein selecting a value for one or more chemical or physical properties for a pad comprises:
performing a simulation of planarization of the substrate with a model of a CMP
process using the pad with a range of values for the one or more chemical or physical properties of the pad; and selecting a value for the one or more chemical or physical properties based on the simulation.
performing a simulation of planarization of the substrate with a model of a CMP
process using the pad with a range of values for the one or more chemical or physical properties of the pad; and selecting a value for the one or more chemical or physical properties based on the simulation.
7. The method of claim 6, further comprising:
providing a pattern density and a deposition bias as inputs to the model of a CMP
process.
providing a pattern density and a deposition bias as inputs to the model of a CMP
process.
8. The method of claim 6, further comprising:
obtaining a planarization length from the model of a CMP process; and performing a sensitivity analysis to determine a correlation between planarization length and the one or more chemical or physical properties of the pad.
obtaining a planarization length from the model of a CMP process; and performing a sensitivity analysis to determine a correlation between planarization length and the one or more chemical or physical properties of the pad.
9. The method of claim 8, wherein the value for the one or more chemical or physical properties is selected based on the determined correlation between planarization length and the one or more chemical or physical properties of the pad to optimize planarization length.
10. The method of claim 6, further comprising:
identifying dishing and/or erosion from the model of a CMP process; and performing a sensitivity analysis to determine a correlation between the one or more chemical or physical properties of the pad and dishing and/or erosion.
identifying dishing and/or erosion from the model of a CMP process; and performing a sensitivity analysis to determine a correlation between the one or more chemical or physical properties of the pad and dishing and/or erosion.
11. The method of claim 10, wherein the value for the one or more chemical or physical properties is selected based on the determined correlation between the one or more chemical or physical properties of the pad and dishing and/or erosion to reduce dishing and/or erosion.
12. The method of claim 6, further comprising:
identifying over-polishing and/or under-polishing from the model of a CMP
process;
and performing a sensitivity analysis to determine a correlation between the one or more chemical or physical properties of the pad and over-polishing and/or under-polishing.
identifying over-polishing and/or under-polishing from the model of a CMP
process;
and performing a sensitivity analysis to determine a correlation between the one or more chemical or physical properties of the pad and over-polishing and/or under-polishing.
13. The method of claim 12, wherein the value for the one or more chemical or physical properties is selected based on the determined correlation between the one or more chemical or physical properties of the pad and over-polishing and/or under-polishing to reduce over-polishing and/or under-polishing.
14. The method of claim 1, wherein the structure is an optoelectronic device.
15. The method of claim 1, wherein the substrate is a magnetic disk, an optical disk, a ceramic substrate, or a nano-composite substrate.
16. A method of customizing a polishing pad for chemical mechanical planarization of a semiconductor wafer, the method comprising:
obtaining one or more characteristics of a chip;
performing a simulation of a chemical mechanical planarization of the wafer with a model of a CMP process using the obtained one or more characteristics of the chip and a range of values for the one or more chemical or physical properties of the pad; and selecting a value for one or more chemical or physical properties for a pad based on the simulation.
obtaining one or more characteristics of a chip;
performing a simulation of a chemical mechanical planarization of the wafer with a model of a CMP process using the obtained one or more characteristics of the chip and a range of values for the one or more chemical or physical properties of the pad; and selecting a value for one or more chemical or physical properties for a pad based on the simulation.
17. The method of claim 16, wherein the one or more characteristics of the chip includes a pattern density of the chip.
18. The method of claim 17, wherein one or more chemical or physical properties for the pad includes hardness, thickness, surface grooving, porosity, thickness, Youngs modulus, compressibility, or asperity of the pad.
19. The method of claim 16, further comprising:
obtaining a planarization length from the model of a CMP process; and performing a sensitivity analysis to determine a correlation between planarization length and the one or more chemical or physical properties of the pad.
obtaining a planarization length from the model of a CMP process; and performing a sensitivity analysis to determine a correlation between planarization length and the one or more chemical or physical properties of the pad.
20. The method of claim 19, wherein the value for the one or more chemical or physical properties is selected based on the determined correlation between planarization length and the one or more chemical or physical properties of the pad to optimize planarization length.
21. The method of claim 16, further comprising:
identifying dishing and/or erosion from the model of a CMP process; and performing a sensitivity analysis to determine a correlation between the one or more chemical or physical properties of the pad and dishing and/or erosion.
identifying dishing and/or erosion from the model of a CMP process; and performing a sensitivity analysis to determine a correlation between the one or more chemical or physical properties of the pad and dishing and/or erosion.
22. The method of claim 21, wherein the value for the one or more chemical or physical properties is selected based on the determined correlation between the one or more chemical or physical properties of the pad and dishing and/or erosion to reduce dishing and/or erosion.
23. The method of claim 16, further comprising:
identifying over-polishing and/or under-polishing from the model of a CMP
process;
and performing a sensitivity analysis to determine a correlation between the one or more chemical or physical properties of the pad and over-polishing and/or under-polishing.
identifying over-polishing and/or under-polishing from the model of a CMP
process;
and performing a sensitivity analysis to determine a correlation between the one or more chemical or physical properties of the pad and over-polishing and/or under-polishing.
24. The method of claim 23, wherein the value for the one or more chemical or physical properties is selected based on the determined correlation between the one or more chemical or physical properties of the pad and over-polishing and/or under-polishing to reduce over-polishing and/or under-polishing.
25. A method of customizing of tribological or material properties of a pad used in a chemical mechanical polishing (CMP) process to planarize a metal or dielectric film having varying topographic or material characteristics on a substrate, the method comprising:
compensating for pattern density effects for different chip architecture during the CMP
process; and optimizing a derived planarization length, response characteristics for dishing and/or erosion, or final step height at specific pattern features to attain local and global planarization.
compensating for pattern density effects for different chip architecture during the CMP
process; and optimizing a derived planarization length, response characteristics for dishing and/or erosion, or final step height at specific pattern features to attain local and global planarization.
26. The method of claim 25, wherein the optimization is performed during planarization of a silicon integrated circuit.
27. The method of claim 25, wherein the optimization is performed during planarization of an optoelectronic device.
28. The method of claim 25, wherein the optimization is performed during planarization of a magnetic or optical disk.
29. The method of claim 25, wherein the optimization is performed during planarization of film on a ceramic or nano-composite substrate.
30. A polishing pad for chemical mechanical planarization of a semiconductor wafer, the pad having:
one or more chemical or physical properties, wherein a value for the one or more chemical or physical properties is selected based on one or more characteristics of the chip.
one or more chemical or physical properties, wherein a value for the one or more chemical or physical properties is selected based on one or more characteristics of the chip.
31. The pad of claim 30, wherein the value for the one or more chemical or physical properties is selected by:
obtaining a pattern density of the chip;
performing a simulation of a chemical mechanical planarization of the wafer with a model of a CMP process using the obtained pattern density of the chip and a range of values for the one or more chemical or physical properties of the pad; and selecting a value for one or more chemical or physical properties based on the simulation.
obtaining a pattern density of the chip;
performing a simulation of a chemical mechanical planarization of the wafer with a model of a CMP process using the obtained pattern density of the chip and a range of values for the one or more chemical or physical properties of the pad; and selecting a value for one or more chemical or physical properties based on the simulation.
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Families Citing this family (37)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7704125B2 (en) | 2003-03-24 | 2010-04-27 | Nexplanar Corporation | Customized polishing pads for CMP and methods of fabrication and use thereof |
TWI286964B (en) * | 2003-03-25 | 2007-09-21 | Neopad Technologies Corp | Customized polish pads for chemical mechanical planarization |
US8864859B2 (en) | 2003-03-25 | 2014-10-21 | Nexplanar Corporation | Customized polishing pads for CMP and methods of fabrication and use thereof |
US9278424B2 (en) | 2003-03-25 | 2016-03-08 | Nexplanar Corporation | Customized polishing pads for CMP and methods of fabrication and use thereof |
US8403727B1 (en) * | 2004-03-31 | 2013-03-26 | Lam Research Corporation | Pre-planarization system and method |
JP4971028B2 (en) * | 2007-05-16 | 2012-07-11 | 東洋ゴム工業株式会社 | Polishing pad manufacturing method |
US9180570B2 (en) | 2008-03-14 | 2015-11-10 | Nexplanar Corporation | Grooved CMP pad |
US8383003B2 (en) | 2008-06-20 | 2013-02-26 | Nexplanar Corporation | Polishing systems |
SG172286A1 (en) * | 2008-12-20 | 2011-07-28 | Cabot Microelectronics Corp | Wiresaw cutting method |
IL196146A (en) | 2008-12-23 | 2014-01-30 | Elta Systems Ltd | System and method of transmitting a signal back towards a transmitting source |
JP5393434B2 (en) * | 2008-12-26 | 2014-01-22 | 東洋ゴム工業株式会社 | Polishing pad and manufacturing method thereof |
JP5504901B2 (en) * | 2010-01-13 | 2014-05-28 | 株式会社Sumco | Polishing pad shape correction method |
US9017140B2 (en) | 2010-01-13 | 2015-04-28 | Nexplanar Corporation | CMP pad with local area transparency |
US9156124B2 (en) | 2010-07-08 | 2015-10-13 | Nexplanar Corporation | Soft polishing pad for polishing a semiconductor substrate |
US10722997B2 (en) | 2012-04-02 | 2020-07-28 | Thomas West, Inc. | Multilayer polishing pads made by the methods for centrifugal casting of polymer polish pads |
KR102100654B1 (en) | 2012-04-02 | 2020-04-14 | 토마스 웨스트 인코포레이티드 | Methods and systems for centrifugal casting of polymer polish pads and polishing pads made by the methods |
US10022842B2 (en) | 2012-04-02 | 2018-07-17 | Thomas West, Inc. | Method and systems to control optical transmissivity of a polish pad material |
KR102376599B1 (en) * | 2014-06-05 | 2022-03-21 | 토마스 웨스트 인코포레이티드 | Centrifugal casting of polymer polish pads |
US9873180B2 (en) | 2014-10-17 | 2018-01-23 | Applied Materials, Inc. | CMP pad construction with composite material properties using additive manufacturing processes |
US10399201B2 (en) | 2014-10-17 | 2019-09-03 | Applied Materials, Inc. | Advanced polishing pads having compositional gradients by use of an additive manufacturing process |
US10821573B2 (en) | 2014-10-17 | 2020-11-03 | Applied Materials, Inc. | Polishing pads produced by an additive manufacturing process |
SG10202002601QA (en) | 2014-10-17 | 2020-05-28 | Applied Materials Inc | Cmp pad construction with composite material properties using additive manufacturing processes |
US10875153B2 (en) | 2014-10-17 | 2020-12-29 | Applied Materials, Inc. | Advanced polishing pad materials and formulations |
US11745302B2 (en) | 2014-10-17 | 2023-09-05 | Applied Materials, Inc. | Methods and precursor formulations for forming advanced polishing pads by use of an additive manufacturing process |
US10875145B2 (en) | 2014-10-17 | 2020-12-29 | Applied Materials, Inc. | Polishing pads produced by an additive manufacturing process |
CA2931245C (en) | 2015-05-26 | 2023-07-25 | National Research Council Of Canada | Metallic surface with karstified relief, forming same, and high surface area metallic electrochemical interface |
CN108698206B (en) | 2016-01-19 | 2021-04-02 | 应用材料公司 | Porous chemical mechanical polishing pad |
US10391605B2 (en) | 2016-01-19 | 2019-08-27 | Applied Materials, Inc. | Method and apparatus for forming porous advanced polishing pads using an additive manufacturing process |
WO2018074091A1 (en) * | 2016-10-18 | 2018-04-26 | 株式会社 荏原製作所 | Substrate processing control system, substrate processing control method, and program |
US10596763B2 (en) | 2017-04-21 | 2020-03-24 | Applied Materials, Inc. | Additive manufacturing with array of energy sources |
US11471999B2 (en) | 2017-07-26 | 2022-10-18 | Applied Materials, Inc. | Integrated abrasive polishing pads and manufacturing methods |
US11072050B2 (en) | 2017-08-04 | 2021-07-27 | Applied Materials, Inc. | Polishing pad with window and manufacturing methods thereof |
WO2019032286A1 (en) | 2017-08-07 | 2019-02-14 | Applied Materials, Inc. | Abrasive delivery polishing pads and manufacturing methods thereof |
WO2020050932A1 (en) | 2018-09-04 | 2020-03-12 | Applied Materials, Inc. | Formulations for advanced polishing pads |
US11813712B2 (en) | 2019-12-20 | 2023-11-14 | Applied Materials, Inc. | Polishing pads having selectively arranged porosity |
US11806829B2 (en) | 2020-06-19 | 2023-11-07 | Applied Materials, Inc. | Advanced polishing pads and related polishing pad manufacturing methods |
US11878389B2 (en) | 2021-02-10 | 2024-01-23 | Applied Materials, Inc. | Structures formed using an additive manufacturing process for regenerating surface texture in situ |
Family Cites Families (91)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5197999A (en) | 1991-09-30 | 1993-03-30 | National Semiconductor Corporation | Polishing pad for planarization |
US5527215A (en) | 1992-01-10 | 1996-06-18 | Schlegel Corporation | Foam buffing pad having a finishing surface with a splash reducing configuration |
US5250085A (en) | 1993-01-15 | 1993-10-05 | Minnesota Mining And Manufacturing Company | Flexible bonded abrasive articles, methods of production and use |
US5435772A (en) | 1993-04-30 | 1995-07-25 | Motorola, Inc. | Method of polishing a semiconductor substrate |
US5526293A (en) * | 1993-12-17 | 1996-06-11 | Texas Instruments Inc. | System and method for controlling semiconductor wafer processing |
US5534106A (en) | 1994-07-26 | 1996-07-09 | Kabushiki Kaisha Toshiba | Apparatus for processing semiconductor wafers |
US5562530A (en) * | 1994-08-02 | 1996-10-08 | Sematech, Inc. | Pulsed-force chemical mechanical polishing |
US5698455A (en) * | 1995-02-09 | 1997-12-16 | Micron Technologies, Inc. | Method for predicting process characteristics of polyurethane pads |
US5552996A (en) * | 1995-02-16 | 1996-09-03 | International Business Machines Corporation | Method and system using the design pattern of IC chips in the processing thereof |
US5893796A (en) | 1995-03-28 | 1999-04-13 | Applied Materials, Inc. | Forming a transparent window in a polishing pad for a chemical mechanical polishing apparatus |
US5599423A (en) | 1995-06-30 | 1997-02-04 | Applied Materials, Inc. | Apparatus and method for simulating and optimizing a chemical mechanical polishing system |
US5605760A (en) | 1995-08-21 | 1997-02-25 | Rodel, Inc. | Polishing pads |
US5655951A (en) * | 1995-09-29 | 1997-08-12 | Micron Technology, Inc. | Method for selectively reconditioning a polishing pad used in chemical-mechanical planarization of semiconductor wafers |
US5690540A (en) | 1996-02-23 | 1997-11-25 | Micron Technology, Inc. | Spiral grooved polishing pad for chemical-mechanical planarization of semiconductor wafers |
US5637031A (en) * | 1996-06-07 | 1997-06-10 | Industrial Technology Research Institute | Electrochemical simulator for chemical-mechanical polishing (CMP) |
JPH10156705A (en) * | 1996-11-29 | 1998-06-16 | Sumitomo Metal Ind Ltd | Polishing device and polishing method |
JPH10217112A (en) * | 1997-02-06 | 1998-08-18 | Speedfam Co Ltd | Cmp device |
US5842910A (en) | 1997-03-10 | 1998-12-01 | International Business Machines Corporation | Off-center grooved polish pad for CMP |
US5944583A (en) | 1997-03-17 | 1999-08-31 | International Business Machines Corporation | Composite polish pad for CMP |
US7018282B1 (en) * | 1997-03-27 | 2006-03-28 | Koninklijke Philips Electronics N.V. | Customized polishing pad for selective process performance during chemical mechanical polishing |
US6062958A (en) | 1997-04-04 | 2000-05-16 | Micron Technology, Inc. | Variable abrasive polishing pad for mechanical and chemical-mechanical planarization |
US6022268A (en) | 1998-04-03 | 2000-02-08 | Rodel Holdings Inc. | Polishing pads and methods relating thereto |
US6682402B1 (en) | 1997-04-04 | 2004-01-27 | Rodel Holdings, Inc. | Polishing pads and methods relating thereto |
US6126532A (en) | 1997-04-18 | 2000-10-03 | Cabot Corporation | Polishing pads for a semiconductor substrate |
US6722962B1 (en) * | 1997-04-22 | 2004-04-20 | Sony Corporation | Polishing system, polishing method, polishing pad, and method of forming polishing pad |
US5921855A (en) | 1997-05-15 | 1999-07-13 | Applied Materials, Inc. | Polishing pad having a grooved pattern for use in a chemical mechanical polishing system |
US6168508B1 (en) | 1997-08-25 | 2001-01-02 | Lsi Logic Corporation | Polishing pad surface for improved process control |
JPH11156699A (en) | 1997-11-25 | 1999-06-15 | Speedfam Co Ltd | Surface polishing pad |
US5975991A (en) * | 1997-11-26 | 1999-11-02 | Speedfam-Ipec Corporation | Method and apparatus for processing workpieces with multiple polishing elements |
US6068539A (en) | 1998-03-10 | 2000-05-30 | Lam Research Corporation | Wafer polishing device with movable window |
US6753972B1 (en) * | 1998-04-21 | 2004-06-22 | Hitachi, Ltd. | Thin film thickness measuring method and apparatus, and method and apparatus for manufacturing a thin film device using the same |
US6169931B1 (en) * | 1998-07-29 | 2001-01-02 | Southwest Research Institute | Method and system for modeling, predicting and optimizing chemical mechanical polishing pad wear and extending pad life |
JP3019079B1 (en) * | 1998-10-15 | 2000-03-13 | 日本電気株式会社 | Chemical mechanical polishing equipment |
US6086460A (en) | 1998-11-09 | 2000-07-11 | Lam Research Corporation | Method and apparatus for conditioning a polishing pad used in chemical mechanical planarization |
GB2345255B (en) | 1998-12-29 | 2000-12-27 | United Microelectronics Corp | Chemical-Mechanical Polishing Pad |
US6179709B1 (en) | 1999-02-04 | 2001-01-30 | Applied Materials, Inc. | In-situ monitoring of linear substrate polishing operations |
US6315645B1 (en) * | 1999-04-14 | 2001-11-13 | Vlsi Technology, Inc. | Patterned polishing pad for use in chemical mechanical polishing of semiconductor wafers |
US6459945B1 (en) * | 1999-05-13 | 2002-10-01 | Advanced Micro Devices, Inc. | System and method for facilitating determining suitable material layer thickness in a semiconductor device fabrication process |
US6146242A (en) | 1999-06-11 | 2000-11-14 | Strasbaugh, Inc. | Optical view port for chemical mechanical planarization endpoint detection |
JP3646778B2 (en) * | 1999-06-17 | 2005-05-11 | 矢崎総業株式会社 | Terminal bracket |
KR100297732B1 (en) * | 1999-06-21 | 2001-11-01 | 윤종용 | Method for obtaining pattern density of a predetermined material layer of semiconductor device, and method for simulation of chemical mechanical polishing using the same |
US6171181B1 (en) | 1999-08-17 | 2001-01-09 | Rodel Holdings, Inc. | Molded polishing pad having integral window |
US6436830B1 (en) * | 1999-10-06 | 2002-08-20 | Agere Systems Guardian Corp. | CMP system for polishing semiconductor wafers and related method |
US6458289B1 (en) * | 1999-10-06 | 2002-10-01 | Agere Systems Guardian Corp. | CMP slurry for polishing semiconductor wafers and related methods |
US6214732B1 (en) * | 1999-11-01 | 2001-04-10 | Lucent Technologies, Inc. | Chemical mechanical polishing endpoint detection by monitoring component activity in effluent slurry |
US6258231B1 (en) * | 1999-11-01 | 2001-07-10 | Agere Systems Guardian Corp. | Chemical mechanical polishing endpoint apparatus using component activity in effluent slurry |
US6306019B1 (en) | 1999-12-30 | 2001-10-23 | Lam Research Corporation | Method and apparatus for conditioning a polishing pad |
US6375541B1 (en) * | 2000-01-14 | 2002-04-23 | Lucent Technologies, Inc. | Polishing fluid polishing method semiconductor device and semiconductor device fabrication method |
US6328633B1 (en) * | 2000-01-14 | 2001-12-11 | Agere Systems Guardian Corp. | Polishing fluid, polishing method, semiconductor device and semiconductor device fabrication method |
WO2001053040A1 (en) | 2000-01-19 | 2001-07-26 | Rodel Holdings, Inc. | Printing of polishing pads |
US6364744B1 (en) * | 2000-02-02 | 2002-04-02 | Agere Systems Guardian Corp. | CMP system and slurry for polishing semiconductor wafers and related method |
TW436379B (en) | 2000-02-11 | 2001-05-28 | Chartered Semiconductor Mfg | A scalable multi-pad design for improved CMP process |
US6599837B1 (en) * | 2000-02-29 | 2003-07-29 | Agere Systems Guardian Corp. | Chemical mechanical polishing composition and method of polishing metal layers using same |
US6368200B1 (en) * | 2000-03-02 | 2002-04-09 | Agere Systems Guardian Corporation | Polishing pads from closed-cell elastomer foam |
US6319095B1 (en) * | 2000-03-09 | 2001-11-20 | Agere Systems Guardian Corp. | Colloidal suspension of abrasive particles containing magnesium as CMP slurry |
US6461225B1 (en) * | 2000-04-11 | 2002-10-08 | Agere Systems Guardian Corp. | Local area alloying for preventing dishing of copper during chemical-mechanical polishing (CMP) |
US6454634B1 (en) | 2000-05-27 | 2002-09-24 | Rodel Holdings Inc. | Polishing pads for chemical mechanical planarization |
US6860802B1 (en) | 2000-05-27 | 2005-03-01 | Rohm And Haas Electric Materials Cmp Holdings, Inc. | Polishing pads for chemical mechanical planarization |
US6567718B1 (en) * | 2000-07-28 | 2003-05-20 | Advanced Micro Devices, Inc. | Method and apparatus for monitoring consumable performance |
JP3826702B2 (en) | 2000-10-24 | 2006-09-27 | Jsr株式会社 | Polishing pad composition and polishing pad using the same |
US6846225B2 (en) | 2000-11-29 | 2005-01-25 | Psiloquest, Inc. | Selective chemical-mechanical polishing properties of a cross-linked polymer and specific applications therefor |
KR100394572B1 (en) | 2000-12-28 | 2003-08-14 | 삼성전자주식회사 | multi characterized CMP pad structure and method for fabricating same |
US6544107B2 (en) * | 2001-02-16 | 2003-04-08 | Agere Systems Inc. | Composite polishing pads for chemical-mechanical polishing |
TW480616B (en) | 2001-03-01 | 2002-03-21 | United Microelectronics Corp | Chemical mechanical polishing system and apparatus |
US6802045B1 (en) * | 2001-04-19 | 2004-10-05 | Advanced Micro Devices, Inc. | Method and apparatus for incorporating control simulation environment |
JP2002331451A (en) | 2001-05-09 | 2002-11-19 | Nihon Micro Coating Co Ltd | Polishing foaming sheet and method of manufacture |
US7101799B2 (en) | 2001-06-19 | 2006-09-05 | Applied Materials, Inc. | Feedforward and feedback control for conditioning of chemical mechanical polishing pad |
US6910947B2 (en) * | 2001-06-19 | 2005-06-28 | Applied Materials, Inc. | Control of chemical mechanical polishing pad conditioner directional velocity to improve pad life |
US6544373B2 (en) | 2001-07-26 | 2003-04-08 | United Microelectronics Corp. | Polishing pad for a chemical mechanical polishing process |
DE10136742A1 (en) * | 2001-07-27 | 2003-02-13 | Infineon Technologies Ag | Method for characterizing the planarization properties of a consumable combination in a chemical-mechanical polishing process, simulation method and polishing method |
JP2003062748A (en) | 2001-08-24 | 2003-03-05 | Inoac Corp | Abrasive pad |
US6659846B2 (en) * | 2001-09-17 | 2003-12-09 | Agere Systems, Inc. | Pad for chemical mechanical polishing |
US6562185B2 (en) * | 2001-09-18 | 2003-05-13 | Advanced Micro Devices, Inc. | Wafer based temperature sensors for characterizing chemical mechanical polishing processes |
US7070480B2 (en) | 2001-10-11 | 2006-07-04 | Applied Materials, Inc. | Method and apparatus for polishing substrates |
US20030083003A1 (en) | 2001-10-29 | 2003-05-01 | West Thomas E. | Polishing pads and manufacturing methods |
US20030100250A1 (en) | 2001-10-29 | 2003-05-29 | West Thomas E. | Pads for CMP and polishing substrates |
KR100877389B1 (en) | 2001-11-13 | 2009-01-07 | 도요 고무 고교 가부시키가이샤 | Grinding pad and method of producing the same |
US20030139122A1 (en) | 2002-01-24 | 2003-07-24 | Lawing Andrew Scott | Polishing pad for a chemical mechanical planarization or polishing (CMP) system |
US20040171339A1 (en) | 2002-10-28 | 2004-09-02 | Cabot Microelectronics Corporation | Microporous polishing pads |
US6913517B2 (en) | 2002-05-23 | 2005-07-05 | Cabot Microelectronics Corporation | Microporous polishing pads |
US6752693B1 (en) * | 2002-07-26 | 2004-06-22 | Lam Research Corporation | Afferent-based polishing media for chemical mechanical planarization |
US6676483B1 (en) * | 2003-02-03 | 2004-01-13 | Rodel Holdings, Inc. | Anti-scattering layer for polishing pad windows |
US7377840B2 (en) | 2004-07-21 | 2008-05-27 | Neopad Technologies Corporation | Methods for producing in-situ grooves in chemical mechanical planarization (CMP) pads, and novel CMP pad designs |
US7704125B2 (en) | 2003-03-24 | 2010-04-27 | Nexplanar Corporation | Customized polishing pads for CMP and methods of fabrication and use thereof |
US20060189269A1 (en) | 2005-02-18 | 2006-08-24 | Roy Pradip K | Customized polishing pads for CMP and methods of fabrication and use thereof |
TWI286964B (en) | 2003-03-25 | 2007-09-21 | Neopad Technologies Corp | Customized polish pads for chemical mechanical planarization |
US20040209066A1 (en) | 2003-04-17 | 2004-10-21 | Swisher Robert G. | Polishing pad with window for planarization |
US20040235398A1 (en) | 2003-05-08 | 2004-11-25 | Thornton Brian S. | Chemical mechanical planarization method and apparatus for improved process uniformity, reduced topography and reduced defects |
KR100532440B1 (en) | 2003-06-05 | 2005-11-30 | 삼성전자주식회사 | Polishing pad having sealing barrier to protect fluid permeation onto window for a chemical mechanical polishing apparatus |
US6998166B2 (en) | 2003-06-17 | 2006-02-14 | Cabot Microelectronics Corporation | Polishing pad with oriented pore structure |
US20050042976A1 (en) | 2003-08-22 | 2005-02-24 | International Business Machines Corporation | Low friction planarizing/polishing pads and use thereof |
-
2004
- 2004-03-25 TW TW093108134A patent/TWI286964B/en active
- 2004-03-25 WO PCT/US2004/009535 patent/WO2004087375A1/en active Search and Examination
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- 2010-04-26 US US12/767,712 patent/US8380339B2/en active Active
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SG153668A1 (en) | 2009-07-29 |
US20050009448A1 (en) | 2005-01-13 |
US7704122B2 (en) | 2010-04-27 |
EP1610929B1 (en) | 2014-10-22 |
US20100273398A1 (en) | 2010-10-28 |
WO2004087375A1 (en) | 2004-10-14 |
TW200505635A (en) | 2005-02-16 |
SG185141A1 (en) | 2012-11-29 |
US7425172B2 (en) | 2008-09-16 |
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WO2004087375A8 (en) | 2004-12-09 |
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