CA2621145A1 - Transmitter architectures for communications systems - Google Patents

Transmitter architectures for communications systems Download PDF

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Publication number
CA2621145A1
CA2621145A1 CA002621145A CA2621145A CA2621145A1 CA 2621145 A1 CA2621145 A1 CA 2621145A1 CA 002621145 A CA002621145 A CA 002621145A CA 2621145 A CA2621145 A CA 2621145A CA 2621145 A1 CA2621145 A1 CA 2621145A1
Authority
CA
Canada
Prior art keywords
gain
transmitter
power amplifier
setting value
control signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA002621145A
Other languages
French (fr)
Other versions
CA2621145C (en
Inventor
Saed Younis
Emilija Simic
Thomas Wilborn
Haitao Zhang
Daniel Filipovic
Ralph Kaufman
Ming Lin (Jason) Yu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Inc
Original Assignee
Qualcomm Incorporated
Saed Younis
Emilija Simic
Thomas Wilborn
Haitao Zhang
Daniel Filipovic
Ralph Kaufman
Ming Lin (Jason) Yu
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Incorporated, Saed Younis, Emilija Simic, Thomas Wilborn, Haitao Zhang, Daniel Filipovic, Ralph Kaufman, Ming Lin (Jason) Yu filed Critical Qualcomm Incorporated
Publication of CA2621145A1 publication Critical patent/CA2621145A1/en
Application granted granted Critical
Publication of CA2621145C publication Critical patent/CA2621145C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02Transmitters
    • H04B1/04Circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G3/00Gain control in amplifiers or frequency changers without distortion of the input signal
    • H03G3/20Automatic control
    • H03G3/30Automatic control in amplifiers having semiconductor devices
    • H03G3/3036Automatic control in amplifiers having semiconductor devices in high-frequency amplifiers or in frequency-changers
    • H03G3/3042Automatic control in amplifiers having semiconductor devices in high-frequency amplifiers or in frequency-changers in modulators, frequency-changers, transmitters or power amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G1/00Details of arrangements for controlling amplification
    • H03G1/0005Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
    • H03G1/0088Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using discontinuously variable devices, e.g. switch-operated
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/72Indexing scheme relating to gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
    • H03F2203/7239Indexing scheme relating to gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal the gated amplifier being switched on or off by putting into parallel or not, by choosing between amplifiers and shunting lines by one or more switch(es)

Abstract

Transmitter architectures for a communications system having improved performance over conventional transmitter architectures. The improvements include a combination of the following: faster response time for the control signals, improved linearity, reduced interference, reduced power consumption, lower circuit complexity, and lower costs. For a cellular application, these improvements can lead to increased system capacity, smaller telephone size, increased talk and standby times, and greater acceptance of the product. Circuitry is provided to speed up the response time of a control signal. The control loop for various elements in the transmit signal path are integrated. A gain control mechanism allows for accurate adjustment of the output transmit power level. Control mechanisms are provided to power down the power amplifier, or th e entire transmit signal path, when not needed. The gains of the various elements in the transmit signal path are controlled to reduce transients in the output transmit power, and to also ensure that transients are downward.

Claims (54)

1. A method for adjusting a gain of a circuit element in a transmitter comprising:
receiving a gain control signal that includes gain setting values for the circuit element;
generating overdrive pulses corresponding to changes in the gain setting values in the gain control signal;
summing the overdrive pulses with the gain setting values to generate an adjusted control signal;
filtering the adjusted control signal to generate a filtered control signal; and adjusting the gain of the circuit element in accordance with the filtered control signal.
2. The method of claim 1, further comprising:
modulating the adjusted control signal with a pulse modulator to generate a modulator signal, wherein the filtering is performed on the modulator signal to generate the filtered control signal.
3. The method of claim 1, wherein the pulse modulator is a sigma-delta modulator.
4. The method of claim 1, wherein the overdrive pulses have amplitudes that are related to magnitudes of changes in the gain setting values.
5. The method of claim 1, wherein the overdrive pulses have programmable duration.
6. The method of claim 1, wherein the filtering is performed by a lowpass filter having an order greater than one.
7. The method of claim 1, wherein the circuit element is a variable gain amplifier.
8. A method for adjusting signal gain in a transmitter having a first gain element and a second gain element, wherein the first gain element responds to a first update clock and the second gain element responds to a second update clock, the first and second update clocks being asynchronous, the method comprising:
determining a first gain transfer characteristic of the first gain element;
determining a second gain transfer characteristic of the second gain element;
receiving a first gain setting value for the first gain element and a second gain setting value for the second gain element;
adjusting the second gain setting value with a particular gain offset value based on the first gain setting value;
determining a linearized gain setting value corresponding to the adjusted second gain setting value;
adjusting a gain of the first gain element with the first gain setting value; and adjusting a gain of the second gain element with the linearized gain setting value.
9. The method of claim 8, further comprising:
adjusting the gain of the first gain element at a first update time;
detecting a change in the first gain setting value; and if a change is detected, adjusting the gain of the second gain element at the first update time.
10. The method of claim 8, further comprising:
generating a gain compensation table based on the first and second gain transfer characteristics, and wherein the determining the linearized gain setting value is performed by retrieving the linearized gain setting value from the gain compensation table corresponding to the adjusted second gain setting value;
11. A method for adjusting signal gain in a transmitter having a first gain element and a second gain element, wherein the first gain element responds to a first update clock and the second gain element responds to a second update clock, wherein the second update clock is faster than the first update clock and the first and second update clocks are asynchronous, the method comprising:
receiving a first gain setting value for the first gain element and a second gain setting value for the second gain element;
generating a first gain control signal representative of the first gain setting value;
generating a second gain control signal representative of the second gain setting value;
aligning the first gain control signal with the first update clock;
detecting a change in gain setting value of the first gain element;
if a change in gain setting value is detected, aligning the second gain control signal with the first update clock;
if no change in gain setting value is detected, aligning the second gain control signal with the second update clock;
adjusting a gain of the first gain element with the aligned first gain control signal; and adjusting a gain of the second gain element with the aligned second gain control signal.
12. The method of claim 11, further comprising:
adjusting the second gain setting value with a particular gain offset value based on the first gain setting value, and wherein the second gain control signal is representative of the adjusted second gain setting value.
13. A method for providing linear adjustment of output power level from a transmitter, wherein the transmitter includes an element having a plurality of discrete gain settings and an element having a variable gain setting, the method comprising:
determining a gain transfer function of the transmitter for each of the plurality of discrete gain settings;
for each of the plurality of discrete gain settings, generating a gain compensation table based on the determined gain transfer function;
receiving a first gain setting value for the element having a plurality of discrete gain settings, wherein the first gain setting value identifies one of the plurality of discrete gain settings;
receiving a second gain setting value for the element having variable gain setting;
retrieving a compensated gain setting value from the gain compensation table corresponding to discrete gain setting identified by the first gain setting value;
adjusting a gain of the element having the plurality of discrete gain settings with the first gain setting value; and adjusting a gain of the element having the variable gain setting with the compensated gain setting value.
14. The method of claim 13, wherein the determining a gain transfer function comprises:
setting the element having the plurality of discrete gain settings to a particular gain setting;
stepping though a gain range of the element having the variable gain setting;
detecting output power level from the transmitter; and repeating the setting, stepping, and detecting for each of the plurality of discrete gain settings.
15. The method of claim 13, wherein the gain compensation tables are stored in a look up table.
16. The method of claim 13, wherein the second gain setting value includes a command to increase or decrease the output power level from the transmitter by a particular amount.
17. The method of claim 13, wherein each of the plurality of discrete gain settings is associated with a particular range of output power levels from the transmitter.
18. The method of claim 17, wherein the particular ranges of output power levels associated with the plurality of discrete gain settings overlap to create hysteresis.
19. The method of claim 17, wherein each particular range of output power levels associated with each discrete gain setting is extended to cover full dynamic range of required output power.
20. A method for controlling transients in an output power of a transmitter during a signal transmission, wherein the transmitter includes a first element having a first time response and a second gain element having a second time response, wherein the first time response is faster than the second time response, the method comprising:
receiving a first command to adjust a gain of the first element;
receiving a second command to adjust a gain of the second element;
delaying the first command by a particular time period;
adjusting the gain of the second gain element in accordance with the second command; and adjusting the gain of the first gain element in accordance with the delayed first command.
21. The method of claim 20, wherein the first command directs an increase in the gain of the first element and the second command directs a decrease in the gain of the second element.
22. The method of claim 20, wherein the first element is a power amplifier or a power amplifier driver in the transmitter.
23. The method of claim 20, wherein the second element is a variable gain element in the transmitter.
24. The method of claim 20, wherein the particular time period is selected to reduce increase in output power level of the transmitter due to adjustment of the gains of the first and second elements.
25. The method of claim 20, wherein the delaying is performed when the first command directs an increase in the gain of the first element.
26. The method of claim 20, wherein the particular time period is programmable by an input control value.
27. A method for controlling a power amplifier in a transmitter during a signal transmission comprising:
determining a required output transmit power level;
if the required output transmit power level is below a particular threshold, bypassing the power amplifier; and if the required output transmit power level exceeds the particular threshold, powering up the power amplifier for at least a particular warm up period, and selecting the power amplifier.
28. The method of claim 27, further comprising:
if the required output transmit power level is below a particular threshold, powering down the power amplifier.
29. The method of claim 27, wherein the selecting the power amplifier is performed at times corresponding to boundaries of transmitted code symbols.
30. The method of claim 27, wherein the bypassing the power amplifier is performed at times corresponding to boundaries of transmitted code symbols.
31. A method for controlling a power amplifier in a transmitter during a signal transmission comprising:
determining a required output transmit power level;
determining a required power amplifier gain based, in part, on the required output transmit power level;
if the required power amplifier gain is below a particular threshold, bypassing or powering down the power amplifier; and if the required power amplifier gain exceeds the particular threshold, powering up the power amplifier for at least a particular warm up period, and selecting the power amplifier.
32. The method of claim 31, wherein the selecting the power amplifier is performed at times corresponding to boundaries of transmitted code symbols.
33. A method for deactivating circuit elements in a transmit signal path during a signal transmission having periods of data transmission dispersed with periods of no data transmissions, the method comprising:
determining an existence or non-existence of data transmission from the transmit signal path;
if no data transmissions exist, powering down the elements in the transmitter signal path; and if data transmission exists, powering up the elements in the transmitter signal path for at least a particular warm up period prior to data transmission.
34. The method of claim 31, wherein the elements in a transmit signal path includes a variable gain element and a mixer in the transmit signal path.
35. The method of claim 31, wherein existence or non-existence of data transmission is defined over a particular time interval.
36. A transmitter in a communications system comprising:
a variable gain element configured to receive an input signal, the variable gain element having a variable gain covering a particular gain range;

and a power amplifier section coupled to the variable gain element, the power amplifier section having a plurality of discrete gain settings, wherein one of the plurality of discrete gain settings is a bypass setting, and wherein the particular gain range of the variable gain element is less than a full dynamic range provided by the transmitter.
37. The transmitter of claim 36, wherein the power amplifier section includes:
a power amplifier; and a bypass path coupled in parallel with the power amplifier via a first set of switches.
38. The transmitter of claim 37, wherein the power amplifier section further includes:
an attenuator coupled in parallel with the power amplifier via a second set of switches.
39. The transmitter of claim 37, wherein the power amplifier section further includes:
a driver coupled in series with the power amplifier.
40. The transmitter of claim 36, wherein the variable gain element is a variable gain amplifier.
41. The transmitter of claim 36, wherein the power amplifier section is placed in the bypass setting when a required output power level from the transmitter is below a particular threshold.
42. The transmitter of claim 41, wherein the power amplifier is powered down when placed in the bypass setting.
43. The transmitter of claim 36, wherein the variable gain element and power amplifier section are powered down when the transmitter is not transmitting.
44. The transmitter of claim 36, wherein the power amplifier section is controlled by a first set of at least one control signal having a first update rate, and the variable gain element is controlled by a second control signal having a second update rate.
45. The transmitter of claim 44, wherein the second control signal is adjusted for a particular gain offset based, in part, on control signals provided by a range control circuit.
46. The transmitter of claim 44, wherein the second update rate is faster than the first update rate.
47. The transmitter of claim 44, wherein the first update rate is determined by a first update clock and the second update rate is determined by a second update clock, wherein the first set of control signal is aligned with the first update clock and the second control signal is aligned with the second update clock.
48. The transmitter of claim 47, wherein the second control signal is aligned with the second update clock when no change in gain setting is detected for the power amplifier section, and aligned with the first update clock when a change in gain setting is detected for the power amplifier section.
49. The transmitter of claim 47, wherein the first set of control signal for the power amplifier section is delayed by a particular time period when an increase in gain setting is detected for the power amplifier section.
50. The transmitter of claim 36, further comprising:
a controller coupled to, and providing control signals for, the variable gain element and the power amplifier section.
51. The transmitter of claim 50, wherein the controller comprises:
a gain compensation circuit that implements a plurality of gain compensation tables, one table for each of the plurality of discrete gain settings.
52. The transmitter of claim 50, wherein the controller further comprises:
an interface circuit coupled to the gain compensation circuit.
53. The transmitter of claim 52, wherein the interface circuit includes:
a time response adjustment circuit that receives and input signal and generate and adjusted signal, wherein the adjusted signal includes overdrive pulses corresponding to detected changes in the input signal.
54. The transmitter of claim 53, wherein the interface circuit further includes:
a modulator coupled to the time response adjustment circuit, the modulator receives the adjusted signal and provides a modulator signal.
CA2621145A 2000-03-04 2001-03-02 Transmitter architectures for communications systems Expired - Fee Related CA2621145C (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/519,734 US6721368B1 (en) 2000-03-04 2000-03-04 Transmitter architectures for communications systems
US09/519,734 2000-03-04
CA2401891A CA2401891C (en) 2000-03-04 2001-03-02 Transmitter architectures for communications systems

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
CA2401891A Division CA2401891C (en) 2000-03-04 2001-03-02 Transmitter architectures for communications systems

Publications (2)

Publication Number Publication Date
CA2621145A1 true CA2621145A1 (en) 2001-09-13
CA2621145C CA2621145C (en) 2012-07-10

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Application Number Title Priority Date Filing Date
CA2621145A Expired - Fee Related CA2621145C (en) 2000-03-04 2001-03-02 Transmitter architectures for communications systems
CA2739521A Abandoned CA2739521A1 (en) 2000-03-04 2001-03-02 Transmitter architectures for communications systems
CA2702881A Expired - Fee Related CA2702881C (en) 2000-03-04 2001-03-02 Transmitter architectures for communications systems
CA2739554A Expired - Fee Related CA2739554C (en) 2000-03-04 2001-03-02 Transmitter architectures for communications systems
CA2621522A Expired - Fee Related CA2621522C (en) 2000-03-04 2001-03-02 Transmitter architectures for communications systems
CA2401891A Expired - Fee Related CA2401891C (en) 2000-03-04 2001-03-02 Transmitter architectures for communications systems

Family Applications After (5)

Application Number Title Priority Date Filing Date
CA2739521A Abandoned CA2739521A1 (en) 2000-03-04 2001-03-02 Transmitter architectures for communications systems
CA2702881A Expired - Fee Related CA2702881C (en) 2000-03-04 2001-03-02 Transmitter architectures for communications systems
CA2739554A Expired - Fee Related CA2739554C (en) 2000-03-04 2001-03-02 Transmitter architectures for communications systems
CA2621522A Expired - Fee Related CA2621522C (en) 2000-03-04 2001-03-02 Transmitter architectures for communications systems
CA2401891A Expired - Fee Related CA2401891C (en) 2000-03-04 2001-03-02 Transmitter architectures for communications systems

Country Status (16)

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US (1) US6721368B1 (en)
EP (4) EP2148436B1 (en)
JP (5) JP4965045B2 (en)
KR (4) KR100808750B1 (en)
CN (4) CN101557206B (en)
AT (2) ATE492941T1 (en)
AU (6) AU4338401A (en)
BR (1) BR0108969A (en)
CA (6) CA2621145C (en)
DE (2) DE60143721D1 (en)
ES (2) ES2335644T3 (en)
HK (2) HK1060404A1 (en)
IL (4) IL151084A0 (en)
MY (1) MY127914A (en)
RU (1) RU2258309C2 (en)
WO (1) WO2001067621A2 (en)

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