CA2796149A1 - Method for strengthening the implementation of ecdsa against power analysis - Google Patents

Abstract

A method of inhibiting the disclosure of confidential information through power analysis attacks on processors in cryptographic systems. The method masks a cryptographic operation using a generator. A secret value is combined with the generator to form a secret generator. The secret value is divided into a plurality of parts. A random value is generated for association with the plurality of parts. Each of the plurality of parts is combined with the random value to derive a plurality of new values such that the new values when combined are equivalent to the secret value. Each of the new values is used in the cryptographic operation, thereby using the secret generator in place of the generator G in the cryptographic operation. The introduction of randomness introduces of noise into algorithms used by cryptographic systems to mask the secret value and protect against power analysis attacks.

Description

1 Method for Strengthening the Implementation of ECDSA Against Power Analysis

2 Field of the Invention

3 This invention relates to a method for minimizing the vulnerability of cryptographic

4 systems to power analysis-type attacks.

Background of the Invention 6 Cryptographic systems generally owe their security to the fact that a particular piece of 7 information is kept secret. When a cryptographic algorithm is designed, it is usually assumed that 8 a potential attacker has access to only the public values. Without the secret information it is 9 computationally infeasible to break the scheme or the algorithm. Once an attacker is in possession of a piece of secret information they may be able to forge the signature of the victim and also 11 decrypt secret messages intended for the victim. Thus it is of paramount importance to maintain 12 the secrecy and integrity of the secret information in the system. The secret information is 13 generally stored within a secure boundary in the memory space of the cryptographic processor, 14 making it difficult for an attacker to gain direct access to the secret information. Manufacturers incorporate various types of tamper-proof hardware to prevent illicit access to the secret 10 information. In order to decide how much tamper proofing to implement in the cryptographic 17 system, the designers must consider the resources available to a potential attacker and the value of 18 the information being protected. The magnitude of these resources is used to determine how 19 much physical security to place within the device to thwart attackers who attempt to gain direct access to the secure memory. Tamper-proof devices can help prevent an attacker who is unwilling 21 or unable to spend large amounts of time and money from gaining direct access to the secret 22 information in the cryptographic system. Typically, the amount of work that is required to defeat 23 tamper proof hardware exceeds the value of the information being protected.

24 However, a new class of attacks has been developed on cryptographic systems that are relatively easy and inexpensive to mount in practice since they ignore the tamper-proof hardware.
26 Recent attacks on cryptographic systems have shown that devices with secure memory may leak 27 information that depends on the secret information, for example in the power usage of a processor 28 computing with private information. Such attacks take advantage of information provided by an 29 insecure channel in the device by using the channel in a method not anticipated by its designers, and so render redundant any tamper proofing in the device. Such insecure channels can be the 31 power supply, electromagnetic radiation, or the time taken to perform operations. At particular 32 risk are portable cryptographic tokens, including smart cards, pagers, personal digital assistants, 33 and the like. Smart cards are especially vulnerable since they rely on an external power supply, 1 whose output may be monitored non-intrusively. Access to the power supply is required for 2 proper functioning of the device and so is not usually prevented with tamper-proof hardware.

3 Further, constrained devices tend not to have large amounts of electromagnetic shielding.
4 Since the device is self-contained and dedicated, the power consumption and electromagnetic radiation of the smart card may be monitored as the various cryptographic algorithms are 6 executed. Thus in a constrained environment, such as a smart card, it may be possible for an 7 attacker to monitor an unsecured channel that leaks secret information. Such monitoring may 8 yield additional information that is intended to be secret which, when exposed, can significantly 9 weaken the security of a cryptographic system.

In response to the existence of such unsecured channels, manufacturers have attempted to 11 minimize the leakage of information from cryptographic devices, However, certain channels leak 12 information due to their physical characteristics and so it is difficult to completely eliminate 13 leakage. A determined attacker may be able to glean information by collecting a very large 14 number of samples and applying sophisticated statistical techniques. In addition, there are severe restrictions on what can be done in hardware on portable cryptographic tokens that are 16 constrained in terms of power consumption and size. As a result, cryptographic tokens are 17 particularly vulnerable to these types of attacks using unsecured channels.

18 The more recent attacks using the power supply that can be performed on these 19 particularly vulnerable devices are simple power analysis, differential power analysis, higher order differential power analysis, and other related techniques. These technically sophisticated 21 and extremely powerful analysis tools may be used by an attacker to extract secret keys from 22 cryptographic devices. It has been shown that these attacks can be mounted quickly and 23 inexpensively, and may be implemented using readily available hardware.

24 The amount of time required for these attacks depends on the type of attack and varies somewhat by device. For example it has been shown that simple power analysis (SPA) typically 26 takes a few seconds per card, while differential power analysis (DPA) can take several hours. In 27 order to perform SPA, the attacker usually only needs to monitor one cryptographic operation. To 28 perform DPA, many operations must be observed. In one method used, in order to monitor the 29 operations, a small resistor is connected in series to smart card's power supply and the voltage across the resistor is measured. The current used can he found by a simple computation based on 31 the voltage and the resistance. A plot of current against time is called a power trace and shows the 32 amount of current drawn by the processor during a cryptographic operation.
Since cryptographic 33 algorithms tend to perform different operations having different power requirements depending l on the value of the secret key, there is a correlation between the value of the secret key and the 2 power consumption of the device.

3 Laborious but careful analysis of end-to-end power traces can determine the fundamental 4 operation performed by the algorithm based on each bit of a secret key and thus, be analyzed to find the entire secret key, compromising the system. DPA primarily uses statistical analysis and 6 error correction techniques to extract information that may be correlated to secret keys, while the 7 SPA attacks use primarily visual inspection to identify relevant power fluctuations. In SPA, a 8 power trace is analyzed for any discernible features corresponding to bits of the secret key. The 9 amount of power consumed varies depending on the executed microprocessor instructions. For example, in a typical "square-and-multiply" algorithm for exponentiation, a bit I in the exponent l 1 will cause the program to perform both squaring and multiply operations, while a bit 0 will cause 12 the multiply operation to be skipped. An attacker may be able to read off the bits of a secret 13 exponent by detecting whether the multiply operation is performed at different bit positions.

A DPA attack attempts to detect more subtle features from the power traces and is more 16 difficult to prevent. To launch a DPA attack, a number of digital signatures are generated and the 17 corresponding power traces are collected. The power trace may be regarded as composed of two 18 distinct parts, namely signal and noise. The patterns that correspond to private key operations 19 tend to remain more or less constant throughout all power traces. These patterns maybe regarded as the signal. The other parts of the computation, which correspond to changing data, result in 21 differing patterns in each power trace. These patterns can be regarded as the noise. Statistical 22 analysis can be performed on all the power traces to separate the signal from the noise. The secret 23 value is then derived using the identified signal.

Various techniques for preventing these power analysis attacks have been attempted to 26 date. Manufacturers of smart cards and smart card processors have introduced random wait states 27 and address scrambling. Smart card algorithms avoid performing significantly different 28 operations depending on the value of a secret key and also avoid conditional jump instructions.
29 Hardware solutions include providing well-filtered power supplies and physical shielding of processor elements or the addition of noise unrelated to secrets. However, the vulnerabilities to 31 DPA result from transistor and circuit electrical behaviors that propagate to exposed logic gates, 32 microprocessor operation, and ultimately the software implementations, Cryptographic 33 algorithms to date have been designed with the assumption that there is no leakage of secret 34 information, however with the advent of successful power analysis attacks, it is no longer prudent 1 to assume that a cryptographic device which will leak no secret information can be manufactured.
2 Information stored in constrained environments is particularly difficult to protect against leakage 3 through an unsecured channel during cryptographic operations.

Accordingly, there is a need for a system for reducing the risk of a successful power 6 analysis attack and which is particularly applicable to current hardware environments.

8 Summary of the Invention:
9 In accordance with this invention, there is provided a method of inhibiting the disclosure of confidential information through power analysis attacks on processors in cryptographic 11 systems. The method of masking a cryptographic operation using a generator G comprises the 12 steps of.

13 a) generating a secret value, which may be combined with the generator G to form a 14 secret generator;

b) dividing the secret value into a plurality of parts;

16 C) generating a random value for association with the plurality of parts;

17 d) combining each of the plurality of parts with the random value to derive a 18 plurality of new values such that the new values when combined are equivalent 19 to the secret value; and e) using each of the new values in the cryptographic operation, thereby using the 21 secret generator in place of the generator G in the cryptographic operation.

23 The introduction of randomness facilitates the introduction of noise into algorithms used 24 by cryptographic systems so as to mask the secret value and provide protection against power analysis attacks.

28 Brief Description of the Drawings 29 An embodiment of the invention will now be described by way of example only with reference to the accompanying drawings in which:
31 Figure 1 is a schematic diagram of a constrained device;

1 Figure 2 is a schematic representation of steps of a method performed by the device of 2 Figure 1; and 3 Figure 3 is a flow diagram illustrating an embodiment of the invention.

Description of the Preferred Embodiments 6 A mechanism for protection against power analysis attacks on cryptographic systems 7 involves the introduction of random values into existing algorithms employed by cryptographic 8 systems. These random values are intended to introduce noise into the system.

This technique can be applied to a number of cryptographic systems, including 11 encryption algorithms, decryption algorithms, signature schemes, and the like. In the preferred 12 embodiment, the technique is applied to the ECDSA (elliptic curve digital signature algorithm) on 13 a constrained device, typically a smart card, in order to inhibit the leakage of secret information.

In the ECDSA, as described in the ANSI X9.62 standard, the public values are:
16 = The domain parameters: An elliptic curve group E generated by a point G, and a finite 17 field F.
18 = The signer's long-term public key D (corresponding to a long-term private key d).
19 = The signature (r, s).

Figure I shows generally a smart card (10) for use in a cryptographic system.
The smart 21 card incorporates a random number generator (RNG) (11), which may be implemented as 22 hardware or software. The card also includes a cryptographic module (CRYPTO) (14), which 23 may be for example a cryptographic co-processor or specialized software routines. The card 24 includes a memory space (13) for storage needed while making computations, and a parameter storage space (17,18,19,21) for storing the parameters G, G', 01, #, of the system. The card also 26 includes a secure memory space (15,16) for storing its private key it split into two parts d, and d,, 27 and a processor (12) which may be, for example, an arithmetic logic unit, an integrated circuit, or 28 a general purpose processing unit.

29 In order to generate a digital signature using an elliptic curve, the signer first computes an elliptic curve point K = kG, where k is a random number and G is the generating point of the 31 elliptic curve group. The value k is selected as a per-message secret key and the point K serves as 32 the corresponding per-message public key. The values k and K are also referred to as an

5 1 ephemeral private key and an ephemeral public key respectively. 't'hese values are used to 2 generate a signature (r, s) wherein:

3 K=kG;

4 r = K, mod it, where K.. is the x coordinate of K and n is the order of the generating point G: and

6 s = k "(e + dr) mod it, where e is the message to be signed.

7 The ANSI X9.62 standard provides techniques for interpreting the bit strings

8 corresponding to finite field elements as integers in the above calculations. The standard also

9 provides some guidelines on what elliptic curve groups and finite fields can be used.

Several algorithms, using both direct and indirect methods, may be used to compute kG
11 in order to obtain the elliptic curve point K. Algorithms to compute signature components are 12 potentially vulnerable to power analysis attacks since they perform different operations 13 depending on the bits in the secret values. Repeated iterations of the algorithm use the same 14 secret values, and so their power traces are statistically correlated to the secret values.

In order to mask a private key or other secret value to improve resistance to DPA-like 16 attacks, a random value is introduced into the algorithm as shown in Figure 2. This random value 17 avoids repeated use of a secret value in order to eliminate correlation among the power traces.
18 There will be no signal to differentiate from the background noise since no operation is repeated 19 on subsequent iterations of the algorithm.

In the ease of a long-term private key, the private key d is split into two parts d, and d, 21 such that d = d, + d,. As seen in figure 2, the card generates its private key d (110), then computes 22 the public key dG (112). The public key is sent to the server (114), which keeps it in a directory 23 for future use. A smart card is initialized with a private key d being split into the values 24 d, = d (1 18) and d, = 0 (116) as is illustrated in Figure 2. The initialization is performed either by embedding the private key at manufacture or by instructing the smart card to generate its own 26 private key. These initial values d; and C12 are stored in the device instead of storing the value for 27 d. Each time a digital signature is generated, a random value A is generated using the hardware 28 random number generator 11 and d, and d2 are updated as follows:

29 d, = d, ro,dt + A (mod n). and d, = dz (,,,d) - A (mod it).
The formula fors, one component of the digital signature, then becomes:
31 .c=k-'(e+(d,r4 d,r))modit.

1 When computing the above formula, the quantities d, and d, are essentially random 2 values because of the random quantity A that is introduced after each signature. When comparing 3 subsequent signatures, there is no correlation in the side channels to either the calculation of d,r 4 or d,r corresponding to the secret key d since the quantities d, and d2 are randomized in each successive signature but only together does the correlation to d emerge and this changes every 6 time. As a result, leakage of the private key d is minimized when computing the components of 7 the digital signature. However, the component r of the digital signature is also calculated using 8 the private key k and the calculation of r has still in the past been vulnerable to power analysis 9 type attacks. In order to compute r, the signer must compute kG and so information about the value of the secret key k may leak during the repeated group operations.

11 In order to protect the per-message secret key k during computation of r, the signer 12 modifies the group generator used. In order to mask the value of k, a random value /3 is 13 introduced and stored for each smart card such that G'=/3G where /3 is a random number 14 generated for each smart card. The point G' can be used as a secret generating point for each user, thus using the random value 0 to hide some information about k.

16 It is recognized that the sigmer's effective per-message secret key is kQ , corresponding 17 to the public key k/I G. The security is thus based on the secrecy of the derived value k,8, 18 which could be computed from k and P, both of which are secret. It is also recognized that the 19 per-message secret key may be regarded as k and the per-message public key as kG'. However, unless the point G' were shared publicly, knowledge of k alone would not permit the 21 computation of shared keys based on k(;'.

22 During smart card personalization, when the private/public key pair is generated on the 23 smart card, the point G' is computed. The introduction UP in the calculation of a digital 24 signature means the formula still contains a constant value, making it vulnerable to power analysis type attacks. In order to overcome these attacks, /3 is split into two parts /3, and 12.. and 26 those parts are updated by a random value it every time a signature is generated. This process is 27 detailed in Figure 3.

28 Qi =A (old) + 7r.
29 A = A (old) ~r.
in order to verify signatures produced in this manner, the verifier uses standard ECDSA
31 verification from ANSI X9.62 since the signer's secret key remains unchanged when using this 32 technique.

1 Thus the formulae for the ECDSA signature scheme in the preferred embodiment are:
2 K = kG';

3 r = K, mod n, where K,, is the x coordinate of K and n is the order of the point G'; and 4 s = (k(3, + k/37)-' (e + (d,r + d,r)) mod n.

Using these formulae to compute ECDSA signatures reduces the vulnerability of the (i algorithm to power analysis attacks. It is recognized that similar techniques may be applied to 7 other signatures. For example, ECNR or any other signature form could be used. These 8 techniques may also be used individually, not necessarily in combination.
Also, the ECDSA
9 signature equation is not a necessary component of these techniques.

Figure 3 shows the generation of a digital signature in accordance with the above 11 protocol. First, the signer generates a random private session key k (200), and stores k (210) for 12 future use in the algorithm. The signer updates the values Q1 (224) and /32 (226) as described 13 above by generating a random 7(222) and then computes the public session key r (220). The 14 signer then obtains the input message e or hash thereof (250). The signer then computes the signature s (260). The signer updates the private key parts d, (264) and d, (266) as described 16 earlier by generating a random A (262).

17 The inverse algorithm used in the generation of the digital signature to compute k1 is also 18 potentially vulnerable to power analysis attacks since it performs repeated operations on the 19 secret key every time a signature is generated. This vulnerability is reduced in a further embodiment by introducing a random it, and computing (kw)' instead of w'. The signing formula 21 works since k-' = w (ktv)'.

22 Thus the formulae for the ECDSA signature scheme in this embodiment are:
23 K=kG;

24 r = K, mod n, where K, is the x coordinate of K and n is the order of the point G ; and s = w(kw/3, + kw/32)"' (e -~= (d,r + d,r)) mod n.

26 Updating the parts of the private key may occur before or atler the generation of the 27 random w.

28 In a further embodiment, since G' . fl1G +f,G, the value of kG' can be computed as 29 (k/3,)G -,-(k/32 )G. In this way, the value of k is masked when computing kG', even if the value of /
is determined. The formula for K then becomes: K = (k,6, )G +(k,132 )G.

1 Although the invention has been described with reference to certain specific 2 embodiments, various modifications thereof will be apparent to those skilled in the art without 3 departing from the spirit and scope of the invention as outlined in the claims appended hereto. For 4 example, it is not necessary that there be two components combining to make the private key.

Claims (14)

1. A method of masking a cryptographic operation using a generating point G, said method comprising the steps of:
a) generating a secret value;
b) generating a masking value for association with said secret value;
c) applying said masking value to said secret value and said generating point G to obtain a new value corresponding to the combination of said secret value, said generating point G and said masking value for use as a session public key; and, d) using said new value in said cryptographic operation, thereby using a secret generating point corresponding to a combination of said masking value and said generating point G
in place of said generating point G in said cryptographic operation.

2. The method claim 1, wherein said masking value is divided into a plurality of parts and each of said parts is combined with a random value to provide a plurality of further values such that when said further values are combined a value equivalent to a session private key corresponding to said session public key is obtained.

3. The method of claim 1 or 2, wherein said further values are updated by said random value each time a digital signature is generated.

4. The method of claim 2 or claim 3, wherein said masking value, when divided into first and second parts, has said random value added said first part and subtracted from said second part such that the sum of said first and second parts and said associated random value is equivalent to said original secret value.

5. The method of claim 1, wherein said cryptographic system is an elliptic curve digital signature algorithm.

6. A computer readable medium comprising computer executable instructions for performing the method according to anyone of claims 1 to 5.

7. A cryptographic processor configured to perform the method according to anyone of claims 1 to 5.

8. A method of computing a public key corresponding to a private key d in a cryptosystem, wherein the cryptosystem uses a generator G, said method comprising the steps of:
a) representing a masking value 8 as a plurality of values which may be combined to obtain said masking value;
b) combining each of said plurality of values with said private key to obtain a plurality of private key components;
c) combining each of said plurality of private key components with said generator to obtain a plurality of public key components; and, d) combining said public key components to obtain said public key.

9. A method according to claim 8, wherein said plurality of public key components are combined by addition.

10. A method according to claim 8, wherein said plurality of values are combined with said private key by multiplication.

11. A method according to claim 8, wherein said plurality of private key components are combined with said generator G by exponentiation.

12. A method according to claim 8, wherein said public key is computed as (d.beta.1)G +(d.beta.2)G, wherein .beta.1 .beta.2 correspond to said plurality of values which may be combined to obtain said masking value.

13. A computer readable medium comprising computer executable instructions for performing the method according to anyone of claims 8 to 12.

14. A cryptographic processor configured to perform the method according to anyone of claims 8 to 12.