CA976661A - Self-aligned field effect transistor and charge-coupled device - Google Patents
Self-aligned field effect transistor and charge-coupled deviceInfo
- Publication number
- CA976661A CA976661A CA170,063A CA170063A CA976661A CA 976661 A CA976661 A CA 976661A CA 170063 A CA170063 A CA 170063A CA 976661 A CA976661 A CA 976661A
- Authority
- CA
- Canada
- Prior art keywords
- charge
- self
- field effect
- effect transistor
- coupled device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000005669 field effect Effects 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/762—Charge transfer devices
- H01L29/765—Charge-coupled devices
- H01L29/768—Charge-coupled devices with field effect produced by an insulated gate
- H01L29/76866—Surface Channel CCD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823406—Combination of charge coupled devices, i.e. CCD, or BBD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
- H01L27/1057—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components comprising charge coupled devices [CCD] or charge injection devices [CID]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1062—Channel region of field-effect devices of charge coupled devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42396—Gate electrodes for field effect devices for charge coupled devices
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/053—Field effect transistors fets
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/114—Nitrides of silicon
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/122—Polycrystalline
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US25750472A | 1972-05-30 | 1972-05-30 | |
US403745A US3865652A (en) | 1972-05-30 | 1973-10-05 | Method of forming self-aligned field effect transistor and charge-coupled device |
Publications (1)
Publication Number | Publication Date |
---|---|
CA976661A true CA976661A (en) | 1975-10-21 |
Family
ID=26946012
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA170,063A Expired CA976661A (en) | 1972-05-30 | 1973-04-24 | Self-aligned field effect transistor and charge-coupled device |
Country Status (5)
Country | Link |
---|---|
US (1) | US3865652A (en) |
CA (1) | CA976661A (en) |
DE (1) | DE2314260A1 (en) |
FR (1) | FR2186733B1 (en) |
GB (1) | GB1421363A (en) |
Families Citing this family (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3995302A (en) * | 1973-05-07 | 1976-11-30 | Fairchild Camera And Instrument Corporation | Transfer gate-less photosensor configuration |
US3967306A (en) * | 1973-08-01 | 1976-06-29 | Trw Inc. | Asymmetrical well charge coupled device |
FR2257145B1 (en) * | 1974-01-04 | 1976-11-26 | Commissariat Energie Atomique | |
US3931674A (en) * | 1974-02-08 | 1976-01-13 | Fairchild Camera And Instrument Corporation | Self aligned CCD element including two levels of electrodes and method of manufacture therefor |
US4001048A (en) * | 1974-06-26 | 1977-01-04 | Signetics Corporation | Method of making metal oxide semiconductor structures using ion implantation |
NL184591C (en) * | 1974-09-24 | 1989-09-01 | Philips Nv | CARGO TRANSFER. |
US3943542A (en) * | 1974-11-06 | 1976-03-09 | International Business Machines, Corporation | High reliability, low leakage, self-aligned silicon gate FET and method of fabricating same |
US4148132A (en) * | 1974-11-27 | 1979-04-10 | Trw Inc. | Method of fabricating a two-phase charge coupled device |
US3930893A (en) * | 1975-03-03 | 1976-01-06 | Honeywell Information Systems, Inc. | Conductivity connected charge-coupled device fabrication process |
US3950188A (en) * | 1975-05-12 | 1976-04-13 | Trw Inc. | Method of patterning polysilicon |
CA1101550A (en) * | 1975-07-23 | 1981-05-19 | Al F. Tasch, Jr. | Silicon gate ccd structure |
US4075045A (en) * | 1976-02-09 | 1978-02-21 | International Business Machines Corporation | Method for fabricating FET one-device memory cells with two layers of polycrystalline silicon and fabrication of integrated circuits containing arrays of the memory cells charge storage capacitors utilizing five basic pattern deliberating steps |
US4115914A (en) * | 1976-03-26 | 1978-09-26 | Hughes Aircraft Company | Electrically erasable non-volatile semiconductor memory |
US4021270A (en) * | 1976-06-28 | 1977-05-03 | Motorola, Inc. | Double master mask process for integrated circuit manufacture |
USRE30282E (en) * | 1976-06-28 | 1980-05-27 | Motorola, Inc. | Double master mask process for integrated circuit manufacture |
US4076557A (en) * | 1976-08-19 | 1978-02-28 | Honeywell Inc. | Method for providing semiconductor devices |
US4156247A (en) * | 1976-12-15 | 1979-05-22 | Electron Memories & Magnetic Corporation | Two-phase continuous poly silicon gate CCD |
US4553314B1 (en) * | 1977-01-26 | 2000-04-18 | Sgs Thomson Microelectronics | Method for making a semiconductor device |
CA1151295A (en) * | 1979-07-31 | 1983-08-02 | Alan Aitken | Dual resistivity mos devices and method of fabrication |
JPH0618263B2 (en) * | 1984-02-23 | 1994-03-09 | 日本電気株式会社 | Charge transfer device |
US4630090A (en) * | 1984-09-25 | 1986-12-16 | Texas Instruments Incorporated | Mercury cadmium telluride infrared focal plane devices having step insulator and process for making same |
FR2577715B1 (en) * | 1985-02-19 | 1987-03-20 | Thomson Csf | METHOD FOR PRODUCING TWO DIFFERENT JUXTAPOSED DIELECTRIC MOS STRUCTURES AND DIFFERENT DOPES AND FRAME TRANSFER MATRIX OBTAINED BY THIS PROCESS |
US4642877A (en) * | 1985-07-01 | 1987-02-17 | Texas Instruments Incorporated | Method for making charge coupled device (CCD)-complementary metal oxide semiconductor (CMOS) devices |
JPH0567767A (en) * | 1991-03-06 | 1993-03-19 | Matsushita Electron Corp | Solid-state image pick-up device and manufacture thereof |
JP2642523B2 (en) * | 1991-03-19 | 1997-08-20 | 株式会社東芝 | Method of manufacturing semiconductor integrated circuit device having charge-coupled device |
US6780718B2 (en) * | 1993-11-30 | 2004-08-24 | Stmicroelectronics, Inc. | Transistor structure and method for making same |
JP3150050B2 (en) * | 1995-03-30 | 2001-03-26 | 日本電気株式会社 | Charge coupled device and method of manufacturing the same |
JP4430918B2 (en) * | 2003-03-25 | 2010-03-10 | 東京エレクトロン株式会社 | Thin film forming apparatus cleaning method and thin film forming method |
US7179676B2 (en) * | 2005-03-28 | 2007-02-20 | Kenet, Inc. | Manufacturing CCDs in a conventional CMOS process |
US7846760B2 (en) * | 2006-05-31 | 2010-12-07 | Kenet, Inc. | Doped plug for CCD gaps |
US10026642B2 (en) | 2016-03-07 | 2018-07-17 | Sunedison Semiconductor Limited (Uen201334164H) | Semiconductor on insulator structure comprising a sacrificial layer and method of manufacture thereof |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3519504A (en) * | 1967-01-13 | 1970-07-07 | Ibm | Method for etching silicon nitride films with sharp edge definition |
US3475234A (en) * | 1967-03-27 | 1969-10-28 | Bell Telephone Labor Inc | Method for making mis structures |
US3615940A (en) * | 1969-03-24 | 1971-10-26 | Motorola Inc | Method of forming a silicon nitride diffusion mask |
US3698966A (en) * | 1970-02-26 | 1972-10-17 | North American Rockwell | Processes using a masking layer for producing field effect devices having oxide isolation |
-
1973
- 1973-03-22 DE DE19732314260 patent/DE2314260A1/en not_active Withdrawn
- 1973-04-10 FR FR7313799A patent/FR2186733B1/fr not_active Expired
- 1973-04-18 GB GB1858973A patent/GB1421363A/en not_active Expired
- 1973-04-24 CA CA170,063A patent/CA976661A/en not_active Expired
- 1973-10-05 US US403745A patent/US3865652A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US3865652A (en) | 1975-02-11 |
FR2186733A1 (en) | 1974-01-11 |
GB1421363A (en) | 1976-01-14 |
FR2186733B1 (en) | 1977-08-19 |
DE2314260A1 (en) | 1973-12-13 |
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