CN100334720C - 连接垫结构 - Google Patents

连接垫结构 Download PDF

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Publication number
CN100334720C
CN100334720C CNB2004100500140A CN200410050014A CN100334720C CN 100334720 C CN100334720 C CN 100334720C CN B2004100500140 A CNB2004100500140 A CN B2004100500140A CN 200410050014 A CN200410050014 A CN 200410050014A CN 100334720 C CN100334720 C CN 100334720C
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conductive layer
connection gasket
layer
dielectric layer
structure according
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CN1612333A (zh
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洪盟琪
侯上勇
郑心圃
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Abstract

一种连接垫结构，包括一基底包含有一连接区域以及一检测区域。一第一介电层形成于该基底上，且包含有一环状沟槽以及一相对应形成一介电层岛状结构。一第一导电层形成于该第一介电层的该环状沟槽中。一保护层形成于该第一介电层上且包含有一开口，其中该开口的位置是相对应于该连接区域以及该检测区域，且该开口暴露该介电层岛状结构以一部分的该第一导电层。一第二导电层覆盖该保护层的开口，且电连接至该第一导电层。

Description

连接垫结构
技术领域
本发明有关于一种集成电路技术，特别有关一种连接垫结构。
背景技术
连接垫(bonding pad)为一制作有集成电路(IC)的半导体芯片与一封装组件之间的桥接接口。在现今的高线路密度IC设计中，为了要缩小连接垫的间距与尺寸，必需大幅增加接脚(pin)与连接垫的数量，但是在接合过程中所产生的高机械应力却容易使小尺寸的连接垫产生缺陷。
传统接合技术利用引线接合(wire bonding)、卷带自动接合(tapeautomated bonding，TAB)或倒装芯片(flip chip)等方式，将各个连接垫连接至封装组件的载置IC表面上的一个或多个接触垫上。但是，利用探针方式对IC芯片电性测试时，探针(probe pin)容易损害连接垫的软性表面。而且，传统技术将铝铜合金(AlCu)连接垫下方的铜(Cu)层暴露于空气中，有可能使铜层遭受侵蚀而产生孔洞，则孔洞会间接侵蚀连接垫而降低引线接合的可靠度。近来技术是将实心块状的铜层作为一顶部金属层以连接至上方一铝垫，但是仍发现有孔洞缺陷、引线接合容忍度过小、打线球接点举离、介电层破裂等缺点，因此目前已针对顶部铜层提出数种改良型式，如下列所述。甚且，为了解决上述问题，目前已将连接垫区分为一连接区域以及一检测区域，其中检测区域可允许相当程度的损害，因此探针仅直接接触检测区域。
美国专利第6,552,438号揭示一种连接垫，多个独立的金属插塞形成于一层间介电层的阵列接触洞中，且每个金属插塞的底部连接至一下铝(Al)层，每个金属插塞的顶部连接至一上铝垫。此外，一保护层覆盖上铝垫，且暴露上铝垫的一用以进行引线接合的预定连接区域。现有另一种连接垫将一顶部金属层填满一层间介电层的格子状沟槽，以构成多个介电层岛状结构。此外，一保护层覆盖顶部金属层，且暴露顶部金属层的一预定连接区域，则一铝垫可制作于顶部金属层的预定连接区域上，后续进行引线接合工艺便可将一金属线球接合至铝垫上。
上述的两种连接垫具有以下缺点。在芯片分类、引线接合或探针测试的过程中，施加的外力或伴随产生的高机械应力会使探针测试区域附近的层间介电层发生破痕缺陷，且此裂痕会朝向介电层的内部延伸而环绕顶部金属层，进而导致侵蚀与层离的问题。如此一来，铝垫容易自顶部金属层剥离，则打线无法接触到脱落的连接垫，会有引线接合的可靠度不佳的疑虑。而且，碍于接触垫易受机械应力的影响而诱发缺陷，接触垫之间距与尺寸均无法再进一步缩小，如此会限制下个世代技术的芯片尺寸缩小设计。此外，在独立金属插塞或介电层岛状结构的高密度配置的情况下，引线接合的过程中也会发生找不到连接垫的问题。
美国专利第6,566,752号揭示另一种连接垫，一顶部金属环形成于一层间介电层的环型沟槽内，一保护层形成于层间介电层上且包含有多个孔洞以暴露顶部金属环，以及一铝垫形成于保护层上且可经由多个孔洞而与顶部金属环形成电性连接效果。不过，孔洞的尺寸与数量设计会限制金属环的宽度，所以在光刻工艺中易发生对不准(misalignment)的问题，进而影响于有效区域内制作连接垫的位置准确度。
发明内容
有鉴于此，本发明的主要目的就在于提供一连接垫结构的顶部金属层，可使检测区域内的金属垫下方成为一无金属区域或一少量金属区域。
为达成上述目的，本发明提供一种连接垫结构。一基底包含有一连接区域以及一检测区域，一第一介电层形成于该基底上，且包含有一环状沟槽以及一相对应形成一介电层岛状结构。一第一导电层形成于该第一介电层的该环状沟槽中。一保护层，形成于该第一介电层上且包含有一开口，其中该开口的位置相对应于该连接区域以及该检测区域，且该开口暴露该介电层岛状结构以一部分的该第一导电层。一第二导电层覆盖该保护层的开口，且电连接至该第一导电层。
本发明的另一目的就在于提供一连接垫结构的保护层的开口设计，可以保护检测区域内的金属垫下方的顶部金属层。
为达成上述目的，本发明提供一种连接垫结构。一基底包含有一连接区域以及一检测区域。一第一介电层形成于该基底上，且包含有一沟槽。一第一导电层形成于该第一介电层的该沟槽中。一保护层形成于该第一介电层上且包含有一开口，其中该开口的位置相对应于该连接区域，且该开口覆盖该检测区域内的该第一导电层。一第二导电层形成于该连接区域以及该检测区域上，其中该第二导电层覆盖该保护层的开口以电连接至该第一导电层。
附图说明
图1显示一包含有本发明的连接垫结构的芯片的俯视图。
图2A显示本发明第一实施例的连接垫结构的剖面示意图。
图2B显示图2A所示的导电环的俯视图。
图3A显示导电环下方的另一导电环的剖面示意图。
图3B显示导电环下方的一格子状导电层的剖面示意图。
图3C显示导电环下方的一实心块状导电层的剖面示意图。
图4A～图4F显示导电环的轮廓设计的俯视图。
图5A～图5F显示导电垫的轮廓设计的俯视图。
图6A显示导电环的转角切口区域的俯视图。
图6B显示导电垫的转角切口区域的俯视图。
图7A显示导电环的标记凹痕的俯视图。
图7B显示导电垫的标记凹痕的俯视图。
图8A显示导电环的标记凹痕与转角切口区域的俯视图。
图8B显示导电垫的标记凹痕与转角切口区域的俯视图。
图9A显示连接垫结构附近的一CUP结构的剖面示意图。
图9B显示导电环与CUP结构的俯视图。
图10A显示未制作阻挡层的CUP结构的剖面示意图。
图10B显示于两层导电环下方制作CUP结构的剖面示意图。
图11A显示本发明第二实施例的连接垫结构的剖面示意图。
图11B显示图11A所示的导电环与保护层的俯视图。
图12A显示将第一导电层制作成为的一格子状的剖面示意图。
图12B显示图12A所示的第一导电层的俯视图。
图13A显示将第一导电层制作成为独立插塞的剖面示意图。
图13B显示图13A所示的第一导电层的俯视图。
图14A显示将第一导电层制作成为的一实心体的剖面示意图。
图14B显示图14A所示的第一导电层的俯视图。
符号说明：
芯片的主要区域～10；
第一切割道～12；
第二切割道～14；
有效区域～16；
周边区域～18；
连接垫结构～20；
半导体基底～22；
连接区域～I；
检测区域～II；
第一介电层～24；介电层岛状结构～24a；介电层标记～24b；
沟槽～25；
第一导电层～26；导电环～26；延伸部分～26a；
阻挡层～28；
保护层～30；保护层标记～30b；
开口～31；
第二导电层～32；导电垫～32；
连接单元～34；
第二介电层～36；介电层岛状结构～36a；
第三导电层～38；延伸部分～38a；
导电插塞～40；
转角切口区域～42、44；
斜边～41、43；
标记凹痕～46；底部～46I；侧壁～46II、46III；
标记凹痕～48；底部～48I；侧壁～48II、48III；
CUP结构～50；
阻挡层～52；
电路图案～54；
导电插塞～56；
接触洞～57；
最下层导电层～58。
具体实施方式
本发明提供一种连接垫结构的顶部金属层，可使检测区域内的金属垫下方成为一无金属区域或一少量金属区域。本发明更提供一种连接垫结构的保护层的开口设计，可以保护检测区域内的金属垫下方的顶部金属层。本发明可有效防止顶部金属层因探针测试而产生的侵蚀问题，也可提高引线接合忍受度、消除内层介电层的裂痕疑虑，还可防止金属垫自顶部金属层剥落的问题，更可改善连接垫寻找功能(连接垫确认功能)，以及可符合连接垫的缩小间距的需求。本发明的连接垫结构可允许制作于周边电路区域、有效区域、切割道或其组合区域上。
图1显示一包含本发明连接垫结构的芯片的俯视图。一半导体芯片包含有多个实质隔绝的芯片，多条沿一第一方向延伸的第一切割道12与多条沿一第二方向延伸的第二切割道14可错配置以定义一芯片的主要区域10。一芯片的主要区域10上制作有电路，且包含有一有效区域16以及一周边区域18。多个连接垫结构20可允许制作于周边区域18、有效区域16、第一切割道12、第二切割道14或其组合区域上。多个连接垫结构20可排列成为一直线或错开排列，则其下方制作的电路单元称为一连接垫下方电路(circuit underpad，CUP)结构。
以下详细描述连接垫结构20的顶部金属层与保护层开口的设计，可于使检测区域内的金属垫下方成为一无金属区域或一少量金属区域。为了让本发明的上述和其它目的、特征、和优点能更明显易懂，下文特举较佳实施例，并配合所附图示，作详细说明如下：
第一实施例
本发明第一实施例提供连接垫结构20的顶部金属层的设计，可于使检测区域内的金属垫下方成为一无金属区域或一少量金属区域。
图2A显示本发明第一实施例的连接垫结构的剖面示意图。图2B显示图2A所示的导电环的俯视图。
一半导体基底22内包含有部分完成的集成电路，且定义有一连接区域I以及一检测区域II，连接区域I用以接合一线球或一凸块，检测区域II用以进行探针测试或其它工具测试。一第一介电层24用作为基底22的顶部介电层(最高阶段介电材质)，其包含有一环状沟槽25以及一相对应形成的介电层岛状结构24a。一第一导电层26用作为基底22的顶部金属层(最上层内部连线)，其乃填满环状沟槽25以成为一导电环26，则可环绕介电层岛状结构24a。一保护层30形成于第一介电层24上且包含有一开口31，开口31的位置涵盖连接区域I以及检测区域II，且开口31可暴露介电层岛状结构24a以及导电环26的一充分区域。一第二导电层32形成于连接区域I以及检测区域II的第一介电层24与保护层30上，第二导电层32用作为一导电垫32，且不需经由任何的接触洞便可直接连接至下方的导电环26。一连接单元34可为一线球或一凸块，接合于连接区域I内的导电垫32上。另外，一阻挡层28形成于导电垫32与导电环26的接面处，可以提高导电垫32与导电环26的接合性。
第一介电层24的材质可为电浆氧化物、高密度电浆(HDP)氧化物、具有高度抗机械应力性质的介电材质、低介电常数材质、氟硅玻璃(FSG)或硅基介电材质。导电环26的材质可为铜、铝、铝铜合金、铜锰合金或其它含铜合金。导电环26的宽度约为1～50μm，厚度约为0.5～2μm。位于检测区域II内的导电环26的面积比例R1符合下列公式：R1＝Ar/As，且0≤R1≤30％，其中Ar代表检测区域II内的导电环26的面积，As代表检测区域II的面积。阻挡层28的材质可为钛(Ti)、氮化钛(TiN)、钨(W)、氮化钨(WN)、钽(Ta)、氮化钽(TaN)或其组合。导电垫32的材质可为铝、铝铜合金或其它含铝合金。接合单元34可为一引线接合技术所使用的金球或一倒装芯片技术所使用的凸块。
依据顶部金属层的设计规则，导电环26占据检测区域II的一个小区域，且此小区域为一无金属区域或一少量金属区域，如此可以解决现有连接垫所产生的问题，并可达成以下优点。第一，该无金属区域或少量金属区域可有效减少裂痕自第一介电层24延伸至导电环26的可能性，进而防止侵蚀与层离的问题。第二，该无金属区域或少量金属区域可防止导电垫32自导电环26或第一介电层24上剥离，故能消除连接垫脱落的现象，并确保接合工艺的可靠度。第三，由于导电环26不易因高机械应力的影响而产生缺陷，因此连接垫结构20的间距与尺寸可更近一步缩小，以符合下一世代技术的缩小芯片尺寸的需求。第四，因为介电层岛状结构24a具有平坦表面且被导电环26所围绕，故可大幅提升引线接合机台的搜寻连接垫的功能与精确度。第五，导电环26直接与导电垫32接触而毋需仰赖接触洞或接触插塞，故可解决导电环26的宽度限制与光刻工艺的对不准问题，且导电环26与导电垫32的图案设计可更为多样化。
以下详细说明导电环26与导电垫32的图案设计的变化。
第一例
符合前述的顶部金属层的设计条件下，形成于导电环26下方的内部连线图案可设计为环状、格子状、岛状或实心块状。
图3A显示导电环26下方的另一导电环的剖面示意图。相似于图2A所示的组件，于此省略叙述。一第二介电层36形成于第一介电层24的下方，一第三导电层38制作成为一环状轮廓且嵌埋于第二介电层36内，以及一导电插塞40形成于第二介电层中36且可提供第三导电层38与导电环26的电性接效果。
图3B显示导电环26下方的一格子状导电层的剖面示意图。相似于图3A所示的组件，于此省略叙述。不同之处在于，第三导电层38制作成为一格子状导电层，则格子状导电层内的第二介电层36可相对应地成为矩阵排列的介电层岛状结构36a，亦即第三导电层38可使介电层岛状结构36a之间互相隔离。或者是，第三导电层38制作成为矩阵排列的独立插塞，则第二介电层36可使独立插塞之间互相隔离。
图3C显示导电环26下方的一实心块状导电层的剖面示意图。相似于图3A所示的组件，于此省略叙述。不同之处在于，第三导电层38制作成为实心块状。
第二例
符合前述的顶部金属层的设计条件下，导电环26、导电垫32或其组合的图案轮廓可设计成为各种几何图形。
图4A～图4F显示导电环26的轮廓设计的俯视图。导电环26的轮廓可为一四方环，则相对应形成的介电层岛状结构24a成为一四方实心体。如图4A所示，导电环26的轮廓为一正方环，则相对应形成的介电层岛状结构24a成为一正方实心体。如图4B所示，导电环26的轮廓为一长方环，则相对应形成的介电层岛状结构24a成为一长方实心体。导电环26的轮廓可为一圆环，则相对应形成的介电层岛状结构24a成为一圆形实心体。如图4C所示，导电环26的轮廓为一正圆形环，则相对应形成的介电层岛状结构24a成为一正圆形实心体。如图4D所示，导电环26的轮廓为一椭圆形环，则相对应形成的介电层岛状结构24a成为一椭圆形实心体。导电环26的轮廓可为一多边形环，则相对应形成的介电层岛状结构24a成为一多边形实心体。如图4E所示，导电环26的轮廓为一六边形环，则相对应形成的介电层岛状结构24a成为一六边形实心体。如图4F所示，导电环26的轮廓为一八边形环，则相对应形成的介电层岛状结构24a成为一八边形实心体。
图5A～图5F显示导电垫32的轮廓设计的俯视图。导电垫32可制作成各种几何图案的实心体，但必须能确保导电垫32与导电环26之间的电连接可靠度。图5A所示的导电垫32为一正方形实心体，图5B所示的导电垫32为一长方形实心体，图5C所示的导电垫32为一正圆形实心体，图5D所示的导电垫32为一椭圆形实心体，图5E所示的导电垫32为一六边形实心体，图5F所示的导电垫32为一八边形实心体。
第三例
符合前述的顶部金属层的设计条件下，当导电环26或导电垫32的轮廓制作为四边形图案，则该四边形图案包含有至少一转角切口(corner cut)区域，用以防止剥离问题。
图6A显示导电环26的转角切口区域的俯视图。相似于图2B所示的组件，于此省略叙述。四边形环状的导电环26的四个转角处制作有四个转角切口区域42，转角切口区域42内禁止制作第一导电层26但可允许制作第一介电层24。较佳者为，转角切口区域42为一直角三角形，其斜边41的长度约为0.5～5μm，其斜边41与X轴的夹角θ1为10°～80°。而且，一面积比例R2符合下列公式：R2＝At1/Ac1，且0＜R2＜80％，其中At1代表转角切口区域42的面积，Ac1代表导电环26的转角区域面积。转角区域面积Ac1符合下列公式：Ac1＝W1×W2，其中W1代表导电环26的沿X轴方向的宽度，W2代表导电环26的沿Y轴方向的宽度。较佳者为，W1为1～10μm，W2为1～10μm。
图6B显示导电垫32的转角切口区域的俯视图。四边形实心体的导电垫32的四个转角处制作有四个转角切口区域44，转角切口区域44内禁止制作第二导电层32但可允许制作保护层30。较佳者为，转角切口区域44为一直角三角形，其斜边43的长度约为0.5～10μm，其斜边43与X轴的夹角θ2为10°～80°。
第四例
为了要清楚区别出检测区域II与连接区域I，可于导电环26、导电垫32或其组合上提供一标记凹痕(marking notch)。
图7A显示导电环26的标记凹痕的俯视图。相似于图2B所示的组件，于此省略叙述。导电环26包含有两个标记凹痕46，则两个标记凹痕46所环绕的第一介电层24相对应成为两个介电层标记24b。两个标记凹痕46的位置约略对齐成一直线以区隔检测区域II与连接区域I。每个标记凹痕46均包含有一底部46I以及两个侧壁46II、46III，一距离L1代表侧壁46III至导电环26边缘之间沿第一方向的距离，用以定义连接区域I的范围。一第一长度S1代表介电层标记24b的平行于底部46I的长度，一第二长度S2代表介电层标记24b的平行于侧壁46II、46III的长度。较佳者为，L1约为40～60μm，S1约为1～3μm，S2约为0.5～2μm.
图7B显示导电垫32的标记凹痕的俯视图。相似于图2B所示的组件，于此省略叙述。导电垫32包含有两个标记凹痕48，则两个标记凹痕48所环绕的保护层30相对应成为两个保护层标记30b。两个标记凹痕48的位置约略对齐成一直线以区隔检测区域II与连接区域I。每个标记凹痕48均包含有一底部48I以及两个侧壁48II、48III，一距离L2代表侧壁48III至导电垫32边缘之间沿第一方向的距离，用以定义连接区域I的范围。一第一长度S1代表保护层标记30b的平行于底部48I的长度，一第二长度S2代表保护层标记30b的平行于侧壁48II、48III的长度。较佳者为，L2约为40～60μm，S1约为1～3μm，S2约为0.5～2μm.
除此之外，标记凹痕的设计可与图6A～图6B所述的转角切口区域设计结合。图8A显示导电环26的标记凹痕46与转角切口区域42的俯视图。图8B显示导电垫32的标记凹痕48与转角切口区域44的俯视图。相似于图6～图7所示的组件特征，于此省略叙述。
第五例
符合前述的顶部金属层的设计条件下，可于导电环26的延伸部分制作一CUP结构，其可缩短部分导线而降低其电感与电阻，进而降低电路的耦合电容。
图9A显示连接垫结构20附近的一CUP结构50的剖面示意图，图9B显示导电环26与CUP结构50的俯视图。相似于图6～图7所示的组件特征，于此省略叙述。导电环26包含有一延伸部分26a，自导电环26的一边端延伸至连接区域I与检测区域II以外的区域III。一CUP结构50形成于延伸部分26a的附近。一阻挡层52形成于第一介电层24的下方，且其内部制作有一电路图案54。第一介电层24中制作有多个接触洞57，且多个接触洞57内制作有多个导电插塞56，则延伸部分26a可经由接触洞57以及导电插塞56而电连接至电路图案54。而且，电路图案54也可经由内部连线的设计而电连接至一最下层导电层58。较佳者为，应用于讯号电路图案时，接触洞57的数量较少；而应用于电源电路图案时，接触洞57的数量较多。此外，结合上述的导电环26与CUP结构50的条件下，阻挡层52的制作可为选择性的，且导电环26下方的导电层图案可作各种变化。
图10A显示未制作阻挡层52的CUP结构50的剖面示意图。相似于图9A所示的组件特征，于此省略叙述。不同之处在于省略阻挡层52的制作，因此CUP结构50形成于第一介电层24之中。
图10B显示于两层导电环下方制作CUP结构50的剖面示意图。相似于图9A所示的组件特征，于此省略叙述。不同之处在于第二介电层36形成于第一介电层24与阻挡层52之间，且第三导电层38制作成另一导电环且嵌埋于第二介电层36内，则第三导电层38可经由接触插塞40而电连接至上方的导电环26。而且，第三导电层38包含有一延伸部分38a，自环边端延伸且可经由接触洞57与导电插塞56而电连接至下方的CUP结构50。
第二实施例
本发明第二实施例提供连接垫结构20的保护层30的开口设计，可以保护检测区域II内的顶部金属层。
图11A显示本发明第二实施例的连接垫结构20的剖面示意图。图11B显示图11A所示的导电环26与保护层30的俯视图。一半导体基底22内包含有部分完成的集成电路，且定义有一连接区域I以及一检测区域II，连接区域I用以接合一线球或一凸块，检测区域II用以进行探针测试或其它工具测试。一第一介电层24用作为基底22的最上层介电层，其包含有一环状沟槽25以及一相对应形成的介电层岛状结构24a。一第一导电层26用作为基底22的顶部金属层(最上层内部连线)，其乃填满环状沟槽25以成为一导电环26，则可围绕介电层岛状结构24a。一保护层30形成于第一介电层24上且包含有一开口31，开口31的位置与尺寸对应于连接区域I，因此保护层30可覆盖检测区域II内的导电环26。一第二导电层32形成于连接区域I以及检测区域II的第一介电层24与保护层30上，第二导电层32用作为一导电垫32，且不需经由任何的接触洞便可直接连接至导电环26。一连接单元34可为一线球或一凸块，结合于连接区域I内的导电垫32上。另外，一阻挡层28形成于导电垫32与导电环26的接面处，可以提高导电垫32与导电环26的接合性。
第一介电层24的材质可为电浆氧化物、高密度电浆(HDP)氧化物、具有高度抗机械应力性质的介电材质、低介电常数材质、氟硅玻璃(FSG)或硅基介电材质。导电环26的材质可为铜、铝、铝铜合金、铜锰合金或其它含铜合金。导电环26的宽度约为1～50μm，厚度约为0.5～2μm。阻挡层28的材质可为钛(Ti)、氮化钛(TiN)、钨(W)、氮化钨(WN)、钽(Ta)、氮化钽(TaN)或其组合。导电垫32的材质可为铝、铝铜合金或其它含铝合金。接合单元34可为一引线接合技术所使用的金球或一倒装芯片技术所使用的凸块。
由上述可知，保护层30覆盖检测区域II内的导电环26，故可防止高机械应力对检测区域II内的导电环26的伤害。邻近于连接区域I与检测区域II的界线处的保护层30亦可用作为一标记条纹，其功能与图7A～图7B所示的标记凹痕相同。形成于导电环26下方的其它内部连线图案可设计为环状、格子状、岛状或实心块状，如同图3A～图3C所示。
依据保护层30的开口31的设计规则，可达成以下优点。第一，保护层30覆盖检测区域II内的导电环26，故可有效减少裂痕自第一介电层24延伸至导电环26的可能性，进而防止侵蚀与层离的问题。第二，保护层30的开口31设计可防止导电垫32自导电环26或第一介电层24上剥离，故能消除连接垫脱落的现象，并确保接合工艺的可靠度。第三，由于导电环26不易因高机械应力的影响而产生缺陷，因此连接垫结构20之间距与尺寸可更近一步缩小，以符合下一世代技术的缩小芯片尺寸的需求。第四，因为介电层导状结构24a具有平坦表面且被导电环26所围绕，故可大幅提升引线接合机台的搜寻连接垫的功能与精确度。第五，导电环26直接与导电垫32接触而毋需仰赖接触洞或接触插塞，故可解决导电环26的宽度限制与光刻工艺的对不准问题，且导电环26与导电垫32的图案设计可更为多样化。
以下详细说明导电环26与导电垫32的图案设计的变化。
第一例
符合前述的保护层30的开口31的设计条件下，第一导电层26的图案可设计为一格子状导电层或多个独立插塞。
图12A显示将第一导电层26制作成为的一格子状的剖面示意图，图12B显示图12A所示的第一导电层26的俯视图。相似于图11A～图11B所示的组件，于此省略叙述。不同之处在于，第一介电层24包含有一格子状沟槽以及多个相对应形成的介电层岛状结构24a，则将第一导电层26填满格子状沟槽则可成为一格子状导电层，亦即第一导电层26可使介电层岛状结构24a之间互相隔离。
图13A显示将第一导电层26制作成为独立插塞的剖面示意图，图13B显示图13A所示的第一导电层26的俯视图。相似于图11A～图11B所示的组件，于此省略叙述。不同之处在于，第一介电层24包含有一多个接触洞，则将第一导电层26填满多个接触洞则可成为多个独立插塞。此外，可于第一导电层26的下方制作一第三导电层38，则该多个独立插塞可以藉由第三导电层38而达成彼此电连接的效果。
位于第一导电层26下方的其它内部连线的图案可设计为环状、格子状、岛状或实心块状，如同图3A～图3C所示。
第二例
符合前述的保护层30的开口31的设计条件下，第一导电层26的图案可设计为一实心块状导电层。
图14A显示将第一导电层26制作成为的一实心体的剖面示意图，图14B显示图14A所示的第一导电层26的俯视图。相似于图11A～图11B所示的组件，于此省略叙述。不同之处在于，第一介电层24包含有一大尺寸沟槽，则将第一导电层26填满该大尺寸沟槽则可成为一实心块状导电层。此外，位于第一导电层26下方的其它内部连线的图案可设计为环状、格子状、岛状或实心块状，如同图3A～图3C所示。
第三例
符合前述的保护层30的开口31的设计条件下，第一导电层26、导电垫32或其组合的图案轮廓可设计成为各种几何图形，包含有：四方形、圆形以及多边形，如同图4A～图4F、图5A～图5F所示。
第四例
符合前述的保护层30的开口31的设计条件下，第一导电层26或导电垫32的轮廓制作为四边形图案，则该四边形图案包含有至少一转角切口(corner cut)区域，如同图6A～图6B所示。
第五例
符合前述的保护层30的开口31的设计条件下，为了要清楚区别出检测区域II与连接区域I，可于第一导电层26、导电垫32或其组合上提供一标记凹痕(marking notch)，如同图7A～图7B、图8A～图8B所示。
第六例
符合前述的保护层30的开口31的设计条件下，可于第一导电层26的延伸部分26a的下方制作一CUP结构50，如同图9A～图9B、图10A～图10B所示。
虽然本发明已以较佳实施例揭露如上，然其并非用以限定本发明，任何熟习此技艺者，在不脱离本发明的精神和范围内，当可作些许的更动与润饰，因此本发明的保护范围当视所附的权利要求范围所界定者为准。

Claims (18)

1.一种连接垫结构，包含有：
一基底，其包含有一连接区域以及一与该连接区域相邻的检测区域；
一第一介电层，是形成于该基底上，且包含有一环状沟槽以及一相对应形成一介电层岛状结构，其中该环状沟槽包围该连接区域以及该检测区域；
一第一导电层，形成于该第一介电层的该环状沟槽中；
一保护层，形成于该第一介电层上且包含有一开口，其中该开口的位置相对应于该连接区域以及该检测区域，且该开口暴露该介电层岛状结构以及一部分的该第一导电层；以及
一第二导电层，覆盖该保护层的开口，且电连接至该第一导电层。
2.根据权利要求1所述的连接垫结构，其中该基底更包含有：
一第一切割道，沿第一方向延伸；以及
一第二切割道，沿一第二方向延伸，且该第二切割道与该第一切割道交错配置以定义一芯片的主要区域；
其中，该芯片的主要区域包含有一有效区域以及一周边区域；
其中，该连接垫结构形成于该有效区域、该周边区域、该第一切割道、该第二切割道或其组合区域上。
3.根据权利要求1所述的连接垫结构，其中该连接垫结构呈直线排列或错开排列。
4.根据权利要求1所述的连接垫结构，其中该第一导电层的宽度为1～50μm、厚度为0.5～2μm。
5.根据权利要求1所述的连接垫结构，其中位于该检测区域内的该第一导电层的面积比例R1符合下列公式：R1＝Ar/As，且0≤R1≤30％，其中Ar代表该检测区域内的该第一导电层的面积，As代表该检测区域的面积。
6.根据权利要求1所述的连接垫结构，更包含有：
一第二介电层，形成于该第一介电层的下方；
一第三导电层，形成于该第二介电层内；以及
至少一导电插塞，形成于该第二介电层内，且该导电插塞可使该第三导电层电连接至该第一导电层。
7.根据权利要求1所述的连接垫结构，更包含有至少一转角切口区域，形成于该第一导电层的至少一个转角区域的附近，其中该转角切口区域禁止该第一导电层的制作，且该转角切口区域允许该第一介电层的制作。
8.根据权利要求7所述的连接垫结构，其中该转角切口区域为一直角三角形，该直角三角形的斜边的长度为0.5～5μm，该斜边与X轴的夹角θ1为10°～80°。
9.根据权利要求8所述的连接垫结构，其中该转角切口区域的一面积比例R2符合下列公式：R2＝At1/Ac1且0＜R2＜80％；
其中，At1代表该转角切口区域的面积；
其中，Ac1代表该第一导电层的转角区域面积；
其中，该转角区域面积Ac1符合下列公式：Ac1＝W1x W2；
其中，W1代表一第一导电层的沿该第一方向的宽度；以及
其中，W2代表一第一导电层的沿该第二方向的宽度。
10.根据权利要求1所述的连接垫结构，更包含有至少一转角切口区域，形成于该第二导电层的至少一个转角区域的附近，其中该转角切口区域禁止该第二导电层的制作，且该转角切口区域允许该保护层的制作。
11.根据权利要求10所述的连接垫结构，其中该转角切口区域为一直角三角形，该直角三角形的斜边的长度约为0.5～5μm，该斜边与X轴的夹角θ2为10°～80°。
12.根据权利要求1所述的连接垫结构，其中该第一导电层更包含有至少一标记凹痕，用来区别该检测区域与该连接区域。
13.根据权利要求12所述的连接垫结构，其中该第一导电层的该标记凹痕包含有一底部以及两侧壁，且该第一导电层的该标记凹痕所环绕的该第一介电层成为一介电层标记。
14.根据权利要求13所述的连接垫结构，其中该介电层标记包含有：
一第一长度，平行该第一导电层的该标记凹痕的底部，为1～3μm；以及
一第二长度，平行该第一导电层的该标记凹痕的侧壁，为0.5～2μm。
15.根据权利要求1所述的连接垫结构，其中该第二导电层更包含有至少一标记凹痕，用来区别该检测区域与该连接区域。
16.根据权利要求15所述的连接垫结构，其中该第二导电层的该标记凹痕包含有一底部以及两侧壁，且该第二导电层的该标记凹痕所环绕的该保护层成为一保护层标记。
17.根据权利要求16所述的连接垫结构，其中该保护层标记包含有：
一第一长度，平行该第二导电层的该标记凹痕的底部，为1～3μm；以及
一第二长度，平行该第二导电层的该标记凹痕的侧壁，为0.5～2μm。
18.根据权利要求1所述的连接垫结构，更包含有：
一第一导电层的延伸部分，自该第一导电层的一边端延伸至该连接区域与该检测区域以外的区域；以及
一连接垫下方电路结构，形成于该第一导电层的延伸部分的下方。
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US7057296B2 (en) 2006-06-06
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SG120987A1 (en) 2006-04-26
US20050093176A1 (en) 2005-05-05
TW200515519A (en) 2005-05-01
CN1612333A (zh) 2005-05-04
US7233075B2 (en) 2007-06-19

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