CN100336092C - 低功率有机发光二极管像素电路 - Google Patents

低功率有机发光二极管像素电路 Download PDF

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CN100336092C
CN100336092C CNB018217656A CN01821765A CN100336092C CN 100336092 C CN100336092 C CN 100336092C CN B018217656 A CNB018217656 A CN B018217656A CN 01821765 A CN01821765 A CN 01821765A CN 100336092 C CN100336092 C CN 100336092C
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image element
element circuit
circuit
light emitting
organic light
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CN1543637A (zh
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詹姆斯·L·桑福德
尤金·S·施利格
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TPO Displays Corp
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Toppoly Optoelectronics Corp
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
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    • HELECTRICITY
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Abstract

一种包含一有机发光二极管(OLED)及一用来储存代表该OLED工作状态数据的静态存储器的像素电路。在一实施例中,一像素电路可以包括一用来控制该OLED的互补金属氧化物半导体(CMOS)电路、一用来保护该CMOS电路不至于有过电压的状况的保护电路、以及一具有一大于该FET阈值电压的静态栅极至源极电压的场效晶体管(FET)的电流源。

Description

低功率有机发光二极管像素电路
技术领域
本发明涉及一种像素电路,特别是涉及一种利用互补金属氧化物半导体(CMOS)技术的低功率有机发光二极管(OLED)像素电路。
背景技术
当施加电流于其上时,任何一种OLED像素可以利用任何一种发光的有机材料。一OLED显示器包含多个构成一阵列的OLED像素。
一OLED像素的发光由一像素电路来控制,其包括一恒定电流源,或是一恒定电压源。通常认为恒定电流源在所述像素的阵列中,提供较均匀的亮度。这是因为亮度对电流的依赖性趋向均匀,然而在不同的像素中,所述OLED上的电压在一给定电流时趋向不均匀。Howard等人的美国专利6,023,259披露了一种电流驱动器,其提供一OLED的无源(passive)矩阵驱动电流。对通常的显示器亮度而言,有源矩阵驱动工作造成较低OLED功率效益,为了避免闪烁,需要一刷新率大于或等于60Hz。
在一有源(active)矩阵显示器中,通常在其各自的像素电路之内提供储存一像素的状态。一般实现的方式为,将相当于一动态RAM的单元并入每一像素电路中,在其中该状态以一电容器上的电压来储存。该配置的缺点是,该电压很快地从所述电容器流出,因此必须定期刷新显示器上所呈现的图像。刷新该图像的工作消耗相当大的功率。因此需要找寻有别于传统动态RAM的另一种替代方案。
对一″开″像素的亮度的控制,通常可以使用控制一模拟电压值的方式来实现,该模拟电压决定施加于该像素的电压或电流。模拟控制电路为另一种过量功率消耗的来源。因此需要找寻有别于传统模拟控制电路的另一种替代方案。
该OLED显示器由有机材料的薄层构成,其中单独的OLED像素受到该OLED一阳极与该OLED的一相反电极间偶发的短路。该短路可以引起在该电路中流动的过度电流、在该像素电路上过度的电压、以及过度的功率消耗。与一短路的像素邻接的优质像素可能受到该短路像素的热度而遭到破坏,而过度的电流可能改变电源电压。
在该OLED显示器的工作期间,所述有机材料层会捕获电荷,使得在该OLED上的压降增加,因而引起亮度的不均匀以及一个烧结的图像。该捕获的电荷可以藉由反向偏压该OLED的方式来移除。
该OLED本身通常需要一约为+/-6伏特的电压,以在开启时展现一适当的亮度,并在反向偏压时以移除该捕获的电荷。传统的CMOS集成电路技术使用以低于4伏特电压工作的晶体管。因此,CMOS技术并不能够驱动OLED。还有,在一OLED像素电路中的CMOS装置,特别容易在超过4伏特的电压时受到损害。
改变一显示器的图像的传统方式是用一处理器来更新一显示控制器的存储器,其可定期并单独寻址该显示器的每一个像素,并在必要时将其″开″(ON)或″关″(OFF)。如果该显示器包括大量像素,如十万、一百万、或是更多个像素的话,此工作可能消耗大量的功率,并成为处理器的负担。
在将多个像素电路并入显示器时的另外一个问题为该显示器的汇集组件的物理配置问题。也就是说,该显示器为限制所述像素及其伴随电路的有限区域,然像素间必须维持一恒定间距,以提供一均匀的图像。
由于以上所述的缺点,OLED显示器尚未如许多其它传统显示技术受到设计者的使用。使用动态RAM与其刷新图像所需的对应电路,以及有关功率消耗的议题等,对使用OLED于电池工作的装置中、以及如手持装置或手表所用的小型显示器来说是一障碍。所述OLED工作电压对于一OLED像素电路中CMOS电路的使用来说是一障碍。对使用OLED的大型显示器来说,在一阵列中每一个像素的定期寻址是一障碍。在诸像素间恒定间距的维持,对任何一种显示器来说都是很重要的考虑。
发明内容
本发明的一目的是提供一种克服以上及其它问题的改进的OLED显示器。
本发明的另一目的是提供一种消耗低功率的改进的OLED像素电路,并因此适合使用于一小型电池供电的装置中。
本发明的另一目的是提供将像素的状态保留在一静态储存单元或是存储器中的OLED像素电路,而同时维持高电路密度与低功率。
本发明的另一目的是提供一利用CMOS技术来控制一OLED的OLED像素电路。
本发明的另一目的是提供一OLED像素电路以限制一短路像素的效应,使得非短路像素继续以正常方式工作。
本发明还有一目的是提供一OLED像素电路能够处理OLED上在正常与反向偏压状态间的大型电压变化,而不会使该OLED像素电路晶体管受到一过量的电压。
本发明还有一目的是提供一OLED像素电路适合使用于一大型显示器的格式。
根据本发明的第一实施例,一像素电路包括一有机发光二极管(0LED)、及一静态存储器用来储存代表该OLED工作状态的数据。
根据本发明的第二实施例,一像素电路包括一OLED、一控制该OLED的互补金属氧化物半导体(CMOS)电路、及一保护电路用来保护该CMOS电路免于过电压的状况。
根据本发明的第三实施例,一像素电路包括一OLED、及一控制该OLED的CMOS电路。该CMOS电路包括有一使用一场效应晶体管(FET)构成的电流源,而该FET具有一大于该FET阈值电压的静态栅极至源极电压。
根据本发明的第四实施例,一显示器包括像素电路阵列。每一个该像素电路包括有一OLED及一静态存储器用来储存代表该OLED工作状态的数据。
本发明提供了一种像素电路,包含:一有机发光二极管;及一静态存储器,用来储存代表该有机发光二极管工作状态的数据,其中该静态存储器包含:一第一组件,经由与其耦合的一数据信号,以提供一源信号;一第二组件,具有一输入用来接收来自该第一组件的该源信号,并用来驱动至一状态,以产生代表该储存数据的输出;及一第三组件,具有一输入耦合该第二组件的该输出,及一输出耦合该第二组件的该输入,以用来提供一锁存信号,以在移除该源信号之后维持该第二组件的该状态。
附图说明
本发明将结合附图通过实施例的方式详细说明,附图中:
图1A示出了根据本发明的OLED阵列结构的俯视图;
图1B为图1A阵列在线1B-1B方向的侧视图;
图2为一OLED像素字阵列结构的方块图,每一字由16个像素组成;
图3为一OLED像素字电路的一实施例的方块图;
图4为符合本发明技术的一字选择电路中的逻辑电路的示意图,;
图5为一OLED像素电路的一实施例简化的示意图;
图6为一OLED像素电路更详尽的示意图;
图7为显示与控制寄存器清除连接以驱动一OLED阵列的方块图;及
图8为一OLED像素字结构的方块图,显示像素电路与一字选择电路对OLED像素各阳极间的实际关系。
具体实施方式
根据本发明优选实施例的教导是涉及有关有源(active)矩阵OLED显示器。这种显示器可以配置为微显示,并并入小型、以电池工作的装置,如电子表。然而,这种特别的使用范围与应用并不能做为实施本发明教导的限制。
图1A为OLED结构一阵列100的俯视图,例如图样元素(像素)或是发光元素,而图1B为从图1A中的1B-1B线所看到的阵列100的侧视图。阵列100的每一个OLED结构被建构以具有一像素电路,其包括一OLED以及一用来储存代表该OLED工作状态数据的静态存储器。
阵列100一般可视为一规则的n×m像素阵列,其中n可等于m或不等于m。
阵列100包括多个OLED结构,每一结构具有一阳极电极105。该阳极电极105以二维配置,形成一平面显示。图1B中所示的侧视图,说明阵列100的垂直结构,例如一硅芯片101,其上为图样化的阳极电极105。在阳极电极105之下配置有一挡光层(图未示),以防止OLED光或是外来光线到达下面的电路。一有机层102与一透明阴极相反电极层103布局在阳极电极105之上。
在一些具有透明阳极的OLED显示器中,一观察者可以通过其阳极电极105看到该OLED,但是在该优选实施例中涉及通过其阴极相反电极层103看到该OLED。这是因为该硅基板101不是透明,而是非透明的缘故。
一保护罩玻璃104附于该硅芯片101的阴极电极层103上,以提供该OLED结构环境的保护。一适当的湿气吸收剂也可以置放于一硅玻璃罩的密封之内,但在阵列100的边界之外。
在寻址该显示器的一有源阵列方案中,定义所述像素状态的数据,即是否该像素为ON,即亮,或是OFF,即暗的数据,可以写入并储存于动态或是静态存储器结构中。该储存的数据也可以从该存储器结构中读出,若是如此的话,该配置例如用于电力测试。在一动态存储器阵列中,数据储存于一由CMOS电路的组成电锁存器中,并且实际上所保持的该数据没有消耗功率。根据本发明的目前的优选实施例的OLED显示装置使用了用于低功率消耗的静态存储器。
在根据本技术的静态阵列显示器中,该有机材料夹在下面电路的像素电极和一相反电极之间。该像素电极通常是光发射二极管的阳极而该相反电极通常是阴极。构成该显示器的像素的矩形阵列按照需要显示的图像“通”或“断”。每一像素具有一像素阳极电极和相对于相反电极控制阳极的电状态的像素电路。
所述像素电路可以使用形成于一绝缘基板上的薄膜来构成,或是使用集成电路技术来构成,最好是以硅为主。一般来说,该像素电路可以(1)任何合适的材料,例如结晶硅、非结晶硅、多晶硅、微结晶硅、一有机半导体或是高分子半导体,及(2)配置于,例如,硅、玻璃、塑料、陶瓷或是蓝宝石(AL2O3)的基板上来制造。所述薄膜电路配置于一绝缘(介电)基板的优点为成本较低以及可以制成大型显示器。一般来说,使用结晶硅装置受到小面积阵列的限制,但所述电路的效能及制造密度较所述薄膜电路高。根据本技术的该OLED电路适合使用不同的制造技术来实施,但是该结晶硅技术为优选实施例。因为硅基板对可见光来说为不透明,发光最好是经由该相反电极,其最好是形成为连续的透明导体材料板,如氧化铟锡,例如见相反电极层103。
在以下的说明中,该术语″阵列″指的是所述像素的阵列,也为所述阳极的阵列。
图2为一OLED阵列200的方块图,包含多个数据储存装置或是单元,在此也称为字结构205。每一字结构205为一16位的静态随机存取存储器(SRAM),其对应阵列200一行上的十六个像素。在此实施例中,数据每次以16位写入及读出。
对每一字结构205的输入等为一列区块选择204、位线203、一字线读取202与一字线写入201。当字线写入201与列区块选择204两者同时启动时,数据从位线203写入字结构205,例如将其切换成一高电平状态。而当字线读取202与列区块选择204两者同时启动时,数据从字结构205读入位线203。而当字线读取202与字线写入201两者同时启动时,没有工作受到定义。
注意每一列区块选择204与阵列200的一列有关,其中每一字线写入201和字线读取202与阵列200的一行有关。藉由使用一适当的列区块选择204、一字线写入201与一字线读取202的组合,可以将数据写入或是读出阵列200的任何字结构205。
位线203的总数目对应阵列200像素的列数。因为每一字结构205代表16像素,列区块选择204的数目对应阵列200中像素的列数除以16。
传统的SRAM通常使用互补位线等,即每位两线。本发明每像素列使用一单一位线,因此,与传统设计相较,可降低功率的消耗。例如,在图2中,一组位线203代表配置为16条单一线的数据位1-16。
从系统的观点而言,从一显示器的所述存储器单元读取数据较从该显示器外接式的系统存储器读取的效率来得差,因为从该显示器读取的功率消耗通常较高而且速度较低。然而,从该显示器的所述存储单元读取数据在电路测试该显示器时却很有用。尽管如此,重点还是应该摆在写入该显示器而不是从该显示器读取。如此,便不需要如脉冲式字线寻址、位线均衡与位线感测电路等的传统SRAM设计技术。
图3为一OLED像素字结构205的方块图。字结构205包括一字选择电路300与十六个像素电路400。字选择电路300的输入为列区块选择204、字线读取202与字线写入201。字选择电路300的输出则为字读取404与字写入405。像素电路400的输入为一单一位线203、字读取404及字写入405。字读取404与字写入405分别为字线读取202与字线写入201的局部字选择的延伸。字选择电路300例如显示于像素电路400的左边。
图4示出在字选择电路300中一些逻辑的电路细节。字选择电路300包括两个AND(与)门500与501。
AND(与)门500的输入为列区块选择204与字线读取202。字读取404为AND(与)门500的输出。当列区块选择204与字线读取202都为高电平时,即作用(active)时,字读取404变高电平,即作用(active)。
AND(与)门501的输入为列区块选择204与字线写入201。字读取405为AND(与)门501的输出。当列区块选择204与字线写入201都为高电平时,即作用时,字读取405变高电平,即作用。
图5为阵列200中像素电路400主要功能组件的一简化的示意图。像素电路400包括一SRAM单元10、一连接至一电源电压V1的电流源20、三个开关30、40与50、一接地的栅极p-型金属氧化物半导体(PMOS)晶体管60,其n-阱连接至其源极64,即一浮动阱,以及一OLED 70连接至一电源电压V2。在正常的工作期间,V1为正电压,V2为负电压。
SRAM单元10的输入为一单一位线203、字读取404、与字写入405。注意该位线203为一单一位线,用来输入一代表该数据的信号至SRAM单元10,以及从SRAM单元10输出一代表该数据的信号。字写入405使得数据能够写入SRAM单元10,而字读取404使得数据能够从SRAM单元10读取。SRAM单元10的输出为位线203及一控制线8。注意该位线203同时为SRAM单元10的输入与输出。控制线8用来控制开关40。在位线203与字写入405上的高电平状态,一高电平状态写入SRAM单元10。当SRAM单元10储存一高电平状态时,控制线8关闭开关40。当SRAM单元10储存一低电平状态时,控制线8打开开关40。
V1提供电流源20的电源。电流源20产生对应于OLED 70的一预先决定的最大亮度电平的一输出电流。
希望能够用控制经过OLED 70的平均电流来控制该OLED 70的亮度。DUTY FACTOR NOT(6)为一脉冲宽度调制信号,其做为阵列200中所有像素共同的输入。在该DUTY FACTOR NOT(6)的低电平状态关闭开关30。在该DUTY FACTOR NOT(6)的高电平状态打开开关30。该DUTY FACTORNOT(6)控制经过OLED 70的平均电流,以设定其亮度至一低于最大亮度的电平。
REVERSE BISE(7)为一信号,其做为阵列200中所有像素共同的输入。在REVERSE BISE(7)的高电平状态关闭开关50。在REVERSE BISE(7)的低电平状态打开开关50。
当开关30与40关闭而开关50为开启时,电流从电流源20流出,经过开关30及40,流入PMOS晶体管60的源极64。PMOS晶体管60工作在一共栅放大(cascode)级,以提供电流源20一较大的电压顺应范围,例如本技术领域所熟知的那样。自PMOS晶体管60漏极62出来的电流流入OLED 70使OLED 70开启。电压顺应范围是输出电流几乎固定的输出电压范围。一共栅放大级为一共同栅极放大器级,其藉由提供电压增益来改善该电压顺应的范围。
当电流流经PMOS晶体管60时,其具有一相当低的电压,例如大约10微伏,流过其漏极62与源极64。当电流流动时,在漏极62上的电压可以高于或低于地数伏,而在源极64上的电压为高于地的最小阈值电压,并总是高于其漏极62上的电压。一阈值电压为维持该晶体管在正常工作导电区域的最小源极至栅极电压。当没有电流流入PMOS晶体管60的源极64时,在源极64上的电压并不低于地。
在一OLED的工作期间,电荷可以在其有机层中被捕获。此工作增加了一给定电流流动所需的OLED的前向偏压。该捕获电荷可以藉由反向偏压该OLED来移除,定期或是不定期均可。
OLED 70藉由开启开关30来反向偏压,因此中断来自电流源20的电流流动、关闭开关50并将V2从一负电压切换至一正电压。关闭开关50将源极64与PMOS晶体管60的n-阱接地。PMOS晶体管60的漏极6为一p-扩散区。当V2切换至一正电压时,电流从V2流出,经过OLED 70 PMOS晶体管60与开关50。经由PMOS晶体管60与关闭的开关50,OLED 70的阳极72维持在接地以上一二极管压降。OLED 70的反向偏压电压为V2的正电压减掉一二极管压降。
一OLED的反向偏压并不需要在频繁的间隔中进行。而是可以在不规则间隔或是当一显示器未受收看的时候进行。例如,在一手表的显示器中,一OLED可以在白天以正常偏压方式驱动,在晚上时,当该显示器上的图像为关闭(OFF)时,该OLED电压可受反向偏压。另一个例子是,该OLED可以在一脉冲宽度调制亮度控制周期中,在OLED关掉(OFF)时受到反向偏压。
图6示出了图5像素电路400的详细细节。在该实施例中,V1设定为+3V而V2设定为-5V。
SRAM单元10包括n-型金属氧化物半导体(NMOS)晶体管11与15,以及反相器12、13与14。在写入工作时,在字写入输入405的一高电平状态使得NMOS晶体管11将位线203上的逻辑状态耦合到反相器12的输入。
反相器12的输出为其输入的反置。反相器12的输出与反相器13的输入、反相器14的输入连接,并提供控制线8的信号。
反相器13将其输出连接至反相器12的输入。请注意反相器12从位线203以一打开(ON)NMOS晶体管11或是从反相器13的输出接收其输入。NMOS晶体管11的电流驱动是部分由其信道宽度与其信道长度的比值来决定。反相器12与NMOS晶体管11的电流驱动相当强,例如比反相器13的驱动强10倍。如此,位线203的输入,经由打开(ON)NMOS晶体管11至反相器12,决定SRAM单元10的状态。一开始,经由NMOS晶体管11数据电平设定反相器12的状态,然后反相器13回馈,即提供一锁定信号给反相器12,以在移除NMOS晶体管11的数据电平后维持该状态。因此,NMOS晶体管11与反相器12与13组成一数据锁存器。
一PMOS晶体管40A做为开关40(图5)。控制线8,从反相器12的输出,连接至PMOS晶体管40A的栅极。
为了从SRAM单元10读取数据,字读取404设定为高电平,以导致NMOS晶体管15将反相器14的输出连接到位线3。经由反相器12与反相器14的反相工作,SRAM单元10读出数据的极性与先前写入SRAM单元10的极性相同。
SRAM单元10可以藉由消除反相器14并将反相器12的输出直接连接至NMOS晶体管15而得以简化。在此状况下,SRAM单元10的数据读出为先前写入SRAM单元10的反置,但其可在一位线读取电路(图未示)中重新反置。最好是,反相器14包含在内,因为其在读取工作期间,隔离像素电路400与位线203上的噪声以及由位线203负载的电容。
一PMOS晶体管20A做为一电流源20(图5)。一VREF 21连接至PMOS晶体管20A的栅极,并也连接至一同样置于阵列200中所有其它像素电路中的PMOS晶体管。
先前提到的挡光层,例如可以用来分配该V1的+3V电源。该挡光层为一导电层,在该阵列中配置与连接,以对V1电源分配提供一低阻抗路径。以此方式,该挡光层进行两种功能,即,挡光与电源分配。
PMOS晶体管20A为一场效应晶体管(FET),其信道宽度(W)、信道长度(L)与栅极至源极电压(Vgs)在面积限制(~W×L)下可发挥最大作用,以缩小阈值电压(VT)的效应与信道宽度在电流经过阵列中像素的OLED 70均匀度上的变化。该通道长度藉由如由该栅极导体形成漏极与源极扩散的间隔来决定。该通道宽度为该栅极导体上漏极或源极尺寸。在饱和时,
(|Vds|>|Vgs-VT|),
该漏极电流与
(W/L)(Vgs-VT)2,成正比,其中Vds为漏极至源极电压。VREF 21电压相对V1而设定,并可调整以得到一OLED 70理想测量的最大亮度,因而移除电流源晶体管参数的效应,以及该显示器最大总亮度的OLED效益。
在PMOS晶体管20A的实施例中,该通道长度为2m(79.12微米),该通道宽度为67nm(2.64微米),而PMOS晶体管栅极至源极电压正常为-1.1V。在阈值电压为-0.6V的状况下,该PMOS晶体管20A维持饱和的状态,只要其源极至漏极电压大于0.5V,即产生恒定电流。注意该PMOS晶体管20A的静态源极至栅极电压大于其阈值电压。换句话说,驱动OLED 70只需要0.5V的消耗电压。在此方面,该设计是非常有功率效率。用此实施方法,PMOS晶体管20A的电流变化,在该阵列的像素中,都小于1.05∶1。
一PMOS晶体管30A起开关30(图5)的作用,而一NMOS晶体管50A起开关50的作用(图5)。此组件的配置允许图5中所示的DUTY FACTOR NOT(6)与REVERSE BISE(7)在一单一REVERSE BIAS/DUTY FACTOR NOT(9)信号中结合。REVERSE BIAS/DUTY FACTOR NOT(9)为阵列200中所有像素的一共同输入。
在OLED 70的正常前向偏压工作下,REVERSE BIAS/DUTY FACTORNOT(9)为工作系数调制,以快速地将PMOS晶体管30A开与关,以工作系数调制在OLED 70中的电流。对OLED 70亮度的此数字控制,较利用一模拟电压控制来得均匀。当PMOS晶体管30A藉由将晶体管20A、30A、40A、50A与60的寄生电容放电而关闭以帮助线性化脉冲宽度调制时,NMOS晶体管50A可藉由REVERSE BIAS/DUTY FACTOR NOT(9)打开。如果未放电,该寄生绕线、漏极至基板、源极至基板与FET电极间电容会在PMOS晶体管30A为关闭时,允许电流连续流入该OLED一小段时间。该寄生电容趋向维持该PMOS晶体管60的源极64在高电压,允许PMOS晶体管60继续传导,直到源极64的电荷放光为止。
如果CMOS电路曝露至一电压超过一击穿电压的话(通常为3.6V),可能受到损坏。同样地,在受到超过摄氏100度的温度时,该有机层的寿命大大地缩减。如果一OLED在其阳极与阴极间受到短路,一过度的电流可能流过该短路的OLED像素电路。该电流可能产生热度并损害一邻接的像素,而且其也可能干扰供应至该显示器中其它像素的电压。
因此,像素电路400包括一保护电路包含PMOS晶体管81、82与83,以及一电阻器84。在正常的工作期间,当该像素在OFF的状态下,在该OLED 70上的压降降低,使得在PMOS晶体管60的漏极62的电压变得负得更多。PMOS晶体管81、82与83每一个都降低约1V,使得在PMOS晶体管60的源极64的电压的限制较接地负约3V。即是,PMOS晶体管81、82与83提供一负值(-3V)电压限制,以确保PMOS晶体管60的栅极至漏极电压不超过其击穿电压3.6V。藉由限制PMOS晶体管60漏极62的电压,该保护电路有效地限制流经像素电路400其它组件的电流。当OLED 70打开,在漏极62的电压约为接地以上的1.75V。在OLED 70打开时,PMOS晶体管81、82与83没有作用。
当OLED 70短路时,电阻器84限制可以流动的电流,以及可以消耗的功率。PMOS晶体管81、82与83仍将PMOS晶体管60漏极62的电压限制于-3V左右,使得电阻器84上的任何过度电压下降。在一较佳的具体实施例中,电阻器84是以具有40,000欧姆电阻的未掺杂的多晶硅来制作。
PMOS晶体管81、82与83与电阻器84也允许测试OLED 70,并经由同样置放于其它像素电路的组件,测试阵列200中所有的OLED像素。此系藉由设定V2为一负值电压,如相对接地-7V的方式完成,允许V1浮动或是将之接地。以此配置的方式,电流路径从接地经PMOS晶体管81、82与83、电阻器84、OLED 70至V2。每一个PMOS晶体管81、82与83降低约0.7V。OLED 70为前向偏压,而若属优质则会开启。此测试用于,例如,在OLED沉积后与在显示器进一步装配前的密封时发现缺陷。
除了如以上所述节省功率的技术之外,可以藉由管理图像写入一显示器的方式来节省功率。例如,显示器功率消耗与一像素的亮度与像素″开″的数目成正比,因此如果有一方法能降低一像素的亮度与像素″开″的数目就能节省功率。
例如,如果阵列200设于一手表的显示器中,像素的数目需要以时针显示时间的像素需求数在像素总数的百分之1与2间。一典型的文字屏幕可能打开百分之10至20的像素。图像可能需要百分之50像素的亮度。
因此,有别于帧序列工作,以空间混色产生灰阶图像,以消除需要快速写入显示器的功率(其为帧序列工作所必需)。
″开″像素的数目通常小于百分之50,而因此可以藉由在将新数据写入该显示器的前一个清除显示的工作,以及藉由仅写入像素已″开″的字结构来节省电源。完全显示可以使用位线及在该阵列之外的字线驱动器电路来清除。如果提高所有的字线写入201与列区块选择204,而所有位线203上为低数据状态的话,则低电平数据可写入阵列200将显示器所有像素关闭的所有的SRAM单元10。在手表的例子中,此功能的控制是由手表的处理器在更新显示器的前所发出。然后,数据仅写入在新显示屏幕中必须打″开″的像素而已。
因为手表显示器通常百分之99的时间在显示时间,而且因为手表指示时间的指针并不需要高的对比,在显示时间的时候,亮度可以降低至一相当低的亮度电平,例如约为30烛光/平方米。此亮度电平应足够做夜间使用与房间环境光线电平低对比的应用。在室内环境下显示文字与图像,100烛光/平方米应该足够。只有在强烈阳光下使用才需要约500烛光/平方米的亮度电平。
为了在一手表系统的待机功能中节省功率,该REVERSE BIAS/DUTYFACTOR NOT(9)应在一高电平状态。除此之外,V2至显示器的连接应打开,以消除任何关闭状态的OLED电流或是由于OLED短路产生的电流等。如此,在V1与V2间的该电流路径断开,使得没有电流流经像素电路400。
同时,如果V1的电压降低,可以降低从SRAM单元10汲取的待机电流,但是不要设定太低以免该显示器失去其数据。降低供应电压会降低经过反相器12、13与14的漏电流,并因此降低待机功率。在手表的应用上,待机的控制由手表处理器提供。
DUTY FACTOR NOT(6)、REVERSE BISE(7)、待机与清除的控制信号可以写入一SRAM字结构,其形成一显示控制寄存器,如以下所述,其并非为阵列200的一部分,而在其外部。以此方式,该显示控制信号等为该显示器的部分,但并不位于该手表的其它地方,因此降低该显示器专用信号线的数目。
该控制寄存器的一功能为″清除″显示,即,将所有的像素在一工作中全部关闭。即是,清除显示的图像,而不将该显示器所有的单独像素寻址。此工作的完成,使得该处理器只需要将在新图像上为″开″的所述像素写入,因此相较于写入所有像素,可降低功率消耗与处理器的负担。
图7示出了有关写入与读取阵列200及一显示控制寄存器705,及清除工作的控制流程的显示功能方块图。该处理器(图未示)将一字写入显示控制寄存器705,其包括一专用于清除功能的位。在图7所示的示范性实施例中,一字具有16位。
在工作中,处理器传送地址、一读取/写入信号、一芯片选择信号、及图像数据给该显示器。对每一个接收的地址与数据字,一列选择线204(图2)由一列区块译码器701启动,一字线读取202(图2)或一字线写入201(图2)由一字线译码器702启动,而且适当的位线203(图2)由位线写入/读取驱动器703选择。如果要进行清除工作,显示控制寄存器705可寻址以由列区块译码器701与字线译码器702写入,而该清除的数据位则可应用于该位线写入/读取驱动器703,并储存于显示控制寄存器705。然后启动显示控制寄存器705的一清除线输出704,将一清除信号应用至列区块译码器701、字线译码器702与位线读取/写入驱动器703,其使一″零″同时写入阵列200所有的像素中,将所有的OLED都关闭。
该显示器是设计以由一微处理器的存储器扩充总线来寻址,该微处理器将图像数据以字的形式传送至显示器,每一字一次包含数个像素的数据,例如,一次16像素。数据也可以从该显示器的SRAM储存区读出,例如在做测试时,也是一次一字。为了实施此工作,字选择电路可嵌入该显示器中,例如,每16像素水平群组一个电路。此需要像素电路与实际像素间连接的定期移位,以维持一均匀、或是固定的像素间距。
图8为一OLED像素字结构205的方块图,示出了像素电路400与一字选择电路300对OLED像素各阳极间的物理关系。字结构205包含在阵列200一行上配置的16像素电路400与一个字选择电路300。16个OLED阳极电极105迭在字结构205上,每一阳极是由一导体通道802连接至一对应像素电路400的金属导体801。信道802与导体801为像素电路400至阳极105的传导路径的一部分,即从图6中的电阻器84至OLED 70。虽然在图8中,为了清楚起见,阳极电极105与像素电路400彼此邻接,但是不言可喻,在此项技术中,其至少一部分彼此重迭。在图8中的例子,该像素电路400的平均列向尺寸及阳极电极105的间距为871nm(34.3微米),而字选择电路300的列向间距为203nm(8微米)。为了使该16像素电路400与一字选择电路300与该16阳极电极105占据相同的水平空间,每像素电路400的列向尺寸可减低12.7nm(0.5微米),即与该阳极电极105相较,从871nm(34.3微米)降低至859nm(33.8微米)。最好是,信道802应该放在每个阳极电极105的中心,或至少放在每个阳极电极105相同的相对位置。为了实现此方式,每一像素电路400的导体801具有一足够的列向范围,以配合信道802的移动位置。其结果为该OLED阳极的间距在阵列上均匀,甚至在像素电路的间距(其与OLED阳极连接)不均匀时亦然。
总的来说,本发明的像素电路已有技术相比较有许多的优点。例如,CMOS电路并入一有源矩阵OLED显示器的每一像素中。所述电路展示电池工作的低功率消耗、合并一亮度均匀的恒定电流源,以及降低亮度与OLED特性间的从属关系,并允许使用该OLED所需要工作电压一较低电压的电路技术。每像素合并一SRAM存储器单元以控制其状态,像素的开或关,因此不需要定期刷新。当需要减少该OLED随着时间的损坏时,该电路也提供反向电压的应用,提供亮度的工作系数控制,以及一电流限制电阻器以隔绝短路像素的效应。该显示器由一微处理器的存储器扩充总线用数个像素长度字的形式来寻址,并且该显示数据可以使用相同的形式读出。译码该字地址的电路嵌入包含该显示的像素的阵列中。还有,提供以一工作清除该显示图像,因此仅需要寻址″开″启的像素,即可显示新的像素。

Claims (29)

1.一种像素电路,包含:
一有机发光二极管;及
一静态存储器,用来储存代表该有机发光二极管工作状态的数据,
其中该静态存储器包含:
一第一组件,经由与其耦合的一数据信号,以提供一源信号;
一第二组件,具有一输入用来接收来自该第一组件的该源信号,并用来驱动至一状态,以产生代表该储存数据的输出;及
一第三组件,具有一输入耦合该第二组件的该输出,及一输出耦合该第二组件的该输入,以用来提供一锁存信号,以在移除该源信号之后维持该第二组件的该状态。
2.如权利要求1所述的像素电路,还包含一用于将一代表该数据的信号输入至该静态存储器以及从该静态存储器输出一代表该数据的信号的单一位线。
3.如权利要求1所述的像素电路,还包含:
一第一输入,使该数据能够写入该静态存储器;及
一第二输入,使该数据能够从该静态存储器读取。
4.如权利要求1所述的像素电路,
其中该第一组件提供一第一驱动电流;及
其中该第三组件提供一低于该第一驱动电流的第二驱动电流。
5.如权利要求1所述的像素电路,还包含:
一互补金属氧化物半导体电路用来控制该有机发光二极管;及
一保护电路,用来保护该互补金属氧化物半导体电路免于过电压的损害
6.如权利要求5所述的像素电路,其中所述互补金属氧化物半导体电路包含:
一电流源;及
一在该互补金属氧化物半导体电路的输出级中的共栅极放大器装置。
7.如权利要求6所述的像素电路,其中该共栅极放大器装置具有一浮动阱。
8.如权利要求5所述的像素电路,其中该保护电路,将经由该互补金属氧化物半导体电路的电流限制至一预先决定的值。
9.如权利要求5所述的像素电路,其中该保护电路,将跨过该互补金属氧化物半导体电路的电压限制至一预先决定的值。
10.如权利要求5所述的像素电路,还包含一电流限制电阻器与该有机发光二极管串联。
11.如权利要求10所述的像素电路,其中该电阻器包含薄膜。
12.如权利要求10所述的像素电路,其中该电阻器包含未掺杂的多晶硅
13.如权利要求5所述的像素电路,其中该互补金属氧化物半导体电路包含一电路,用来反向偏压该有机发光二极管,以移除从该有机发光二极管所限制的电荷。
14.如权利要求13所述的像素电路,其中用于反向偏压该有机发光二极管的该电路包含:
一与该有机发光二极管串联的n-型金属氧化物半导体晶体管;及
一与该n-型金属氧化物半导体晶体管串联的p-型金属氧化物半导体晶体管,
其中该n-型金属氧化物半导体晶体管与该p-型金属氧化物半导体晶体管提供一反向偏压电流路径从该有机发光二极管的一阳极至接地。
15.如权利要求5所述的像素电路,其中该互补金属氧化物半导体电路包含一用来控制经过该有机发光二极管的一平均电流的工作系数电路。
16.如权利要求15所述的像素电路,其中该工作系数电路允许反向偏压该有机发光二极管,以从该有机发光二极管移除所捕获的电荷。
17.如权利要求5所述的像素电路,其中该互补金属氧化物半导体电路包含一场效晶体管电流源。
18.如权利要求17所述的像素电路,其中该场效晶体管具有一大于该场效晶体管阈值电压的静态栅极至源极电压。
19.如权利要求17所述的像素电路,其中该场效晶体管具有一大于该场效晶体管的一通道宽度的通道长度。
20.如权利要求5所述的像素电路,其中该互补金属氧化物半导体电路包含:
一第一输入,用来设定该像素的一最大亮度;及
一第二输入,用来控制该像素的一工作系数,以设定该像素一亮度小于该最大亮度。
21.如权利要求1或5所述的像素电路,其中该像素电路包含配置于一基板上的一材料,
其中该材料从结晶硅、非结晶硅、多晶硅、微结晶硅、一有机材料与一多分子材料所组成的群组中选出,及
其中该基板从包含硅、玻璃、塑料、陶瓷及蓝宝石的群组中选出。
22.如权利要求5所述的像素电路,其中该保护电路能够提供该有机发光二极管一前向偏压电流路径以照明该有机发光二极管。
23.一种包含如权利要求1所述像素电路的阵列的显示器。
24.如权利要求23所述的显示器,其中每一该有机发光二极管包含一电极,其中所述有机发光二极管以一在该阵列中为均匀的间距彼此分开,且其中所述像素电路以一在该阵列中为不均匀的间距彼此分开。
25.如权利要求23所述的显示器,还包含一用来将所有所述有机发光二极管同时设定至一均匀工作状态的电路。
26.如权利要求25所述的显示器,其中所述有机发光二极管的该均匀工作状态为″关″,且其中该显示器由一随后设定选择各个所述有机发光二极管为″开″的处理器控制。
27.如权利要求25所述的显示器,其中该电路是藉由一处理器经由一存储器总线来寻址。
28.如权利要求23所述的显示器,其中每一该像素电路是藉由一处理器经由一存储器总线来寻址。
29.如权利要求23所述的显示器,其中该阵列为一电子表的一组件。
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