CN100468699C - Image sensing element and method for making the same - Google Patents

Image sensing element and method for making the same Download PDF

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CN100468699C
CN100468699C CNB2006100773490A CN200610077349A CN100468699C CN 100468699 C CN100468699 C CN 100468699C CN B2006100773490 A CNB2006100773490 A CN B2006100773490A CN 200610077349 A CN200610077349 A CN 200610077349A CN 100468699 C CN100468699 C CN 100468699C
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photodiode
grid
insulating barrier
localized oxidation
substrate
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CN101064279A (en
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施俊吉
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United Microelectronics Corp
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United Microelectronics Corp
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Abstract

The invention provides a basis, several shallow furrow seclusions are formed on the basis to separate and define several source areas, and every source area includes a light sensing area, an optoelectronic diode is formed in the light sensing area, and then a LOCOS technics is proceeded to form a local silicon oxidation insulated layer. Then, a gate electrode of the transistor is formed in the source area, and the gate electrode covers part of the local silicon oxidation insulated layer, several adulteration areas are formed at the basis.

Description

Image sensing element and preparation method thereof
Technical field
The present invention relates to a kind of image sensing element and preparation method thereof, relate in particular to a kind of use and clamp down on type photodiode (Pinned photodiode, CMOS transistor imageing sensor PPD) and preparation method thereof.
Background technology
CMOS (Complementary Metal Oxide Semiconductor) (complementary metal-oxide semiconductor, CMOS) imageing sensor (image sensor) is to adopt traditional cmos circuit technology to make, and has the advantage that cost of manufacture is lower and component size is less; In addition, cmos image sensor also has high-quantum efficiency (quantum efficiency) and low noise advantages such as (read-out noise), therefore, cmos image sensor attained general solid-state image sensing element and replace charge coupled device (charge-coupled device, CCD).
The cmos image sensing element is to come the processing signals data by the photoelectric current that a photodiode is produced, for example photodiode is in the photoelectric current that produced by light state (light current) representation signal (signal), and optical sensing area is then represented noise (noise) in the dark current (dark current) that is not subjected to light state and is produced.Because the existence of dark current can reduce the separating capacity of cmos image sensing element to light and shade, therefore how to avoid the generation of dark current and then influence the performance and the performance of cmos image sensing element, be the problem that the dealer endeavours to solve.
Generally speaking, dark current be with cmos image sensing element technology in because of the caused blemish of etching, plasma defective, wafer impurity etc. relevant.For example, after the photodiode of cmos image sensing element completed, its surface was easily because of the required plasma etching of other elements of follow-up making (plasma etching) causes defective (defect), and the generation dark current.Therefore, prior art provides several different methods in order to reduce the generation of optical sensing area dark current.See also Fig. 1, Fig. 1 is the schematic diagram of an existing C MOS image sensing element.As shown in Figure 1, image sensing element 100 comprises a photodiode, and it is formed by a p type wells 102 and a N type heavily doped region 104, and this photodiode is to be connected with a grid 108 by a N type light doping section 106; In addition, N type light doping section 106, grid 108 constitute a field-effect transistor (filedeffect transistor) with another N type light doping section 110.Prior art provides a field oxide (Field oxide, FOX) 112, for example a localized oxidation of silicon insulating barrier (Local oxidation of silicon isolation layer) as the isolated material of a dielectric, contacts and is short-circuited with other elements in order to isolated photodiode; And the cover part photodiode, in other technologies, be not damaged in the hope of the surface of protecting this photodiode.
See also Fig. 2, Fig. 2 is a United States Patent (USP) the 6th, 462, the schematic diagram of the cmos image sensing element that is disclosed for No. 365.It discloses a cmos image sensing element 200, and the most surfaces of its photodiode 202 is by a field oxide, such as a localized oxidation of silicon insulating barrier 204 covering; It is not then covered by a grid 206 by the remainder that localized oxidation of silicon insulating barrier 204 covers.Because the surface of photodiode 202 is all to be capped, its impaired probability in surface can significantly reduce, so can obviously reduce because of the dark current that blemish caused that causes in the technology.In addition, United States Patent (USP) the 6th, 462, No. 365 patents also disclose that this localized oxidation of silicon insulating barrier 204 can (shallowtrench isolation STI) replaces by a shallow isolating trough.
But, because the occupied area of chip of localized oxidation of silicon insulating barrier that produces in the LOCOS technology is bigger, as the time spent of isolated photodiode and other elements, occupied the space that chip can be used easily, and reduction more causes the problem of cost increase to the requirement of cmos image sensing element integrated level; And adopt STI as the time spent isolated and the protection photodiode; relate to the irrigation canals and ditches etch depth of photodiode silicon base, the filling of oxide layer again; and the complicated technologies such as flatening process of chemico-mechanical polishing (CMP); the degree of difficulty of its process integration increases many compared with LOCOS technology, and also may be to the damage that silicon base causes at photodiode place when the etching shallow ridges.
Summary of the invention
Therefore, the present invention provides image sensing element and preparation method thereof in this, can effectively protect photodiode surface and reduce the image sensing element that dark current produces to provide.
According to the present invention, a kind of manufacture method of image sensing element is provided, substrate at first is provided, in this substrate, form a plurality of shallow isolating trough, in order to isolating and to define a plurality of active regions (active areas), and respectively include optical sensing area (photo sensing region) respectively in this active region, carry out localized oxidation of silicon (Local oxidation of silicon subsequently, LOCOS) technology forms the localized oxidation of silicon insulating barrier respectively with the substrate surface in those optical sensing areas.Next, in those active regions, form transistorized grid respectively, and this localized oxidation of silicon insulating barrier of this grid cover part, a plurality of doped regions in this substrate, formed at last.
In addition; according to the present invention; a kind of image sensing element is provided; it includes substrate, in order to the definition active region and in order to the shallow isolating trough of electronic component in this substrate of electrical isolation, be arranged at photodiode in the substrate in this active region, be covered in the surface of this photodiode; in order to the localized oxidation of silicon insulating barrier of protecting this photodiode, be arranged at this substrate surface in this active region, and the grid of this localized oxidation of silicon insulating barrier of cover part and be arranged at doped region in this substrate.
Because shallow isolating trough of the present invention is to separate making with the localized oxidation of silicon insulating barrier; And shallow isolating trough is the usefulness as the electrical isolation of each active region; the localized oxidation of silicon insulating barrier is then as the protective layer of photodiode and the gate insulator of grid (gate insulator) layer; so the present invention can be under the condition that does not influence the requirement of cmos image sensing element integrated level; provide a protection photodiode surface to avoid technology and destroy, and can effectively reduce the image sensing element that dark current takes place.What is more, owing to have different-thickness, therefore also provide one effectively to close the mechanism of grid, and can more reduce the generation of dark current according to the formed grid oxic horizon of manufacture method provided by the present invention.
Description of drawings
Fig. 1 is the schematic diagram of an existing C MOS image sensing element;
Fig. 2 is a United States Patent (USP) the 6th, 462, the schematic diagram of the cmos image sensing element that is disclosed for No. 365;
Fig. 3 to Figure 10 is the preferred embodiment schematic diagram according to the manufacture method of image sensing element provided by the present invention;
Figure 11 to Figure 17 is another preferred embodiment schematic diagram according to the manufacture method of image sensing element provided by the present invention.
The main element symbol description
100 cmos image sensing elements, 102 p type wellses
104 N type heavily doped regions, 106 N type light doping sections
108 grids, 110 N type light doping sections
112 localized oxidation of silicon insulating barriers
200 cmos image sensing elements, 202 photodiodes
204 localized oxidation of silicon insulating barriers, 206 grids
300 substrates, 302 patterning hard mask layer
304 shallow ridges, 306 dielectric layers
310 shallow isolating trough, 320 active regions
322 optical sensing areas, 330 photodiodes
332 heavily doped layers, 334 lightly-doped layers
340 localized oxidation of silicon insulating barriers, 342 oxide layers
350 grids, 360 light doping sections
362 heavily doped regions
400 substrates, 402 patterning hard mask layer
404 shallow ridges, 410 shallow isolating trough
420 active regions, 422 optical sensing areas
430 photodiodes, 432 heavily doped layers
434 lightly-doped layers, 440 localized oxidation of silicon insulating barriers
442 oxide layers, 450 grids
460 light doping sections, 462 heavily doped regions
Embodiment
See also Fig. 3 to Fig. 8, Fig. 3 to Fig. 8 is the preferred embodiment schematic diagram according to the manufacture method of image sensing element provided by the present invention.As shown in Figure 3, one substrate 300 at first is provided, and form a patterning hard mask layer 302 in the surface of substrate 300, for example include the composite bed of a pad oxide (padoxide) and a silicon nitride layer (silicon nitride layer), in order to define the position of a shallow isolating trough 310 (being shown in Fig. 5).Next carry out a dry etching process, etching is not patterned the substrate 300 that hard mask layer 302 covers, to form the shallow ridges 304 that a degree of depth is about 3000 to 4000 dusts (angstrom).
See also Fig. 4 and Fig. 5.(chemical vapor deposition, CVD) etc. technology form dielectric layers 306 in substrate 300 surfaces, and dielectric layer 306 is filled up shallow ridges 304 then to utilize thermal oxidation, rotary coating (SOG) or chemical vapour deposition (CVD).(chemical mechanicalpolishing CMP) carries out flatening process, with the dielectric layer 306 on removal substrate 300 surfaces, and forms an even curface to utilize a chemical mechanical polishing method again.Remove substrate 300 lip-deep patterning hard mask layer 302 at last, finish the making of shallow isolating trough 310.Simultaneously, shallow isolating trough 310 is also in order to defining an active region 320, and includes an optical sensing area 322 in the active region 320.
See also Fig. 6.In optical sensing area 322, carry out a light ion injection technology subsequently respectively,, and then carry out a heavy ion injection technology, on lightly-doped layer 332, to form a heavily doped layer 334 with formation one lightly-doped layer 332 in this substrate.So, finish a making of clamping down on type photodiode 330.
See also Fig. 7.After treating that photodiode 330 is finished, form another patterning hard mask layer (figure do not show) again in the surface of substrate 300, the composite bed that is made of pad oxide and silicon nitride layer for example is used for defining the position of a localized oxidation of silicon insulating barrier 340; And carry out a localized oxidation of silicon (LOCOS) technology, and form a localized oxidation of silicon insulating barrier 340 in photodiode 330 surfaces.It should be noted that localized oxidation of silicon insulating barrier 340 covers the part of photodiodes 330 can be in order to as its protective layer, and its thickness is about the 100-1000 dust.Remove patterning hard mask layer (figure does not show) afterwards, forming the dielectric layer of an oxide layer 342 etc. immediately by a thermal oxidation or chemical vapor deposition (CVD) technology in the surface of substrate 300 again.In addition, also can optionally optionally before forming oxide layer 342, carry out an etch process or flatening process, with the impurity that removes substrate 300 surfaces to form the preferable oxide layer 342 of quality, and the localized oxidation of silicon insulating barrier 340 of removal part, to reduce the thickness of localized oxidation of silicon insulating barrier 340, and then the sensitization intensity of increase photodiode 330, also can make substrate 300 have a rough smooth surface in order to follow-up semiconductor technology.
See also Fig. 8.In substrate 300, form a transistorized grid 350 subsequently, and a side of grid 350 is that cross-over connection is on localized oxidation of silicon insulating barrier 340.At last, be mask with grid 350, ion is carried out in substrate 300 injects, in grid 350 not cross-over connection in the below substrate 300 of localized oxidation of silicon insulating barrier 340 sides, form a light doping section 360 and a heavily doped region 362.
It should be noted that, be carried out at before this localized oxidation of silicon technology in order to steps such as the light ion injection technology of making photodiode 330 and heavy ion injection technologies though present embodiment discloses, yet, as shown in Figure 9, those steps also can be after localized oxidation of silicon technology, before formation grid 350; In addition, as shown in figure 10, those steps also can be carried out simultaneously with the step that forms light doping section 360 and heavily doped region 362.Perhaps after all forming, light doping section 360 and heavily doped region 362 begin to carry out the making step of photodiode 330.
Because localized oxidation of silicon insulating barrier 340 is the protective layers as photodiode 330; therefore follow-up when forming the technologies such as grid 350 that partly are covered on the localized oxidation of silicon insulating barrier 340; photodiode 330 surfaces just can not suffer damage in etch process, therefore can obviously reduce such as the dark current that plasma damage caused.In addition, because the part localized oxidation of silicon insulating barrier 340 and the partial oxidation layer 342 that are covered by grid 350 all are in order to as a gate insulator (gate insulator), and the thickness of localized oxidation of silicon insulating barrier 340 is greater than oxide layer 342, that is grid oxic horizon has different thickness, so when the voltage that puts on grid 350 is slightly less than threshold voltage (threshold voltage, V Th) time, grid 350 can be closed immediately, thereby more can effectively reduce dark current.
See also Figure 11 to Figure 17, Figure 11 to Figure 17 is another preferred embodiment schematic diagram according to the manufacture method of image sensing element provided by the present invention.As shown in figure 11, at first provide a substrate 400, form a patterning hard mask layer 402 in the surface of substrate 400, for example include the composite bed of a pad oxide and a silicon nitride layer, in order to define the position of a shallow isolating trough 410 (being shown in Figure 12).Next carry out a dry etching process, etching is not patterned the substrate 400 that hard mask layer 402 covers, to form the shallow ridges 404 that a degree of depth is about 3000 to 4000 dusts.
See also Figure 12.Next utilize technologies such as thermal oxidation, rotary coating (SOG) or chemical vapour deposition (CVD), form a dielectric layer (figure does not show) in substrate 400 surfaces, and fill up shallow ridges 404.Promptly utilize a chemical mechanical polishing method to carry out flatening process subsequently, the dielectric layer (figure does not show) to remove substrate 400 surfaces obtains a rough even curface, and form a shallow isolating trough 410, and shallow isolating trough 410 defines the position of an active region 420.In addition, include an optical sensing area 422 in the active region 420.
See also Figure 13, carry out a photoetching and etch process afterwards, remove the patterning hard mask layer 402 of part, and in optical sensing area 422, define the position of a photodiode 430 and a localized oxidation of silicon insulating barrier 440 (being shown in Figure 14) formation.And with patterning hard mask layer 402 as a mask, a light ion injection technology is carried out in substrate 400, and in optical sensing area 422, form a lightly-doped layer 432, and then carry out a heavy ion injection technology, to form a heavily doped layer 434, finish a making of clamping down on type photodiode 430 in lightly-doped layer 432 tops.
See also Figure 14 and Figure 15, treat that photodiode 430 is finished after, utilize patterning hard mask layer 402 as mask again, carry out a localized oxidation of silicon (LOCOS) technology, form localized oxidation of silicon insulating barriers 440 with the substrate in active region 420 400 surface.It should be noted that localized oxidation of silicon insulating barrier 440 covers photodiode 430, can be in order to protective layer as photodiode 430, its thickness is about the 100-1000 dust, removes the patterning hard mask layer 402 on substrate 400 surfaces at last.
See also Figure 16 and Figure 17.Next utilize thermal oxidation or chemical vapor deposition (CVD) technology on substrate 400 surfaces, to form the dielectric layer of oxide layer 442 etc. again, also can optionally optionally before forming oxide layer 442, carry out an etch process or flatening process, with the impurity that removes substrate 400 surfaces to form the preferable oxide layer 442 of quality, and the localized oxidation of silicon insulating barrier 440 of removal part, to reduce the thickness of localized oxidation of silicon insulating barrier 440, and then the sensitization intensity of increase photodiode 430, and can make substrate 400 have a rough smooth surface, in order to follow-up semiconductor technology.Form a transistorized grid 450 afterwards again, and a side of grid 450 is that cross-over connection is on localized oxidation of silicon insulating barrier 440.At last, be mask with grid 450, ion is carried out in substrate 400 injects, in grid 450 not cross-over connection in the below substrate 400 of localized oxidation of silicon insulating barrier 440 sides, form a light doping section 460 and a heavily doped region 462.
As previously mentioned, be carried out at before this localized oxidation of silicon technology in order to steps such as the light ion injection technology of making photodiode 430 and heavy ion injection technologies though present embodiment discloses, yet those steps also can be after localized oxidation of silicon technology, before formation grid 450; In addition, those steps also can be carried out simultaneously with the step that forms light doping section 460 and heavily doped region 462, perhaps begin to carry out the making step of photodiode 430 after light doping section 460 and heavily doped region 462 all form.Because the order that those technologies are carried out is identical with Fig. 9 and Figure 10, therefore do not add to give unnecessary details.
Because localized oxidation of silicon insulating barrier 440 is the protective layers as photodiode 430; therefore follow-up when forming the technologies such as grid 450 that partly are covered on the localized oxidation of silicon insulating barrier 440; photodiode 430 surfaces just can not suffer damage in etch process, with effective minimizing such as dark current that plasma damage was caused.In addition, because the part localized oxidation of silicon insulating barrier 440 and the partial oxidation layer 442 that are covered by grid 450 are in order to as gate insulator, and the thickness of localized oxidation of silicon insulating barrier 440 is greater than oxide layer 442, so grid oxic horizon has different thickness, be slightly less than threshold voltage (V so work as the voltage that puts on grid 450 Th) time, grid 450 can be closed immediately, thereby more can effectively reduce dark current.
According to cmos image sensing element provided by the present invention and its manufacture method, can be used for making one 4 transistors (4-Transistor) cmos image sensing element.It should be noted that; because shallow isolating trough of the present invention is to separate making with the localized oxidation of silicon insulating barrier; and shallow isolating trough is the usefulness as the electrical isolation of each active region; the localized oxidation of silicon insulating barrier then is as the protective layer of photodiode and the grid oxic horizon of grid; so the present invention can be under the condition that does not influence the requirement of cmos image sensing element integrated level; provide one effectively to protect photodiode surface to avoid technology destruction, and can significantly reduce the image sensing element of dark current.What is more, owing to have different-thickness, therefore more provide one effectively to close the mechanism of grid, and can more reduce the generation of dark current according to the formed grid oxic horizon of manufacture method provided by the present invention.
The above only is the preferred embodiments of the present invention, and all equalizations of doing according to claim of the present invention change and modify, and all should belong to covering scope of the present invention.

Claims (28)

1. the manufacture method of an image sensing element comprises:
Substrate is provided;
In this substrate, form a plurality of shallow isolating trough, in order to isolating and to define a plurality of active regions, and comprise the optical sensing area of photodiode in these a plurality of active regions respectively;
Carry out localized oxidation of silicon technology, form the localized oxidation of silicon insulating barrier respectively with the substrate surface in the optical sensing area of this photodiode, this localized oxidation of silicon insulating barrier covers the optical sensing area of this photodiode fully;
In these a plurality of active regions, form transistorized grid respectively, and this localized oxidation of silicon insulating barrier of this grid cover part; And
In this substrate, form a plurality of doped regions.
2. the method for claim 1, wherein the manufacture method of this shallow isolating trough comprises:
Form patterning hard mask layer in this substrate surface, in order to define the position of these a plurality of shallow isolating trough;
Carry out dry etching process, this substrate that etching is not covered by this patterning hard mask layer is to form a plurality of shallow ridges;
Carry out chemical vapor deposition method, forming first dielectric layer in this substrate surface, and this first dielectric layer fills up this a plurality of shallow ridges; And
Carry out flatening process, remove this first dielectric layer of this substrate surface.
3. method as claimed in claim 2 also comprises photoetching and etch process, is carried out at after this flatening process, in order to this patterning hard mask layer of removal part, and defines the position that this localized oxidation of silicon insulating barrier forms in these a plurality of active regions.
4. method as claimed in claim 3 also comprises the step that removes this patterning hard mask layer fully, is carried out at after this localized oxidation of silicon technology.
5. method as claimed in claim 4 also comprises the step that forms second dielectric layer, is carried out to remove fully after this patterning hard mask layer, to form this second dielectric layer in this substrate surface.
6. method as claimed in claim 5, wherein this second dielectric layer of part is also covered by this grid.
7. method as claimed in claim 6 is in order to as gate insulator by this second dielectric layer that this grid covered and this localized oxidation of silicon insulating barrier wherein.
8. method as claimed in claim 2, wherein the degree of depth of these a plurality of shallow ridges is 3000 to 4000 dusts.
9. the method for claim 1 also be included in the step that forms photodiode in the optical sensing area of this photodiode, and this step comprises:
Carry out the light ion injection technology, in the optical sensing area of this photodiode, to form lightly-doped layer; And
Carry out the heavy ion injection technology, on this lightly-doped layer, to form heavily doped layer.
10. method as claimed in claim 9, the step that wherein forms this photodiode is carried out at before this localized oxidation of silicon technology.
11. method as claimed in claim 9, the step that wherein forms this photodiode are carried out at after this localized oxidation of silicon technology and form before this grid.
12. method as claimed in claim 9, the step that wherein forms this photodiode is carried out simultaneously with the step that forms these a plurality of doped regions.
13. method as claimed in claim 9, wherein this photodiode is to clamp down on the type photodiode.
14. method as claimed in claim 9, wherein this localized oxidation of silicon insulating barrier covers this photodiode, and as the protective layer of this photodiode.
15. the method for claim 1, wherein the thickness of this localized oxidation of silicon insulating barrier is the 100-1000 dust.
16. the method for claim 1, also be included in form this localized oxidation of silicon insulating barrier after, form dielectric layer in this substrate surface.
17. method as claimed in claim 16, wherein this dielectric layer is also covered by this grid, in order to the gate insulator as this grid.
18. the method for claim 1 is in order to the gate insulator as this grid by this localized oxidation of silicon insulating barrier that this grid covers wherein.
19. the method for claim 1, wherein this doped region be formed at this grid not cross-over connection in the substrate of a side of this localized oxidation of silicon insulating barrier.
20. the method for claim 1, wherein this method is in order to make 4 transistor image sensing elements.
21. an image sensing element comprises:
Substrate;
Shallow isolating trough is in order to define active region;
Photodiode is arranged in this substrate in this active region;
The localized oxidation of silicon insulating barrier covers the surface of this photodiode fully;
Grid is arranged at the substrate surface in this active region, and this localized oxidation of silicon insulating barrier of cover part; And
Doped region is arranged in this substrate.
22. image sensing element as claimed in claim 21, wherein the degree of depth of this shallow isolating trough is 3000 to 4000 dusts.
23. image sensing element as claimed in claim 21, wherein this photodiode is to clamp down on the type photodiode.
24. image sensing element as claimed in claim 21, wherein the thickness of this localized oxidation of silicon insulating barrier is 100 to 1000 dusts.
25. image sensing element as claimed in claim 21 also comprises the dielectric layer that covers this substrate, and this dielectric layer of part is covered by this grid.
26. image sensing element as claimed in claim 25 by this localized oxidation of silicon insulating barrier of part and this dielectric layer that this grid covered, is in order to the gate insulator as this grid wherein.
27. image sensing element as claimed in claim 21, wherein this doped region be formed at this grid not cross-over connection in the substrate of a side of this localized oxidation of silicon insulating barrier.
28. image sensing element as claimed in claim 21, wherein this image sensing element is 4 transistor image sensing elements.
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