CN100502063C - 发光二极管及其制造方法 - Google Patents
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Abstract
提供一种发光二极管(LED)及其制造方法,其能够通过形成含有低浓度铟的InGaN层而改善亮度,所述InGaN层的晶格常数类似于所述LED的活性层的晶格常数。所述LED包括:置于蓝宝石衬底上的缓冲层;置于所述缓冲层上的GaN层;置于所述GaN层上的掺杂GaN层;置于所述GaN层上的含铟GaN层;置于所述含铟GaN层上的活性层;和置于所述活性层上的P型GaN。此处,含铟GaN层的经验式以InxGa(1-x)N给出并且x的范围以0<x<0.2给出,所述含铟GaN层的厚度是50-200。
Description
技术领域
本发明涉及发光二极管,更具体而言,涉及一种可以通过形成含铟(In)层而改善光效率的发光二极管及其制造方法,所述含铟层的晶格常数类似于形成在所述LED中的活性层的晶格常数。
背景技术
通常,发光二极管(LED)是一种半导体器件,它利用化合物半导体的特性将电信号转变成红外线或光,以发送或接收信号。LED用于家用电器、遥控器、电子显示板、显示器件、各种自动化设备等。
下面将简要描述LED的工作原理。
当对特定化学元素的半导体施加正向电压时,电子和空穴在通过正-负结时相互重新结合。电子和空穴的重新结合导致能级下降,从而发射光。
LED通常被制成具有0.25mm2的非常小的尺寸并利用环氧树脂模安装在印刷电路板(PCB)或引线框上。
代表性的LED是5mm(T 1 3/4)的塑料封装或者是正在特定应用领域中开发的新封装。
从LED发射的光的颜色取决于所得到的波长,而所述波长取决于构成半导体芯片的元素的组合。
具体地,由于通信设备正趋于小型化和纤细化,因此通信设备具有更多的小型化部件例如电阻、电容器和噪声滤波器。LED被制成表面贴装器件的形式(下文中称作“SMD”),从而直接安装在印刷电路板(下文中称作“PCB”)上。
因此,正在研制SMD形式的用于显示器件的LED灯。这种SMD可以替代现有技术的简单灯。该SMD用于表示各种颜色的灯显示、字符显示、图像显示等。
此外,由于开发了用于半导体器件的高密度集成技术并且消费者更喜欢更小型的电子产品,因此半导体安装技术(SMT)被广泛应用,而且半导体器件的封装技术采用了使安装空间最小化的技术例如球栅阵列(BGA)、引线接合和倒装接合。
图1是说明根据现有技术制造发光二极管的方法的图。
如图1所示,氮化镓(GaN)缓冲层101形成在由Al2O3形成的蓝宝石衬底100上。接着,在GaN缓冲层101上形成没有用掺杂剂掺杂(下文中称为“未掺杂”)的GaN层103。
为了在上述蓝宝石衬底100上形成薄膜形式的基于3族的元素,通常使用金属有机化学气相沉积(MOCVD)。同时,在恒定的生长压力下形成薄膜层。
在未掺杂GaN层103上形成N型GaN层105,利用硅烷(SiH4)或乙硅烷(Si2H6)气的硅来形成N型GaN层105。
形成N型GaN层105之后,在该N型GaN层105上形成活性层109。作为发光区域的活性层109是具有由氮化铟镓(InGaN)形成的发光体的半导体层。
活性层109形成之后,随之形成P型GaN层110。
P型GaN层110与N型GaN层105相反。也就是说,在N-型GaN层105中通过外部电压使电子漂移,而在P-型GaN层110中通过外部电压使空穴漂移。因此所述空穴和所述电子在活性层109中相互重新结合,从而发射光。
在P型GaN层110上利用透明氧化铟锡(ITO)金属形成透明金属(TM)层,以便在活性层109处产生的光透过并发射到外部。
形成TM层之后,形成P型电极以完成LED。
但是,如上构造的LED存在的缺点在于,由于活性层的InGaN层和GaN层之间的晶格常数不一致导致应变增加,因此减少了活性层中产生的光的量。
此外,晶格常数的不一致使LED的产品可靠性变差。
而且,缺点还在于二维平面形式的活性层具有比三维形式更低的发光密度,所述活性层形成在与活性层相邻的N型GaN层上。
发明内容
因此,本发明涉及一种LED及其制造方法,其基本避免由于现有技术的局限性和缺点而导致的一个或多个问题。
本发明的目的是提供一种LED及其制造方法,其中在活性层和N-型GaN层之间形成含有低浓度铟(In)的GaN层以减少活性层和GaN层之间晶格常数的不一致,由此提高光效率并改善产品可靠性。
为了实现这些和其它的优点以及根据本发明的目的,如具体实例和一般描述的那样,发光二极管包含:置于蓝宝石衬底上的缓冲层;置于所述缓冲层上的GaN层;置于所述GaN层上的N型GaN层;置于所述N型GaN层上的含铟GaN层;置于所述含铟GaN层上的活性层;和置于所述活性层上的P型GaN层。
在此,含铟GaN层的经验式以InxGa(1-x)N给出并且x的范围以0<x<0.2给出,所述含铟GaN层的厚度是。
而且,制造根据本发明的LED的方法包括如下步骤:在蓝宝石衬底上形成缓冲层;在所述缓冲层上形成GaN层;在所述GaN层上形成N型GaN层;在所述N型GaN层上形成含铟GaN层;在所述含铟GaN层上形成活性层;和在所述活性层上形成P型GaN层。
根据本发明,含有低浓度铟的InGaN层形成在N型GaN层和形成于蓝宝石衬底上的活性层之间,从而防止由于GaN层和活性层之间晶格常数不一致而导致的光效率变差,并可以改善光效率。
而且,具有低铟组成的InGaN层在其表面上具有三维结构,表面的这种三维生长可以更进一步地改善光效率。
附图说明
图1是说明根据现有技术制造LED的方法的图;
图2a-2d是说明根据本发明制造LED的方法的图;和
图3是表示根据本发明制造LED的方法中的量子阱生长法形成的P型GaN层的示意图。
具体实施方式
下文中,将参照附图详细描述本发明的优选实施方案。
图2a-2d是说明根据本发明制造发光二极管(LED)的方法的图。
如图2a-2d所示,在500-600℃的温度下在蓝宝石(Al2O3)衬底200上形成具有经验式InxGa(1-x)N的缓冲层201,未掺杂的GaN层203在1000-1100℃的温度下在缓冲层201上生长至1-3μm的厚度(图2a)。
接着,N型GaN层205在1000-1100℃的温度下在未掺杂的GaN层203上生长至1-3μm的厚度(图2b)。
形成N型GaN层205之后,在形成活性层209之前,在600-800℃的温度下生长含有低摩尔铟(In)的GaN层207(图2c)。
形成InGaN层207之后,形成活性层209。
由厚度为的GaN层形成活性层209并使电子隧道进入量子阱层,由此防止空穴渗入InxGa(1-x)N(0<x<0.2)层。
具有多量子阱结构的InGaN/GaN活性层209在600-800℃的温度下在1个周期到7个周期内形成。
图3是表示根据本发明制造LED的方法中的量子阱生长方法形成的P-型GaN层的示意图。
如图3所示,在量子阱生长方法中,进行形成包含各种掺杂剂如In、Ga和N的阱层301的阱生长步骤。在此,阱层301的生长条件如下:TMGa:0-200μmol/min、TMIn:0-100μmol/min、NH3:0-80L/min、生长温度:600-800℃。
因此,提供足够的结晶时间以便包含在阱层301生长步骤中的掺杂剂可以完全相互结合以形成晶体层302,由此改善阱层301内部In和N、Ga和N、In和Ga的结合能力。
在此,晶体层302的生长时间为0.1秒-60分钟,并且N2:30-50L/min,H2:30-50L/min。
接着,进行形成包含各种掺杂剂如m、Ga和N的阻挡层303的阻挡层生长步骤。在此,阻挡层303的生长条件如下:TMGa:100-500μmol/min、TMIn:50-200μmol/min、NH3:0-80L/min、生长温度:600-800℃。
如上所述,在本发明中形成具有多量子阱结构的活性层209,在低温下在N型GaN层205上形成薄厚度的含有低浓度铟的GaN层207,从而减少了与活性层209的晶格常数的不一致并可以改善光效率。
而且,由于活性层209的InGaN层通过三维生长而形成,因此增加了在活性层209处产生的光的亮度。
工业适用性
如上文所详细描述的那样,本发明在N型GaN层和形成于蓝宝石衬底上的活性层之间形成含有低浓度铟的InGaN层,由此减少与活性层的晶格常数的不一致并改善光效率。
此外,含有低浓度铟的InGaN层在其表面上具有三维结构,在表面具有这种三维结构的情况下可以进一步改善光效率。
虽然本文中已经参照本发明优选实施方案描述和说明了本发明,但是,对本领域技术人员而言,显然可以在不偏离本发明的精神和范围的情况下在本发明中做出各种修改和变化。因此,本发明意于覆盖在所附权利要求及其等价条款范围内对本发明进行的修改和变化。
Claims (13)
1.一种发光二极管,包含:
置于衬底上的缓冲层;
置于所述缓冲层上的GaN层;
置于所述GaN层上的N型GaN层;
置于所述N型GaN层上的含铟GaN层;
置于所述含铟GaN层上的活性层;和
置于所述活性层上的P型GaN层。
2.根据权利要求1的发光二极管,其中所述活性层具有三维结构。
3.根据权利要求1的发光二极管,其中置于所述缓冲层和所述N型GaN层之间的所述GaN层是未掺杂GaN层。
4.根据权利要求1的发光二极管,其中所述含铟GaN层具有低摩尔的铟。
5.根据权利要求1的发光二极管,其中所述含铟GaN层的经验式以InxGa(1-x)N给出并且x的范围给出为0<x<0.2。
8.根据权利要求1的发光二极管,其中所述活性层是具有InGaN/GaN结构的多量子阱结构。
9.制造发光二极管的方法,包括如下步骤:
在衬底上形成缓冲层;
在所述缓冲层上形成GaN层;
在所述GaN层上形成N型GaN层;
在所述N型GaN层上形成含铟GaN层;
在所述含铟GaN层上形成活性层;和
在所述活性层上形成P型GaN层。
10.根据权利要求9的方法,其中所述含铟GaN层在600-800℃的温度下形成。
12.根据权利要求9的方法,其中所述活性层是具有InGaN/GaN结构的多量子阱结构,所述InGaN/GaN结构在600-800℃的温度条件下在所述活性层中重复堆叠1~7次。
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US8674337B2 (en) | 2003-07-18 | 2014-03-18 | Lg Innotek Co., Ltd. | Gallium nitride based light emitting diode and fabrication method thereof |
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GB2420013A8 (en) | 2007-02-20 |
GB2420013A (en) | 2006-05-10 |
US20140138621A1 (en) | 2014-05-22 |
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US20150123074A1 (en) | 2015-05-07 |
US7989235B2 (en) | 2011-08-02 |
US8680571B2 (en) | 2014-03-25 |
WO2005008794A1 (en) | 2005-01-27 |
US20110253978A1 (en) | 2011-10-20 |
KR101034055B1 (ko) | 2011-05-12 |
US7682849B2 (en) | 2010-03-23 |
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US20060113550A1 (en) | 2006-06-01 |
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US7531827B2 (en) | 2009-05-12 |
US9362454B2 (en) | 2016-06-07 |
US20100065816A1 (en) | 2010-03-18 |
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US20070281378A1 (en) | 2007-12-06 |
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US20130292697A1 (en) | 2013-11-07 |
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Effective date of registration: 20210812 Address after: 168 Changsheng North Road, Taicang City, Suzhou City, Jiangsu Province Patentee after: Suzhou Leyu Semiconductor Co.,Ltd. Address before: Seoul, South Kerean Patentee before: LG INNOTEK Co.,Ltd. |