CN101032192A - 无源器件结构 - Google Patents

无源器件结构 Download PDF

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CN101032192A
CN101032192A CNA2005800331605A CN200580033160A CN101032192A CN 101032192 A CN101032192 A CN 101032192A CN A2005800331605 A CNA2005800331605 A CN A2005800331605A CN 200580033160 A CN200580033160 A CN 200580033160A CN 101032192 A CN101032192 A CN 101032192A
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ceramic material
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坚吉兹·帕兰独兹
Y·闵
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Abstract

一种方法包括直接在第一导电材料的薄片上形成陶瓷材料;在该陶瓷材料上形成第二导电材料;以及烧结该陶瓷材料。一种方法包括直接在第一导电材料的薄片上形成陶瓷材料;在该陶瓷材料上形成第二导电材料,使得该陶瓷材料设置在第一导电材料和第二导电材料之间;以足够的温度进行热处理以烧结该陶瓷材料并且形成第二导电材料的薄膜;以及使用不同的导电材料涂覆第一导电材料和第二导电材料中的至少一个的暴露表面。一种器件包括第一电极和第二电极;以及该第一电极和该第二电极之间的陶瓷材料,其中该陶瓷材料被直接烧结在第一电极和第二电极中的一个上。

Description

无源器件结构
技术领域
电路结构和无源器件。
背景技术
期望紧邻着集成电路芯片或管芯设置去耦电容。随着芯片或管芯的切换速度和电流需求变得越来越高,必须增大该电容。因此,高密度集成电路芯片或管芯需要极其大量的无源元件、作为结果增加的印刷线路板(PWB)的电路密度、以及趋向于数千兆Hz范围内的更高频率,这些因素结合在一起增加了封装基板或PWB上的表面安装的无源元件的压力。通过将嵌入式无源元件(例如电容器、电阻器、电感器)与封装基板或PWB一体化,可以得到改善的性能、更好的稳定性、更小的占用空间以及更低的成本。
电容器在大部分电路设计中是主要的无源元件。适合嵌入式电容器元件的典型材料,例如,聚合物和高介电常数(高-k)的陶瓷粉合成物或高-k陶瓷粉和玻璃粉的混合物,通常限于毫微法拉/cm2和0.1微法拉/cm2的电容密度。已经进行了多种将薄膜电容器嵌入到有机基板中的尝试,例如利用以薄叠片形式使用聚酰亚胺或环氧树脂中的陶瓷填充剂。然而,已经证明加工和处理薄基芯叠片是困难的。
附图说明
通过下面的详细说明、所附权利要求和附图,各个实施例的特点、方案和优点将变得更加显而易见,在附图中:
图1示出了适于安装在印刷电路板或线路板上的芯片或管芯封装的实施例的示意性横截面侧视图;
图2示出了图1的封装基板的示意性横截面侧视图;
图3描述了形成嵌入式电容器的工艺流程图;
图4示出了其上形成导电材料层的第一导体片的侧视图;
图5示出了沉积在图4的第一导体片上的陶瓷粉;
图6示出了其上形成导电材料层的第二导体片的示意性侧视图;
图7示出了图5的结构,其中第一导体(图4)和第二导体(图6)连接到陶瓷材料的两侧;
图8示出了烧结后并且在第一导体和第二导体上具有导体材料的覆盖层的图7的结构。
具体实施方式
图1示出了集成电路封装的横截面侧视图,该集成电路封装可以物理和电连接到印刷线路板或印刷电路板(PCB)以形成电子组件。该电子组件可以是电子系统的一部分,该电子系统例如是计算机(例如台式电脑、膝上型电脑、手提式电脑、服务器等)、无线通信装置(例如蜂窝电话、无绳电话、寻呼机等)、与计算机有关的外围设备(例如打印机、扫描仪、监视器等)、娱乐设备(例如电视机、收音机、立体声系统、录音机和CD播放器、录像机、MP3(运动图像专家组、音频层3)播放器等)等。图1示出了作为台式电脑一部分的封装。
图1示出了电子组件100,该电子组件100包括物理和电连接到封装基板101的管芯110。管芯110是集成电路管芯,例如处理器管芯。电气接触点(例如,管芯110的表面上的接触焊盘)通过导电突起层(bump layer)125连接到封装基板101。封装基板101可以用于将电子组件100连接到印刷电路板130,例如主板或其它电路板。
在一个实施例中,封装基板101包括一个或多个电容器结构。参考图1,封装基板101包括嵌入在其中的电容器结构140和电容器结构150。电容器结构140和电容器结构150连接到核心基板160的两侧。在一个实施例中,核心基板160是有机核心,例如包括玻璃纤维增强材料的环氧树脂,也称为预浸材料。可以将这种结构称为集成薄膜电容器(iTFC)系统,其中该电容器被集成在封装基板中,而不是集成在例如管芯和封装基板之间的插入体中。粘附层175(例如预浸材料)覆盖在电容器结构140的上面。粘附层185在电容器结构150的下面。内建层(build-up layer)176覆盖在粘附层175的上面。内建层186在粘附层185的下面。粘附层175和粘附层185分别作为上方内建层176和下方内建层186的粘附层。每一内建层包括分别用于管芯110和封装基板101之间以及封装基板101和印刷电路板130之间的接触点的侧向平移的迹线(例如铜迹线)。此处,将由层185、150、160、140和175的组合所构成的区域称为功能核心120。
图2示出了功能核心120的一部分的放大视图。功能核心120包括核心基板160并且在一个实施例中具有200μm到700μm数量级的厚度。在另一实施例中,核心基板160的厚度在200μm到300μm的数量级。在一个实施例中,核心基板160包括核心162(例如玻璃纤维增强环氧树脂)以及壳体165(例如二氧化硅颗粒填充环氧树脂)。在另一实施例中,核心基板160仅包括一个核心162。
电容器结构140连接到核心基板160的一侧(如图所示的顶侧)。电容器结构140包括第一导体210和第二导体230,该第一导体210最接近核心基板160。介电材料220设置在第一导体210和第二导体230之间。电容器结构150连接到核心基板160的相对侧(如图所示的底侧)并且具有的结构类似于在两个导体之间设置介电材料的结构。粘附层175和粘附层185分别覆盖在功能核心120的电容器结构140和电容器结构150的上面(在面对核心基板160的两侧上),这些粘附层例如由有机材料制成并且具有10μm到50μm数量级的典型厚度。将图1的内建层176和内建层186沉积在这些粘附层上。如上所述,内建层可以包括迹线和接触点以将封装基板分别连接至芯片或管芯和印刷电路板。
在一个实施例中,电容器结构140的第一导体210和第二导体230是导电材料。适合的材料包括但不限于镍或铜材料。在一个实施例中,介电材料220为具有较高介电常数(高-k)的陶瓷材料。代表性地,高-k材料为介电常数在100到1000的数量级的陶瓷材料。适于介电材料220的材料包括,但不限于,钛酸钡(BaTiO3)、钛酸锶钡((Ba,Sr)TiO3)、和钛酸锶(SrTiO3)。
在一个实施例中,电容器结构140包括第一导体210和第二导体220,第一导体210和第二导体220的厚度在20μm至50μm的数量级,并且高-k陶瓷材料的介电材料220的厚度在1μm的数量级,而在另一实施例中,其厚度小于1μm。在一个实施例中,电容器结构150与电容器结构140相似。
在图2所示的功能核心120的实施例中,电容器结构140包括在第二导体230上的覆层(overlayer)240。覆层240是任选的导电层,其可以应用在其中第二导体230是与功能核心120可能接触(expose)的材料或加工工序不相容或不太相容的材料的情况中。例如,在一个实施例中,第二导体230是镍材料。为了使得功能核心120对于随后的加工工序透明或相容于功能核心120可能接触的材料,覆层240是铜材料。典型地,如果存在覆层240,则其厚度可以在几微米的数量级。
图2示出了延伸穿过表面280和表面290之间的功能核心120的多个导电过孔。典型地,导电过孔250和导电过孔260是连接到管芯110(例如,通过导电突起层125接触图1的管芯110上的接触焊盘)的电源或地接触点的适当极性的导电材料(例如,铜或银)。利用这种方式,导电过孔250和导电过孔260延伸通过电容器结构140、核心基板160和电容器结构150。在需要的情况下,可以利用介电材料的套管270将导电过孔250和260与电容器结构140或电容器结构150的部分隔离。
图3介绍了形成封装基板,例如封装基板120的工艺。在一个实施例中,形成诸如电容器结构140和电容器结构150等电容器结构,然后分别连接到核心基板160。图4-8示出了与如图3所示的部分工艺流程有关的形成过程,特别是形成电容器结构的实施例。
在形成封装结构的电容器结构的一个实施例中,提供第一导体材料的薄片(例如箔)作为初始基板。典型地,提供具有期望厚度的镍薄片(例如,箔)。代表性的厚度依据特定设计参数在几微米到几十微米的数量级上。在一个实施例中,镍薄片应该是标准包金箔或镀敷的镍片。适合作为第一导体的薄片的尺寸可以根据例如在它们的生产中涉及的板空间(board shop)的要求而变化。例如,可以期望加工长度和宽度尺寸在200-400毫米数量级的薄片,利用其可以对多个电容器结构单个化。单个电容器的大小可以在硅管芯尺寸到基板尺寸之间变化。
直接在第一导体的表面上,沉积作为印刷电路基板介电材料的陶瓷材料(方框310)。典型地,陶瓷粉颗粒可以沉积在表面上,该表面包括第一导体薄片或箔的整个表面。在一个实施例中,为了形成厚度在1微米数量级的高-k材料的介电层,在第一导体层上沉积平均直径在0.05μm到0.3μm的数量级的陶瓷粉颗粒。在另一实施例中,在介电层的厚度小于1微米的情况下,可以使用更小的陶瓷粉颗粒。例如,为了形成厚度在0.1μm到0.2μm的数量级的介电层,粒子大小为30纳米(nm)到40nm的粒子是适合的。
图4示出了由例如镍薄片或箔的第一导体410构成的结构425,在第一导体410的表面上(如图所示的顶面)具有镍浆料的层420。在一个实施例中,图4的镍浆料层420具有钛酸钡粉添加剂,以便在在下面的镍箔和即将被沉积的上覆钛酸钡印刷电路基板之间设置粘附层。
图5示出了具有高介电常数的陶瓷层430(例如BaTiO3)的结构435,其中该陶瓷层430沉积在结构425上。在一个实施例中,陶瓷层430或印刷电路基板层叠在下面的Ni浆料层420上。
图6示出了与图4中所示的结构425相似的结构455,其包括在其上形成镍浆料层450的第二导体440(例如,镍薄片或箔)。随后将镍浆料-镍箔叠片455层叠在结构435的顶部(如图所示),以便形成图7的结构475。在一个实施例中,对下面的叠片,即结构475进行热处理以烧除有机成分。典型地,热处理包括在300至500℃的温度范围内持续2小时到一天的时间。
再次参考图3,在导体材料之间形成高-k介电材料的结构后,随后在还原性气氛中对复合结构热处理,以便同时增加(例如,减少表面能)钛酸钡印刷电路基板和镍浆料层的密度。一旦该热处理完成,则产品将具有足够的强度以进行封装和加工,而且该产品将具有足够密集的微结构,其中具有非常少量的孔隙,这导致陶瓷高的介电常数。图7示出了复合结构475,该复合结构475包括设置在第一导体410和层420之间以及层440和第二导体450之间的陶瓷层430。
在热处理后,图3的方法提供在层410和层440中的一个或两个涂覆不同的导电材料。图8示出了结构495,其中两个铜层已经分别沉积在结构475的顶面和底面上。在一个实施例中,通过无电淀积沉积铜层460和铜层470。随后,在铜层460和铜层470的各自表面上通过电镀连续沉积铜层480和490。铜层480和490的厚度可以在几微米的数量级。可选择地,铜层可以通过沉积包括铜颗粒的铜浆料并且烧结该浆料来形成。
期望铜涂层使电容器结构对于随后的加工工序是透明的,其中该电容器结构或封装基板可能暴露在该加工工序中。在该实例中,在第一导体410和第二导体450例如是镍材料的情况下,期望使用铜材料涂覆第一或第二导体的暴露表面。
参考图3的工艺或方法300,电容器结构可以附着到核心基板,例如上面论述的有机核心基板(方框350)。在该实例中,在铜层覆盖导体的情况下,需要使铜表面粗糙化(例如,通过蚀刻),以便增强叠层结构。电容器结构可以附着到基底基板的一个表面。以相似方式形成的单独的电容器结构能够被层叠到另一表面上,如图2所示并且如附带文本所述。
在将一个或多个电容器结构层叠到核心基板后,可以对封装基板构图(方框360)。可以使用传统的构图方法,例如机械钻孔、使用激光在环氧树脂中钻过孔、过孔形成中所使用的光刻和镀铜操作。电容器结构还可以被构图以形成单个电容器。可以通过在基板上添加有机材料(例如,环氧树脂或玻璃颗粒填充环氧树脂)的内建层来形成完整的有机基板。
上面的说明涉及在封装基板中形成电容器结构。可以使用类似工艺形成其它环境中的电容器结构,如在印刷线路板(例如,印刷电路板)中。所述工艺避免了以下加工工序:将陶瓷和导体粉浆料沉积在载体薄片上并且彼此层叠(例如,在传统制造多层陶瓷电容器(MLCC)中)。取而代之,陶瓷和可能的导体材料都直接在彼此上形成。
在前述详细说明中,参照了其特定实施例。然而,在不脱离以下权利要求的较宽精神和范围的情况下,显然可以对其进行各种修改和变形。因此,说明书和附图应被理解为是示例性的而非限制性的。

Claims (23)

1、一种方法,其包括:
直接在第一导电材料的薄片上形成陶瓷材料;
在该陶瓷材料上形成第二导电材料;以及
烧结该陶瓷材料。
2、如权利要求1所述的方法,其中该第二导电材料是浆料并且用于烧结该陶瓷材料的条件将该浆料转变为薄膜。
3、如权利要求1所述的方法,其中在烧结后,使用铜材料涂覆该第一导电材料的暴露表面和该第二导电材料的暴露表面中的至少一个暴露表面。
4、如权利要求3所述的方法,其中涂覆包括镀敷该铜材料。
5、如权利要求3的方法,其中涂覆包括沉积包含铜颗粒的铜浆料以及烧结该浆料中的该铜颗粒。
6、如权利要求1所述的方法,其中该第一导电材料、该陶瓷材料和该第二导电材料组成复合结构并且该方法包括将该复合结构耦合到有机基板上。
7、如权利要求6所述的方法,其中该复合结构是耦合到该有机基板的第一表面的第一复合结构,并且该方法包括将第二复合电容器结构耦合到该有机基板的相对第二表面上。
8、如权利要求1所述的方法,其中烧结该陶瓷材料包括在还原气氛中烧结。
9、如权利要求1所述的方法,其中该第一导电材料和该第二导电材料均包括镍材料。
10、如权利要求1所述的方法,其中该陶瓷材料的厚度在小于1微米的数量级。
11、一种方法,包括:
直接在第一导电材料的薄片上形成陶瓷材料;
在该陶瓷材料上形成第二导电材料,使得该陶瓷材料设置在该第一导电材料和该第二导电材料之间;
以足够的温度和持续时间进行热处理以烧结该陶瓷材料;以及
使用不同的导电材料涂覆该第一导电材料和该第二导电材料中的至少一个的暴露表面。
12、如权利要求11所述的方法,其中所述不同的导电材料包括铜,并且涂覆包括镀敷该铜材料。
13、如权利要求11所述的方法,其中该第一导电材料、该陶瓷材料和该第二导电材料组成复合结构,并且该方法包括将该复合结构耦合到有机基板上。
14、如权利要求13所述的方法,其中该复合结构是耦合到该有机基板的第一表面的第一复合结构,并且该方法包括将第二复合电容器结构耦合到该有机基板的相对第二表面上。
15、如权利要求11所述的方法,其中该第一导电材料和该第二导电材料都包括镍材料。
16、如权利要求11所述的方法,其中该陶瓷材料的厚度在小于1微米的数量级。
17、一种器件,包括:
第一电极;
第二电极;和
该第一电极和该第二电极之间的陶瓷材料,
其中该陶瓷材料被直接烧结在该第一和第二电极中的一个上。
18、如权利要求17所述的器件,其中该第一电极、该第二电极和该陶瓷材料组成电容器结构,该器件还包括有机基板,其中该电容器结构耦合到该有机基板的表面上。
19、如权利要求18所述的器件,其中该电容器结构是第一电容器结构,并且该器件还包括耦合到该有机基板的相对第二表面的第二电容器结构。
20、如权利要求17所述的器件,其中该第一电极和该第二电极中的至少一个包括第一薄膜和第二薄膜的复合物,该第一薄膜设置在该第二薄膜和该陶瓷材料之间。
21、如权利要求20所述的器件,其中该第一薄膜包括镍,并且该第二薄膜包括铜。
22、如权利要求17所述的器件,其中该陶瓷材料包括厚度为1微米数量级的薄膜。
23、如权利要求18所述的器件,其中该器件包括封装基板。
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WO2006047189A3 (en) 2006-07-27
TW200628026A (en) 2006-08-01
US20070271752A1 (en) 2007-11-29
US20060097246A1 (en) 2006-05-11
TWI314028B (en) 2009-08-21
US7733626B2 (en) 2010-06-08
US7290315B2 (en) 2007-11-06
KR20070048802A (ko) 2007-05-09
CN101032192B (zh) 2011-12-14
KR100907045B1 (ko) 2009-07-09

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