CN101034732A - 电阻随机存取存储器装置 - Google Patents

电阻随机存取存储器装置 Download PDF

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CN101034732A
CN101034732A CNA2006101701004A CN200610170100A CN101034732A CN 101034732 A CN101034732 A CN 101034732A CN A2006101701004 A CNA2006101701004 A CN A2006101701004A CN 200610170100 A CN200610170100 A CN 200610170100A CN 101034732 A CN101034732 A CN 101034732A
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current control
control layer
resistance
memory device
random memory
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CN101034732B (zh
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李明宰
朴允童
黄显相
李东洙
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Samsung Electronics Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5685—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using storage elements comprising metal oxide memory material, e.g. perovskites
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0007—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/821—Device geometry
    • H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/883—Oxides or nitrides
    • H10N70/8833—Binary metal oxides, e.g. TaOx
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/30—Resistive cell, memory material aspects
    • G11C2213/32—Material having simple binary metal oxide structure
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/50—Resistive cell structure aspects
    • G11C2213/56—Structure including two electrodes, a memory active layer and a so called passive or source or reservoir layer which is NOT an electrode, wherein the passive or source or reservoir layer is a source of ions which migrate afterwards in the memory active layer to be only trapped there, to form conductive filaments there or to react with the material of the memory active layer in redox way

Abstract

本发明提供了一种电阻随机存取存储器装置，其包括：下电极；第一氧化物层，形成在下电极上并使用两个电阻状态存储信息；电流控制层，由位于第一氧化物层上的第二氧化物形成；和上电极，堆叠在电流控制层上。

Description

电阻随机存取存储器装置
技术领域
本发明涉及一种电阻存储器装置，且更具体而言，涉及一种在低功率下驱动的电阻随机存取存储器(RRAM)装置。
背景技术
RRAM主要使用电阻值随过渡金属氧化物的电压变化的特性(电阻变化特性)并包括中心氧化物层和上、下电极。
参考图1A，存储器10包括依次堆叠的下电极11、氧化物层12和上电极13。氧化物层12作为存储节点工作，并通常由具有可变电阻特性的金属氧化物形成，例如ZnO、TiO2、Nb2O5、ZrO2或NiOx。
使用NiOx、ZrOx、Nb2O5-x等的RRAM是具有高转换持续特性、保持特性和其他类似特性的易失存储器。已经研究了用于RRAM的各种材料。图1B是示出使用NiOx作为存储节点的常规电阻存储器的电流-电压特性的曲线图。如图1B所示，需要3mA或以上的电流来操作常规的电阻存储器。换言之，常规电阻存储器在预定值或高于预定值的电压和电流操作。可以降低电流，如果这样的话，常规电阻存储器可以消耗较少功率。
因此，需要低功耗的电阻存储器，这对于任何类型的存储器都适用。
发明内容
本发明提供了低功耗的电阻随机存取存储器(RRAM)装置。
根据本发明的一个方面，提供了一种RRAM(电阻随机存取存储器)装置，包括：下电极；第一氧化物层，形成在下电极上并使用两个电阻状态存储信息；电流控制层，由位于第一氧化物层上的第二氧化物形成；和上电极，堆叠在电流控制层上。
第一氧化物层可以由选自包括NiOx、ZrOx、Nb2O5-x、HfO、ZnO、WO3、CoO、CuO2和TiO2的组中的一种形成。
电流控制层可以由掺杂过渡金属的ZnOx和RuOx的一种或过渡金属氧化物形成。
电流控制层可以由掺杂Al和In之一的ZnO和RuOx的一种或者掺杂金属的富Zr的ZrO2和SiO2的一种形成。
电流控制层可以具有10欧姆与10k欧姆之间范围内的电阻。
附图说明
通过参考示出了本发明示范性实施例的附图，本发明的上述和其他特点和优点将变得更为明显，在附图中：
图1A是常规电阻随机存取存储器(RRAM)装置的剖面图；
图1B是示出常规RRAM装置的电流-电压特性的曲线图；
图2A是根据本发明实施例的RRAM装置的示意性剖面图；
图2B是图2A所示的RRAM装置的等效电路图；
图2C是示出根据本发明实施例的RRAM装置的电流-电压特性的曲线图；
图3是示出根据本发明实施例的RRAM的电流-电压特性的曲线图；
图4是示出在高电阻状态和低电阻状态中本发明实施例的RRAM装置和常规RRAM装置的转换周期关于电阻变化的曲线图。
具体实施方式
此后，将参考附图详细描述根据本发明的优选实施例的RRAM装置。在附图中，为了清楚起见而夸大了层的厚度和宽度。
图2A是根据本发明实施例的RRAM装置20的剖面图。参考图2A，RRAM装置20包括下电极21、第一氧化物层22、电流控制层23和上电极24。
第一氧化物层22具有可变电阻特性，且是由具有两个电阻态的过渡金属氧化物形成的存储节点。过渡金属氧化物层可以是NiOx、ZrOx、Nb2O5-x、HfO、ZnO、WO3、CoO、CuO2或TiO2。因此，在本发明中，第一氧化物层22可以由NiOx、ZrOx、Nb2O5-x、HfO、ZnO、WO3、CoO、CuO2或TiO2形成。
作为本发明的特点，电流控制层23由第一氧化物层22上的第二氧化物形成。电流控制层23可以由金属氧化物形成。根据本发明的一个方面，电流控制层23可以由掺杂In、Al或过渡金属的ZnOx或RuOx形成。根据本发明的另一方面，电流控制层23可以由掺杂金属的富Zr的ZrO2或SiO2形成。这里，电流控制层23可以具有10欧姆与10k欧姆之间范围内的电阻。
下电极21或上电极24由金属或具有电导性的金属氧化物形成。具体地，下电极21或上电极24由Ir、Ru、Pt或Ir、Ru或Pt的氧化物形成。
电流控制层23具有10欧姆与10k欧姆之间的范围内的电阻。因此，根据本实施例的RRAM装置20具有图2B所示的等效电路。参考图2B，RTE、RR、RNiO和RBE分别代表上电极24、电流控制层23、第一氧化物层22和下电极21的电阻。电阻RTE、RR、RNiO和RBE彼此串连，且根据第一氧化物层22的电阻RNiO的状态而存储1位信息。
图2C是示出在根据本发明实施例的RRAM装置中当第一氧化物层由NiO形成且电流控制层由掺杂Al的ZnO形成时，电流-电压特性随电流控制层的电阻变化的曲线图。
如图2C所示，当处于低电阻状态时电流随着电流控制层电阻的增加而降低。当处于高电压状态时无论电阻如何电流都不流动。
图3是示出根据本发明的实施例的RRAM装置的电流-电压特性的曲线图，其是在NiO层上沉积掺杂Al的ZnO层到15nm厚度之后的转换操作的测量结果。如图3所示，转换发生在100μA或以下的峰值电流处。峰值电流可以通过优化工艺而调整。
图4是示出本发明实施例的RRAM装置和常规RRAM装置的转换周期关于高电阻状态和低电阻状态的电阻变化的曲线图。如图4所示，根据现有的NiO RRAM被打开和/或关闭时测量的电阻值与用于控制电流的掺杂Al的ZnO层沉积在NiO上时测量的电阻值的对比结果，电流可以减小至少100倍或更多。
根据本发明，在作为新的存储技术而发展出的RRAM中，由实现两电阻状态的NiO、ZrOx或Nb2O5-x所形成的薄膜的高开启电流(峰值电流＞3mA)可以降低到100μA。因此，可以实现低功率存储器装置从而解决常规电阻存储器装置的高功耗问题。具有位于氧化物的与绝缘体电阻率值之间的电阻率值的掺杂氧化物薄膜有助于将具有由NiOx、ZrOx或Nb2O5-x形成的RRAM薄膜的常规存储器装置的高开启电流减小至少100倍或更多。开启电流可以基本上降低到几百μA从而实现低功率存储器装置。
根据本发明的RRAM装置的制造工艺可以是公知的制造常规DRAM的半导体工艺。
虽然由NiOx、ZrOx或Nb2O5-x形成的现有RRAM装置具有高转换持续特性、高保持特性、高操作电压和其他类似特性，但是由于高开启电流(峰值电流＞3mA)，现有的RRAM装置不能实现低功率装置。然而，用于控制电流的掺杂氧化物层可以形成在RRAM材料上以实现低功率存储器装置。
使用具有氧化物与绝缘体的电阻率值之间的电阻率的掺杂氧化物层，由NiOx、ZrOx或Nb2O5-x形成的RRAM的高开启电流可以减小至少100倍或更多。开启电流可以基本上减小到几百μA。本发明可以应用到使用具有两电阻状态的氧化物的RRAM装置。
例如，电流控制层可以由掺杂过渡金属的ZnOx和RuOx的一种或过渡金属氧化物形成。
虽然参考其示范性实施例示出并描述了本发明，但本领域的普通技术人员将理解，可以进行各种形式和细节的变化而不脱离由权利要求所限定的本发明的精神和范围。

Claims (7)

1、一种电阻随机存取存储器装置，包括：
下电极；
第一氧化物层，形成在所述下电极上并使用两个电阻状态存储信息；
电流控制层，由位于所述第一氧化物层上的第二氧化物形成；和
上电极，堆叠在所述电流控制层上。
2、根据权利要求1所述的电阻随机存取存储器装置，其中所述第一氧化物层由选自包括NiOx、ZrOx、Nb2O5-x、HfO、ZnO、WO3、CoO、CuO2和TiO2的组中的一种形成。
3、根据权利要求1所述的电阻随机存取存储器装置，其中所述电流控制层由掺杂过渡金属的ZnOx和RuOx中的一种形成。
4、根据权利要求1所述的电阻随机存取存储器装置，其中所述电流控制层由过渡金属氧化物形成。
5、根据权利要求1所述的电阻随机存取存储器装置，其中所述电流控制层由掺杂Al和In之一的ZnO和RuOx中的一种形成。
6、根据权利要求1所述的电阻随机存取存储器装置，其中所述电流控制层具有在10欧姆到10k欧姆范围内的电阻。
7、根据权利要求1所述的电阻随机存取存储器装置，其中所述电流控制层由掺杂金属的富Zr的ZrO2和SiO2之一形成。
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