CN101208799A - 电迁移抗性和顺应导线互连、纳米焊料成分、由其制成的系统以及组装焊接封装的方法 - Google Patents

电迁移抗性和顺应导线互连、纳米焊料成分、由其制成的系统以及组装焊接封装的方法 Download PDF

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CN101208799A
CN101208799A CNA200680022890XA CN200680022890A CN101208799A CN 101208799 A CN101208799 A CN 101208799A CN A200680022890X A CNA200680022890X A CN A200680022890XA CN 200680022890 A CN200680022890 A CN 200680022890A CN 101208799 A CN101208799 A CN 101208799A
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wire interconnects
metal
solder bump
nano
product
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CN101208799B (zh
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F·华
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Intel Corp
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Intel Corp
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Abstract

纳米金属微粒成分包括具有大约50纳米或者更小的微粒大小的第一金属。导线互连与回流纳米焊料接触，并且具有与回流纳米焊料相同的金属或合金成分。还公开了采用回流纳米焊料成分的微电子封装。一种组装微电子封装的方法包括制备导线互连模板。计算系统包括与导线互连耦合的纳米焊料成分。

Description

电迁移抗性和顺应导线互连、纳米焊料成分、由其制成的系统以及组装焊接封装的方法
相关申请
本专利申请要求2005年6月30日提交的11/173939号美国申请的优先权，通过引用将它结合到本文中。
技术领域
所公开的实施例涉及用于微电子装置封装的纳米焊膏成分(nano-sized solder paste composition)。
背景技术
集成电路(IC)管芯往往制作到处理器中用于各种任务。IC操作问题引起管芯封装中的热发生和热膨胀应力。高熔点焊料虽然经得起管芯中的密集电路所引起的高工作温度，但是它们要求高处理温度，这可能因半导体管芯与有机衬底之间的热膨胀系数(CTE)不匹配而导致高热机应力。但是，对于低熔点焊料，电迁移更容易发生。另外，腐蚀可能在焊料突块与接合焊盘的两种异类金属之间发生。
附图说明
为了理解获得实施例的方式，通过参照附图来提供各种实施例的更具体描述。要理解，这些附图仅说明典型实施例，它们不一定按规定比例绘制，因而不要看作是对其范围的限制，将通过采用附图以附加特定性和细节来描述和说明一些实施例，附图包括：
图1A是根据一个实施例在处理期间的微电子装置的横截面；
图1B是进一步处理之后、图1A所示的微电子装置的横截面；
图1C是进一步处理之后、图1B所示的微电子装置的横截面；
图1D是进一步处理之后、图1C所示的微电子装置的横截面；
图1E是进一步处理之后、图1D所示的微电子装置的横截面；
图1F是根据一个实施例的进一步处理之后、图1C所示的微电子装置的横截面；
图2是根据一个实施例、图1C所示的纳米焊膏复合材料的计算机图像横截面细节；
图3A是根据一个实施例在处理期间的互连模板的横截面；
图3B是根据一个实施例进一步处理之后、图3A所示的互连模板的横截面；
图4是根据一个实施例在处理期间的互连模板的横截面；
图5是根据一个实施例在处理期间的互连模板的横截面；
图6是根据一个实施例的封装的横截面；
图7是根据一个实施例的封装的横截面；
图8是根据各种实施例的过程流程图；以及
图9是根据一个实施例的计算系统的说明。
具体实施方式
以下描述包括诸如上、下、第一、第二等的术语，它们仅用于进行描述而不是要理解为限制。本文所述的装置或产品的实施例可通过多个位置和取向来制造、使用或装运(ship)。术语“管芯”和“芯片”一般表示作为通过各种过程操作变换为预期集成电路装置的基本工件的物理对象。管芯通常从晶片分割，以及晶片可由半导体、非半导体或者半导体和非半导体材料的组合来制作。底板(board)通常是用作管芯的安装衬底的树脂浸渍玻璃纤维结构。
一个实施例涉及嵌入纳米焊料中的导线互连。纳米焊料从包含具有范围从大约2纳米(nm)至大约50nm的直径的金属微粒的焊膏产生。此后，焊膏回流，并得到范围从大约50纳米(nm)至大约20微米(μm)大小的固化颗粒。一个实施例包括基本上是相同的金属的导线互连和纳米焊料。“基本上相同的金属”意在表示金属或合金的基本上相同的化学成分。因此，一个实施例包括一种以基本上是相同金属的导线互连和纳米焊料的存在所允许的电流密度来操作装置的方法。在一个实施例中，对于装置可保持的电流密度高达106amp/cm2。
现在参照附图，其中，对相同结构提供相同的附图标记。为了最清楚地说明结构和过程的实施例，本文包含的附图是实施例的图解表示。因此，例如显微照片中的制造结构的实际外观可能看起来不同，但仍然结合实施例的基本结构。此外，附图仅示出理解实施例所需的结构。没有包括本领域已知的其它结构，以保持附图的清晰。
图1A是根据一个实施例在处理期间的微电子装置100的横截面。例如可能是处理器的管芯的衬底110包括用于从衬底100对外部世界进行电气通信的接合焊盘112。微电子装置100表示为采用暴露接合焊盘112的成型掩模114来处理。
在一个实施例中，接合焊盘112是可接触若干金属化层的任何一个的铜金属化上层。例如，诸如微电子装置中的金属一(M1，未示出)等金属化层与接合焊盘112进行电气接触。在另一个实例中，诸如金属二(M2，未示出)等的金属化层与接合焊盘112进行电气接触。M2与M1进行电气接触。在另一个实例中，诸如金属三(M3，未示出)等的金属化层与接合焊盘112进行电气接触。M3与M2进行电气接触，M2又与M1进行电气接触。在另一个实例中，诸如金属四(M4，未示出)等的金属化层与接合焊盘112进行电气接触。M4与M3进行电气接触。M3与M2进行电气接触，M2又与M1进行电气接触。在另一个实例中，诸如金属五(M5，未示出)等金属化层与接合焊盘112进行电气接触。M5与M4进行电气接触。M4与M3进行电气接触。M3与M2进行电气接触，M2又与M1进行电气接触。在另一个实例中，诸如金属六(M6，未示出)等的金属化层与接合焊盘112进行电气接触。M6与M5进行电气接触。M5与M4进行电气接触。M4与M3进行电气接触。M3与M2进行电气接触，M2又与M1进行电气接触。在另一个实例中，诸如金属七(M7，未示出)等的金属化层与接合焊盘612进行电气接触。M7与M6进行电气接触。M6与M5进行电气接触。M5与M4进行电气接触。M4与M3进行电气接触。M3与M2进行电气接触，M2又与M1进行电气接触。通过本公开，各种半导体衬底结构可适用于各种实施例，这点将变得很清楚。
图1B是进一步处理之后、图1所示的微电子装置101的横截面。根据本公开中阐述的各种实施例，在一个实施例中作为成型光致抗蚀剂的成型掩模114已经采用纳米微粒焊膏116、如纳米微粒焊膏粉末116填充。
在一个实施例中，纳米微粒焊膏116包括在处理中用于纳米微粒焊膏116的挥发性粘合剂和焊剂载体。在一个实施例中，没有进行成型本身，而是平整地形成(blanket form)加焊剂的纳米微粒(以下称作纳米焊料)焊膏，以及在加热到足够温度的过程中，焊剂载体液化并优先湿润接合焊盘112，并优先变得避开衬底110，即，它不像湿润接合焊盘112那样湿润衬底110。衬底110可以是半导体、电介质以及它们的组合。
图1C是进一步处理之后、图1B所示的微电子装置102的横截面。在这个实施例中，已经去除成型掩模114。可通过将它从衬底110拉开，由此留下直接在接合焊盘112之上作为分立岛形成的纳米焊膏116，来进行成型掩模114的去除。
图2示出图1C所示的微电子装置的一部分的放大。图2截自图1C所示的虚线2中的区域。图2示出作为焊膏基质220中的金属微粒成分218的金属微粒成分前体(precursor)。金属微粒成分218包含本公开中阐述的金属微粒成分实施例其中之一。由于焊膏基质220充分防止金属微粒成分218受到腐蚀和/或氧化影响，所以金属微粒成分218可在回流期间阻止显著的颗粒增长。在一个实施例中，回流之后的金属微粒成分218具有范围从大约50nm至小于或等于大约20μm的颗粒大小。
在一个实施例中，金属微粒成分218包括具有范围从大约2nm至50nm的大小的微粒。在一个实施例中，金属微粒成分218包括具有范围从大约10nm至大约30nm的大小的微粒。在一个实施例中，金属微粒成分218包括具有小于或等于大约20nm的98％的范围的大小的微粒。
由于微粒大小的实施例，引起从固体到固相线的转变的金属微粒成分的金属微粒的核化可在大约400℃或以下开始。例如，金可能在大约300℃遇到固-固相线(solid-to-solidus)转变。
在一个实施例中，金属微粒成分218包括等于或低于大约400℃的熔解温度。根据金属类型和微粒大小，金属微粒成分218可具有几百度的熔解温度的变化。例如，固体金具有大约1064℃的熔解温度。当金形成本文阐述的纳米微粒时，熔解温度可降低到大约300℃。
在一个实施例中，金属微粒成分218包括具有小于或等于大约20nm的范围的微粒大小的第一金属，以及第一金属作为纯金属或者作为宏观单相合金单独存在。在一个实施例中，金属微粒成分218包括银(Ag)。在一个实施例中，金属微粒成分218包括铜(Cu)。在一个实施例中，金属微粒成分218包括金(Au)。在一个实施例中，金属微粒成分218包括金锡合金(Au80Sn20)。在一个实施例中，金属微粒成分218包括锡(Sn)。在一个实施例中，金属微粒成分218包括上述金属微粒成分中的至少两个的组合。在一个实施例中，金属微粒成分218包括上述金属微粒成分中的至少三个的组合。
在一个实施例中，金属微粒成分218包括Au80Sn20焊料合金，其中包含作为核心结果的Au以及作为壳层结构的Sn。在一个实施例中，第一金属包括银，以及壳层结构从铜、金、铅和锡中选取。在一个实施例中，核心结构包括金，以及壳层结构从铜、银、铅和锡中选取。在一个实施例中，核心结构包括铅，以及壳层结构从铜、银、金和锡中选取。在一个实施例中，核心结构包括锡，以及壳层结构从铜、银、金和铅中选取。在一个实施例中，上述核心结构和壳层结构金属微粒成分的任何一个包括以比壳层结构更大量存在的核心结构。
在一个实施例中，核心结构具有第一熔解温度，以及壳层结构具有低于第一熔解温度的第二熔解温度。在这个实施例中，核心结构可以是金，以及壳层结构可以是锡。
在一个实施例中，金属微粒成分218是核心和多壳层结构。在一个实施例中，金属微粒成分包括第一部分和第二部分，但是该结构比核心-壳层结构更为异质凝聚。
图3A是根据一个实施例在处理期间的互连模板300的横截面。互连衬底322采用多个通路来制备，通路其中之一采用附图标记324来表示。在一个实施例中，互连衬底322是中间层介电层(ILD)材料、如聚酰亚胺材料。互连模板300的处理包括在通路324中形成互连。
在一个实施例中，互连衬底322采用掩模(未示出)来成型，以及多个通路(via)324通过诸如采用掩模进行蚀刻等处理来形成，或者激光穿过掩模同时形成通路324，以及对掩模成型。可包括形成通路324的其它过程，例如冲孔过程。
在一个实施例中，通路324通过在通路324中形成籽晶层326来制备。掩模当存在时防止籽晶层在通路324之外的任何位置上沉积。在一个实施例中，籽晶层326通过籽晶材料的化学汽相沉积(CVD)来形成。例如，在互连将为铜的情况下，CVD铜过程在等离子体条件来进行，以在制备填充通路324的铜的电解沉积中形成籽晶层326。在一个实施例中，倾斜物理汽相沉积(PVD)在通路324的两侧进行，使得籽晶层326沿通路324基本上均匀地沉积。在PVD过程用于形成籽晶层326的情况下，此后可通过采用掩模溶剂冲洗或者其它适当的传统掩模去除过程来去除掩模。
图3B是根据一个实施例的进一步处理之后、图3A所示的互连模板的横截面。互连衬底322包括在供进一步处理的制备中设置在通路324中的籽晶层326。在一个实施例中，通路324已经通过在通路324中的籽晶层326上的导线互连328的电镀来填充。
在一个实施例中，各导线互连328具有范围从大约20μm至大约106μm的厚度。在一个实施例中，导线互连328具有大约40μm的厚度。互连厚度可包括籽晶层326。
顺应互连是可通过形成可弯曲(即顺应(compliant))而不会折断地与焊料突块连接的互连来实现的。顺应互连是可通过将实质上相同的金属用于两种结构来实现的。顺应互连也是可通过采用高宽纵横比结合用于两种结构的基本上相同的金属来实现的。在一个实施例中，导线互连328具有范围从大约0.5∶1至大约5∶1的高宽纵横比。在一个实施例中，导线互连328具有范围从大约1∶1至大约4∶1的高宽纵横比。在一个实施例中，导线互连328具有范围从大约2∶1至大约3∶1的高宽纵横比。在一个实施例中，导线互连328具有大约3.5∶1的高宽纵横比。
图4是根据一个实施例在处理期间的互连模板400的横截面。在一个实施例中，互连模板400包括互连衬底422和导线互连428。在这个实施例中，导线互连428是已经通过在物理上将导线互连428插入通路424来填充到互连模板422中的导线。在一个实施例中，通过首先非电解浸镀到通路424中，之后再进行电镀来填充通路424，以执行电镀。
图5是根据一个实施例在处理期间的互连模板500的横截面。互连衬底522采用多个通路来制备，通路之一采用附图标记524来表示。在一个实施例中，互连衬底522是中间层介电层(ILD)材料、如聚酰亚胺材料。在这个实施例中，导线互连528是已经通过在物理上将导线互连528插入通路524来填充到互连模板522中的导线。在一个实施例中，通路524已经通过导线互连528的电镀来填充。
处理已经在具有上表面521和下表面523的互连衬底522中实现导线互连528。导线互连528在互连衬底522之上和之下这两者的至少一个延伸。在一个实施例中，对互连衬底522进行深蚀刻以暴露互连528。
图1D是进一步处理之后、图1C所示的微电子装置103的横截面。使衬底110、接合焊盘112和纳米焊膏116与导线互连128、例如设置在图5所示的互连模板500中的导线互连528接触。在一个实施例中，导线互连128包括银。在一个实施例中，导线互连128包括铜。在一个实施例中，导线互连128包括金。在一个实施例中，导线互连128包括金锡合金Au80Sn20。在一个实施例中，导线互连128包括锡。在一个实施例中，导线互连128包括上述金属与合金的组合。在一个实施例中，使本公开中阐述的导线互连实施例的任何一个与纳米焊膏116接触。
在一个实施例中，纳米焊膏116包括在处理期间与焊膏混合的焊剂载体。在一个实施例中，焊剂载体在加热期间在焊膏116中激活。在一个实施例中，焊剂载体是在大约150℃或以上时激活的磺胺。在一个实施例中，焊剂可在例如从大约100℃至大约300℃的更低温度激活。
图1E是进一步处理之后、图1D所示的微电子装置104的横截面。回流过程已经开始，在这个时间中，焊膏基质、如图2所示的焊膏基质220已经挥发，以及金属微粒成分、如金属微粒成分218已经回流到焊料突块117中，其中具有范围从大约50nm至小于或等于大约20μm的颗粒大小。对于将衬底110耦合到导线互连128所述的回流过程可在组装微电子装置封装的方法之前进行。在一个实施例中，该过程可与微电子装置封装的其它热处理同时进行。在一个实施例中，该过程可在组装微电子装置封装的某些元件之后进行，其中包括形成金属微粒成分管芯联结实施例。随后讨论这些及其它实施例。
图1F是进一步处理之后、图1D所示的微电子装置105的横截面。在一个实施例中，互连衬底122是可在导线互连128焊接到位之后溶解的材料。在一个实施例中，互连衬底122是可用作底部填充材料的低k介电材料。在一个实施例中，互连模板122可在焊料突块117的回流中软化。
在一个实施例中，接合焊盘112具有基本上正方形的覆盖面积以及大约106μm的边缘尺寸。在一个实施例中，两个相邻接合焊盘112的间距大约为175μm。互连衬底模板122配置成基本上与具有接合焊盘宽度和间距匹配配置的给定衬底密切配合。
微电子装置105包括安装衬底130，它通过导线互连128和回流焊料突块117与衬底110耦合。在一个实施例中，安装衬底130是具有安装衬底接合焊盘132和安装衬底焊料突块134的第二级衬底。在一个实施例中，安装衬底焊料突块134是与导线互连128基本上相同的金属或合金，并且它可以是回流纳米焊料。因此，消除了显著的电迁移，因为焊料突块和导线互连的材料是基本上相同的金属或合金。类似地，基本上消除了热失配，因为回流纳米焊料突块和导线互连的材料基本上是相同的金属或合金。
图6是根据一个实施例的封装600的横截面。例如可能是处理器的管芯的衬底610包括用于从衬底610对外部世界进行电气通信的接合焊盘612。在一个实施例中，接合焊盘612是可接触若干金属化层的任何一个的铜金属化上层。根据本公开阐述的各种实施例，回流纳米焊料突块617联结到衬底610以及联结到导线互连628。
在一个实施例中，各导线互连628具有范围从大约20μm至大约106μm的厚度。在一个实施例中，导线互连628具有大约40μm的厚度。在一个实施例中，导线互连628具有范围从大约0.5∶1至大约5∶1的高宽纵横比。在一个实施例中，导线互连628具有范围从大约1∶1至大约4∶1的高宽纵横比。在一个实施例中，导线互连628具有范围从大约2∶1至大约3∶1的高宽纵横比。在一个实施例中，导线互连628具有大约3.5∶1的高宽纵横比。
封装160包括安装衬底630，它通过安装衬底接合焊盘632与衬底610进行通信。安装衬底接合焊盘632焊接到具有安装衬底焊料突块634的导线互连628。根据本公开中阐述的实施例的任何一个，安装衬底焊料突块634还可从回流纳米焊料中产生。
在一个实施例中，安装衬底630是第二级衬底、如处理器的插件(interposer)。安装衬底630还采用底板突块(bump)636升高，用于安装到底板、如主板上。
图7是根据一个实施例在处理期间的微电子装置700的横截面。装置700包括管芯710，其中包括多个管芯接合焊盘712。回流纳米焊料突块717将管芯710与其它电气连接耦合。根据本公开中阐述的导线互连实施例的任何一个，装置700还包括导线互连728。导线互连728通过根据本公开中阐述的纳米焊膏实施例的任何一个从纳米焊膏中产生的回流焊料突块717来与安装衬底730耦合。
在一个实施例中，装置700包括底板突块736和底板738、如母板。在一个实施例中，管芯710通过热界面740粘合到散热片742、如集成散热器(HIS)。还说明了根据一个实施例的互连模板722。互连模板722表示为还用作底部填充材料，它可被转化并回流，以保护管芯710与安装衬底730之间的电气连接。
本公开中阐述的突块实施例还可适用导线粘合技术。当熔点在大约400°或以下的范围内开始时，导线粘合的过程可在保存导线粘合装置的热平衡的条件下执行。此外，粘合导线可基本上是与纳米焊料成分相同的金属或合金。
图8是根据各种实施例的过程流程图800。纳米焊膏的处理分别在形成管芯联结和/或焊料突块的过程中以及在组装封装管芯的方法中执行。
在810，根据本文阐述的实施例的任何一个，纳米焊膏实施例在衬底上成型。
在820，根据本文阐述的实施例的任何一个，导线互连在互连模板中形成。在810与820之间，过程可朝任一方向循环；通过811或821。
在830，纳米焊料成分在衬底上回流。通过图1E中的说明，回流纳米焊料衍生突块117表示为以比作为宏观大块材料的各个金属的熔解温度明显更低的温度形成金属成分。在831，过程流程可从回流纳米微粒焊膏的过程继续进行到将管芯组装为封装的方法。在832，一个过程实施例完成。
任选地，在导线粘合技术中，在管芯上对纳米微粒焊膏粉末成型的过程在将导线粘合焊料突块设置到管芯期间依次执行。
在840，包括焊料或纳米微粒焊膏的管芯组装到封装中。作为说明，图6示出具有至少一个安装衬底630的管芯610的组装。在841，过程流程可从将管芯组装到封装中的方法继续进行，之后进行使纳米焊料成分回流到焊料突块中的过程。在842，一个方法实施例完成。
图9是根据一个实施例的计算系统900的说明。金属微粒成分、管芯联结成分和/或焊料突块成分的上述实施例的一个或多个可用于计算系统、如图9的计算系统900中。下文中，独立的或者与其它任何实施例结合的任何实施例称作金属微粒成分实施例。
计算系统900包括例如装入封装910中的至少一个处理器(未示出)、数据存储系统912、例如键盘914等至少一个输入装置以及诸如监视器916等至少一个输出装置。计算系统900包括处理数据信号的处理器，并且可包括例如从Intel Corporation可得到的微处理器。除了键盘914之外，计算系统900可包括另一个用户输入装置、例如鼠标918。计算系统900可对应于包括回流纳米焊料或者与回流纳米焊料的导线互连的结构的任何一个。因此，封装910(包括管芯)和底板920可包括这些结构。
为了本公开的目的，包含根据要求权益的主题的组件的计算系统900可包括采用微电子装置系统的任何系统，例如可包括与诸如动态随机存取存储器(DRAM)、聚合物存储器、闪速存储器和相变存储器等数据存储设备耦合的回流纳米焊料实施例的至少一个。在这个实施例中，回流纳米焊料实施例通过耦合到处理器来与这些功能性的任何组合耦合。但是，在一个实施例中，本公开中阐述的回流纳米焊料成分实施例与这些功能性的任一个耦合。对于一个示例实施例，数据存储设备包括管芯上的嵌入式DRAM高速缓存。另外，在一个实施例中，与处理器(未示出)耦合的回流纳米焊料成分实施例是具有与DRAM高速缓存的数据存储设备耦合的回流纳米焊料成分实施例的系统的组成部分。另外，在一个实施例中，回流纳米焊料成分实施例与数据存储设备912耦合。
在一个实施例中，计算系统还可包括包含数字信号处理器(DSP)、微控制器、专用集成电路(ASIC)或者微处理器的管芯。在这个实施例中，回流纳米焊料成分实施例通过耦合到处理器来与这些功能性的任何组合耦合。对于一个示例实施例，DSP(未示出)是可包括独立处理器(在封装910中)的芯片组的组成部分，以及该DSP作为底板920上的芯片组的独立部分。在这个实施例中，回流纳米焊料成分实施例与DSP耦合，以及可能存在与封装910中的处理器耦合的独立回流纳米焊料成分实施例。另外，在一个实施例中，回流纳米焊料成分实施例耦合到在与封装910相同的底板920上安装的DSP。现在可以理解，结合通过本公开的各种实施例及其等同物所阐述的回流纳米焊料成分实施例，回流纳米焊料成分实施例可如针对计算系统900所阐述那样进行组合。
本公开中阐述的回流纳米焊料成分实施例可适用于与传统计算机不同的装置和设备。例如，管芯可采用回流纳米焊料成分实施例来封装，并设置在诸如无线通信器等的便携装置或者诸如个人数据助理等的手持装置中。另一个实例是可采用回流纳米焊料成分实施例来封装并设置在诸如汽车、机车、船只、飞机或太空船等交通工具中的管芯。
在另一个实施例中，计算系统900的操作采用原本对于传统块和导线互连结构是有害的电流密度来执行。在一个实施例中，计算系统900的操作采用大约103amp/cm2与大约106amp/cm2之间的电流密度来执行。在一个实施例中，计算系统900的操作采用大约104amp/cm2与大约106amp/cm2之间的电流密度来执行。在一个实施例中，计算系统900的操作采用大约105amp/cm2与大约106amp/cm2之间的电流密度来执行。在一个实施例中，计算系统900的操作采用高于106amp/cm2的电流密度、但低于会使导线互连和回流纳米焊料突块的具体材料达到固相线的电流密度来执行。
“摘要”是根据37C.F.R.§1.72(b)来提供的，该条款要求允许读者快速确定技术公开的性质和要点的摘要。应当理解，它的提供并不是用于解释或限制权利要求书的范围或含义。
在以上详细说明中，各种特征集中到单一实施例中，用于简化本公开。这种公开的方法不应解释为反映了要求权益的本发明的实施例需要超过各权利要求中明确描述的特征的目的。而是，如以下权利要求所反映的那样，创造性主题在于少于单个公开实施例的全部特征。因此，以下权利要求在这里结合到详细说明中，其中各权利要求本身代表单独的优选实施例。
本领域的技术人员易于理解，可在不背离所附权利要求书中表达的本发明的原理和范围的前提下，对为解释本发明的性质而描述和说明的部分和方法阶段的细节、材料及安排方面进行各种其它改变。

Claims (22)

1.一种导线互连产品，包括：
焊料突块，设置在接合焊盘上，其中，所述焊料突块包括第一金属和从大约50纳米至大约1微米范围的颗粒大小；以及
导线互连，与所述焊料突块接触。
2.如权利要求1所述的导线互连产品，其特征在于，所述导线互连包括与所述第一金属基本上相同的金属。
3.如权利要求1所述的导线互连产品，其特征在于，所述导线互连具有从大约20至大约120微米范围的厚度。
4.如权利要求1所述的导线互连产品，其特征在于，所述导线互连具有从大约40至大约106微米范围的厚度。
5.如权利要求1所述的导线互连产品，其特征在于，所述导线互连包括籽晶层外壳和电镀核心的复合材料。
6.如权利要求1所述的导线互连产品，其特征在于，所述导线互连具有大约0.5∶1与5∶1之间的纵横比。
7.如权利要求1所述的导线互连产品，其特征在于，还包括包装所述导线互连的导线模板。
8.如权利要求1所述的导线互连产品，其特征在于，所述导线互连是从银、铜、金、金锡合金Au80Sn20、锡、锡-银以及它们的组合中选取的金属或合金。
9.一种过程，包括：
在衬底上形成纳米微粒焊膏；
使所述纳米微粒焊膏与导线互连接触；以及
使所述纳米微粒焊膏回流以形成导线互连产品。
10.如权利要求9所述的过程，其特征在于，在形成所述纳米微粒焊膏之前形成所述纳米微粒焊膏，以及所述纳米微粒焊膏包括从大约2nm至大约50nm范围的平均微粒大小。
11.如权利要求9所述的过程，其特征在于，所述纳米微粒焊膏包括金属，所述金属是与所述导线互连基本上相同的金属，以及回流在回流第一温度执行，此后所述焊料突块具有大于所述回流第一温度的回流第二温度。
12.如权利要求9所述的过程，其特征在于，还包括：
在支座中形成所述导线互连，其中，形成所述导线互连的步骤从以下步骤中选取：在支座通孔中电镀所述导线互连，将所述导线互连插入所述支座通孔，以及它们的组合。
13.如权利要求9所述的过程，其特征在于，还包括：
将所述焊料突块和导线互连产品耦合到从第一级安装衬底、第二级安装衬底、插件、母板以及它们的组合中选取的衬底。
14.一种组装微电子装置封装的方法，包括：
在管芯有效表面上形成焊料前体，其中，所述焊料前体包括其中包含小于或等于大约20nm范围的微粒大小的第一金属，以及所述焊料前体包括等于或低于大约400℃的熔解温度；以及
将所述管芯耦合到安装衬底。
15.如权利要求14所述的组装微电子装置封装的方法，其特征在于，还包括：
使所述焊料前体回流，从以下步骤中选取：在耦合所述管芯之前回流，在耦合所述管芯期间回流，在耦合所述管芯之后回流，以及它们的组合。
16.如权利要求14所述的组装微电子装置封装的方法，其特征在于，还包括：
将集成散热器连接到所述管芯。
17.一种操作微电子装置的方法，包括：
使电流通过焊料突块和导线互连产品，其中，所述电流处于焊料突块和微电子装置的范围内，所述微电子装置包括设置在接合焊盘上的焊料突块，所述焊料突块包括第一金属以及从50纳米至大约1微米范围的颗粒大小，导线互连与所述焊料突块接触。
18.如权利要求17所述的方法，其特征在于，所述焊料突块和导线互连产品与管芯接合焊盘接触，以及所述电流密度处于103amp/cm2与106amp/cm2之间。
19.如权利要求17所述的方法，其特征在于，所述焊料突块和导线互连产品与管芯接合焊盘接触，所述电流密度处于103amp/cm2与106amp/cm2之间，以及使电流通过所述焊料突块的步骤包括将处理器作为微电子装置来进行操作。
20.一种计算系统，包括：
设置在安装衬底上的微电子管芯；
将所述微电子管芯耦合到所述安装衬底的焊料突块，所述焊料突块包括：
具有从大约50纳米(nm)至小于或等于大约20微米(μm)范围的颗粒大小的第一金属，以及所述焊料成分包括等于或低于大约400℃的熔解温度；以及
与所述管芯耦合的动态随机存取数据存储设备。
21.如权利要求20所述的计算系统，其特征在于，所述系统设置在下列之一中：计算机、无线通信器、手持装置、汽车、机车、飞机、船只和太空船。
22.如权利要求20所述的计算系统，其特征在于，所述微电子管芯从数据存储设备、数字信号处理器、微控制器、专用集成电路和微处理器中选取。
CN200680022890XA 2005-06-30 2006-06-30 电迁移抗性和顺应导线互连、纳米焊料成分、由其制成的系统以及组装焊接封装的方法 Expired - Fee Related CN101208799B (zh)

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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102725836A (zh) * 2010-01-27 2012-10-10 住友电木株式会社 半导体装置
CN102773624A (zh) * 2011-11-02 2012-11-14 兰州大学 用于微/纳米尺度焊接的一维纳米焊料及其制备方法
CN102922071A (zh) * 2012-10-25 2013-02-13 哈尔滨工业大学 一种采用纳米金属间化合物颗粒制备低温互连高温服役接头的方法
CN103151430A (zh) * 2011-12-06 2013-06-12 北京大学深圳研究生院 纳米金属粒实现led的低温金属界面连接的制备方法
CN104157623A (zh) * 2013-05-13 2014-11-19 英飞凌科技股份有限公司 芯片装置以及用于形成芯片装置的方法
CN110660770A (zh) * 2019-09-29 2020-01-07 深圳第三代半导体研究院 一种新型固晶薄膜
CN112151401A (zh) * 2020-10-12 2020-12-29 电子科技大学 一种基于半导体温控的晶粒取向控制方法

Families Citing this family (49)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7012489B2 (en) 2003-03-04 2006-03-14 Rohm And Haas Electronic Materials Llc Coaxial waveguide microstructures and methods of formation thereof
US8518304B1 (en) 2003-03-31 2013-08-27 The Research Foundation Of State University Of New York Nano-structure enhancements for anisotropic conductive material and thermal interposers
US7524351B2 (en) * 2004-09-30 2009-04-28 Intel Corporation Nano-sized metals and alloys, and methods of assembling packages containing same
US7615476B2 (en) * 2005-06-30 2009-11-10 Intel Corporation Electromigration-resistant and compliant wire interconnects, nano-sized solder compositions, systems made thereof, and methods of assembling soldered packages
US7514116B2 (en) * 2005-12-30 2009-04-07 Intel Corporation Horizontal Carbon Nanotubes by Vertical Growth and Rolling
TWI364399B (en) 2006-12-30 2012-05-21 Rohm & Haas Elect Mat Three-dimensional microstructures and methods of formation thereof
KR101593686B1 (ko) 2007-03-20 2016-02-12 누보트로닉스, 엘.엘.씨 일체화된 전자 요소들 및 이들의 형성 방법
US7898356B2 (en) 2007-03-20 2011-03-01 Nuvotronics, Llc Coaxial transmission line microstructures and methods of formation thereof
US7781260B2 (en) * 2007-09-11 2010-08-24 Intel Corporation Methods of forming nano-coatings for improved adhesion between first level interconnects and epoxy under-fills in microelectronic packages and structures formed thereby
TWI345820B (en) * 2007-11-27 2011-07-21 Ind Tech Res Inst Intra-connection layout of array
KR100891537B1 (ko) * 2007-12-13 2009-04-03 주식회사 하이닉스반도체 반도체 패키지용 기판 및 이를 갖는 반도체 패키지
US7884488B2 (en) * 2008-05-01 2011-02-08 Qimonda Ag Semiconductor component with improved contact pad and method for forming the same
US9246073B2 (en) * 2008-06-25 2016-01-26 Panasonic Intellectual Property Management Co., Ltd. Mounting structure, and method of manufacturing mounting structure
DE102009038674B4 (de) * 2009-08-24 2012-02-09 Epcos Ag Trägervorrichtung, Anordnung mit einer solchen Trägervorrichtung sowie Verfahren zur Herstellung eines mindestens eine keramische Schicht umfassenden struktururierten Schichtstapels
US20110123783A1 (en) 2009-11-23 2011-05-26 David Sherrer Multilayer build processses and devices thereof
KR101917052B1 (ko) * 2010-01-22 2019-01-30 누보트로닉스, 인크. 열관리
US8917150B2 (en) * 2010-01-22 2014-12-23 Nuvotronics, Llc Waveguide balun having waveguide structures disposed over a ground plane and having probes located in channels
US9142533B2 (en) * 2010-05-20 2015-09-22 Taiwan Semiconductor Manufacturing Company, Ltd. Substrate interconnections having different sizes
US8866300B1 (en) 2011-06-05 2014-10-21 Nuvotronics, Llc Devices and methods for solder flow control in three-dimensional microstructures
US8814601B1 (en) * 2011-06-06 2014-08-26 Nuvotronics, Llc Batch fabricated microconnectors
US9120898B2 (en) 2011-07-08 2015-09-01 Baker Hughes Incorporated Method of curing thermoplastic polymer for shape memory material
US9993982B2 (en) 2011-07-13 2018-06-12 Nuvotronics, Inc. Methods of fabricating electronic and mechanical structures
US8939222B2 (en) 2011-09-12 2015-01-27 Baker Hughes Incorporated Shaped memory polyphenylene sulfide (PPS) for downhole packer applications
US8829119B2 (en) 2011-09-27 2014-09-09 Baker Hughes Incorporated Polyarylene compositions for downhole applications, methods of manufacture, and uses thereof
US9144925B2 (en) 2012-01-04 2015-09-29 Baker Hughes Incorporated Shape memory polyphenylene sulfide manufacturing, process, and composition
JP5708512B2 (ja) * 2012-01-30 2015-04-30 豊田合成株式会社 半導体装置の製造方法及び半導体装置
US9425136B2 (en) 2012-04-17 2016-08-23 Taiwan Semiconductor Manufacturing Company, Ltd. Conical-shaped or tier-shaped pillar connections
US9646923B2 (en) 2012-04-17 2017-05-09 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor devices, methods of manufacture thereof, and packaged semiconductor devices
US9299674B2 (en) 2012-04-18 2016-03-29 Taiwan Semiconductor Manufacturing Company, Ltd. Bump-on-trace interconnect
US9111817B2 (en) 2012-09-18 2015-08-18 Taiwan Semiconductor Manufacturing Company, Ltd. Bump structure and method of forming same
TWI503932B (zh) * 2012-11-01 2015-10-11 矽品精密工業股份有限公司 設置於膠層上的半導體封裝件及其製法
US9707642B2 (en) 2012-12-07 2017-07-18 Baker Hughes Incorporated Toughened solder for downhole applications, methods of manufacture thereof and articles comprising the same
US9325044B2 (en) 2013-01-26 2016-04-26 Nuvotronics, Inc. Multi-layer digital elliptic filter and method
US9105629B2 (en) 2013-03-07 2015-08-11 International Business Machines Corporation Selective area heating for 3D chip stack
US9306255B1 (en) 2013-03-15 2016-04-05 Nuvotronics, Inc. Microstructure including microstructural waveguide elements and/or IC chips that are mechanically interconnected to each other
US9306254B1 (en) 2013-03-15 2016-04-05 Nuvotronics, Inc. Substrate-free mechanical interconnection of electronic sub-systems using a spring configuration
US9331038B2 (en) 2013-08-29 2016-05-03 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor interconnect structure
US10310009B2 (en) 2014-01-17 2019-06-04 Nuvotronics, Inc Wafer scale test interface unit and contactors
CN105448862B (zh) * 2014-09-29 2018-08-10 中芯国际集成电路制造(上海)有限公司 半导体结构及其制作方法
US10847469B2 (en) 2016-04-26 2020-11-24 Cubic Corporation CTE compensation for wafer-level and chip-scale packages and assemblies
EP3224899A4 (en) 2014-12-03 2018-08-22 Nuvotronics, Inc. Systems and methods for manufacturing stacked circuits and transmission lines
TWI590259B (zh) * 2016-04-29 2017-07-01 南茂科技股份有限公司 焊球、其製造方法以及半導體元件
US10304803B2 (en) * 2016-05-05 2019-05-28 Invensas Corporation Nanoscale interconnect array for stacked dies
US10735880B2 (en) * 2017-05-09 2020-08-04 Sonos, Inc. Systems and methods of forming audio transducer diaphragms
US10727391B2 (en) 2017-09-29 2020-07-28 International Business Machines Corporation Bump bonded cryogenic chip carrier
US10319654B1 (en) 2017-12-01 2019-06-11 Cubic Corporation Integrated chip scale packages
TWI657545B (zh) * 2018-03-12 2019-04-21 頎邦科技股份有限公司 半導體封裝結構及其線路基板
JPWO2022168207A1 (zh) * 2021-02-03 2022-08-11
CN117121177A (zh) * 2021-02-03 2023-11-24 株式会社力森诺科 焊膏、焊料凸块的形成方法及带有焊料凸块的部件的制造方法

Family Cites Families (46)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57166051A (en) * 1981-04-06 1982-10-13 Mitsubishi Electric Corp Semiconductor device
JPH01214030A (ja) * 1988-02-22 1989-08-28 Canon Inc 電気回路装置
US5086966A (en) * 1990-11-05 1992-02-11 Motorola Inc. Palladium-coated solder ball
US5231751A (en) * 1991-10-29 1993-08-03 International Business Machines Corporation Process for thin film interconnect
JP3169719B2 (ja) 1992-12-21 2001-05-28 ハリマ化成株式会社 ソルダーペースト
US5454161A (en) * 1993-04-29 1995-10-03 Fujitsu Limited Through hole interconnect substrate fabrication process
JPH07221104A (ja) * 1994-01-28 1995-08-18 Fujitsu Ltd 半導体装置の製造方法及び半導体装置及び電極ピン形成用マスク及び電極ピン形成用マスクを用いた試験方法
US5964963A (en) * 1994-08-25 1999-10-12 Turchan; Manuel C. Brazing paste
JP2916086B2 (ja) * 1994-10-28 1999-07-05 株式会社日立製作所 電子部品の実装方法
US5573602A (en) * 1994-12-19 1996-11-12 Motorola, Inc. Solder paste
US5542602A (en) * 1994-12-30 1996-08-06 International Business Machines Corporation Stabilization of conductive adhesive by metallurgical bonding
JPH08236654A (ja) * 1995-02-23 1996-09-13 Matsushita Electric Ind Co Ltd チップキャリアとその製造方法
US5958590A (en) * 1995-03-31 1999-09-28 International Business Machines Corporation Dendritic powder materials for high conductivity paste applications
AU6915696A (en) * 1995-09-07 1997-03-27 Penn State Research Foundation, The High production rate of nano particles by laser liquid interaction
JP3420435B2 (ja) * 1996-07-09 2003-06-23 松下電器産業株式会社 基板の製造方法、半導体装置及び半導体装置の製造方法
JP2943805B1 (ja) 1998-09-17 1999-08-30 日本電気株式会社 半導体装置及びその製造方法
JP3074649B1 (ja) * 1999-02-23 2000-08-07 インターナショナル・ビジネス・マシーンズ・コーポレ−ション 無鉛半田粉末、無鉛半田ペースト、およびそれらの製造方法
TW476073B (en) * 1999-12-09 2002-02-11 Ebara Corp Solution containing metal component, method of and apparatus for forming thin metal film
JP3638486B2 (ja) * 1999-12-10 2005-04-13 株式会社荏原製作所 半導体素子の実装方法及び金属ペースト
JP2001338999A (ja) * 2000-05-30 2001-12-07 Kyocera Corp 半導体素子収納用パッケージ
JP2002198374A (ja) 2000-10-16 2002-07-12 Sharp Corp 半導体装置およびその製造方法
US7147687B2 (en) * 2001-05-25 2006-12-12 Nanosphere, Inc. Non-alloying core shell nanoparticles
US20040115340A1 (en) * 2001-05-31 2004-06-17 Surfect Technologies, Inc. Coated and magnetic particles and applications thereof
KR100438408B1 (ko) * 2001-08-16 2004-07-02 한국과학기술원 금속간의 치환 반응을 이용한 코어-쉘 구조 및 혼합된합금 구조의 금속 나노 입자의 제조 방법과 그 응용
JP2003060333A (ja) * 2001-08-20 2003-02-28 Sekisui Chem Co Ltd 電子部品の接続方法
US6680128B2 (en) * 2001-09-27 2004-01-20 Agilent Technologies, Inc. Method of making lead-free solder and solder paste with improved wetting and shelf life
US20030146019A1 (en) * 2001-11-22 2003-08-07 Hiroyuki Hirai Board and ink used for forming conductive pattern, and method using thereof
JP3757881B2 (ja) * 2002-03-08 2006-03-22 株式会社日立製作所 はんだ
JP2004128357A (ja) * 2002-10-04 2004-04-22 Ebara Corp 電極配設基体及びその電極接合方法
US20040245648A1 (en) * 2002-09-18 2004-12-09 Hiroshi Nagasawa Bonding material and bonding method
US7059512B2 (en) * 2002-11-06 2006-06-13 Ricoh Company, Ltd. Solder alloy material layer composition, electroconductive and adhesive composition, flux material layer composition, solder ball transferring sheet, bump and bump forming process, and semiconductor device
JP2004172612A (ja) * 2002-11-06 2004-06-17 Ricoh Co Ltd 微小径バンプを有する半導体素子、インクジェット方式によるバンプ形成およびそれに用いるインク組成物
US7285867B2 (en) * 2002-11-08 2007-10-23 Casio Computer Co., Ltd. Wiring structure on semiconductor substrate and method of fabricating the same
JP2004172150A (ja) * 2002-11-15 2004-06-17 Nec Kagoshima Ltd 積層構造配線の製造方法
US7091589B2 (en) 2002-12-11 2006-08-15 Dai Nippon Printing Co., Ltd. Multilayer wiring board and manufacture method thereof
WO2004070790A2 (en) * 2003-02-03 2004-08-19 United Test And Assembly Center Ltd. Molded high density electronic packaging structure for high performance applications
JP3904210B2 (ja) * 2003-04-28 2007-04-11 株式会社リコー 光学電子デバイスの接合方法及び接合構造
JP2004342716A (ja) * 2003-05-14 2004-12-02 Konica Minolta Holdings Inc バンプ形成方法及びバンプ形成装置
US7242097B2 (en) * 2003-06-30 2007-07-10 Intel Corporation Electromigration barrier layers for solder joints
DE10343255B4 (de) * 2003-09-17 2006-10-12 Infineon Technologies Ag Verfahren zum Herstellen elektrischer Verbindungen zwischen einem Halbleiterchip in einem BGA-Gehäuse und einer Leiterplatte
JP4246134B2 (ja) * 2003-10-07 2009-04-02 パナソニック株式会社 半導体素子の実装方法、及び半導体素子実装基板
JP2005183904A (ja) * 2003-12-22 2005-07-07 Rohm & Haas Electronic Materials Llc 電子部品にはんだ領域を形成する方法及びはんだ領域を有する電子部品
US7223684B2 (en) * 2004-07-14 2007-05-29 International Business Machines Corporation Dual damascene wiring and method
US7524351B2 (en) 2004-09-30 2009-04-28 Intel Corporation Nano-sized metals and alloys, and methods of assembling packages containing same
US7393770B2 (en) * 2005-05-19 2008-07-01 Micron Technology, Inc. Backside method for fabricating semiconductor components with conductive interconnects
US7615476B2 (en) * 2005-06-30 2009-11-10 Intel Corporation Electromigration-resistant and compliant wire interconnects, nano-sized solder compositions, systems made thereof, and methods of assembling soldered packages

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102725836A (zh) * 2010-01-27 2012-10-10 住友电木株式会社 半导体装置
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CN103358047A (zh) * 2011-11-02 2013-10-23 兰州大学 用于微/纳米尺度焊接的一维锡银铜三元纳米焊料
CN103406685A (zh) * 2011-11-02 2013-11-27 兰州大学 用于微/纳米焊接的一维锡银二元纳米焊料
CN103151430A (zh) * 2011-12-06 2013-06-12 北京大学深圳研究生院 纳米金属粒实现led的低温金属界面连接的制备方法
CN102922071B (zh) * 2012-10-25 2014-10-08 哈尔滨工业大学 一种采用纳米金属间化合物颗粒制备低温互连高温服役接头的方法
CN102922071A (zh) * 2012-10-25 2013-02-13 哈尔滨工业大学 一种采用纳米金属间化合物颗粒制备低温互连高温服役接头的方法
CN104157623A (zh) * 2013-05-13 2014-11-19 英飞凌科技股份有限公司 芯片装置以及用于形成芯片装置的方法
CN110660770A (zh) * 2019-09-29 2020-01-07 深圳第三代半导体研究院 一种新型固晶薄膜
CN110660770B (zh) * 2019-09-29 2021-10-08 深圳第三代半导体研究院 一种新型固晶薄膜
CN112151401A (zh) * 2020-10-12 2020-12-29 电子科技大学 一种基于半导体温控的晶粒取向控制方法
CN112151401B (zh) * 2020-10-12 2023-08-18 电子科技大学 一种基于半导体温控的晶粒取向控制方法

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EP1897137B1 (en) 2017-11-29
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TW201236122A (en) 2012-09-01
TWI470753B (zh) 2015-01-21
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US20100047971A1 (en) 2010-02-25
US8441118B2 (en) 2013-05-14
JP4918088B2 (ja) 2012-04-18
KR20100028121A (ko) 2010-03-11
JP2008545257A (ja) 2008-12-11
WO2007005592A2 (en) 2007-01-11
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