CN101364548B - 集成电路模块的制造方法 - Google Patents

集成电路模块的制造方法 Download PDF

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Publication number
CN101364548B
CN101364548B CN2008101333887A CN200810133388A CN101364548B CN 101364548 B CN101364548 B CN 101364548B CN 2008101333887 A CN2008101333887 A CN 2008101333887A CN 200810133388 A CN200810133388 A CN 200810133388A CN 101364548 B CN101364548 B CN 101364548B
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carrier
chip
plate
semiconductor chip
module
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CN101364548A (zh
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斯特凡·兰道
亚历山大·柯尼希斯贝格尔
约阿希姆·马勒
克劳斯·席斯
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Infineon Technologies AG
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Abstract

本发明提供了一种集成电路模块的制造方法，包括：提供第一载体的整体阵列、在第一载体上布置第一半导体芯片、以及在所述半导体芯片上布置第二载体的整体阵列。

Description

集成电路模块的制造方法
技术领域
本发明涉及一种集成电路模块的制造方法。
背景技术
功率半导体芯片可以集成在半导体模块中。功率半导体芯片特别适用于对电流和/或电压的切换或控制。
发明内容
本发明描述了一种制造集成电路模块的方法。该方法包括提供第一载体的整体阵列(integral array)、在第一载体上安置第一集成电路芯片(例如半导体芯片)、以及在所述集成电路芯片上安置第二载体的整体阵列。
在考虑下面的限定、说明和其具体实施例示意图的基础上，本发明的上述和其他特征和优点将变得更显而易见，其中，在不同图中采用相同的参考数字来表示相同的元件。虽然对本发明的具体细节做出了这些说明，但应了解，可以存在且确实存在基于这里的说明所作的改变，并且这些改变对于本领域技术人员而言是显而易见的。
附图说明
下面将结合附图更详细地解释本发明，附图中：
图1A到图1F示意性地示出了根据一个示范实施例的模块100的制造方法。
图2A到图2E示意性地示出了根据一个示范实施例的模块200的制造方法。
图3A到图3E示意性地示出了根据一个示范实施例的模块300的制造方法。
图4示意性地示出了根据一个示范实施例的模块400的横截面。
图5A到图5D示意性地示出了第一载体11的实施例。
具体实施方式
下面将结合附图对示范实施例进行说明，其中相同的参考数字一般用来通篇表示相同的元件，不同的结构并不必然成比例绘制。为了便于解释，在下面的说明中阐明了许多特定的细节，以提供对示范实施例的一个或多个方面的全面理解。然而，对于本领域技术人员来说，很显然，可以用较少的这些特定细节来实践示范实施例的一个或多个方面。因此，下面的说明并不是用来限制本发明的。
下面描述了具有集成电路芯片(例如半导体芯片)的模块及其制造方法。半导体芯片可以是完全不同的类型，且例如可以包括集成电路或光电电路。半导体芯片可以例如被构建为功率晶体管、功率二极管、IGBT(绝缘栅双极晶体管)、控制电路、微处理器或者微机电元件。尤其是可以涉及到具有垂直结构的半导体芯片，即，半导体芯片被制造为电流可沿垂直于半导体芯片主表面的方向流动。具有垂直结构的半导体芯片尤其在其两个主表面上(即，在其顶侧和底侧上)具有接触元件。尤其是IGBT、功率晶体管和功率二极管可以具有垂直结构。例如，功率晶体管的源极端和栅极端以及功率二极管的阳极端可以位于一个主表面上，而功率晶体管的漏极端和功率二极管的阴极端可以布置在另一主表面上。功率二极管尤其具体实施为肖特基(Schottky)二极管。此外，下面描述的模块可以包括集成电路，以控制其它半导体芯片的集成电路(例如，功率晶体管或功率二极管的集成电路)。这些半导体芯片并不需要用特定的半导体材料来制造，且还可以包含非半导体的无机和/或有机材料，如绝缘体、塑料或金属。此外，半导体芯片可以封装，也可以不封装。
半导体芯片可以安置于载体或板上。此外，载体或板也可以安置于半导体芯片上。载体和板可以是任意形状和大小，或可以由任何材料制成。在模块的制造过程中，载体可以彼此相连。载体也可以制成为一个部件。为了在制造期间分离各个载体，载体彼此之间可以通过载体连接件相连。同样的，在制造过程中，其上安置有半导体芯片的板也可以被分离。载体和板的分离可以通过机械锯切、激光束、切割、冲压、铣削或任何其他合适的方法来实现。载体和板可以是电导性的。它们可以由金属或金属合金制成，特别是铜、铜合金、铝、铝合金或其他合适的材料。此外，载体和板可以是PCB(印刷电路板)。例如，载体和板可以是引线框架或引线框架的一部分。
半导体芯片包括使得与半导体芯片形成电接触的接触垫。接触垫可以包括任何期望的电导材料，例如金属(如铜、铝或金)、金属合金或导电有机材料。接触垫可以位于半导体芯片的活性表面(或主动表面)上或半导体芯片的其它表面上。对于功率晶体管来说，接触垫包括漏极端、源极端和栅极端。
下面描述的模块包括外部接触垫。外部接触垫可以从模块外部接近，并且使得能够从模块外部与半导体芯片形成电连接。此外，外部接触垫可以是导热性的，且可以用作驱散由半导体芯片产生的热的散热器。外部接触垫可以包括任何期望的导电材料，例如，金属，如铜、银或金、金属合金或导电有机材料。其上安置有半导体芯片或者安置在半导体芯片上的载体或板可以形成外部接触垫。例如，载体或板的表面可以用作外部接触垫。
模块的表面(例如用作外部接触垫的表面)可以形成装配平面。该装配平面可以用于将模块安装到别的元件(例如，电路板)上。
可以用模制材料覆盖半导体芯片的至少一些部分。模制材料可以是任何合适的热塑性或热固性材料。可以采用各种技术，例如压缩模塑法、注射模塑法、粉末模塑法或液体模塑法将模制材料覆盖在半导体芯片上。
图1A到图1F示意性地示出了图1F所示的作为示范实施例的模块100的制造过程。图1A示出了装置10的平面图，该装置是多个第一载体11的整体阵列。载体连接件12，如结合桥件，可以将第一载体11彼此连接起来。第一载体11和载体连接件12可以制成为一个部件。它们可以是导电的，并且可以例如由诸如铜的金属或金属合金或者PCB(印刷电路板)制成。当垂直于图1A的图纸平面测量时，第一载体11的厚度可以在50μm到1mm之间。如果第一载体11由金属或金属合金制成，则它们可以镀上一层Ni-NiP合金、Ni-NiP-Au合金、NiPd合金、Au、Ag、Sn或者任何其它合适的材料。该镀层可以电(galvanically)沉积在第一载体11上，且厚度可以达到100μm。此外，上述的材料可以选择性地沉积在第一载体11的不同区域上。第一载体11上的镀层稍后可以用于焊接，并可以防止第一载体11被腐蚀。
为了形成如图1A所示的第一载体11的整体阵列的外形，可以对板进行冲压、压制、冲裁、切割、蚀刻或通过任何其它适当方法进行处理。第一载体11也可以是引线框架或者引线框架的一部分，列如由铜制成。
在第一载体11上安置第一半导体芯片13。可以在每个第一载体11上安置一个第一半导体芯片13，但是也可以在一个第一载体11上安置多个第一半导体芯片13。图1B示出了在每个第一载体11上安置有一个第一半导体芯片13的情况的平面图。图1C示出了这种布置沿图1B中的线A-A’的截面。
在第一半导体芯片13之上安置第二载体14的整体阵列。第二载体14的整体阵列可以由与第一载体11的整体阵列相同或相似的材料制成，并且可以通过与第一载体11的整体阵列相同或相似的方法制成。第二载体14的整体阵列可以是引线框架或引线框架的一部分。下面将讨论第二载体14的特定实施例。
第一载体11可以具有第一表面15，而第二载体14可以具有第二表面16。表面15和16都可以是平坦的。第一半导体芯片13可以安装在第一载体11的与第一表面15相对的表面上。可以将第二载体14置于第一半导体芯片13之上，以使得第二表面16背向第一半导体芯片13，并且使得第一表面15和第二表面16平行布置。
如图1E所示，可以使用模制材料17覆盖第一半导体芯片13的至少一部分以及模块100的其它元件的至少一部分。第一表面15和第二表面16的一部分或整个表面15及16都可以不被模制材料17覆盖。表面15和/或16或它们的一部分可以用作外部接触件，以将第一半导体芯片13电连接到外部元件。此外，第一表面15或第二表面16可以用作装配平面，以将模块100装配到其它元件上，诸如电路板上。可以将其它模块或元件，如散热器，连接至未用作装配平面的另一表面15或16上。
如图1F所示，可以通过采用机械锯切、激光束、切割、冲压或铣削等方法将第一载体11和第二载体14的阵列以及模制材料17分离，以获得模块100。可替换地，可以在将模制材料17施加于模块100之前，就对第一载体11和第二载体14的阵列进行分离。
替代被看作是第一载体11的整体阵列，图1A中所示的装置10还可以被看作是其中通过去除材料形成有凹口的第一板10。凹口或至少一部分凹口可以从第一板10的一个表面延伸到相对的表面。凹口可以通过冲压、压制、冲裁、切割、蚀刻或任何其它合适的方法来形成。第一板10可以由与第一载体11相同的材料制成。类似于第一载体11的整体阵列，第二载体14的整体阵列也可以看作是其中形成有凹口的第二板14。当下文提及第一载体11和第二载体14的整体阵列时，也考虑了第一板10和第二板14，反之亦然。
图2A到图2E示意性地示出了图2E所示的作为另一示范实施例的模块200的制造过程。模块200及其制造方法是图1A到图1F所示的模块100及其制造方法的一个实施。与模块100的制造方法类似，在制造模块200时，首先提供第一载体11的整体阵列。图2A示出了第一载体11中的两个载体的截面。应注意的是，第一载体11的整体阵列所包含的第一载体11可以多于图2A中所示的两个。将第一载体11彼此连接的载体连接件12在图中以虚线表示。
第一载体11可以包括突出于第一载体11的元件18。元件18可以例如沿垂直于第一表面15的方向延伸。第一载体11和元件18可以制成为一个部件。
安装在第一载体11上的第一半导体芯片13可以在第一主表面20上具有第一接触垫19，在与第一主表面20相对的第二主表面22上具有第二接触垫21。第一半导体芯片13可以例如是IGBT(绝缘栅双极晶体管)、垂直功率二极管或垂直功率晶体管。在垂直功率晶体管的情况下，第一接触垫19和第二接触垫21可以分别是漏极端和源极端。此外，第一半导体芯片13可以在第二主表面22上具有第三接触垫23，在第一半导体芯片13是功率晶体管的情况下，该第三接触垫用作栅极端。将第一半导体芯片13以第一主表面20面向第一载体11的方式安装在第一载体11上，如图2B所示。可以将第一接触垫19与各自的第一载体11电连接。
第一半导体芯片13的第一接触垫19和第一载体11之间的电连接可以例如通过如回流焊接、真空焊接、扩散焊接或利用导电性胶粘剂粘合等方式来实现。
如果以扩散焊接作为连接技术，则有可能使用这样的焊料(solder)，该焊料使得，在焊接操作结束后，由于界面扩散工艺，导致在第一载体11和各自的第一半导体芯片13之间的接触面上产生金属间相。在这种情况下，可以想到用Sn、AuSn、AgSn、CuSn、AgIn、AuIn、CuIn、AuSi或Au作为例如铜或铁镍合金载体11的焊料。如果第一半导体芯片13通过胶粘剂结合在第一载体11上，则有可能采用基于环氧树脂并富含金、银、镍或铜的导电粘合剂，以产生电导性。
第一载体11的元件18可以具体表现为使得，它们的顶面所形成的平面与第一半导体芯片13的第二主表面22形成的平面共面。在第一半导体芯片13上安置第二载体14的整体阵列时，不仅可以将第一半导体芯片13的第二接触垫21和第三接触垫23、还可以将元件18电连接至第二载体14，如图2C所示。这些电连接也可以通过回流焊接、真空焊接、扩散焊接或利用导电性胶粘剂粘合来实现。第二载体14的整体阵列可以是其中形成有开口或凹口24的板。凹口24可以从板的顶面延伸到其底面。凹口24保证了第一半导体芯片13的三个接触垫19、21和23彼此电绝缘。
凹口24的宽度可以在10μm到1000μm之间，尤其是在100μm到200μm之间，并且可以取决于第一半导体芯片13的几何形状，尤其是其接触垫21和23的布置，以及凹口24的制造方法。
此外，凹口24的宽度还取决于用于封装模块200的模制材料17。模制材料17可以包含由玻璃(SiO2)微粒组成的填充材料、或如Al2O3的其它电绝缘矿物填充材料、或有机填充材料。模制材料17可以通过凹口24注入。在这种情况下，凹口24的宽度可取决于所采用的填充材料的颗粒尺寸，反之亦然。填充材料的颗粒尺寸可以在5μm到200μm之间，尤其是在40μm到80μm之间。
当把第一载体11和第二载体14夹入模腔时，平整且平行的表面15和16是有帮助的。首先，当将载体夹入模腔时，表面15和16上的突起可能会损坏第一半导体芯片13。其次，表面15和16的平面平行偏差可能会导致模制材料17无意地盖住表面15和16的一部分。
可以将模制材料17施加于模块200，以使得第一表面15和模制材料17形成公共平面，如图2D所示。此外，第二平面16和模制材料17也可以形成公共平面。
模制材料17可以由任意合适的热塑性或热固性材料构成，尤其可以由当前半导体封装工艺中通常所用的材料构成。可以用不同的技术将模制材料17覆盖在模块200的元件上，例如压缩模塑法或注射模塑法。
在模制之前或之后，通过第一载体11、第二载体14、以及如果必要的话模制材料17的分离来将第一半导体芯片13彼此分开。这种分离可以通过采用机械锯切、激光束、切割、冲压、铣削或其它合适的方法来实现。
如图2E所示，每个模块200均被布置成使得，可以从模块200的一侧电接通(access)第一半导体芯片13的三个接触垫19、21和23。第二载体14的三个表面25、26和27被露出并且分别与接触垫19、21和23电连接。此外，表面25、26和27彼此电绝缘。表面25、26和27可以用于将模块200电连接到其它元件上，例如电路板上。
图3A到图3E示意性地示出了图3E所示的作为又一示范实施例的模块300(以三维视图)的制造过程。模块300及其制造方法与模块200及其制造方法类似。图3A示出了第一载体11的整体阵列，其中在图3A中，第一表面15朝上。每个第一载体11均包括突出于第一载体11的四个元件18。图3B示出了第一半导体芯片13安装在第一载体11上。在本实施例中，第一半导体芯片13是功率晶体管。它们的漏极端19与第一载体11电连接，而它们的源极端21和栅极端23背向第一载体11。图3C示出了在第一半导体芯片13之上安置的第二载体14的整体阵列。在本实施例中，第二载体14的整体阵列是具有凹口24的板，这些凹口用于将第一半导体芯片13的漏极端19、源极端21和栅极端23电断开。第一载体11的整体阵列和第二载体14的整体阵列都可以具有使载体11和14准确对齐的构件。例如，这些构件可以依据锁匙原理起作用，以便使得一个载体的构件接合另一载体的构件，以使载体11和载体14对齐。图3D示出了模制工序之后的第一载体11的第一表面15。图3E示出了与其它模块300分离后的单个模块300的横截面。该模块300的表面25、26和27分别与漏极端19、源极端21和栅极端23电连接。所有的三个表面25、26和27都通过凹口24而彼此电绝缘。凹口24可以填充有模制材料17。
模块100、200和300的露出的表面可以用于将这些模块与其它元件电连接起来。这在图4中例示出。在该图中，示意性地示出了模块400的一段，其包括安装在电路板28，如印刷电路板上的模块200，其中，表面25、26和27面向电路板28。可以用焊料沉积29(solder deposits)将表面25、26和27焊接到电路板28的区域上。
可以在模块200的顶部上连接有散热器或冷却件30。在散热器30和模块200之间可以布置有电绝缘层31，以将模块200与散热器30电断开。如果电绝缘层31的导热率足够高且/或电绝缘层31的材料厚度足够小，则电绝缘层31就可以将由第一半导体芯片13产生的热量传递到散热器30，该散热器驱散了产生的热量。
模块100、200和300可以不止包含第一半导体芯片13。可选地，每个模块100、200和300可以包含第二半导体芯片，且该第二半导体芯片可以置于第二载体上。此外，可以在可选的第二半导体芯片之上安置第三载体。
如图2A和图3A所示，第一载体11可以包含突出于第一载体11的元件18。图5A以三维图方式示出了具有单个元件18的第一载体11。在本实施例中，元件18的端部垂直于第一载体11的主表面延伸。元件18的作用是在第一载体11和第二载体14之间建立电连接。为了便于良好的电连接，元件18可以是有弹性的。元件18的弹性可以通过当与图5A所示的第一载体11的宽度相比时减小元件18的宽度来实现。此外，元件18可以向上弯曲，如图5B所示。当在第一载体11之上安置第二载体14时，第二载体14可以向下压元件18。这在第一载体11和第二载体14之间提供了良好的电连接，而且保证了元件18不会穿过由第一载体11的第一表面15确定的平面。
此外，与第一载体11的厚度相比，元件18的与第一载体11相连的部分的厚度可以减小。例如，如图5C所示(其中，示出了第一载体11和元件18的截面)，可以在元件18的底部形成凹口。当如图5D所示，在第一载体11之上安置第二载体14时，第二载体14可以向下压元件18。然而，由于元件18上凹口的存在，元件18不会穿过由第一表面15确定的平面。
应注意的是，元件18也可以是第二载体或第三载体的一部分。此外，也可以用其它元件将载体11、14彼此电连接，且同样地，与可选的第三载体彼此电连接。
另外，尽管仅相对于多种实施方式中的一种公开了本发明的实施例的特定特征或方面，但是如任何给定或特定应用所要求的，这些特征或方面可以与其他实施方式的一个或多个其他特征或方面进行结合。另外，就具体实施方式或权利要求中所使用的术语“包括(include)”、“具有(have)”、“带有(with)”、及它们的其他变体，这些术语旨在以类似于术语“包含(comprise)”的方式被包含。可能使用了术语“相连或耦合或连接(couple)”、“连接(connected)”、及它们的衍生词。应该理解，这些术语可以被用于表示两个元件彼此合作或互相作用，而不论它们是直接的物理或电接触，还是彼此非直接接触。另外，应该理解，本发明的实施例可以由分离电路、部分集成电路、完全集成电路、或编程装置实现。而且，术语“示范”仅意味着作为实例，而不是最优或最佳的。还应该明了的是，为了简单和容易理解，此处描述的特征和/或元件都是以相对于彼此的特定尺寸示出的，并且它们的实际尺寸可能很大程度地不同于此处所示出的。
尽管在此示出并描述了具体实施例，但是本领域普通技术人员应该理解的是，在不背离本发明的范围的条件下，各种可选和/或等同的实现方式可以代替所描述和示出的具体实施例。本申请旨在覆盖本文中所讨论的具体实施例的任何修改或变形。所以，本发明旨在仅由权利要求及其等同物限定。

Claims (18)

1.一种制造集成电路模块的方法，包括：
在第一载体的整体阵列上布置第一集成电路芯片；
在第一集成电路芯片之上布置第二载体的整体阵列；
所述第一载体包括背向所述第一集成电路芯片的第一表面，并且所述第二载体包括背向所述第一集成电路芯片的第二表面，所述第一表面和所述第二表面平行布置；
用模制材料覆盖所述第一集成电路芯片，其中，所述模制材料未覆盖所述第一表面和所述第二表面，
其中，所述第一载体通过所述第一载体的或所述第二载体的突起弹性元件而电连接至所述第二载体，其中，所述突起弹性元件与所述第一载体或所述第二载体一体形成。
2.根据权利要求1所述的方法，其中，所述第一表面或所述第二表面或二者一起形成装配平面。
3.根据权利要求1所述的方法，还包括：
在施加所述模制材料之后，将所述第一载体的整体阵列和所述第二载体的整体阵列分开。
4.根据权利要求1所述的方法，还包括：
将所述第一载体的整体阵列和所述第二载体的整体阵列分开。
5.根据权利要求1所述的方法，还包括：
将所述第一载体或所述第二载体或二者一起焊接至所述第一集成电路芯片。
6.根据权利要求1所述的方法，还包括：
在所述第二载体上布置第二集成电路芯片。
7.根据权利要求6所述的方法，还包括：
在所述第二集成电路芯片之上布置第三载体的整体阵列。
8.根据权利要求1所述的方法，其中，所述第一集成电路芯片包括位于第一主表面上的第一接触垫和位于第二主表面上的第二接触垫。
9.根据权利要求1所述的方法，其中，所述第一载体的整体阵列或者所述第二载体的整体阵列或二者都是引线框架阵列。
10.一种制造集成电路模块的方法，包括：
提供第一集成电路芯片，每个所述第一集成电路芯片包括位于第一主表面上的第一接触垫和位于第二主表面上的第二接触垫；
提供在其中形成有凹口的第一板并且所述第一板包括突起弹性元件；
在所述第一板上布置所述第一集成电路芯片；以及
在所述第一集成电路芯片之上布置其中形成有凹口的第二板，从而使所述突起弹性元件电连接至所述第二板。
11.根据权利要求10所述的方法，还包括：
用模制材料覆盖所述第一集成电路芯片。
12.根据权利要求11所述的方法，其中，所述第一板包括背向所述第一集成电路芯片的第一表面，并且所述第二板包括背向所述第一集成电路芯片的第二表面，所述第一表面和所述第二表面平行布置。
13.根据权利要求12所述的方法，其中，所述模制材料未覆盖所述第一表面和所述第二表面。
14.根据权利要求11所述的方法，还包括：
在施加所述模制材料之后，通过分割所述第一板和所述第二板而将所述第一集成电路芯片分开。
15.根据权利要求10所述的方法，还包括：
通过分割所述第一板和所述第二板而将所述第一集成电路芯片分开。
16.根据权利要求10所述的方法，其中，所述第一板电连接至所述第二板。
17.根据权利要求10所述的方法，还包括：
在所述第二板上布置第二集成电路芯片。
18.根据权利要求17所述的方法，还包括：
在所述第二集成电路芯片上布置第三板。
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