CN101371344A - 场效应晶体管 - Google Patents

场效应晶体管 Download PDF

Info

Publication number
CN101371344A
CN101371344A CNA200780002181XA CN200780002181A CN101371344A CN 101371344 A CN101371344 A CN 101371344A CN A200780002181X A CNA200780002181X A CN A200780002181XA CN 200780002181 A CN200780002181 A CN 200780002181A CN 101371344 A CN101371344 A CN 101371344A
Authority
CN
China
Prior art keywords
mentioned
electrode
pad
effect transistor
source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CNA200780002181XA
Other languages
English (en)
Other versions
CN101371344B (zh
Inventor
小林正树
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of CN101371344A publication Critical patent/CN101371344A/zh
Application granted granted Critical
Publication of CN101371344B publication Critical patent/CN101371344B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725Source or drain electrodes for field effect devices
    • H01L29/41758Source or drain electrodes for field effect devices for lateral devices with structured layout for source or drain region, i.e. the source or drain region having cellular, interdigitated or ring structure or being curved or angular
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/4821Bridge structure with air gap
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/4824Pads with extended contours, e.g. grid structure, branch structure, finger structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
    • H01L29/1608Silicon carbide
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42372Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
    • H01L29/4238Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the surface lay-out
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • H01L29/7787Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003Nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13063Metal-Semiconductor Field-Effect Transistor [MESFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

Abstract

一种场效应晶体管,具有:工作区域(12),形成在化合物半导体衬底(11)上;栅极电极(13),形成在工作区域(12)上;源极电极(14)及漏极电极(15),夹着栅极电极(13)而交替形成在工作区域(12)上;接合焊盘(18、19),用于与外部电路连接;电极连接部(20a),与源极电极(14)或漏极电极(15)连接;空中桥(20),具有与接合焊盘(18、19)连接的焊盘连接部(20b)、及将电极连接部(20a)及焊盘连接部(20b)之间连接的空中布线部(20c),在各个空中桥(20)的宽度方向的剖面,电极连接部20a的剖面面积小于等于空中布线部(20c)的剖面面积,及/或电极连接部的宽度设置得比空中布线部的宽度窄。

Description

场效应晶体管
技术领域
本发明涉及一种例如多指型(multi-finger)的场效应晶体管。
背景技术
近年来,伴随着倒相器或开关元件的多功能化,场效应晶体管(FieldEffect Transistor,以下记作FET)要求更强的高频特性和可靠性的提高。
例如在多指型FET中,形成有栅极布线和源极/漏极布线,上述栅极布线与横切工作区域而形成的多个栅极指连接、且与工作区域平行地形成,上述源极/漏极布线将工作区域上形成的源极电极或漏极电极与接合焊盘相连接。这时,栅极布线与源极/漏极布线交叉,但为了将它们绝缘,而在栅极布线上形成SiN等钝化膜。但是,这样通过在电容率高的SiN等钝化膜上形成直接布线,从而产生杂散电容,特别是不能在高频区域中忽视。因此,为了降低该杂散电容,而使用借助空隙来形成上层布线的空中桥(airbridge)结构(例如参照专利文献1)。
在这种空中桥结构中,作为源极/漏极电极,在工作区域上通过例如Pt/AuGe等金属层而形成欧姆接触之后,叠层例如Au/Pt/Ti等金属层。而且,在这些金属层上整个面和源极/漏极接合焊盘上及连接它们的区域(空中桥)上形成例如Au单层镀层。由于构成这样形成的空中桥的Au的热膨胀率比GaAs衬底的大,因此温度从镀覆形成温度(例如60℃),像通电温度(例如加速评价条件的225℃)或非通电时的温度(例如常温25℃)那样变化,从而在空中桥中产生热膨胀、热收缩。而且,由于这样的热膨胀、热收缩而在工作区域产生所谓压缩应力、拉伸应力的大的内部应力。因此,存在产生输出特性劣化等异常,难以取得良好的可靠性的问题。
专利文献1:日本特开平9—8064号公报(图1等)
发明内容
本发明的目的在于提供一种场效应晶体管,可抑制输出特性劣化等异常的发生、并取得良好的可靠性。
本发明的一方式的场效应晶体管,具有:工作区域,形成在化合物半导体衬底上;栅极电极,形成在工作区域上;源极电极及漏极电极,夹着栅极电极而交替形成在工作区域上;接合焊盘,用于与外部电路连接;及空中桥,具有与源极电极或漏极电极连接的电极连接部、及将电极连接部及焊盘连接部之间连接的空中布线部,宽度方向上的电极连接部的剖面面积小于等于空中布线部的剖面面积,且上述空中桥与上述接合焊盘连接。
而且,本发明的一方式的场效应晶体管,具有:工作区域,形成在化合物半导体衬底上;栅极电极,形成在工作区域上;源极电极及漏极电极,夹着上述栅极电极而交替形成在工作区域上;接合焊盘,用于与外部电路连接;及空中桥,具有与源极电极或漏极电极连接的电极连接部、及将电极连接部及焊盘连接部之间连接的空中布线部,电极连接部的宽度比空中布线部的宽度窄,且上述空中桥与接合焊盘连接。
发明的效果如下:
根据本发明的一实施方式,场效应晶体管可抑制输出特性劣化等问题的发生,取得良好的可靠性。
附图说明
图1是本发明一方式的多指型FET元件的平面图。
图2A是图1的A—A’剖面图。
图2B是图1的B—B’剖面图。
图3是本发明一方式的多指型FET元件的平面图。
具体实施方式
以下,参照附图对本发明的实施方式进行说明。
图1表示本实施方式的多指型FET元件的平面图,图2A表示其A—A’剖面图,图2B表示其B—B’剖面图。如图所示,在化合物半导体衬底11上形成工作区域12,在该工作区域12上形成栅极电极13。而且,在包含工作区域12上的区域,夹着栅极电极13而交替形成多个源极电极14、漏极电极15。依次叠层例如Pt/AuGe等欧姆接触和例如Au/Pt/Ti等金属层,来构成源极电极14、漏极电极15。栅极电极13通过栅极布线16而与外部接合,与用于输入输出信号的栅极焊盘17连接。而且,在栅极焊盘17一侧形成有源极焊盘18,夹着工作区域而在与栅极焊盘17及源极焊盘18相反一侧形成有漏极焊盘19。
形成由例如Au镀层构成的空中桥20,以便使源极电极14与源极焊盘18连接,使漏极电极15与漏极焊盘19连接。空中桥20不与栅极布线16或SiN层等钝化膜(未图示)接触。该空中桥20由如下部件构成:电极连接部20a,连接与源极电极或漏极电极连接;焊盘连接部20b,与源极焊盘18或漏极焊盘19连接;空中布线部20c,将电极连接部20a及焊盘连接部20b之间连接。
如图2A、图2B所示,电极连接部20a的宽度d1比空中布线部20c的宽度d2窄。在空中桥20的宽度方向的剖面,电极连接部20a的剖面面积S1小于等于空中布线部20c的剖面面积S2。而且,电极连接部20a的剖面面积S1和源极电极14或漏极电极15的剖面面积S3之和大于等于空中布线部20c的剖面面积S2
根据这样的结构,通过减小电极连接部20a的剖面面积及/或宽度,从而即使在由于温度变化而产生Au层的热膨胀、热收缩的情况下,在源极电极14、漏极电极15及其下层的工作区域12中,也能够某种程度地抑制所谓压缩应力、拉伸应力的大的内部应力的发生。因此,在高频区域中也可抑制输出特性劣化等异常,取得良好的可靠性。
而且,通过使电极连接部20a的剖面面积和源极电极14或漏极电极15的剖面面积之和大于等于空中布线部20c的剖面面积,而可在工作电流路径上确保电流容量值。而且,不产生烧损等异常,可承受工作电流。因此,在高频区域中也可抑制输出特性劣化等异常,取得良好的可靠性。
在本实施方式中,将电极连接部20a的宽度d1设置得比空中布线部20c的宽度d2窄。所谓压缩应力、拉伸应力的应力集中在电极的台阶部。通过将电极连接部20a的宽度设置得窄,而从电极连接部20a到GaAs衬底的台阶为二阶。因此,这些应力被分散在各阶,可抑制对出力特性等的影响。为了更有效地抑制应力的发生,而更优选d1/d2为60%以下。但是,若过小,则恐怕应力集中在电极连接部20a的台阶部,产生镀覆剥离等。因此,d1/d2更优选为40%以上。
而且,电极连接部20a的宽度d1也可以不是固定的,例如可以在与空中布线部20c的边界部附近具有锥形,也可以整体具有锥形。但是空中桥20的电极连接部20a的剖面面积S1必须小于等于空中布线部20c的剖面面积S2
而且,在本实施方式中,直到源极电极14、漏极电极15的端面,形成源极电极14、漏极电极15上的电极连接部20a。如图3所示的平面图那样,也可以不一定直到端面形成。由于端部具有台阶,因此,可抑制对形成在上层的钝化膜的应力影响。
而且,焊盘连接部20b与源极焊盘18和漏极焊盘19连接即可。源极焊盘18和漏极焊盘19也可以与空中桥20形成为一体。
而且,作为化合物半导体衬底,使用GaAs,但不限于此,而可使用GaN、SiC等化合物半导体衬底。也可以使用外延片。而且,也可以通过离子注入、形成高浓度外延层等,而在各电极的欧姆接触的下层设置高浓度层。
这种结构除了适用于HEMT(High Electron Mobility Transistor)以外,还可适用于MESFET(Metal Semiconductor Field Effect Transistor)、或MOSFET(Metal Oxide semiconductor field effect transistor)等FET等。
另外,本发明不限于上述实施方式。此外,在不脱离主旨的范围内可进行各种各样的变形并实施。

Claims (14)

1.一种场效应晶体管,其特征在于,具有:
工作区域,形成在化合物半导体衬底上;
栅极电极,形成在上述工作区域上;
源极电极及漏极电极,夹着上述栅极电极而交替形成在上述工作区域上;
接合焊盘,用于与外部电路连接;及
空中桥,具有与上述源极电极或上述漏极电极连接的电极连接部、及将上述电极连接部及上述焊盘连接部之间连接的空中布线部,宽度方向上的上述电极连接部的剖面面积小于等于上述空中布线部的剖面面积,且上述空中桥与上述接合焊盘连接。
2.如权利要求1所述的场效应晶体管,其特征在于,在各个上述空中桥的宽度方向的剖面,上述电极连接部的剖面面积和上述源极电极或上述漏极电极的剖面面积之和大于等于上述空中布线部的剖面面积。
3.如权利要求1所述的场效应晶体管,其特征在于,上述空中桥具有Au层。
4.如权利要求1所述的场效应晶体管,其特征在于,上述化合物半导体衬底是GaAs衬底。
5.如权利要求1所述的场效应晶体管,其特征在于,夹着多个上述栅极电极而设置多个上述源极电极及漏极电极。
6.如权利要求1所述的场效应晶体管,其特征在于,上述接合焊盘由源极焊盘、漏极焊盘、栅极焊盘构成,上述源极电极与上述源极焊盘连接,上述漏极电极与上述漏极焊盘连接,上述栅极电极与上述栅极焊盘连接。
7.如权利要求1所述的场效应晶体管,其特征在于,上述源极焊盘、上述漏极焊盘或上述栅极焊盘分别与多个上述源极电极、多个上述漏极电极或多个栅极电极连接。
8.一种场效应晶体管,其特征在于,具有:
工作区域,形成在化合物半导体衬底上;
栅极电极,形成在上述工作区域上;
源极电极及漏极电极,夹着上述栅极电极而交替形成在上述工作区域上;
接合焊盘,用于与外部电路连接;及
空中桥,具有与上述源极电极或上述漏极电极连接的电极连接部、及将上述电极连接部及上述焊盘连接部之间连接的空中布线部,上述电极连接部的宽度比上述空中布线部的宽度窄,且上述空中桥与上述接合焊盘连接。
9.如权利要求8所述的场效应晶体管,其特征在于,上述电极连接部的宽度为上述空中布线部的宽度的40%以上60%以下。
10.如权利要求8所述的场效应晶体管,其特征在于,上述空中桥具有Au层。
11.如权利要求8所述的场效应晶体管,其特征在于,上述化合物半导体衬底是GaAs衬底。
12.如权利要求8所述的场效应晶体管,其特征在于,夹着多个上述栅极电极而设置多个上述源极电极及漏极电极。
13.如权利要求8所述的场效应晶体管,其特征在于,上述接合焊盘由源极焊盘、漏极焊盘、栅极焊盘构成,上述源极电极与上述源极焊盘连接,上述漏极电极与上述漏极焊盘连接,上述栅极电极与上述栅极焊盘连接。
14.如权利要求8所述的场效应晶体管,其特征在于,上述源极焊盘、上述漏极焊盘或上述栅极焊盘分别与多个上述源极电极、多个上述漏极电极或多个栅极电极连接。
CN200780002181XA 2006-07-12 2007-07-12 场效应晶体管 Expired - Fee Related CN101371344B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP191928/2006 2006-07-12
JP2006191928 2006-07-12
PCT/JP2007/000758 WO2008007467A1 (fr) 2006-07-12 2007-07-12 Transistor à effet de champ

Publications (2)

Publication Number Publication Date
CN101371344A true CN101371344A (zh) 2009-02-18
CN101371344B CN101371344B (zh) 2011-04-20

Family

ID=38923038

Family Applications (1)

Application Number Title Priority Date Filing Date
CN200780002181XA Expired - Fee Related CN101371344B (zh) 2006-07-12 2007-07-12 场效应晶体管

Country Status (5)

Country Link
US (1) US7755112B2 (zh)
KR (1) KR100985807B1 (zh)
CN (1) CN101371344B (zh)
DE (1) DE112007000175B9 (zh)
WO (1) WO2008007467A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102479768A (zh) * 2010-11-30 2012-05-30 富士通半导体股份有限公司 半导体器件

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9331154B2 (en) * 2013-08-21 2016-05-03 Epistar Corporation High electron mobility transistor
CN106252310B (zh) * 2016-06-02 2020-05-05 苏州能讯高能半导体有限公司 半导体器件及其制造方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2699909B2 (ja) 1994-02-23 1998-01-19 日本電気株式会社 半導体装置
JPH07321342A (ja) * 1994-05-19 1995-12-08 Ricoh Co Ltd 接合型電界効果トランジスタ
JP2757805B2 (ja) * 1995-01-27 1998-05-25 日本電気株式会社 半導体装置
DE19522364C1 (de) * 1995-06-20 1996-07-04 Siemens Ag Halbleiter-Bauelement
JPH1092847A (ja) 1996-09-11 1998-04-10 Sony Corp 電界効果トランジスタ
JP3515886B2 (ja) * 1997-09-29 2004-04-05 三菱電機株式会社 半導体装置およびその製造方法
JP2001028425A (ja) * 1999-07-15 2001-01-30 Mitsubishi Electric Corp 半導体装置及びその製造方法
JP4217429B2 (ja) * 2002-06-13 2009-02-04 シャープ株式会社 半導体装置
JP4190931B2 (ja) * 2003-03-28 2008-12-03 三菱電機株式会社 半導体装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102479768A (zh) * 2010-11-30 2012-05-30 富士通半导体股份有限公司 半导体器件
CN102479768B (zh) * 2010-11-30 2014-12-31 富士通半导体股份有限公司 半导体器件

Also Published As

Publication number Publication date
DE112007000175B9 (de) 2013-06-20
CN101371344B (zh) 2011-04-20
WO2008007467A1 (fr) 2008-01-17
US20080277698A1 (en) 2008-11-13
US7755112B2 (en) 2010-07-13
DE112007000175B4 (de) 2013-05-23
KR20080095847A (ko) 2008-10-29
KR100985807B1 (ko) 2010-10-06
DE112007000175T5 (de) 2008-10-30

Similar Documents

Publication Publication Date Title
EP2465141B1 (en) Gallium nitride microwave and power switching transistors with matrix layout
US20090224313A1 (en) Semiconductor device having a gate contact on one surface electrically connected to a gate bus on an opposing surface
JP4316597B2 (ja) 半導体装置
US10741653B2 (en) Bond-over-active circuity gallium nitride devices
JP2012023212A (ja) 半導体装置
TW201501246A (zh) 具有水平半導體元件和垂直半導體元件的半導體部件
US20140363937A1 (en) Power semiconductor device and fabrication method thereof
US20220392887A1 (en) Semiconductor device
US20040130021A1 (en) High power silicon carbide and silicon semiconductor device package
US20080017867A1 (en) ENHANCEMENT MODE GaN FET WITH PIEZOELECTRIC GATE
CN101371344B (zh) 场效应晶体管
CN101371345B (zh) 高频用半导体器件
JP5550224B2 (ja) 半導体装置
JP2010010256A (ja) 半導体装置
US8384137B2 (en) Semiconductor device
JP2008042184A (ja) 高周波用半導体装置
KR101616157B1 (ko) 전력 반도체 소자 및 그 제조 방법
US11728419B2 (en) High electron mobility transistor
US20230307517A1 (en) Transistor
CN114695527A (zh) 一种半导体器件及其制备方法
JP2689957B2 (ja) 半導体装置
JPH04290272A (ja) 半導体装置およびその製造方法
JP2008147278A (ja) 電界効果トランジスタ
JPH11186555A (ja) 半導体装置
JP2008042185A (ja) 電界効果トランジスタ

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20110420

Termination date: 20160712

CF01 Termination of patent right due to non-payment of annual fee