CN102594127A - Repetition frequency compact pulse multiplier based on Fitch circuit - Google Patents
Repetition frequency compact pulse multiplier based on Fitch circuit Download PDFInfo
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- CN102594127A CN102594127A CN2012100537775A CN201210053777A CN102594127A CN 102594127 A CN102594127 A CN 102594127A CN 2012100537775 A CN2012100537775 A CN 2012100537775A CN 201210053777 A CN201210053777 A CN 201210053777A CN 102594127 A CN102594127 A CN 102594127A
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Abstract
The invention discloses a repetition frequency compact pulse multiplier based on a Fitch circuit. The positive electrode of input voltage needing to be multiplied is connected to one end of the multiplier by a satiable inductor or a magnetic switch, and the negative electrode of the input voltage is directly connected with the other end of the multiplier; the multiplier comprises N capacitors connected in parallel, and a series circuit of a coupling inductor and a high-frequency silicon stack is connected between the two ends of the nth capacitor and the n+1th capacitor connected with the negative electrode of the input voltage; another coupling inductor is connected between the two ends of the n+1th capacitor and the n+2th capacitor connected with the positive electrode of the input voltage; n is equal to 1, 3, 5 ...; due to the arrangement of a plurality of dotted terminals of the coupling inductor, the condition that the sum of the flowing inductive current when the capacitors are charged counteracts to be zero can be ensured; a plurality of the dotted terminals of another coupling inductor are consistent in direction; and the two ends of the nth capacitor are connected with the satiable inductor in parallel. In the invention, the charging time is the pulse multiplier is short, and the voltage-second product of the satiable inductor is small; no electrode erosion and insulation recovery exist in the magnetic switch, so that the circuit can be operated under high repetition frequency.
Description
Technical field:
The invention belongs to the pulse power field, be specifically related to a kind of pulse voltage-multiplying circuit of repetition rate.
Background technology:
The repetitive frequency pulsed voltage-multiplying circuit that present stage extensively adopts is a kind of magnetic compression circuit of exempting to reset, and its circuit structure is shown in accompanying drawing 1
[1-2]Low pressure charging capacitor C
1With thyristor THY
1(or IGBT
[3]), air core inductor L
1(or magnetic switch
[4]) and pulse transformer PT
1Elementary windings in series and constitute the closed-loop path.The high-voltage charging capacitor C
2And C
3With magnetic switch MS1 and air core inductor L
2(or semiconductor disconnect
[5], upper end anode, lower end negative electrode) and series connection and formation closed-loop path.Pulse transformer secondary winding and high-voltage charging capacitor C
3Parallel connection, and constitute the closed-loop path.Load and air core inductor L
2Parallel connection also constitutes the closed-loop path.
The nitrogen oxide removal needs the output pulse amplitude greater than 40kV, is necessary that therefore an input voltage multiplication of voltage is to tens of kilovolts and carry out rising edge and compress.The pulse transformer in the magnetic switch circuit of exempting to reset has been accomplished the target of voltage multiplication.Yet pulse transformer need be the voltage multiplication to tens of several hectovolts kilovolt, so its no-load voltage ratio is very big.This can bring two problems: 1, no-load voltage ratio is big requires the elementary winding can not be a lot, is difficult to realize otherwise secondary winding is too many.So, unsaturated before the peaking at input pulse in order to guarantee pulse transformer, its magnetic core sectional area must be very big, and this causes the pulse transformer volume very big, is unfavorable for the miniaturization of clock.2, document [5] record; Output voltage amplitude gets final product at 10kV or following pulse transformer air insulation; And amplitude needs the oilpaper mix insulation at 10kV to the pulse transformer between the 50kV, and this will greatly increase pulse transformer weight, be unfavorable for its miniaturization and portability.
But the circuit that document 6 proposes has following shortcoming: 1, electric capacity is through the resistance charging, and the charging interval is very long, can't accomplish to rerun.2, adopt the ball crack as switch, its insulation recovery time and electrode erosion have also limited the frequency that reruns of whole system.
[1] Zhang Dongdong, Yan Ping, Wang Yu, etc. single-stage magnetic field impulse compressibility experimental study [J], the light laser and the particle beams, 2008:20 (8), 1397-1410.
[2] Zhang Dongdong, Yan Ping, Wang Yu, etc. single-stage magnetic field impulse compressibility is analyzed [J], high voltage technique, 2009,35 (3): 661-666.
[3]Scott?J.Pendleton，Daniel?Singleton，Andras?Kuthi，et?al.Compact?solid?state?high?repetition?rate?variable?amplitude?pulse?generator[J]2009.PPC′09.IEEE.2009：922-925.
[4]A.Pokryvailo，Y.Yankelevich，M.Wolf，et?al.A?1KW?pulsed?corona?system?for?pollution?control?applications[J]2003.PPC′03.IEEE.2003：225-228.
[5]F.Zagulov，V.Kladukhin，D.Kuznetsov，et?al.A?high-current?nanosecond?electron?accelerator?with?a?semiconductor?opening?switch[J]Instruments?and?Experimetal?Techniques.2000，43(5)：647-651
[6]Richard?Anthony?Fitch，Mortimer.“Electrical?Pulse?Generator”，US?Patent?nr?3,366,799，30.
Summary of the invention:
Therefore, the objective of the invention is to propose a kind of compact pulse voltage multiplie of repetition rate.This voltage multiplie cascade is carried out the secondary multiplication of voltage to the output pulse of pulse transformer after pulse transformer, thereby reduces the no-load voltage ratio and the output voltage amplitude of pulse transformer, and its volume and weight are greatly reduced.
Specific as follows:
The pulse multiplier operation principle that the present invention proposes is that electric capacity is carried out charged in parallel, during charging, makes that adjacent capacitor charging voltage size is identical, in the opposite direction.After the completion to be charged, alternate charging capacitor (promptly the 1st, 3,5 ... Or the 2nd, 4,6 ... An individual electric capacity that fills) and the magnetic switch after saturated carry out oscillating discharge, when its voltage was turned to negative sense, output promptly produced a pulse after the multiplication of voltage.
This patent proposes based on the structure of the compact pulse multiplier of repetition rate of Fitch circuit following:
A kind of repetitive frequency pulsed multiplier based on the Fitch circuit; The input voltage positive pole that need double is connected to an end of this multiplier through an inductance; Negative pole directly links to each other with the other end of multiplier; This multiplier comprises the electric capacity of N parallel connection, is connected with the series circuit of a coupling inductance and high frequency silicon stack between n the electric capacity that links to each other with said input voltage negative pole and the two ends of n+1 electric capacity; Be connected with another coupling inductance between n+1 the electric capacity that links to each other with said input voltage positive pole and the two ends of n+2 electric capacity; N=1,3,5 All coupling inductances all are coupling on the magnetic core; The end of the same name of a plurality of said coupling inductances is arranged and is guaranteed that electric capacity flows through the counteracting of inductive current summation when charging be 0; A plurality of said another coupling inductances extreme direction of the same name is consistent; N electric capacity two ends parallel connection satiable inductor.All satiable inductors are coupling on the magnetic core.
Suppose the saturated back of satiable inductor and its parallelly connected capacitance voltage overturn fully for negative polarity and be worth identical, in the said high frequency silicon stack of the coupling inductance series connection of a certain side that is positioned at capacitance group, the discharge between the prevention adjacent capacitor.In addition, should guarantee that also the opposite side coupling inductance extreme direction of the same name in the capacitance group is consistent.
The invention has the beneficial effects as follows:
The principle of pulse multiplier according to the invention and Fitch have similarity at United States Patent (USP) [6] in 1964, promptly all are to utilize electric capacity to be full of electricity back polarity upset to realize multiplication of voltage.But said circuit of this patent and traditional F itch circuit have remarkable difference: 1, charge circuit is made up of coupling inductance rather than resistance, thereby guarantees that the charging interval is shorter, and the voltagesecond product of satiable inductor is littler.2, control inductance and electric capacity starting of oscillation are not to lean on gas switch, but satiable inductor (magnetic switch).Magnetic switch does not have the problem of electrode erosion and insulation recovery, thereby makes this circuit under high repetition frequency, to move.
Description of drawings:
Fig. 1 exempts to reset magnetic compression circuit topology figure.
Fig. 2 is that quaternary vein is towards multiplier emulation voltage oscillogram.
Fig. 3 is that quinternary vein is towards multiplier emulation voltage oscillogram.
Fig. 4 is eight grades of pulse multiplier emulation voltage oscillograms.
Fig. 5 quaternary vein is towards multiplier circuit figure.
Fig. 6 quaternary vein is towards multiplier experimental voltage oscillogram.
Embodiment:
Below in conjunction with accompanying drawing the present invention is done detailed description.
Embodiment 1:
Designed quaternary vein towards multiplier, its circuit diagram is seen accompanying drawing 3:
1,4 charging capacitor C6-C9 are arranged side by side, and the upper end of C6 and C7, the lower end of C7 and C8, and C8 is connected with the upper end of C9.
2, the pin that do not connect of adjacent capacitor (be C6 lower end and C7 upper end, C7 lower end and C8 upper end are on C8 lower end and the C9) links together through coupling inductance.Connect according to illustrated end of the same name, when electric capacity charged, it was zero that coupling inductance flows through the electric current summation, and this can be explained as follows.Each electric capacity charge waveforms is consistent when supposing charging, and therefore its charging current i of any moment is identical.Then connect, can obtain: flow through L according to the coupling inductance among the figure
1Current i
L1=4i.i
L2=3i.i
L3=2i.i
L4=i. and L
1With L
3For end of the same name flows through electric current, L
2With L
4For the different name end flows through electric current, so total current is zero.
3, parallelly connected satiable inductor MS3 of C6 and MS4 with the C8 two ends, and the two is coupling on the magnetic core.
4, L2 and L4 series connection high frequency silicon stack D1 and D2, thus after preventing C6 and the upset of C8 voltage, C7 and C9 are respectively to their discharge.Because another time coupling inductance has only one of L3 in the capacitance group, therefore there is not the consistent problem of its extreme direction of the same name.
The operation principle of this circuit meets the operation principle of the described pulse multiplier of patent, is summarized as follows:
1, C5 is charged to u by front stage circuits
0The time, magnetic switch MS2 is saturated, and C5 begins to the resonant charging of pulse multiplier through the pulsactor of MS2 subsequently.Recharge here the stage, the electric current summation of the coupling inductance of pulse multiplier is 0, thereby guarantees that it can be considered short circuit.Therefore, the pulse multiplier is equivalent to four capacitor C 6-C9 parallel connections.
2, when C6-C9 resonant charging to peak value u
0The time, magnetic switch MS3 and MS4 are saturated, C6 and MS3, C8 and MS4 resonant discharge.And since this moment coupling inductance and diode play the inter-stage buffer action, so C7 and C9 go up voltage and keep almost constant.
3, oscillate to pact-u when C6 and C8 voltage
0The time, four capacitances in series voltage sums drop to-4u from 0
0, i.e. output (the C9 lower end is to the C6 lower end) pulse voltage, and amplitude is 4u, thereby realizes the target of 4 times of pulse multiplications.
Embodiment 2:
As shown in Figure 4, for the structure of quinternary vein towards the multiplier quinternary vein towards multiplier is equivalent to quaternary vein towards the final stage electric capacity parallel coupled inductance L 18 of multiplier and connecting of capacitor C 24, and capacitor C 24 is parallelly connected with magnetic switch M13.In addition, to flow into net current be zero to coupling inductance in order to guarantee to charge, and L15 connects with coupling inductance L16 with the number of turn, and the coupling direction of L14 and L17 and quaternary vein towards multiplier on the contrary.
Embodiment 3:
As shown in Figure 5, be eight grades of pulse multipliers, to compare towards multiplier with quaternary vein, the structure of eight grades of pulse multipliers is equivalent to two quaternary veins after the multiplier cascade, with the coupling direction negate of L5 and L11 among the last figure.This arrangement mode of coupling inductance be for guarantee eight grades of pulse multipliers when charging coupling inductance to flow into net current be zero, and the coupling direction of the row's of going up coupling inductance is consistent.
According to above-mentioned method for designing, can design the pulse multiplier of different progression (N electric capacity is exactly the N level), they have the double effects of pulse amplitude multiplication and rising edge compression.
Utilize Matlab Simulink module that quaternary vein is carried out circuit simulation towards multiplier, obtained capacitance voltages at different levels and output voltage waveforms, shown in accompanying drawing 2.It is thus clear that each step voltage is consistent at the charging stage waveform, show that coupling inductance equiva lent impedance this moment is very low.In 25 μ s, when capacitance voltage was charged to 100V, magnetic switch was saturated, and the two-stage capacitance voltage overturns at 2 μ s, output voltage-382V. therefore, voltage multiplication efficient is 95.5%, the pulse compression multiple is 12.5 times.
Experiment has been built quaternary vein towards multiplier, shown in accompanying drawing 3.First order electric capacity and output voltage waveforms are shown in accompanying drawing 4.It is thus clear that in 15 μ s, capacitance voltage is charged to 400V.Subsequently, magnetic switch is saturated, in 5 μ s, exports pulse amplitude 1.44kV. therefore, and voltage multiplication efficient is 90%, and the rising edge compression multiple is 3 times.
Claims (3)
1. repetitive frequency pulsed multiplier based on the Fitch circuit; The input voltage positive pole that need double is connected to an end of this multiplier through a satiable inductor or magnetic switch; Negative pole directly links to each other with the other end of multiplier; It is characterized in that: this multiplier comprises the electric capacity of N parallel connection, is connected with the series circuit of a coupling inductance and high frequency silicon stack between n the electric capacity that links to each other with said input voltage negative pole and the two ends of n+1 electric capacity; Be connected with another coupling inductance between n+1 the electric capacity that links to each other with said input voltage positive pole and the two ends of n+2 electric capacity; N=1,3,5 All coupling inductances all are coupling on the magnetic core; The end of the same name of a plurality of said coupling inductances is arranged and is guaranteed that electric capacity flows through the counteracting of inductive current summation when charging be 0; A plurality of said another coupling inductances extreme direction of the same name is consistent; N electric capacity two ends parallel connection satiable inductor.
2. pulse multiplier according to claim 1 is characterized in that: all satiable inductors are coupling on the magnetic core.
3. pulse multiplier according to claim 1 is characterized in that: N is 4 or 5 or 8.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210053777.5A CN102594127B (en) | 2012-03-02 | 2012-03-02 | Repetition frequency compact pulse multiplier based on Fitch circuit |
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| CN201210053777.5A CN102594127B (en) | 2012-03-02 | 2012-03-02 | Repetition frequency compact pulse multiplier based on Fitch circuit |
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| CN102594127B CN102594127B (en) | 2014-11-05 |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102931867A (en) * | 2012-10-10 | 2013-02-13 | 西安交通大学 | Pulse voltage-multiplying generation device with repetition frequency |
| CN107659200A (en) * | 2017-11-15 | 2018-02-02 | 西安交通大学 | Cascade connection type submicrosecond level high-voltage pulse generator for vacuum interrupter ageing |
| CN111464067A (en) * | 2020-03-17 | 2020-07-28 | 重庆大学 | High-frequency extremely short electron gun grid regulation pulse power supply system |
| CN112366975A (en) * | 2020-11-14 | 2021-02-12 | 大连理工大学 | Multi-pulse-width output magnetic compression power supply |
| CN112366976A (en) * | 2020-11-14 | 2021-02-12 | 大连理工大学 | Multistage magnetic pulse compression power supply |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4375594A (en) * | 1981-01-12 | 1983-03-01 | The United States Of America As Represented By The Secretary Of The Army | Thyratron Marx high voltage generator |
| US5105097A (en) * | 1991-02-01 | 1992-04-14 | Lasertechnics, Inc. | Passive magnetic switch for erecting multiple stage, high-pulse-rate voltage multipliers |
| JPH10323057A (en) * | 1997-02-21 | 1998-12-04 | Cymer Inc | Method and apparatus for removing reflection energy by stage mismatching in nonlinear magnetic compressing module |
| EP2106025A1 (en) * | 2008-03-27 | 2009-09-30 | Zachodniopomorksi Uniwersytet Technologiczny w Szczecinie | The method for shaping of high voltage pulse in a generator module and high voltage generator setup |
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2012
- 2012-03-02 CN CN201210053777.5A patent/CN102594127B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4375594A (en) * | 1981-01-12 | 1983-03-01 | The United States Of America As Represented By The Secretary Of The Army | Thyratron Marx high voltage generator |
| US5105097A (en) * | 1991-02-01 | 1992-04-14 | Lasertechnics, Inc. | Passive magnetic switch for erecting multiple stage, high-pulse-rate voltage multipliers |
| JPH10323057A (en) * | 1997-02-21 | 1998-12-04 | Cymer Inc | Method and apparatus for removing reflection energy by stage mismatching in nonlinear magnetic compressing module |
| EP2106025A1 (en) * | 2008-03-27 | 2009-09-30 | Zachodniopomorksi Uniwersytet Technologiczny w Szczecinie | The method for shaping of high voltage pulse in a generator module and high voltage generator setup |
Non-Patent Citations (1)
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| 马宾等: "基于磁开关的重复频率冲击电压发生器", 《强激光与离子束》 * |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102931867A (en) * | 2012-10-10 | 2013-02-13 | 西安交通大学 | Pulse voltage-multiplying generation device with repetition frequency |
| CN102931867B (en) * | 2012-10-10 | 2015-01-07 | 西安交通大学 | Pulse voltage-multiplying generation device with repetition frequency |
| CN107659200A (en) * | 2017-11-15 | 2018-02-02 | 西安交通大学 | Cascade connection type submicrosecond level high-voltage pulse generator for vacuum interrupter ageing |
| CN111464067A (en) * | 2020-03-17 | 2020-07-28 | 重庆大学 | High-frequency extremely short electron gun grid regulation pulse power supply system |
| CN112366975A (en) * | 2020-11-14 | 2021-02-12 | 大连理工大学 | Multi-pulse-width output magnetic compression power supply |
| CN112366976A (en) * | 2020-11-14 | 2021-02-12 | 大连理工大学 | Multistage magnetic pulse compression power supply |
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| CN102594127B (en) | 2014-11-05 |
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