CN102832331A

CN102832331A - Wafer level LED packaging structure

Info

Publication number: CN102832331A
Application number: CN2012103062759A
Authority: CN
Inventors: 张黎; 陈栋; 赖志明; 陈锦辉
Original assignee: Jiangyin Changdian Advanced Packaging Co Ltd
Current assignee: Jiangyin Changdian Advanced Packaging Co Ltd
Priority date: 2012-08-24
Filing date: 2012-08-24
Publication date: 2012-12-19
Anticipated expiration: 2032-08-24
Also published as: CN102832331B

Abstract

The invention relates to a wafer level LED packaging structure which comprises the technical field of semiconductor chip packaging. A concave cavity (21) is formed in the right side of a silicon base carrier (2) through photoetching and etching methods, a silicon island (22) formed by using photoetching and etching methods is stridden with the cavity (21) and is adhered with an LED chip (1) inverted to the bottom of the cavity (21), a heat radiating metal block (72) is arranged on the lower surface of the silicon island (22), a photosensitive resin layer I (61) with an island structure is covered on the lower surface of the silicon base carrier (2), a rewiring metal layer (71) is connected with an electrode I ( 121) and an electrode II (122), a signal of the LED chip is led to the back surface of the silicon base carrier (2), and the rewiring metal layer (71) with large area facilitates the heat radiation of a packaging body. Due to the adoption of a non-TSV (Through Silicon Via) structure, the wafer level LED packaging structure has the advantages of low packaging process difficulty and low packaging cost, is improved in heat radiating capacity, and is suitable for being widely applied in portable products.

Description

A kind of wafer level LED method for packing

Technical field

The present invention relates to a kind of wafer level chip packaging method, belong to the semiconductor die package technical field.

Background technology

LED (light-emitting diode) is a kind of solid-state semiconductor device that can electric energy be converted into visible light, and it is widely used in fields such as illumination, LCD backlight plate, control panel, flasher.

LED (light-emitting diode) is become by the P-N roped party.At present, the LED encapsulation is mainly carried out through the routing (the bonding mode promptly goes between) and the mode of back bonding with single chips, and is not enough below existing:

1) lead-in wire bonded encapsulation

The position of lead-in wire can cover and lose light intensity; The cooling base that lead-in wire bonding mode encapsulates is all at the chip back, and radiating effect is unsatisfactory, particularly the LED of high brightness; The package dimension that lead-in wire bonding mode encapsulates is relatively large, is unfavorable for its application in portable product.Secondly, the packing forms production efficiency of single chips is low, and homogeneity of product is difficult to guarantee, causes the test result classification of product more, influences the actual output of product of factory.

2) mounted type wafer level LED encapsulation

Along with people's is deepened the understanding of lead-in wire bonding mode LED encapsulation, is that the LED encapsulation technology of carrier begins to grow up with the disk, but in present technical development; Basic silicon through hole (the Through Silicon Via) interconnected method that adopts of wafer level LED encapsulation; Utilize TSV (silicon through hole) structure to realize the back side transfer and the distribution of LED electrode, its technology difficulty is bigger, and packaging cost is higher; The effective coverage of heat radiation is tied, and is unfavorable for industrialized development.

Summary of the invention

The objective of the invention is to overcome above-mentioned deficiency, the wafer level led chip method for packing that a kind of packaging technology difficulty is low, packaging cost is low, promote heat-sinking capability, be suitable for using in the portable product is provided.

The objective of the invention is to realize like this: a kind of wafer level LED method for packing comprises following processing step:

Step 1, cutting LED disk form single led chip;

Step 2, prepared silicon base carrier;

Step 3, the method through photoetching, etching form recessed die cavity in the front of silicon substrate carrier;

Step 4, at mold cavity surface and silicon substrate carrier upper surface deposition reflector layer, and on the reflector layer of cavity bottom, form the reflector layer opening;

Step 5, coating links glue in the reflector layer opening of cavity bottom, and with the led chip upside-down mounting to cavity bottom, electrode down, electrode pair is answered the reflector layer opening;

Step 6, get glass, at the lower surface coating phosphor powder layer of glass;

Step 7, in die cavity, fill up filling glue, and with the above-mentioned glass that has a phosphor powder layer and silicon substrate carrier through filling the glue bonding;

Step 8, the back side of above-mentioned silicon substrate carrier is thinned to the thickness of next arts demand;

Step 9, silicon and the part of utilizing the method for photoetching, etching to remove the above-mentioned silicon substrate carrier back side link glue, and form the silicon isolated island;

Step 10, the method at the back side of above-mentioned silicon substrate carrier with photoetching, etching form the photosensitive resin layer I;

Step 11, utilize photoetching, electric plating method to form the wiring metal layer at the back side of above-mentioned photosensitive resin layer I again and form metal derby at the lower surface of silicon isolated island, the wiring metal layer is connected with electrode I, electrode II again;

Step 12, in the lower surface of above-mentioned packaging body coating photosensitive resin layer II, utilize the method for photoetching, etching to form the photosensitive resin opening, expose the metal derby and the subregion of wiring metal layer again.

In step 3 and step 9, to the etching employing dry method or the wet etching of silicon substrate carrier.

In step 6, the mode of spraying or spin coating is adopted in the coating of said phosphor powder layer on glass.

In step 7, the mode of printing or putting glue is adopted in being provided with of said filling glue, and bonding process carries out under vacuum condition.

Above-mentioned method for packing of the present invention makes the front of silicon substrate carrier form recessed die cavity, back side formation silicon isolated island and is the photosensitive resin layer I of island structure; The bottom cross-over connection of silicon isolated island and die cavity, led chip upside-down mounting are to cavity bottom, and be bonding with the silicon isolated island; The heat transmission metal derby is arranged on the lower surface of silicon isolated island; The photosensitive resin layer I covers the lower surface of silicon substrate carrier, and its height flushes with the silicon isolated island, and the layer of wiring metal again that utilizes photoetching, electric plating method to form forms in the back side of photosensitive resin layer I; The wiring metal layer is connected with electrode I, electrode II again, the led chip signal is caused the back side of silicon substrate carrier.

The invention has the beneficial effects as follows:

1, the bottom cross-over connection of the silicon isolated island at the silicon substrate carrier back side and die cavity, led chip and silicon isolated island are bonding, and the silicon isolated island supports led chip in the cavity bottom of silicon substrate carrier, has strengthened the firmness of packaging body.

2, the metal derby of silicon isolated island lower surface setting mainly plays thermolysis, and the layer of wiring metal again that is connected with electrode I, electrode II had both played electric action, had promoted the heat sinking function of packaging body again.

3, encapsulating structure of the present invention adopts non-TSV structure; Reduce the led chip encapsulation difficulty from technology, reduced the packaging technology cost, realized high conduction, the heat conductivility of led chip encapsulation; Satisfy the surface mount process of standard simultaneously, be suitable for using in the portable product.

Description of drawings

Fig. 1 is the sketch map of a kind of wafer level LED of the present invention encapsulating structure.

Fig. 2～Figure 12 is the sketch map of a kind of wafer level LED of the present invention method for packing.

Among the figure:

Led chip 1

Chip body 11

Electrode 12

Electrode I 121

Electrode II 122

Link glue 13

Silicon substrate carrier 2

Die cavity 21

Silicon isolated island 22

Glass 3

Phosphor powder layer 31

Fill glue 4

Reflector layer 5

Reflector layer opening 51

Photosensitive resin layer 6

Photosensitive resin layer I 61

Photosensitive resin layer II 62

Photosensitive resin opening 621

Metal level 7

The wiring metal layer 71 again

Metal derby 72.

Embodiment

Referring to Fig. 1; A kind of wafer level LED of the present invention encapsulating structure comprises led chip 1, silicon substrate carrier 2 and fills glue 4 that said led chip 1 comprises chip body 11; Be provided with electrode 12 at chip body 11 upper surfaces; Said electrode 12 comprises electrode I 121 and electrode II 122, and the top of said silicon substrate carrier 2 is provided with glass 3, and the lower surface of said glass 3 is provided with phosphor powder layer 31.

The front of said silicon substrate carrier 2 is provided with recessed die cavity 21, the back side is provided with silicon isolated island 22, and the longitudinal section of said die cavity 21 is trapezoidal.Said silicon isolated island 22 strides across the two ends of die cavity 21, with the bottom cross-over connection of die cavity 21.Said silicon isolated island 22 plays a supportive role.Led chip 1 in the die cavity 21 is connected with silicon isolated island 22 through linking glue 13, and the length of said silicon isolated island 22 is greater than the bottom size of die cavity 21, and width is less than the width of led chip 1.The upper surface of said die cavity 21 surfaces and silicon substrate carrier 2 is provided with reflector layer 5, and said reflector layer 5 helps to promote the LED light extraction efficiency.

Said glass 3 is connected through filling glue 4 with silicon substrate carrier 2, and fills glue 4 and fill full die cavity 21 inside, and said filling glue 4 comprises silica gel.The degree of depth of said die cavity 21 is greater than the thickness of led chip 1.

The below of said silicon substrate carrier 2 is provided with photosensitive resin layer 6 and metal level 7; Said photosensitive resin layer 6 comprises photosensitive resin layer I 61 and photosensitive resin layer II 62; Said photosensitive resin layer I 61 covers the lower surface of silicon substrate carrier 2, is island structure, and its height flushes with silicon isolated island 22.Said metal level 7 comprises wiring metal layer 71 and metal derby 72 again, and said metal derby 72 is arranged on the lower surface of silicon isolated island 22, mainly plays thermolysis.The said layer of wiring metal again 71 is connected with electrode I 121, electrode II 122, the led chip signal is caused the back side of silicon substrate carrier 2.Said photosensitive resin layer II 62 covers on the metal level 7, and said photosensitive resin layer II 62 is provided with several photosensitive resin openings 621, exposes metal derby 72 and part wiring metal layer 71 again.

A kind of wafer level LED method for packing comprises following processing step:

Step 1, cutting LED disk form single led chip 1.

Step 2, prepared silicon base carrier 2.As shown in Figure 2.

Step 3, the method through photoetching, etching form recessed die cavity 21 in the front of silicon substrate carrier 2.Said etching adopts dry method or wet etching.As shown in Figure 3.

Step 4, at die cavity 21 surfaces and silicon substrate carrier 2 upper surfaces deposition reflector layer 5, and on the reflector layer 5 of die cavity 21 bottoms, form reflector layer opening 51.As shown in Figure 4.

Step 5, coating links glue 13 in the reflector layer opening 51 of die cavity 21 bottoms, and with led chip 1 upside-down mounting to die cavity 21 bottoms, electrode 12 down, electrode 12 corresponding reflector layer openings 51.As shown in Figure 5.

Step 6, get glass 3, at the lower surface coating phosphor powder layer 31 of glass 3.The mode of spraying or spin coating is adopted in said coating.As shown in Figure 6.

Step 7, in die cavity 21, adopt the mode of printing or some glue to fill up to fill glue 4, and the glass 3 that will above-mentionedly have a phosphor powder layer 31 carries out bonding with silicon substrate carrier 2 through filling glue 4 under vacuum condition.As shown in Figure 7.

Step 8, the back side of above-mentioned silicon substrate carrier 2 is thinned to the thickness of next arts demand.As shown in Figure 8.

Step 9, silicon and the part of utilizing the method for photoetching, etching to remove above-mentioned silicon substrate carrier 2 back sides link glue 13, and form silicon isolated island 22.Said etching adopts dry method or wet etching.As shown in Figure 9.

Step 10, the method at the back side of above-mentioned silicon substrate carrier 2 with photoetching, etching form photosensitive resin layer I 61, expose silicon isolated island 22 and electrode I 121, electrode II 122.Shown in figure 10.

Step 11, utilize photoetching, electric plating method to form wiring metal layer 71 at the back side of above-mentioned photosensitive resin layer I 61 again and form metal derby 72 at the lower surface of silicon isolated island 22, wiring metal layer 71 is connected with electrode I 121, electrode II 122 again.Shown in figure 11.

Step 12, in the lower surface of above-mentioned packaging body coating photosensitive resin layer II 62, utilize the method for photoetching, etching to form photosensitive resin opening 621, expose the metal derby 72 and the subregion of wiring metal layer 71 again.Shown in figure 12.

Claims

1. wafer level LED method for packing comprises following processing step:

Step 1, cutting LED disk form single led chip (1);

Step 2, prepared silicon base carrier (2);

Step 3, the method through photoetching, etching form recessed die cavity (21) in the front of silicon substrate carrier (2);

Step 4, at die cavity (21) surface and silicon substrate carrier (2) upper surface deposition reflector layer (5), and go up formation reflector layer opening (51) at the reflector layer (5) of die cavity (21) bottom;

Step 5, coating links glue (13) in the reflector layer opening (51) of die cavity (21) bottom, and with bottom led chip (1) upside-down mounting to the die cavity (21), electrode (12) down, the corresponding reflector layer opening of electrode (12) (51);

Step 6, get glass (3), at the lower surface coating phosphor powder layer (31) of glass (3);

Step 7, in die cavity (21), fill up and fill glue (4), and the glass (3) that will above-mentionedly have phosphor powder layer (31) and silicon substrate carrier (2) are through filling glue (4) bonding;

Step 8, the back side of above-mentioned silicon substrate carrier (2) is thinned to the thickness of next arts demand;

Step 9, the silicon that utilizes the method for photoetching, etching to remove above-mentioned silicon substrate carrier (2) back side link glue (13) with part, and form silicon isolated island (22);

Step 10, the method at the back side of above-mentioned silicon substrate carrier (2) with photoetching, etching form photosensitive resin layer I (61);

Step 11, utilize photoetching, electric plating method to form wiring metal layer (71) at the back side of above-mentioned photosensitive resin layer I (61) again and form metal derby (72) at the lower surface of silicon isolated island (22), wiring metal layer (71) is connected with electrode I (121), electrode II (122) again;

Step 12, in the lower surface of above-mentioned packaging body coating photosensitive resin layer II (62), utilize the method for photoetching, etching to form photosensitive resin opening (621), expose the metal derby (72) and the subregion of wiring metal layer (71) again.

2. a kind of wafer level LED method for packing according to claim 1 is characterized in that: in step 3 and step 9, to the etching employing dry method or the wet etching of silicon substrate carrier (2).

3. a kind of wafer level LED method for packing according to claim 1 is characterized in that: in step 6, said glass (3) is gone up the coating employing spraying of phosphor powder layer (31) or the mode of spin coating.

4. a kind of wafer level LED method for packing according to claim 1 is characterized in that: in step 7, the mode of printing or putting glue is adopted in being provided with of said filling glue (4), and bonding process carries out under vacuum condition.