CN103400768A

CN103400768A - Packaging-prior-to-etching type three-dimensional system-level chip-normally-bonded packaging structure and process method thereof

Info

Publication number: CN103400768A
Application number: CN2013103397649A
Authority: CN
Inventors: 梁志忠; 梁新夫; 王亚琴; 王孙艳; 章春燕
Original assignee: Jiangsu Changjiang Electronics Technology Co Ltd
Current assignee: Jiangsu Zunyang Electronic Technology Co ltd
Priority date: 2013-08-06
Filing date: 2013-08-06
Publication date: 2013-11-20
Anticipated expiration: 2033-08-06
Also published as: CN103400768B

Abstract

The invention relates to a packaging-prior-to-etching type three-dimensional system-level chip-normally-bonded packaging structure and a process method thereof. The structure comprises a pad and pins, wherein a first chip and a second chip are respectively arranged on the front and back surfaces of the pad; the front surfaces of the first chip and the second chip are respectively connected with the front and back surfaces of the pins through metal wires; conductive columns are arranged on the front surfaces of the pins; molding compounds are encapsulated in the peripheral area of the pad, the areas between the pad and the pins and between each two pins, the upper areas of the pad and the pins, the lower areas of the pad and the pins, and the external areas of the first chip, the second chip, the metal wires and the conductive columns; and anti-oxidation layers are plated on the surfaces, exposed from the molding compounds, of the conductive columns. By virtue of the packaging-prior-to-etching type three-dimensional system-level chip-normally-bonded packaging structure and the process method thereof, the problems of limitation of the whole packaging functional integrity caused by difficulty in embedding of a chip into a conventional metal lead frame or an organic multilayer circuit substrate and requirements on larger wire width and smaller wire interval can be solved.

Description

First after the erosion, inside back cover maintains irrespective of size chip formal dress encapsulating structure and process

Technical field

After the present invention relates to a kind of first erosion, inside back cover maintains irrespective of size chip formal dress encapsulating structure and process.Belong to the semiconductor packaging field.

Background technology

Tradition four sides without pin die-attach area encapsulating structure as shown in Figure 83, its main manufacture craft is that sheet metal carries out chemical etching, thereby metal plating is made the Ji Dao of carries chips, the die-attach area of inside and outside pin getting, then carries out one-sided load, routing on this basis, the packaging technology such as seals.

And traditional organic multilayer circuit base plate encapsulating structure is as shown in Figure 84, its main technique is by amassing into mode that material the amasss formation multilayer circuit board that superposes on the basis of glass mat core material, between line layer, by the mode perforate of laser drill, then plate hole and complete electric connection.And then on the basis of multilayer circuit board, carry out one-sided load, routing, the packaging technology such as seal.

Above-mentioned die-attach area encapsulating structure and multilayer wiring board encapsulating structure all have the following disadvantages:

1, this type of die-attach area and multilayer wiring board all can only carry out one-sided chip package, and the utilance of die-attach area or multilayer wiring board is lower, thereby limit the functional integration of whole encapsulation.

2, this type of die-attach area and multilayer wiring board itself do not imbedded any object, so die-attach area and multilayer circuit board do not possess the function integrated result, thereby correspondingly limited the functional integration of whole packaging body yet.

3, the material cost of organic multilayer substrate and technique cost of manufacture are higher.

4, the live width line-spacing of traditional metal lead frame is considerably large, more than at least all wanting 200 μ m, so can't accomplish highdensity demand.

5, the live width line-spacing of traditional organic multilayer circuit is made ability according to present etching, can only reach 25 μ m live widths and 25 μ m line-spacings, and is a bit wide a little.

Summary of the invention

The object of the invention is to overcome above-mentioned deficiency, a kind of erosion chip formal dress three-dimensional system level packaging structure and process of first being honored as a queen is provided, and it can solve that traditional metal lead frame or multilayer wiring board itself can't be imbedded chip and passive component and the problem and the traditional organic substrate that limit whole encapsulation function integrated level needs wider Yu narrower line and the distance between centers of tracks of fine rule.

The object of the present invention is achieved like this: after a kind of first erosion, inside back cover maintains the process of irrespective of size chip formal dress encapsulation, and described method comprises the steps:

Step 1, get metal substrate

Step 2, the micro-copper layer of metallic substrate surfaces preplating

Step 3, the operation of subsides photoresistance film

In the metal substrate front that completes the micro-copper layer of preplating and the back side stick respectively the photoresistance film that can carry out exposure imaging;

Part photoresistance film is removed at step 4, the metal substrate back side

Utilize exposure imaging equipment that step 3 is completed to the metal substrate back side of pasting the operation of photoresistance film and carry out graph exposure, develop and remove part figure photoresistance film, the regional graphics of electroplating to expose the follow-up needs in the metal substrate back side;

Step 5, plated metal line layer

In step 4, in the zone of metal substrate back side removal part photoresistance film, electroplate the metallic circuit layer;

Step 6, the operation of subsides photoresistance film

The photoresistance film that can carry out exposure imaging is sticked at the metal substrate back side in step 5;

Part photoresistance film is removed at step 7, the metal substrate back side

Utilize exposure imaging equipment that step 6 is completed to the metal substrate back side of pasting the operation of photoresistance film and carry out graph exposure, develop and remove part figure photoresistance film, the regional graphics of electroplating to expose the follow-up needs in the metal substrate back side;

Step 8, plating high-conductive metal line layer

In step 7, in the zone of metal substrate back side removal part photoresistance film, electroplate the high-conductive metal line layer, form corresponding Ji Dao and pin;

Step 9, removal photoresistance film

Remove the photoresistance film of metallic substrate surfaces;

Step 10, epoxy resin plastic packaging

Metallic circuit layer surface at the metal substrate back side utilizes epoxide resin material to carry out the plastic packaging protection;

Step 11, epoxy resin surface grind

After completing the epoxy resin plastic packaging, carry out the epoxy resin surface grinding;

Step 12, the operation of subsides photoresistance film

Metal substrate front and back at completing steps 11 sticks the photoresistance film that can carry out exposure imaging;

Step 13, the positive part photoresistance film of removing of metal substrate

Utilize exposure imaging equipment that step 12 is completed to the metal substrate front of pasting the operation of photoresistance film and carry out graph exposure, develop and remove part figure photoresistance film, to expose the positive follow-up needs of metal substrate, carry out etched regional graphics;

Step 14, chemical etching

Chemical etching is carried out in the zone that metal substrate front in step 13 is completed to exposure imaging;

Step 15, the operation of subsides photoresistance film

Metal substrate front and back at completing steps 14 sticks the photoresistance film that can carry out exposure imaging;

Step 10 six, the positive part photoresistance film of removing of metal substrate

Utilize exposure imaging equipment that step 15 is completed to the metal substrate front of pasting the operation of photoresistance film and carry out graph exposure, develop and remove part figure photoresistance film, the regional graphics of electroplating to expose the positive follow-up needs of metal substrate;

Step 10 seven, plated metal pillar

In step 10 six, in the zone of the positive removal of metal substrate part photoresistance film, electroplate the metal pillar;

Step 10 eight, removal photoresistance film

Remove the photoresistance film of metallic substrate surfaces;

Step 10 nine, coating bonding material

At basic island front surface coated conduction or the non-conductive bonding material that step 8 forms;

Step 2 ten, load

On the conduction of step 10 nine or non-conductive bonding material, implant the first chip;

Step 2 11, metal wire bonding

Between the first chip front side and pin front, carry out the operation of bonding metal wire;

Step 2 12, seal

The positive plastic packaging material that adopts of metal substrate in step 2 11 is carried out to plastic packaging;

Step 2 13, epoxy resin surface grind

After the epoxy resin plastic packaging of completing steps 22, carry out the epoxy resin surface grinding;

Step 2 14, electroplate anti-oxidant metal layer or batch cover antioxidant (OSP)

The exposed metal of metallic substrate surfaces after completing steps 23 is electroplated anti-oxidant metal layer or is criticized and covers antioxidant (OSP).

Step 2 15, coating bonding material

At the basic island of step 2 14 backside coating conduction or non-conductive bonding material.

Step 2 16, load

On the conduction of step 2 15 or non-conductive bonding material, implant the second chip.

Step 2 17, metal wire bonding

Between the second chip front side and the pin back side, carry out the operation of bonding metal wire.

Step 2 18, seal

Adopt plastic packaging material to carry out plastic packaging at the metal substrate back side in step 2 17.

Step 2 19, cutting finished product

Step 2 18 is completed to the semi-finished product of sealing and carry out cutting operation, make the rear inside back cover of first erosion and maintain irrespective of size chip formal dress encapsulating structure.

after a kind of first erosion, inside back cover maintains irrespective of size chip formal dress encapsulating structure, it comprises Ji Dao and pin, front and back at described Ji Dao is provided with the first chip and the second chip respectively by conduction or non-conductive material, the front of described the first chip and the second chip is connected with metal wire respectively with between the front and back of pin, in described pin front, be provided with conductive posts, the zone of periphery, described basic island, zone between Ji Dao and pin, zone between pin and pin, the zone on Ji Dao and pin top, zone and the first chip and second chip of Ji Dao and pin bottom, metal wire and conductive posts all are encapsulated with plastic packaging material outward, described plastic packaging material flushes with the top of conductive posts, the surface of exposing plastic packaging material in described conductive posts is coated with anti oxidation layer or coating antioxidant.

By conduction bonding material cross-over connection passive device, described passive device is connected across between the pin back side and the pin back side, between the Yu Jidao back side, the pin back side, between the pin back side and the static release ring back side and between the Yu Jidao back side, the static release ring back side between described pin and pin, between pin and basic island, between pin and static release ring and between static release ring and basic island.

The pin back side, described basic island is provided with a plurality of the second chips by conduction or non-conductive bonding material.

In described the second chip front side, by conduction or non-conductive bonding material, be provided with the 3rd chip, between described the 3rd chip front side and pin, by metal wire, be connected.

At the described pin back side, by the Metal Ball upside-down mounting, the 3rd chip is arranged, described Metal Ball and the 3rd chip are in the inside of plastic packaging material.

At the described pin back side, by the Metal Ball upside-down mounting, passive device is arranged, described Metal Ball and passive device are in the inside of plastic packaging material.

After a kind of first erosion, inside back cover maintains the process of irrespective of size chip formal dress encapsulation, and described method comprises the steps:

Step 1, get metal substrate

Step 2, the micro-copper layer of metallic substrate surfaces preplating

Step 3, the operation of subsides photoresistance film

Part photoresistance film is removed at step 4, the metal substrate back side

Step 5, plating the first metallic circuit layer

In step 4, in the zone of metal substrate back side removal part photoresistance film, electroplate the first metallic circuit layer;

Step 6, the operation of subsides photoresistance film

Part photoresistance film is removed at step 7, the metal substrate back side

Step 8, plating the second metallic circuit layer

The metal substrate back side is removed in the zone of part photoresistance film and is electroplated the second metallic circuit layer as in order to connect the conductive posts of the first metallic circuit layer and the 3rd metallic circuit layer in step 7;

Step 9, removal photoresistance film

Remove the photoresistance film of metallic substrate surfaces;

Step 10, the non-conductive glued membrane operation of pressing

At the non-conductive glued membrane of metal substrate back side pressing one deck;

Step 11, grinding non-conductive glued membrane surface

After completing non-conductive glued membrane pressing, carry out surface grinding;

Step 12, the preliminary treatment of non-conductive glued membrane surface metalation

To the preliminary treatment of metallizing of non-conductive glued membrane surface;

Step 13, the operation of subsides photoresistance film

The metal substrate front and back sticks the photoresistance film that can carry out exposure imaging in step 12;

Part photoresistance film is removed at step 14, the metal substrate back side

Utilize exposure imaging equipment that step 13 is completed to the metal substrate back side of pasting the operation of photoresistance film and carry out graph exposure, develop and remove part figure photoresistance film, to expose the follow-up needs in the metal substrate back side, carry out etched regional graphics;

Step 15, etching operation

In the zone that step 14 completes after the photoresistance film is windowed, carry out the etching operation;

The photoresistance film is removed at step 10 six, the metal substrate back side

Remove the photoresistance film at the metal substrate back side, the metallic region figure that is plated to expose follow-up needs;

Step 10 seven, plating the 3rd metallic circuit layer

At the metal substrate back side of step 10 six, carry out the plating work of the 3rd metallic circuit layer;

Step 10 eight, the operation of subsides photoresistance film

At the metal substrate back side of step 10 seven, stick the photoresistance film that can carry out exposure imaging;

Part photoresistance film is removed at step 10 nine, the metal substrate back side

Utilize exposure imaging equipment that step 10 eight is completed to the metal substrate back side of pasting the operation of photoresistance film and carry out graph exposure, develop and remove part figure photoresistance film, the regional graphics of electroplating to expose the follow-up needs in the metal substrate back side;

Step 2 ten, plating the 4th metallic circuit layer

In step 10 nine, in the zone of metal substrate back side removal part photoresistance film, electroplate the 4th metallic circuit layer as in order to connect the 3rd metallic circuit layer and five metals, belonging to the conductive posts of line layer;

Step 2 11, removal photoresistance film

Remove the photoresistance film of metallic substrate surfaces;

Step 2 12, the non-conductive glued membrane operation of pressing

Step 2 13, grinding non-conductive glued membrane surface

Step 2 14, the preliminary treatment of non-conductive glued membrane surface metalation

Step 2 15, the operation of subsides photoresistance film

The metal substrate front and back sticks the photoresistance film that can carry out exposure imaging in step 2 14;

Part photoresistance film is removed at step 2 16, the metal substrate back side

Utilize exposure imaging equipment that step 2 15 is completed to the metal substrate back side of pasting the operation of photoresistance film and carry out graph exposure, develop and remove part figure photoresistance film, to expose the follow-up needs in the metal substrate back side, carry out etched regional graphics; Step 2 17, etching operation

In the zone that step 2 16 completes after the photoresistance film is windowed, carry out the etching operation;

The photoresistance film is removed at step 2 18, the metal substrate back side

Remove the photoresistance film at the metal substrate back side;

Step 2 19, plating five metals belong to line layer

The plating work that five metals belongs to line layer is carried out at the metal substrate back side in step 2 18, and five metals belongs to line layer and electroplates after completing and namely on metal substrate, form corresponding Ji Dao and pin;

Step 3 ten, the operation of subsides photoresistance film

The photoresistance film that can carry out exposure imaging is sticked in the metal substrate front in step 2 19;

Step 3 11, the positive part photoresistance film of removing of metal substrate

Utilize exposure imaging equipment that step 3 ten is completed to the metal substrate front of pasting the operation of photoresistance film and carry out graph exposure, develop and remove part figure photoresistance film, to expose the positive follow-up needs of metal substrate, carry out etched regional graphics;

Step 3 12, chemical etching

Chemical etching is carried out in the zone that metal substrate front in step 3 11 is completed to exposure imaging, and chemical etching is until the metallic circuit layer;

Step 3 13, the operation of subsides photoresistance film

The photoresistance film that can carry out exposure imaging is sticked in the metal substrate front that completes chemical etching in step 3 12;

Step 3 14, the positive part photoresistance film of removing of metal substrate

Utilize exposure imaging equipment that step 3 13 is completed to the metal substrate front of pasting the operation of photoresistance film and carry out graph exposure, develop and remove part figure photoresistance film, the regional graphics of electroplating to expose the positive follow-up needs of metal substrate;

Step 3 15, plated metal pillar

In step 3 14, in the zone of the positive removal of metal substrate part photoresistance film, electroplate the metal pillar;

Step 3 16, removal photoresistance film

Remove the photoresistance film of metallic substrate surfaces;

Step 3 17, coating bonding material

At the basic island of completing steps 36 front surface coated conduction or non-conductive bonding material;

Step 3 18, load

On the conduction of step 3 17 or non-conductive bonding material, implant the first chip;

Step 3 19, metal wire bonding

Step 4 ten, seal

The positive epoxy resin (being commonly called as plastic packaging material) that adopts of metal substrate in step 3 19 is carried out to plastic packaging;

Step 4 11, epoxy resin surface grind

After the epoxy resin plastic packaging of completing steps 40, carry out the epoxy resin surface grinding;

Step 4 12, electroplate anti-oxidant metal layer or batch cover antioxidant (OSP)

The exposed metal of metallic substrate surfaces after completing steps 41 is electroplated anti-oxidant metal layer or is criticized and covers antioxidant (OSP).

Step 4 13, coating bonding material

At the basic island of completing steps 42 backside coating conduction or non-conductive bonding material.

Step 4 14, load

On the conduction of step 4 13 or non-conductive bonding material, implant the second chip.

Step 4 15, metal wire bonding

Step 4 16, seal

Adopt plastic packaging material to carry out plastic packaging at the metal substrate back side in step 4 15.

Step 4 17, cutting finished product

Step 4 16 is completed to the semi-finished product of sealing and carry out cutting operation, make the rear inside back cover of first erosion and maintain irrespective of size chip formal dress encapsulating structure.

But described step 6, to step 10 seven repetitive operations, forms more multi-layered metallic circuit layer.

Compared with prior art, the present invention has following beneficial effect:

1, metal current lead frame or organic multilayer circuit base plate all can't be imbedded object, thereby have limited the functional integration of whole encapsulation.And three-dimensional systematic metallic circuit substrate of the present invention, three-dimensional systematic metallic circuit substrate can be imbedded object in manufacturing process again in the interlayer in the middle of substrate, thereby realize loading chip or other assemblies in the both sides of three-dimensional systematic metallic circuit substrate substrate, thereby promoted the functional integration of whole encapsulation;

2, the interlayer in three-dimensional systematic metallic circuit substrate can be because heat conduction or heat radiation need in manufacturing process be imbedded heat conduction or heat radiation object in the position of needs or zone, thereby improves the radiating effect of whole encapsulating structure;

3, the interlayer in three-dimensional systematic metallic circuit substrate can be because of the needs of system and function in manufacturing process be imbedded active member or assembly or passive assembly in the position of needs or zone, thereby has improved the utilance of substrate;

4, from the outward appearance of three-dimensional systematic metallic circuit substrate package finished product, can't see the inner interlayer of substrate has fully imbedded because of system or the object of function needs, especially the imbedding X-ray and all can't inspect of the chip of silicon material, fully reach confidentiality and the protectiveness of system and function;

5, the systemic-function integrated of three-dimensional systematic metallic circuit substrate package is many, thereby the component module of said function shared space on PCB is just fewer, thereby has also just reduced cost.

6, the interlayer of three-dimensional systematic metallic circuit substrate can be imbedded high-power component in manufacturing process, with control chip, is contained in respectively the substrate both sides, thereby can avoid the high-power component heat radiation and the signal transmission of interference control chip.

7, three-dimensional systematic metallic circuit substrate adopts plating mode to make circuit, and the live width line-spacing can reach below 15 μ m.

8, three-dimensional systematic metallic circuit substrate adopts plating, etching and plastic package process to make, and technique is simple, and cost is than low 30% left and right of organic substrate.

The accompanying drawing explanation

Fig. 1 ~ Figure 29 is that the present invention first loses each operation schematic diagram that rear inside back cover maintains irrespective of size chip formal dress packaging process.

Figure 30 is that the present invention first loses the schematic diagram that rear inside back cover maintains irrespective of size chip formal dress encapsulating structure embodiment 1.

Figure 31 is that the present invention first loses the schematic diagram that rear inside back cover maintains irrespective of size chip formal dress encapsulating structure embodiment 2.

Figure 32 is that the present invention first loses the schematic diagram that rear inside back cover maintains irrespective of size chip formal dress encapsulating structure embodiment 3.

Figure 33 is that the present invention first loses the schematic diagram that rear inside back cover maintains irrespective of size chip formal dress encapsulating structure embodiment 4.

Figure 34 is that the present invention first loses the schematic diagram that rear inside back cover maintains irrespective of size chip formal dress encapsulating structure embodiment 5.

Figure 35 ~ Figure 81 is that the present invention first loses the process chart that rear inside back cover maintains irrespective of size chip formal dress encapsulating structure embodiment 6.

Figure 82 is that the present invention first loses the schematic diagram that rear inside back cover maintains irrespective of size chip formal dress encapsulating structure embodiment 6.

Figure 83 is the schematic diagram of tradition four sides without pin die-attach area encapsulating structure.

Figure 84 is the schematic diagram of traditional organic multilayer circuit base plate encapsulating structure.

Wherein:

Base island 1

Pin 2

Conduction or non-conductive bonding material 3

The first chip 4

The second chip 5

Metal wire 6

Conductive posts 7

Plastic packaging material 8

Anti oxidation layer or batch cover antioxidant 9

Passive device 10

The 3rd chip 11

Metal Ball 12

Static release ring 13.

Embodiment

The present invention a kind of first the erosion after inside back cover maintain irrespective of size chip formal dress encapsulating structure and process as follows:

Embodiment 1, individual layer circuit single-chip formal dress individual pen pin

referring to Figure 30, for the present invention first loses the structural representation that rear inside back cover maintains irrespective of size chip formal dress encapsulating structure embodiment 1, it comprises basic island 1 and pin 2, the front and back on described basic island 1 is respectively arranged with the first chip 4 and the second chip 5 by conduction or non-conductive bonding material 3, the front of described the first chip 4 and the second chip 5 is connected with metal wire 6 respectively with between the front and back of pin 2, in described pin 2 fronts, be provided with conductive posts 7, the zone of 1 periphery, described basic island, zone between base island 1 and pin 2, zone between pin 2 and pin 2, the zone on base island 1 and pin 2 tops, zone and first chip 4 of base island 1 and pin 2 bottoms, the second chip 5, the outer plastic packaging material 8 that all is encapsulated with of metal wire 6 and conductive posts 7, described plastic packaging material 8 flushes with the top of conductive posts 7, on the surface that described conductive posts 7 is exposed plastic packaging material 8, be coated with anti oxidation layer or criticize and cover antioxidant (OSP) 9.

Its process is as follows:

Step 1, get metal substrate

Referring to Fig. 1, get the metal substrate that a slice thickness is suitable, the purpose that this sheet material uses is just made with follow-up encapsulation and is supported the transitional material that the line layer structure is used as circuit, the material of this sheet material is mainly take metal material as main, and the metallics of the material of metal material can be the zinc-plated Cai ﹑ of Tong Cai ﹑ Tie Cai ﹑ Bu rust Gang Cai ﹑ aluminium maybe can reach conducting function or non-all-metal material etc.

Step 2, the micro-copper layer of metallic substrate surfaces preplating

Referring to Fig. 2, at the micro-copper layer of metallic substrate surfaces preplating, micro-copper layer thickness is at 2 ~ 10 microns, according to function, needing also can attenuate or thicken, be mainly to make while for follow-up circuit, making line layer and the metal substrate can fluid-tight engagement, the mode of plating can adopt chemical deposition or metallide.

Step 3, the operation of subsides photoresistance film

Referring to Fig. 3, in the metal substrate front that completes the micro-copper layer of preplating and the back side stick respectively the photoresistance film that can carry out exposure imaging, to protect follow-up electroplated metal layer process operation, the photoresistance film can be that dry type photoresistance film can be also wet type photoresistance film.

Part photoresistance film is removed at step 4, the metal substrate back side

Referring to Fig. 4, utilize exposure imaging equipment that step 3 is completed to the metal substrate back side of pasting the operation of photoresistance film and carry out graph exposure, develop and remove part figure photoresistance film, the regional graphics of electroplating to expose the follow-up needs in the metal substrate back side.

Step 5, plated metal line layer

referring to Fig. 5, in step 4, in the zone of metal substrate back side removal part photoresistance film, electroplate the metallic circuit layer, the metallic circuit layer material can be copper, aluminium, nickel, silver, gold, copper silver, the nickel gold, (common 5 ~ 20 microns of NiPdAus, can select different plating materials according to different application, the thickness of electroplating according to the different qualities conversion) material such as, certainly other metallics that can conduct electricity can use, do not limit to copper, aluminium, nickel, silver, gold, copper silver, the nickel gold, the metal materials such as NiPdAu, plating mode can be chemical deposition or metallide mode.

Step 6, the operation of subsides photoresistance film

Referring to Fig. 6, the photoresistance film that can carry out exposure imaging is sticked at the metal substrate back side in step 5, and the photoresistance film can be that dry type photoresistance film can be also wet type photoresistance film.

Part photoresistance film is removed at step 7, the metal substrate back side

Referring to Fig. 7, utilize exposure imaging equipment that step 6 is completed to the metal substrate back side of pasting the operation of photoresistance film and carry out graph exposure, develop and remove part figure photoresistance film, the regional graphics of electroplating to expose the follow-up needs in the metal substrate back side.

Step 8, plating high-conductive metal line layer

Referring to Fig. 8, in step 7, in the zone of metal substrate back side removal part photoresistance film, electroplate the high-conductive metal line layer, form corresponding Ji Dao and pin, the material of high-conductive metal line layer can be copper, aluminium, nickel, silver, gold, the materials such as copper is silver-colored, nickel is golden, NiPdAu, certainly other metallics that can conduct electricity can use, do not limit to copper, aluminium, nickel, silver, gold, the metal materials such as copper is silver-colored, nickel is golden, NiPdAu, plating mode can make chemical deposition or metallide mode.

Step 9, removal photoresistance film

Referring to Fig. 9, remove the photoresistance film of metallic substrate surfaces, the method for removing the photoresistance film can adopt chemical medicinal liquid to soften and adopt the mode of high pressure water washing to remove the photoresistance film.

Step 10, epoxy resin plastic packaging

Referring to Figure 10; metallic circuit layer and high-conductive metal line layer surface at the metal substrate back side utilize epoxide resin material to carry out the plastic packaging protection; epoxide resin material can be selected filler to be arranged or do not have Packed kind according to product performance, and the plastic packaging mode can adopt mould encapsulating mode, spraying equipment spraying method, pad pasting mode or the mode of brush coating.

Step 11, epoxy resin surface grind

Referring to Figure 11, after completing the epoxy resin plastic packaging, carry out the epoxy resin surface grinding, purpose is the thickness that high-conductive metal line layer that outer pin function is used exposes plastic-sealed body surface and control ring epoxy resins.

Step 12, the operation of subsides photoresistance film

Referring to Figure 12, at the metal substrate front and back of completing steps 11, stick the photoresistance film that can carry out exposure imaging, the photoresistance film can be that dry type photoresistance film can be also wet type photoresistance film.

Step 13, the positive part photoresistance film of removing of metal substrate

Referring to Figure 13, utilize exposure imaging equipment that step 12 is completed to the metal substrate front of pasting the operation of photoresistance film and carry out graph exposure, develop and remove part figure photoresistance film, to expose the positive follow-up needs of metal substrate, carry out etched regional graphics.

Step 14, chemical etching

Referring to Figure 14, chemical etching is carried out in the zone that metal substrate front in step 13 is completed to exposure imaging, and chemical etching is until the metallic circuit layer, and etching solution can adopt copper chloride or iron chloride or the liquid medicine that can carry out chemical etching.

Step 15, the operation of subsides photoresistance film

Referring to Figure 15, at the metal substrate front and back of completing steps 14, stick the photoresistance film that can carry out exposure imaging, the photoresistance film can be that dry type photoresistance film can be also wet type photoresistance film.

Referring to Figure 16, utilize exposure imaging equipment that step 15 is completed to the metal substrate front of pasting the operation of photoresistance film and carry out graph exposure, develop and remove part figure photoresistance film, the regional graphics of electroplating to expose the positive follow-up needs of metal substrate.

Step 10 seven, plated metal pillar

Referring to Figure 17, in step 10 six, in the zone of the positive removal of metal substrate part photoresistance film, electroplate the metal pillar, the material of metal pillar can be copper, aluminium, nickel, silver, gold, the materials such as copper is silver-colored, nickel is golden, NiPdAu, certainly other metallics that can conduct electricity can use, do not limit to copper, aluminium, nickel, silver, gold, the metal materials such as copper is silver-colored, nickel is golden, NiPdAu, plating mode can make chemical deposition or metallide mode.

Step 10 eight, removal photoresistance film

Referring to Figure 18, remove the photoresistance film of metallic substrate surfaces, the method for removing the photoresistance film can adopt chemical medicinal liquid to soften and adopt the mode of high pressure water washing to remove the photoresistance film.

Step 10 nine, coating bonding material

Referring to Figure 19, at the basic island of step 10 eight front surface coated conduction or non-conductive bonding material, purpose be for after follow-up implanted chip with the engaging of Ji Dao.

Step 2 ten, load

Referring to Figure 20, on the conduction of step 10 nine or non-conductive bonding material, implant the first chip.

Step 2 11, metal wire bonding

Referring to Figure 21, between the first chip front side and pin front, carry out the operation of bonding metal wire, the material of described metal wire adopts gold, silver, copper, aluminium or the material of alloy, shape wiry can be thread can be also banded.

Step 2 12, seal

Referring to Figure 22, the positive plastic packaging material that adopts of metal substrate in step 2 11 is carried out to plastic packaging, the plastic packaging mode can adopt mould encapsulating mode, spraying equipment spraying method or use the pad pasting mode, and described plastic packaging material can adopt packing material or without the epoxy resin of packing material.

Step 2 13, epoxy resin surface grind

Referring to Figure 23, after the epoxy resin plastic packaging of completing steps 22, carry out the epoxy resin surface grinding, purpose is to make the metal pillar expose the thickness of plastic-sealed body surface and control ring epoxy resins.

Step 2 14, plating anti-oxidant metal layer or coating antioxidant (OSP)

Referring to Figure 24, the exposed metal of the metallic substrate surfaces after completing steps 23 is electroplated anti-oxidant metal layer, prevents burning, as gold, golden, the NiPdAu of nickel, tin or coating antioxidant (OSP).

Step 2 15, coating bonding material

Referring to Figure 25, at the basic island of step 2 14 backside coating conduction or non-conductive bonding material, purpose be for after follow-up implanted chip with the engaging of Ji Dao.

Step 2 16, load

Referring to Figure 26, on the conduction of step 2 15 or non-conductive bonding material, implant the second chip.

Step 2 17, metal wire bonding

Referring to Figure 27, between the second chip front side and the pin back side, carry out the operation of bonding metal wire, the material of described metal wire adopts gold, silver, copper, aluminium or the material of alloy, shape wiry can be thread can be also banded.

Step 2 18, seal

Referring to Figure 28, adopt plastic packaging material to carry out plastic packaging at the metal substrate back side in step 2 17, the plastic packaging mode can adopt mould encapsulating mode, spraying equipment spraying method or use the pad pasting mode, and described plastic packaging material can adopt packing material or without the epoxy resin of packing material.

Step 2 19, cutting finished product

Referring to Figure 29, step 2 18 is completed to the semi-finished product of sealing and carry out cutting operation, make originally in array aggregate mode, to integrate and to contain more than cuttings of plastic-sealed body module of chip independent, after making first erosion, inside back cover maintains irrespective of size chip formal dress encapsulating structure, can adopt conventional diamond blade and conventional cutting equipment to get final product.

Embodiment 2, multi-turn single-chip formal dress+passive device+static release ring

referring to Figure 31, for the present invention first loses the structural representation that rear inside back cover maintains irrespective of size chip formal dress encapsulating structure embodiment 2, embodiment 2 is with the difference of embodiment 1: described conductive posts 7 has multi-turn, between described pin 2 and pin 2, pass through conduction bonding material cross-over connection passive device 10, between described basic island 1 and pin 2, be provided with static release ring 13, between described static release ring 13 back sides and the second chip 5 fronts, by metal wire 6, be connected, described passive device 10 can be connected across between pin 3 back sides and back of the body pin 3 fronts, or be connected across between pin 3 back sides and static release ring 13 back sides, or be connected across between 2 back sides, basic island and static release ring 13 back sides.

Embodiment 3, the many Ji Dao tilings of individual pen multi-chip formal dress

Referring to Figure 32, for the present invention first loses the structural representation that rear inside back cover maintains irrespective of size chip formal dress encapsulating structure embodiment 3, embodiment 3 is with the difference of embodiment 1: described basic island 1 has a plurality of, at the back side on described basic island 1, all by conduction or non-conductive bonding material 3, be provided with the second chip 5, described the second chip 5 positive with the second chip 5 fronts between by metal wire 6, be connected.

Embodiment 4, individual pen stacked multichip formal dress

Referring to Figure 33, for the present invention first loses the structural representation that rear inside back cover maintains irrespective of size chip formal dress encapsulating structure embodiment 4, embodiment 4 is with the difference of embodiment 1: in described the second chip 5 fronts, by conduction or non-conductive bonding material 3, be provided with the 3rd chip 11, between described the 3rd chip 11 fronts and pin 2, by metal wire 6, be connected.

Embodiment 5, the positive upside-down mounting of individual pen stacked multichip

Referring to Figure 34, for the present invention first loses the structural representation that rear inside back cover maintains irrespective of size chip formal dress encapsulating structure embodiment 5, embodiment 5 is with the difference of embodiment 1: at described pin 2 back sides, be provided with Metal Ball 12, upside-down mounting has the 3rd chip 11 on described Metal Ball 12, and described Metal Ball 12 and the 3rd chip 11 are in the inside of plastic packaging material 8.

Embodiment 6, multilayer line single-chip formal dress individual pen pin

Referring to Figure 82, for the present invention first loses the structural representation that rear inside back cover maintains irrespective of size chip formal dress encapsulating structure embodiment 7, embodiment 7 is with the difference of embodiment 1: described basic island 1 or pin 2 comprise the multiple layer metal line layer, between adjacent two layers metallic circuit layer, by conductive posts, be connected, the front and back on described basic island 1 is provided with the first chip 4 and the second chip 5 by conduction or non-conductive bonding material 3 respectively, at described pin 2 back sides, is provided with conductive posts 7.

Its process is as follows:

Step 1, get metal substrate

Referring to Figure 35, get the metal substrate that a slice thickness is suitable, the purpose that this sheet material uses is just made with follow-up encapsulation and is supported the transitional material that the line layer structure is used as circuit, the material of this sheet material is mainly take metal material as main, and the metallics of the material of metal material can be the zinc-plated Cai ﹑ of Tong Cai ﹑ Tie Cai ﹑ Bu rust Gang Cai ﹑ aluminium maybe can reach conducting function or nonmetallic substance etc.

Step 2, the micro-copper layer of metallic substrate surfaces preplating

Referring to Figure 36, at the micro-copper layer of metallic substrate surfaces preplating, micro-copper layer thickness is at 2 ~ 10 microns, according to function, needing also can attenuate or thicken, be mainly to make while for follow-up circuit, making line layer and the metal substrate can fluid-tight engagement, the mode of plating can adopt chemical deposition or metallide.

Step 3, the operation of subsides photoresistance film

Referring to Figure 37, in the metal substrate front that completes the micro-copper layer of preplating and the back side stick respectively the photoresistance film that can carry out exposure imaging, to protect follow-up electroplated metal layer process operation, the photoresistance film can be that dry type photoresistance film can be also wet type photoresistance film.

Part photoresistance film is removed at step 4, the metal substrate back side

Referring to Figure 38, utilize exposure imaging equipment that step 3 is completed to the metal substrate back side of pasting the operation of photoresistance film and carry out graph exposure, develop and remove part figure photoresistance film, the regional graphics of electroplating to expose the follow-up needs in the metal substrate back side.

Step 5, plating the first metallic circuit layer

referring to Figure 39, in step 4, in the zone of metal substrate back side removal part photoresistance film, electroplate the first metallic circuit layer, the first metallic circuit layer material can be copper, aluminium, nickel, silver, gold, copper silver, the nickel gold, (common 5 ~ 20 microns of NiPdAus, can select different plating materials according to different application, the thickness of electroplating according to the different qualities conversion) material such as, certainly other metallics that can conduct electricity can use, do not limit to copper, aluminium, nickel, silver, gold, copper silver, the nickel gold, the metal materials such as NiPdAu, plating mode can be chemical deposition or metallide mode.

Step 6, the operation of subsides photoresistance film

Referring to Figure 40, the photoresistance film that can carry out exposure imaging is sticked at the metal substrate back side in step 5, and the photoresistance film can be that dry type photoresistance film can be also wet type photoresistance film.

Part photoresistance film is removed at step 7, the metal substrate back side

Referring to Figure 41, utilize exposure imaging equipment that step 6 is completed to the metal substrate back side of pasting the operation of photoresistance film and carry out graph exposure, develop and remove part figure photoresistance film, the regional graphics of electroplating to expose the follow-up needs in the metal substrate back side.

Step 8, plating the second metallic circuit layer

Referring to Figure 42, the metal substrate back side is removed in the zone of part photoresistance film and is electroplated the second metallic circuit layer as in order to connect the conductive posts of the first metallic circuit layer and the 3rd metallic circuit layer in step 7, the material of metallic circuit layer can adopt copper, nickel gold, NiPdAu, silver, gold or tin metal, and plating mode can make chemical deposition or metallide mode.

Step 9, removal photoresistance film

Referring to Figure 43, remove the photoresistance film of metallic substrate surfaces, purpose is to carry out non-conductive glued membrane operation for follow-up, the method for removing the photoresistance film can adopt chemical medicinal liquid to soften and adopt the mode of high pressure water washing to remove the photoresistance film.

Step 10, the non-conductive glued membrane operation of pressing

referring to Figure 44, the non-conductive glued membrane of (zone that line layer is arranged) pressing one deck at the metal substrate back side, purpose is to insulate for the first metallic circuit layer and the 3rd metallic circuit layer, the mode of the non-conductive glued membrane of pressing can adopt conventional roll unit, or under the environment of vacuum, carry out pressing, to prevent that the pressing process from producing the residual of air, non-conductive glued membrane is mainly thermosetting epoxy resin, and epoxy resin can not have filler or Packed non-conductive glued membrane according to the product performance employing, the color of epoxy resin can be according to the product performance processing of dyeing.

Step 11, grinding non-conductive glued membrane surface

Referring to Figure 45, after completing non-conductive glued membrane pressing, carry out surface grinding, purpose is to expose the second metallic circuit layer, remains the evenness of non-conductive glued membrane and the second metallic circuit layer and the thickness of controlling non-conductive glued membrane.

Referring to Figure 46, to the preliminary treatment of metallizing of non-conductive glued membrane surface, make its surface attachment last layer metallization macromolecular material, purpose is the catalyst conversion that can plate as subsequent metal material, and the adhesion metal macromolecular material can adopt spraying, plasma concussion, surface coarsening etc. to go to dry again and get final product;

Step 13, the operation of subsides photoresistance film

Referring to Figure 47, the metal substrate front and back sticks the photoresistance film that can carry out exposure imaging in step 12, and to protect the electroplating technology operation of the 3rd follow-up metallic circuit layer, the photoresistance film can be that dry type photoresistance film can be also wet type photoresistance film.

Part photoresistance film is removed at step 14, the metal substrate back side

Referring to Figure 48, utilize exposure imaging equipment that step 13 is completed to the metal substrate back side of pasting the operation of photoresistance film and carry out graph exposure, develop and remove part figure photoresistance film, to expose the follow-up needs in the metal substrate back side, carry out etched regional graphics.

Step 15, etching operation

Referring to Figure 49, in the zone that step 14 completes after the photoresistance film is windowed, carry out the etching operation, its objective is that the metallic region corrosion beyond the metallic circuit that will keep is clean, carrying out etching method can be copper chloride or iron chloride or the technology mode that can carry out the liquid medicine of chemical etching.

Referring to Figure 50, remove the photoresistance film at the metal substrate back side, the metallic region figure that is plated to expose follow-up needs.

Step 10 seven, plating the 3rd metallic circuit layer

Referring to Figure 51, at the metal substrate back side of step 10 six, carry out the plating work of the 3rd metallic circuit layer, the material of the 3rd metallic circuit layer can be copper, nickel gold, NiPdAu, silver, gold or tin metal, and plating mode can be that chemical deposition adds metallide or all uses the chemical deposition mode to plate out the thickness of needs.

Step 10 eight, the operation of subsides photoresistance film

Referring to Figure 52, at the metal substrate back side of step 10 seven, stick the photoresistance film that can carry out exposure imaging, purpose is the making for follow-up metallic circuit layer, the photoresistance film can be that dry type photoresistance film can be also wet type photoresistance film.

Referring to Figure 53, utilize exposure imaging equipment that step 10 eight is completed to the metal substrate back side of pasting the operation of photoresistance film and carry out graph exposure, develop and remove part figure photoresistance film, the regional graphics of electroplating to expose the follow-up needs in the metal substrate back side.

Step 2 ten, plating the 4th metallic circuit layer

Referring to Figure 54, in step 10 nine, in the zone of metal substrate back side removal part photoresistance film, electroplate the 4th metallic circuit layer as in order to connect the 3rd metallic circuit layer and five metals, belonging to the conductive posts of line layer, the material of metallic circuit layer can adopt copper, nickel gold, NiPdAu, silver, gold or tin metal, and plating mode can make chemical deposition or metallide mode.

Step 2 11, removal photoresistance film

Referring to Figure 55, remove the photoresistance film of metallic substrate surfaces, purpose is to carry out non-conductive glued membrane operation for follow-up, the method for removing the photoresistance film can adopt chemical medicinal liquid to soften and adopt the mode of high pressure water washing to remove the photoresistance film.

Step 2 12, the non-conductive glued membrane operation of pressing

referring to Figure 56, the non-conductive glued membrane of (zone that line layer is arranged) pressing one deck at the metal substrate back side, purpose is to insulate for the 3rd metallic circuit layer and five metals belong to line layer, the mode of the non-conductive glued membrane of pressing can adopt conventional roll unit, or under the environment of vacuum, carry out pressing, to prevent that the pressing process from producing the residual of air, non-conductive glued membrane is mainly thermosetting epoxy resin, and epoxy resin can not have filler or Packed non-conductive glued membrane according to the product performance employing, the color of epoxy resin can be according to the product performance processing of dyeing.

Step 2 13, grinding non-conductive glued membrane surface

Referring to Figure 57, after completing non-conductive glued membrane pressing, carry out surface grinding, purpose is to expose the 4th metallic circuit layer, remains the evenness of non-conductive glued membrane and the 4th metallic circuit layer and the thickness of controlling non-conductive glued membrane.

Referring to Figure 58, to the preliminary treatment of metallizing of non-conductive glued membrane surface, make its surface attachment last layer metallization macromolecular material, purpose is the catalyst conversion that can plate as subsequent metal material, and the adhesion metal macromolecular material can adopt spraying, plasma concussion, surface coarsening etc. to go to dry again and get final product;

Step 2 15, the operation of subsides photoresistance film

Referring to Figure 59, the metal substrate front and back sticks the photoresistance film that can carry out exposure imaging in step 2 14, to protect follow-up five metals, belongs to the electroplating technology operation of line layer, and the photoresistance film can be that dry type photoresistance film can be also wet type photoresistance film.

Referring to Figure 60, utilize exposure imaging equipment that step 2 15 is completed to the metal substrate back side of pasting the operation of photoresistance film and carry out graph exposure, develop and remove part figure photoresistance film, to expose the follow-up needs in the metal substrate back side, carry out etched regional graphics.

Step 2 17, etching operation

Referring to Figure 61, in the zone that step 2 16 completes after the photoresistance film is windowed, carry out the etching operation, its objective is that the metallic region corrosion beyond the metallic circuit that will keep is clean, carrying out etching method can be copper chloride or iron chloride or the technology mode that can carry out the liquid medicine of chemical etching.

The photoresistance film is removed at step 2 18, the metal substrate back side

Referring to Figure 62, remove the photoresistance film at the metal substrate back side, the metallic region figure that is plated to expose follow-up needs.

Step 2 19, plating five metals belong to line layer

Referring to Figure 63, the plating work that five metals belongs to line layer is carried out at the metal substrate back side in step 2 18, five metals belongs to line layer and electroplates after completing and namely on metal substrate, form corresponding Ji Dao and pin, the material that five metals belongs to line layer can be copper, nickel gold, NiPdAu, silver, gold or tin metal, and plating mode can be that chemical deposition adds metallide or all uses the chemical deposition mode to plate out the thickness of needs.

Step 3 ten, the operation of subsides photoresistance film

Referring to Figure 64, the photoresistance film that can carry out exposure imaging is sticked in the metal substrate front in step 2 19, and the photoresistance film can be that dry type photoresistance film can be also wet type photoresistance film.

Referring to Figure 65, utilize exposure imaging equipment that step 3 ten is completed to the metal substrate front of pasting the operation of photoresistance film and carry out graph exposure, develop and remove part figure photoresistance film, to expose the positive follow-up needs of metal substrate, carry out etched regional graphics.

Step 3 12, chemical etching

Referring to Figure 66, chemical etching is carried out in the zone that metal substrate front in step 3 11 is completed to exposure imaging, and chemical etching is until the metallic circuit layer, and etching solution can adopt copper chloride or iron chloride or the liquid medicine that can carry out chemical etching.

Step 3 13, the operation of subsides photoresistance film

Referring to Figure 67, the photoresistance film that can carry out exposure imaging is sticked in the metal substrate front that completes chemical etching in step 3 12, and the photoresistance film can be that dry type photoresistance film can be also wet type photoresistance film.

Referring to Figure 68, utilize exposure imaging equipment that step 3 13 is completed to the metal substrate front of pasting the operation of photoresistance film and carry out graph exposure, develop and remove part figure photoresistance film, the regional graphics of electroplating to expose the positive follow-up needs of metal substrate.

Step 3 15, plated metal pillar

Referring to Figure 69, in step 3 14, in the zone of the positive removal of metal substrate part photoresistance film, electroplate the metal pillar, the material of metal pillar can be copper, aluminium, nickel, silver, gold, the materials such as copper is silver-colored, nickel is golden, NiPdAu, certainly other metallics that can conduct electricity can use, do not limit to copper, aluminium, nickel, silver, gold, the metal materials such as copper is silver-colored, nickel is golden, NiPdAu, plating mode can make chemical deposition or metallide mode.

Step 3 16, removal photoresistance film

Referring to Figure 70, remove the photoresistance film of metallic substrate surfaces, can adopt chemical medicinal liquid to soften and adopt the mode that high pressure water jets is removed to remove the photoresistance film.

Step 3 17, coating bonding material

Referring to Figure 71, at basic island front surface coated conduction or the nonconducting bonding material that step 2 19 forms, purpose be for after follow-up implanted chip with the engaging of Ji Dao.

Step 3 18, load

Referring to Figure 72, positive first chip of implanting on the basic island of step 3 17.

Step 3 19, metal wire bonding

Referring to Figure 73, between the first chip front side and pin front, carry out the operation of bonding metal wire, the material of described metal wire adopts gold, silver, copper, aluminium or the material of alloy, shape wiry can be thread can be also banded.

Step 4 ten, seal

Referring to Figure 74, the positive plastic packaging material that adopts of metal substrate in step 3 19 is carried out to plastic packaging, the plastic packaging mode can adopt mould encapsulating mode, spraying equipment spraying method, with pad pasting mode or the mode of brush coating, described plastic packaging material can adopt packing material or without the epoxy resin of packing material.

Step 4 11, epoxy resin surface grind

Referring to Figure 75, after the epoxy resin plastic packaging of completing steps 40, carry out the epoxy resin surface grinding, purpose is to make the metal pillar expose the thickness of plastic-sealed body surface and control ring epoxy resins.

Step 4 12, plating anti-oxidant metal layer or coating antioxidant (OSP)

Referring to Figure 76, the exposed metal of the metallic substrate surfaces after completing steps 41 is electroplated anti-oxidant metal layer, prevents burning, as gold, golden, the NiPdAu of nickel, tin or coating antioxidant (OSP).

Step 4 13, coating bonding material

Referring to Figure 77, at basic island backside coating conduction or the non-conductive bonding material that step 15 forms, purpose be for after follow-up implanted chip with the engaging of Ji Dao.

Step 4 14, load

Referring to Figure 78, on the conduction of step 4 13 or non-conductive bonding material, implant the second chip.

Step 4 15, metal wire bonding

Referring to Figure 79, between the second chip front side and the pin back side, carry out the operation of bonding metal wire, the material of described metal wire adopts gold, silver, copper, aluminium or the material of alloy, shape wiry can be thread can be also banded.

Step 4 16, seal

Referring to Figure 80, adopt plastic packaging material to carry out plastic packaging at the metal substrate back side in step 4 15, the plastic packaging mode can adopt mould encapsulating mode, spraying equipment spraying method or use the pad pasting mode, and described plastic packaging material can adopt packing material or without the epoxy resin of packing material.

Step 4 17, cutting finished product

Referring to Figure 81, step 4 16 is completed to the semi-finished product of sealing and carry out cutting operation, make originally in array aggregate mode, to integrate and to contain more than cuttings of plastic-sealed body module of chip independent, after making first erosion, inside back cover maintains irrespective of size chip formal dress encapsulating structure, can adopt conventional diamond blade and conventional cutting equipment to get final product.

Claims

1. the rear inside back cover of first erosion maintains the process that irrespective of size chip formal dress encapsulates, and described method comprises the steps:

Step 1, get metal substrate

Step 2, the micro-copper layer of metallic substrate surfaces preplating

Step 3, the operation of subsides photoresistance film

Part photoresistance film is removed at step 4, the metal substrate back side

Step 5, plated metal line layer

Step 6, the operation of subsides photoresistance film

Part photoresistance film is removed at step 7, the metal substrate back side

Step 8, plating high-conductive metal line layer

Step 9, removal photoresistance film

Remove the photoresistance film of metallic substrate surfaces;

Step 10, epoxy resin plastic packaging

Step 11, epoxy resin surface grind

Step 12, the operation of subsides photoresistance film

Step 13, the positive part photoresistance film of removing of metal substrate

Step 14, chemical etching

Step 15, the operation of subsides photoresistance film

Step 10 seven, plated metal pillar

Step 10 eight, removal photoresistance film

Remove the photoresistance film of metallic substrate surfaces;

Step 10 nine, coating bonding material

At the basic island of step 10 eight front surface coated conduction or non-conductive bonding material;

Step 2 ten, load

On the conduction of step 10 nine or non-conductive material, implant the first chip;

Step 2 11, metal wire bonding

Step 2 12, seal

Step 2 13, epoxy resin surface grind

Step 2 14, plating anti-oxidant metal layer or coating antioxidant

The exposed metal of metallic substrate surfaces after completing steps 23 is electroplated anti-oxidant metal layer or coating antioxidant;

Step 2 15, coating bonding material

At the basic island of step 2 14 backside coating conduction or non-conductive bonding material;

Step 2 16, load

On the conduction of step 2 15 or non-conductive bonding material, implant the second chip;

Step 2 17, metal wire bonding

Between the second chip front side and the pin back side, carry out the operation of bonding metal wire;

Step 2 18, seal

Adopt plastic packaging material to carry out plastic packaging at the metal substrate back side in step 2 17;

Step 2 19, cutting finished product

2. after a first erosion of being made by claim 1, inside back cover maintains irrespective of size chip formal dress encapsulating structure, it is characterized in that it comprises Ji Dao (1) and pin (2), the front and back of described Ji Dao (1) by or conduction or non-conductive material (3) be respectively arranged with the first chip (4) and the second chip (5), described the first chip (4) and the second chip (5) front are connected with metal wire (6) respectively with between pin (2) front and back, in described pin (2) front, be provided with conductive posts (7), the zone that described Ji Dao (1) is peripheral, zone between Ji Dao (1) and pin (2), zone between pin (2) and pin (2), the zone on Ji Dao (1) and pin (2) top, zone and first chip (4) of Ji Dao (1) and pin (2) bottom, the second chip (5), the outer plastic packaging material (8) that all is encapsulated with of metal wire (6) and conductive posts (7), described plastic packaging material (8) flushes with the top of conductive posts (7), the surface of exposing plastic packaging material (8) in described conductive posts (7) is coated with anti oxidation layer or coating antioxidant (9).

3. sealing chip formal dress three-dimensional system level packaging structure after a kind of first erosion that provides according to claim 2, is characterized in that between described pin (2) back side and pin (2) back side by conduction bonding material cross-over connection passive device (10).

According to claim 2 or 3 provide a kind of first the erosion after sealing chip formal dress three-dimensional system level packaging structures, it is characterized in that at described Ji Dao (1) back side being provided with a plurality of the second chips (5) by conduction or non-conductive bonding material (3), described the second chip (5) positive with the second chip (5) front between by metal wire (6), be connected.

According to claim 2 or 3 provide a kind of first the erosion after sealing chip formal dress three-dimensional system level packaging structures, it is characterized in that by conduction or non-conductive bonding material (3), being provided with the 3rd chip (11) described the second chip (5) is positive, between described the 3rd chip (11) front and pin (2), by metal wire (6), be connected.

6. sealing chip formal dress three-dimensional system level packaging structure after a kind of first erosion that provides according to claim 4, it is characterized in that by conduction or non-conductive bonding material (3), being provided with the 3rd chip (11) described the second chip (5) is positive, between described the 3rd chip (11) front and pin (2) back side, by metal wire (6), be connected.

According to claim 2 or 3 provide a kind of first the erosion after sealing chip formal dress three-dimensional system level packaging structures, it is characterized in that by Metal Ball (12) upside-down mounting, the 3rd chip (11) being arranged at described pin (2) back side, described Metal Ball (12) and the 3rd chip (11) are in the inside of plastic packaging material (8).

8. sealing chip formal dress three-dimensional system level packaging structure after a kind of first erosion that provides according to claim 4, it is characterized in that by Metal Ball (12) upside-down mounting, the 3rd chip (11) being arranged at described pin (2) back side, described Metal Ball (12) and the 3rd chip (11) are in the inside of plastic packaging material (8).

According to claim 2 or 3 provide a kind of first the erosion after sealing chip formal dress three-dimensional system level packaging structures, it is characterized in that by Metal Ball (12) upside-down mounting, passive device (10) being arranged at described pin (2) back side, described Metal Ball (12) and passive device (10) are in the inside of plastic packaging material (8).

10. sealing chip formal dress three-dimensional system level packaging structure after a kind of first erosion that provides according to claim 4, it is characterized in that by Metal Ball (12) upside-down mounting, passive device (10) being arranged at described pin (2) back side, described Metal Ball (12) and passive device (10) are in the inside of plastic packaging material (8).

11. the process of sealing chip formal dress three-dimensional systematic encapsulation after a kind of first erosion according to claim 1, it is characterized in that described step 15 moves between step 4 and step 5 carries out.

12. the process of the rear sealing chip formal dress three-dimensional systematic encapsulation of first erosion, is characterized in that described method comprises the steps:

Step 1, get metal substrate

Step 2, the micro-copper layer of metallic substrate surfaces preplating

Step 3, the operation of subsides photoresistance film

Part photoresistance film is removed at step 4, the metal substrate back side

Step 5, plating the first metallic circuit layer

Step 6, the operation of subsides photoresistance film

Part photoresistance film is removed at step 7, the metal substrate back side

Step 8, plating the second metallic circuit layer

Step 9, removal photoresistance film

Remove the photoresistance film of metallic substrate surfaces;

Step 10, the non-conductive glued membrane operation of pressing

Step 11, grinding non-conductive glued membrane surface

Step 13, the operation of subsides photoresistance film

The photoresistance film that can carry out exposure imaging is sticked at the metal substrate back side and the back side in step 12;

Part photoresistance film is removed at step 14, the metal substrate back side

Step 15, etching operation

Step 10 seven, plating the 3rd metallic circuit layer

Step 10 eight, the operation of subsides photoresistance film

Step 2 ten, plating the 4th metallic circuit layer

Step 2 11, removal photoresistance film

Remove the photoresistance film of metallic substrate surfaces;

Step 2 12, the non-conductive glued membrane operation of pressing

Step 2 13, grinding non-conductive glued membrane surface

Step 2 15, the operation of subsides photoresistance film

Utilize exposure imaging equipment that step 2 15 is completed to the metal substrate back side of pasting the operation of photoresistance film and carry out graph exposure, develop and remove part figure photoresistance film, to expose the follow-up needs in the metal substrate back side, carry out etched regional graphics;

Step 2 17, etching operation

The photoresistance film is removed at step 2 18, the metal substrate back side

Remove the photoresistance film at the metal substrate back side;

Step 2 19, plating five metals belong to line layer

Step 3 ten, the operation of subsides photoresistance film

The photoresistance film that can carry out exposure imaging is sticked at the metal substrate back side in step 2 19;

Step 3 12, chemical etching

Step 3 13, the operation of subsides photoresistance film

Utilize exposure imaging equipment that step 3 13 is completed to the metal substrate back side of pasting the operation of photoresistance film and carry out graph exposure, develop and remove part figure photoresistance film, the regional graphics of electroplating to expose the positive follow-up needs of metal substrate;

Step 3 15, plated metal pillar

Step 3 16, removal photoresistance film

Remove the photoresistance film of metallic substrate surfaces;

Step 3 17, coating bonding material

Basic island front surface coated conduction or nonconducting bonding material after completing steps 36;

Step 3 18, load

On the conduction of step 3 17 or non-conductive material, implant the first chip;

Step 3 19, metal wire bonding

Step 4 ten, seal

The positive plastic packaging material that adopts of metal substrate in step 3 19 is carried out to plastic packaging;

Step 4 11, epoxy resin surface grind

Step 4 12, plating anti-oxidant metal layer or coating antioxidant

The exposed metal of metallic substrate surfaces after completing steps 41 is electroplated anti-oxidant metal layer or coating antioxidant;

Step 4 13, coating bonding material

At the basic island of completing steps 42 backside coating conduction or non-conductive bonding material;

Step 4 14, load

On the conduction of step 4 13 or non-conductive bonding material, implant the second chip;

Step 4 15, metal wire bonding

Step 4 16, seal

Adopt plastic packaging material to carry out plastic packaging at the metal substrate back side in step 4 15;

Step 4 17, cutting finished product

Step 4 16 is completed to the semi-finished product of sealing and carry out cutting operation, make the rear sealing chip formal dress three-dimensional system level packaging structure of first erosion.

13. the process of sealing chip formal dress three-dimensional systematic encapsulation after a kind of first erosion according to claim 12, but it is characterized in that described step 6, to step 10 seven repetitive operations, forms more multi-layered metallic circuit layer.