CN104125164A - Active output buffer controller and related method - Google Patents
Active output buffer controller and related method Download PDFInfo
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- CN104125164A CN104125164A CN201410175622.8A CN201410175622A CN104125164A CN 104125164 A CN104125164 A CN 104125164A CN 201410175622 A CN201410175622 A CN 201410175622A CN 104125164 A CN104125164 A CN 104125164A
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Abstract
The invention provides an active output buffer controller and a related method. The active output buffer controller is used for controlling a packet data output of a main buffer in a network device. The active output buffer controller has a credit evaluation circuit and a control logic. The credit evaluation circuit estimates a credit value based on at least one of an ingress data reception status of the network device and an egress data transmission status of the network device. The control logic compares the credit value with a first predetermined threshold value to generate a comparison result, and controls the packet data output of the main buffer according to at least the comparison result.
Description
Technical field
The invention relates to a kind of initiatively output buffer controller and method thereof, relate to especially active output buffer controller and the method thereof of the packet data output of the main buffer in a kind of ACTIVE CONTROL network equipment.
Background technology
The network switch is computer network device, can be used for connecting different electronic installations.For instance, the network switch receives the input package that the source electronic installation that connected by it produces, and only will be sent to one or one above by receiving the specified object electronic installation of package according to receiving output package that package produces.In general, the network switch has main buffer (being packet buffer) to cushion the packet data of the package received by inbound port, and by outbound port, package stored in main buffer is forwarded.
In the time preparing the package in main buffer to be forwarded to outbound port, packet data can pass through outlet line (egress pipeline) and set out to medium access control (media access control from main buffer, MAC) (the first-in first-out of the first in first out in bed device, FIFO) buffer, then exports physical layer device to.Existing medium access control layer device needs the first-in first-out buffer of large-size to prevent the situation of data spill-over, causes the rising of chip size and cost.In addition, in order to prevent first in first out spill-over, medium access control layer device can be applied in Backpressure (back pressure mechanism) main buffer control unit and suspend from main buffer and set out the first-in first-out buffer of packet data to medium access control layer device.In the time that reaching critical value, the first-in first-out buffer of medium access control layer device starting Backpressure.But startup Backpressure can be poor for some time in the middle of starting to back-pressure program.And, suspend from main buffer output packet data at Backpressure, still have data in section port pipeline and enter the first-in first-out buffer of medium access control layer device.Therefore, even if use Backpressure that the situation of first-in first-out buffer spill-over still likely can occur.
Summary of the invention
The invention relates to a kind of initiatively output buffer controller and method thereof.
According to first embodiment of the invention, a kind of initiatively output buffer controller is provided, for controlling the packet data output of main buffer of network equipment, this active output buffer controller includes credit evaluation circuit and control logic.At least one in the outlet data delivery status of the entry data accepting state of this credit evaluation circuit based on this network equipment and this network equipment estimated credit value.This control logic is this credit value and the first predetermined critical relatively, to produce comparative result, and at least controls this packet data output of this main buffer according to this comparative result.
According to second embodiment of the invention, provide a kind of method of the packet data output of controlling main buffer.This main buffer is arranged in network equipment, and the method for the packet data output of the main buffer of this control includes: at least one of the entry data accepting state based on this network equipment and the outlet data delivery status of this network equipment estimated credit value; And relatively this credit value and the first predetermined critical, to produce comparative result; And at least control this packet data output of this main buffer according to this comparative result.
Active output buffer controller and method thereof proposed by the invention, the situation that can avoid that first in first out occurs and overflow (overflow).
Brief description of the drawings
Fig. 1 is according to the initiatively schematic diagram of the network equipment of output buffer controlling mechanism of the use of embodiment of the present invention.
Fig. 2 is the schematic diagram of the execution mode of the active output buffer controller shown in Fig. 1.
The schematic diagram that Fig. 3 is the correct operation that triggers according to the back-pressure event of embodiment of the present invention.
The schematic diagram that Fig. 4 is the correct operation that triggers according to the deviation event of embodiment of the present invention.
The schematic diagram that Fig. 5 is time is up according to the embodiment of the present invention correct operation that event triggers.
Fig. 6 is according to the flow chart of the method for the packet data output of the main buffer in the control network equipment of embodiment of the present invention.
Embodiment
In the middle of specification and aforesaid claim, use some vocabulary to censure specific element.In affiliated field, those of ordinary skill should be understood, and hardware manufacturer may be called same element with different nouns.This specification and aforesaid claim are not used as distinguishing the mode of element with the difference of title, but the difference in function is used as the criterion of distinguishing with element.In the whole text, in the middle of specification and aforesaid claim, be an open term mentioned " comprising ", therefore should be construed to " comprise but be not limited to ".In addition, " coupling " word comprises directly any and is indirectly electrically connected means at this.Therefore, be coupled to the second device if describe first device in literary composition, represent that this first device can directly be electrically connected in this second device, or be indirectly electrically connected to this second device by other device or connection means.
Technical characterictic of the present invention is by prediction medium access control (media access control, MAC) first in first out of bed device (first-in first-out, FIFO) the data storing state of buffer, controls the packet data output of the main buffer (for example packet buffer in the network switch/hub) in network equipment on one's own initiative.So, just can pass through proposed active output buffer controlling mechanism and carry out prior forecast and avoid that first in first out occurs the situation of overflowing (overflow).Preferably, the active output buffer controlling mechanism proposing can be with existing Backpressure (back pressure mechanism) in conjunction with overflowing prevention method for medium access control layer device provides better first in first out.In addition, can adopt correction mechanism to make evaluated credit value (being the prediction data storing state of the first-in first-out buffer of medium access control layer device) synchronized with each other with the real data storing state of the first-in first-out buffer of medium access control layer device.Have about proposed active output buffer controlling mechanism further details will details are as follows.
Fig. 1 is according to the initiatively schematic diagram of the network equipment of output buffer controlling mechanism of the use of embodiment of the present invention.In this embodiment, network equipment 100 is switches/hubs, includes main buffer (for example packet buffer) 102, main buffer control unit 104, outlet line (egress pipeline) 106, the medium access control layer device 108 with first-in first-out buffer 107, physical layer device 110 and active output buffer controller 112.Outlet line 106, medium access control layer device 108 and physical layer device 110 are for only forwarding package by outbound port.Main buffer 102 can receive entrance package by suction line (not shown), and is stored in the package cell (cell) 103 of each the entrance package in obtainable multiple available storage areas in main buffer 102.Under mode standard, package cell is used as to the elementary cell that main buffer 102 is exported in each clock cycle.That is to say, if the output of the packet data of main buffer 102 is in the time forwarding package through outbound port, time-out action is to avoid meeting with the situation of first in first out spill-over, and main buffer control unit 104 can be controlled main buffer 102 and export package cell to outlet line 106 in each clock cycle.Outlet line 106 is coupled between main buffer 102 and first-in first-out buffer 107.Therefore, even if main buffer 102 stops, it forwards packet data output action of package through outbound port, outlet line 106 still likely residual package cell therein, and these package cells will be exported to first-in first-out buffer 107 in order.Physical layer device 110 is coupled between outbound port and medium access control layer device 108, for exporting the package cell of first-in first-out buffer 107 to outbound port.
In this embodiment, initiatively output buffer controller 112 is independent engines that outside is coupled to main buffer control unit 104, therefore provides the extremely main buffer control unit 104 of external control signal S_C to export by the packet data of indicating main buffer control unit 104 to control on one's own initiative main buffer 102.But above only way for instructions, not for limiting the present invention.Change in design at other, active output buffer controller 112 can be integrated into main buffer control unit 104 to form the embedded functional of main buffer control unit 104, and the packet data output that therefore provides control signal to control on one's own initiative main buffer 102.Change in design at another, can and be different from the initiatively circuit unit (for example outlet line 106 or medium access control layer device 108) of output buffer controller 112 by active output buffer controller 112 combines, and therefore provide external control signal S_C to main buffer control unit 104, to export by the packet data of indicating main buffer control unit 104 to control on one's own initiative main buffer 102.In brief, as long as in order to reach identical object, that controls on one's own initiative main buffer has about the packet data output action that carries out package forwarding by outbound port, the active output buffer controlling mechanism proposing can be implemented in network equipment 100 Anywhere, and all belongs to interest field of the present invention.
As shown in Figure 1, initiatively output buffer controller 112 includes but is not limited to credit evaluation circuit 122, control logic 124 and correcting circuit 126.Credit evaluation circuit 122 is the core circuit of output buffer controller 112 initiatively, and for predicting the data storing state of first-in first-out buffer 107 of medium access control layer device 108.For instance, initiatively output buffer controller 112 (for example, credit evaluation circuit 122) can the entry data accepting state S1 of device 100 Network Based and the outlet data delivery status S2 of network equipment 100 at least one estimate credit value SUM.According to another embodiment of the present invention, initiatively output buffer controller 112 (for example, credit evaluation circuit 122) can be based on implementation specification S3, and at least one in the outlet data delivery status S2 of the entry data accepting state S1 of network equipment 100 and network equipment 100 estimated credit value SUM.
For instance, but the present invention not as limit.Implementation specification S3 includes at least one in the cycle of package cell sizes, the frequency of operation of medium access control layer device 108 and the TCM of outbound port (time-division multiplexing, TDM).More particularly, package cell sizes is illustrated in the number of the character/position each package cell of exporting from main buffer 102 in the clock cycle.The TCM cycle of outbound port has determined two clock periodicities between continuous TCM time slot, wherein in each TCM time slot, has carried out the packet data transmission from main buffer 102 to outlet line 106.The frequency of operation of medium access control layer device 108 has determined the export volume (egress) in the TCM cycle.Except the above-mentioned parameter of mentioning, implementation specification S3 also can comprise other parameters.
For instance, but not as limit.Entry data accepting state S1 can include entry data and import at least one in rate, entrance package forwarding method and the suction line degree of depth into.More particularly, entry data is imported rate into and is represented that in each clock cycle, network equipment 100 can be received how many entrance packages character/position.Entrance package forwarding method has defined how to go to control package forwarding.For instance, can adopt rotatable (store-and-forward, the SF) mode of depositing or through type (cut-through, CT) mode forwards entrance package depending on the consideration of in fact application.The suction line degree of depth can be specified the maximum quantity of the entrance package cell that suction line can hold.Except the above-mentioned parameter of mentioning, entry data accepting state S1 also can comprise other parameters.
For instance, but not as limit.Outlet data delivery status S2 can include at least one in transfer rate and the outlet package dimension modifying information of first in first out size, physical layer device 110 of the outlet line degree of depth, medium access control layer device 108.More particularly, the outlet line degree of depth can be specified the maximum quantity of the outlet package cell that outlet line 106 can hold.The outlet package cell maximum quantity that the first in first out size of medium access control layer device 108 specifies first-in first-out buffer 107 can bear.The transfer rate of physical layer device 110 represents that how many outlet of each clock cycle package character/position is sent by physical layer device 110.Export package dimension modifying information definition in the time that outlet packet data is delivered to physical layer device 110 from main buffer 102, be added to the size of the extraneous information of outlet packet data; And/or in the time that outlet packet data is delivered to physical layer device 110 from main buffer 102, the size of the supplementary removing from outlet packet data.Except the above-mentioned parameter of mentioning, outlet data delivery status S2 also can comprise other parameters.
Estimated go out credit value SUM presentation medium access control bed device 108 in the data storing state of prediction of first-in first-out buffer 107.In exemplary design, credit value SUM can be the package number of the prediction in first-in first-out buffer 107.In another exemplary design, credit value SUM can be the number of character, half character or 1/4 character of the prediction in first-in first-out buffer 107.In addition, the different operating carrying out for medium access control layer device 108, the weight that credit value SUM can be corresponding different.For instance, medium access control layer device 108 is meeting copy package (packer)/package cell under multicast operation, therefore,, under the operation of current media access control bed device 108, adjust credit value SUM to reflect the behaviour in service of actual first-in first-out buffer.
Control logic 124 is for comparing credit value SUM and predetermined critical TH1, and to produce comparative result CR, and setup control signal S_C carrys out at least to control according to comparative result CR the packet data output of main buffer 102.For instance, in the time that comparative result CR instruction credit value SUM reaches predetermined critical TH1, control logic 124 can judge that the free space in first-in first-out buffer 107 cannot meet minimum safe amplitude, and the situation of first in first out spill-over may occur.Therefore, control logic 124 can make control signal S_C come into force (assert) (for example control signal S_C=1), controls main buffer control unit 104 and suspend the packet data output of main buffer 102.After the packet data output of main buffer 102 is suspended, first-in first-out buffer 107 can come the space that slow release goes out to take by stored packet data being exported to secondary circuit (being physical layer device 110), and correspondingly upgrades credit value SUM.In the time that credit value SUM is down to reduced levels (level), control logic 124 can judge that first-in first-out buffer 107 broken away from the threat of unwanted internal memory spill-over.Then, control logic 124 invalid (deassert) control signal S_C (for example control signal S_C=0) controls main buffer control unit 104 and restarts the packet data output of main buffer 102, to allow new package cell data to forward by outbound port.
Please refer to Fig. 2, Fig. 2 is the schematic diagram of the execution mode of the active output buffer controller 112 shown in Fig. 1.The credit value that the parameters such as above-mentioned entry data accepting state S1, outlet data delivery status S2 and implementation specification S3 draw at this with from last TCM time slot combines.It should be noted, based on the definition of parameter, one or more parameters can be applied from the increment (increment) of the credit value of last time-division multitask time slot gained, and/or one or more parameter can be applied from the decrement (decrement) of the credit value of last time-division multitask time slot gained.Control logic 124 can check that the credit value SUM finally obtaining carrys out setup control signal S_C.
In the time that credit value SUM does not exceed margin of safety, package cell data character count can upgrade credit value SUM, then credit value SUM is deposited to get back to port record and be used as the credit value obtaining from last TCM time slot.But, in the time that credit value SUM exceedes margin of safety (if or medium access control layer device adopt Backpressure, and when back-pressure event occurs), package cell data character count just can not upgrade credit value SUM, gets back to port record and is used as the credit value obtaining from last TCM time slot but directly credit value SUM is deposited.
In addition,, for the ending (end of a packet, EOP) of package, medium access control layer device 108 can be attached to extra character package package and next package are separated; And for beginning (the start of a packet of package, SOP), because additional character is only for providing medium access control layer device 108 supplementarys, can't be forwarded to object electronic installation by outbound port, therefore medium access control layer device 108 can remove additional character from the gauge outfit of package.Therefore, can carry out suitable adjustment according to above details for the package cell data character count of current TCM time slot.
As mentioned above, in the time that comparative result CR shows that credit value SUM reaches predetermined critical TH1, the control logic 124 control signal S_C that can come into force indicates main buffer control unit 104 to suspend the packet data output of main buffer 102, therefore makes newly to enter package and cannot enter outlet line 106 and forward by outbound port.Suspend the packet data output of main buffer 102 compared to the border of the package forwarding in wish, control logic 124 can be controlled the packet data of main buffer 102 and export the border of suspending the package cell in the package forwarding in wish.That is to say, compared to forbid that package part exports outlet line 106 in the time that packet data output is suspended, exporting when packet data while being suspended, allow main buffer 102 to export in package one or multiple package cell to outlet line 106.So, outlet line and first-in first-out buffer just can more effectively be used to provide and preferably be exported throughput.In the case of outlet line and the higher fineness of first-in first-out buffer support, in the time that comparative result CR shows that credit value SUM reaches predetermined critical TH1, the packet data output that control logic 124 can be controlled main buffer 102 suspends on the border of a part of the package cell in the package forwarding in wish.In addition, in the time that comparative result CR shows that credit value SUM does not reach the first predetermined critical TH1, whether control logic 124 further makes back-pressure signal S_BP come into force to produce check result by inspection medium access control layer device 108, and controls the packet data output of main buffer 104 according to check result.
As mentioned above, credit value SUM obtains by the data storing state of the first-in first-out buffer 107 in prediction medium access control layer device 108, therefore, the credit value SUM of the data storing state of the prediction of the first-in first-out buffer 107 in indication predicting medium access control layer device 108 likely can depart from the real data storing state of the first-in first-out buffer 107 in medium access control layer device 108.Worst in the situation that, in the time that first-in first-out buffer 107 almost will be filled data, credit value SUM is likely also far below predetermined critical TH1.For fear of such situation, adopt Backpressure to carry out the real data storing state of the first-in first-out buffer 107 in monitoring media access control bed device 108 by medium access control layer device 108, and reach predetermined critical TH in the data actual number of working as storage in first-in first-out buffer 107
bPtime, the back-pressure that comes into force signal S_BP.Therefore in the time that control logic 124 thinks that credit value SUM does not reach predetermined critical TH1, control logic 124 also can further confirm whether medium access control layer device 108 makes back-pressure signal S_BP come into force (assert).Do not reach predetermined critical TH1 when credit value SUM shows, but back-pressure signal S_BP is while coming into force (assert), control signal S_C still can control main buffer control unit 104 and suspend the packet data output of main buffer 102.
Preferably, the present invention separately proposes the problem being caused when correction mechanism avoids/alleviate credit value SUM to be misestimated.Specifically, in the time that particular event TRG is triggered, the actual number of the data of the first-in first-out buffer 107 of correcting circuit 126 meetings based in medium access control layer device 108 is proofreaied and correct credit value SUM.For instance, correcting circuit 126 can be proofreaied and correct credit value SUM by the actual data volume of synchronous credit value SUM and first-in first-out buffer 107.Namely utilize the actual amount of data in first-in first-out buffer 107 to readjust credit value SUM.Some embodiment of correction mechanism of the present invention will be provided below.
In the first exemplary correction design, correcting circuit 126 is proofreaied and correct the back-pressure signal S_BP that credit value SUM is come into force with response medium access control layer device 108.In other words, particular event TRG is that medium access control layer device 108 starts the back-pressure event that Backpressure is triggered when avoiding first-in first-out buffer spill-over.Please refer to Fig. 3, the schematic diagram that Fig. 3 is the correct operation that triggers according to the back-pressure event of embodiment of the present invention.Indicatrix CV1 is for the actual amount of data of the first-in first-out buffer 107 of presentation medium access control bed device 108, and the credit value SUM of indicatrix CV2 for representing that initiatively output buffer controller 112 is estimated and recorded.Because proposed active buffer device controlling mechanism has more rigorous attitude (being that proposed active buffer device controlling mechanism tends to underestimate credit value) for first in first out spill-over assessment, therefore can cause estimated go out credit value SUM and medium access control layer device 108 in the actual amount of data of first-in first-out buffer 107 between do not mate.In this embodiment, credit value SUM accumulates with speed more slowly, and the actual amount of data of first-in first-out buffer 107 is accumulated with speed faster.Back-pressure event may just be triggered before credit value SUM reaches predetermined critical TH1 thus.As shown in Figure 3, in the time of time T 1, the data volume of first-in first-out buffer 107 arrives predetermined critical TH
bP.Therefore, the medium access control layer device 108 back-pressure signal S_BP that can come into force, can be triggered by particular event (being back-pressure event) TRG correcting circuit 126.
In the time of back-pressure program effect, can suspend the packet data output of main buffer 102 to outbound port.But first-in first-out buffer 107 still can normally be worked and export packet data to physical layer device 110, so the data volume of first-in first-out buffer 107 can slowly reduce.When the data volume of first-in first-out buffer 107 is reduced to particular value BP in time T 2
oFFtime, medium access control layer device 108 meeting invalid (deassert) back-pressure signal S_BP are to close Backpressure, and then the output that allows main buffer 102 to recover its packet datas.
After being triggered by particular event TRG, correcting circuit 126 can determine that credit value SUM is synchronized with the data volume in first-in first-out buffer 107 time T 2 (, the packet data of main buffer 102 is exported the time point being resumed).In this embodiment, can to set immediately credit value SUM in time T 1 be particular value BP for correcting circuit 126
oFF, then keep credit value SUM until Backpressure is disengaged in time T 2.Therefore,, in the time of time T 2, utilize the actual amount of data in first-in first-out buffer 107 to readjust credit value SUM.It should be noted that the embodiment in Fig. 3 is not intended to limit the present invention.For instance, correcting circuit 126 can be set as particular value BP to the credit value SUM that names a person for a particular job of any time between time T2 in time T 1
oFF, then keep credit value SUM until Backpressure is disengaged in time T 2.Also can reach the object that credit value SUM is synchronized with to the actual amount of data in first-in first-out buffer 107.
In the second exemplary correction design, the difference between the actual amount of data of the first-in first-out buffer 107 in the further monitoring credit value SUM of correcting circuit 126 and medium access control layer device 108.For instance, correcting circuit 126 can adopt software module (being monitoring software) or hardware module (for example monitoring arrangement) checks whether difference reaches predetermined critical TH2.In the time that difference reaches predetermined critical TH2, expression should adjust credit value SUM so that its step keeps consistent with the actual amount of data in first-in first-out buffer 107, at this moment can trigger particular event TRG and enable correcting circuit 126.
Please refer to Fig. 4, the schematic diagram that Fig. 4 is the correct operation that triggers according to the deviation event of embodiment of the present invention.Indicatrix CV1 represents the data volume of the first-in first-out buffer 107 in medium access control layer device 108, and the credit value SUM of indicatrix CV2 for representing that initiatively output buffer controller 112 is estimated and recorded.As previously mentioned, because proposed active buffer device controlling mechanism has more rigorous attitude for first in first out spill-over assessment, therefore estimated go out credit value SUM and medium access control layer device 108 in the actual amount of data of first-in first-out buffer 107 between exist and do not mate.In this embodiment, credit value SUM accumulates with speed more slowly, and the actual amount of data of first-in first-out buffer 107 is accumulated with speed faster.Difference between actual amount of data in credit value SUM and first-in first-out buffer 107 can increase gradually.In the time of time T 1, the difference D1 between credit value SUM and the actual amount of data of first-in first-out buffer 107 not yet arrives predetermined critical TH2, therefore needn't proofread and correct credit value SUM so that it is synchronized with the actual amount of data of first-in first-out buffer 107.But, in the time of time T 2, the difference D2 that the monitoring program/monitoring arrangement of correcting circuit 126 can detect between credit value SUM and the actual amount of data of first-in first-out buffer 107 has reached predetermined critical TH2, therefore particular event (i.e. a deviation event) can trigger particular event TRG correcting circuit 126 and proofread and correct credit value SUM, therefore just can utilize the actual amount of data of first-in first-out buffer 107 to readjust credit value SUM.
In the 3rd exemplary correction design, in the time meeting scheduled timing condition, correcting circuit 126 can be proofreaied and correct credit value SUM.For instance, but the present invention not as limit.Correcting circuit 126 can periodically be proofreaied and correct credit value SUM.For example, correcting circuit 126 can adopt software module (being monitoring software) or hardware module (for example monitoring arrangement) to carry out the predetermined period of gate time T, and in the time that the time meets the predetermined period of time T the triggered time arrived event.In other words, in the time that the time meets the predetermined period of time T, expression should be adjusted credit value SUM immediately, and particular event TRG can be triggered to enable correcting circuit 126.Please refer to Fig. 5, the schematic diagram that Fig. 5 is time is up according to the embodiment of the present invention correct operation that event triggers.Indicatrix CV1 represents the data volume of the first-in first-out buffer 107 in medium access control layer device 108, and the credit value SUM of indicatrix CV2 for representing that initiatively output buffer controller 112 is estimated and recorded.As previously mentioned, because proposed active buffer device controlling mechanism has more rigorous attitude for first in first out spill-over assessment, therefore estimated go out credit value SUM and medium access control layer device 108 in the actual amount of data of first-in first-out buffer 107 between exist and do not mate.In this embodiment, credit value SUM accumulates with speed more slowly, and the actual amount of data of first-in first-out buffer 107 is accumulated with speed faster.Time T 1, time T 2 and time T 3 meet respectively the predetermined period of time T, and therefore, correcting circuit 126 can periodically trigger particular event TRG (event that time is up) and proofread and correct credit value SUM.Therefore just can utilize respectively the actual amount of data of first-in first-out buffer 107 to readjust credit value SUM in time T 1, time T 2 and time T 3.
In the example shown in above Fig. 4 and Fig. 5, credit value SUM accumulates with speed more slowly, and the actual amount of data of first-in first-out buffer 107 is accumulated with speed faster.But this way for instructions only, the present invention is not as limit.In fact the gap between credit value SUM and the actual amount of data of first-in first-out buffer 107 cannot be learnt in advance.That is to say, estimated credit value SUM may be less than the actual amount of data of first-in first-out buffer 107 sometime, may be greater than at another time point again the actual amount of data of first-in first-out buffer 107.Therefore, correcting circuit 126 to estimated go out the adjustment of credit value SUM can increase or reduce, completely depending on estimated go out credit value SUM and the actual amount of data of first-in first-out buffer 107 relation each other decide.
Fig. 6 is according to the flow chart of the method for the packet data output of the main buffer in the control network equipment of embodiment of the present invention.If can reach haply identical result, do not need necessarily to carry out in accordance with the sequence of steps in the flow process shown in Fig. 6, and the step shown in Fig. 6 not necessarily will be carried out continuously, be that other steps also can be inserted wherein, in addition, some step in Fig. 6 also can be omitted according to different embodiment or design requirement.This exemplary method can be applied in the active output buffer controller 112 shown in Fig. 1, and method brief overview is as follows:
Step 600: start;
Step 602: at least one in the entry data accepting state of device Network Based and the outlet data delivery status of network equipment estimated credit value.In some design of the present invention, the estimated value of credit value can be with reference to implementation specification.
Step 604: check whether credit value reaches predetermined critical.If so, enter step 610; Otherwise enter step 606.
Step 606: check whether back-pressure signal comes into force.If so, enter step 610; Otherwise enter step 608.
Step 608: allow main buffer to produce packet data and export outlet line to.Enter step 612.
Step 610: control main buffer time-out packet data and export outlet line to.
Step 612: check the particular event whether creditable value is proofreaied and correct.If so, enter step 614; Otherwise enter step 616.
Step 614: the actual amount of data of the first-in first-out buffer based on medium access control layer device is proofreaied and correct credit value.For instance, proofread and correct credit value by the actual amount of data that makes credit value be synchronized with the first-in first-out buffer of medium access control layer device.
Step 616: finish.
Because those skilled in the art are reading the details that should understand easily each step after foregoing, therefore for the sake of clarity in this omission further instruction.
It should be noted, the only way for instructions of correlation technique in active output buffer controller 112 and Fig. 6 in Fig. 1, not for limiting the present invention.That is to say, do not deviating under the prerequisite of spirit of the present invention, can revise the correlation technique in active output buffer controller 112 and the Fig. 6 in Fig. 1.For instance, can omit the Backpressure in medium access control layer device 108.So, initiatively output buffer controller 112 will make into not need to carry out setup control signal S_C with reference to back-pressure signal S_BP based on credit value SUM.Again for example, can omit the correcting circuit 126 in active output buffer controller 112.Therefore, initiatively output buffer controller 112 will make into based on credit value SUM and not carry out setup control signal S_C containing correct operation.This type of changes design and all belongs to interest field of the present invention.
By using the active output buffer controller proposing, can, by suitably controlling the packet data transmission between medium access control layer device and main buffer, obtain higher first in first out utilization rate.In addition, because proposed active output buffer controller can be avoided the situation of medium access control layer device generation first in first out spill-over on one's own initiative, also can omit Backpressure to reduce the complexity of route (routing), and/or the size that reduces the first in first out in medium access control layer device is to save cost.
Although the present invention discloses as above with preferred embodiments, but must understand it not in order to limit the present invention.On the contrary, any those skilled in the art, without departing from the spirit and scope of the present invention, when doing a little change and retouching, therefore protection scope of the present invention should be as the criterion with the protection range that claims were defined.
Claims (26)
1. an active output buffer controller, is characterized in that, this active output buffer controller is used for the packet data output of the main buffer of controlling network equipment, and this active output buffer controller includes:
Credit evaluation circuit, at least one in the entry data accepting state based on this network equipment and the outlet data delivery status of this network equipment estimated credit value; And
Control logic, relatively this credit value and the first predetermined critical, to produce comparative result, and at least controls this packet data output of this main buffer according to this comparative result.
2. active output buffer controller according to claim 1, is characterized in that, in the time estimating this credit value, this credit evaluation circuit is with further reference to implementation specification.
3. active output buffer controller according to claim 2, is characterized in that, this implementation specification includes the frequency of operation of package cell sizes, medium access control layer device and at least one in the TCM cycle of outbound port.
4. active output buffer controller according to claim 1, is characterized in that, this entry data accepting state includes entry data and imports at least one in rate, entrance package forwarding method and the suction line degree of depth into.
5. active output buffer controller according to claim 1, it is characterized in that, this outlet data delivery status includes at least one in transfer rate and the outlet package dimension modifying information of first in first out size, physical layer device of the outlet line degree of depth, medium access control layer device.
6. active output buffer controller according to claim 1, it is characterized in that, in the time that this comparative result shows that this credit value reaches this first predetermined critical, this control logic is suspended this packet data output of this main buffer on the border of the package cell in the package forwarding in wish.
7. active output buffer controller according to claim 1, it is characterized in that, in the time that this comparative result shows that this credit value reaches this first predetermined critical, this control logic is suspended this packet data output of this main buffer on the border of a part for the package cell in the package forwarding in wish.
8. active output buffer controller according to claim 1, it is characterized in that, in the time that this comparative result shows that this credit value does not reach this first predetermined critical, whether this control logic further makes back-pressure signal come into force to produce check result by inspection medium access control layer device, and controls this packet data output of this main buffer according to this check result.
9. active output buffer controller according to claim 1, is characterized in that, further includes:
Correcting circuit, the actual amount of data of the first-in first-out buffer based on medium access control layer device is proofreaied and correct this credit value.
10. active output buffer controller according to claim 9, is characterized in that, this correcting circuit is proofreaied and correct this credit value by this actual amount of data of this first-in first-out buffer of synchronous this credit value and this medium access control layer device.
11. active output buffer controllers according to claim 9, is characterized in that, this correcting circuit is proofreaied and correct the back-pressure signal that this credit value is come into force to respond this medium access control layer device.
12. active output buffer controllers according to claim 9, is characterized in that, this correcting circuit is further monitored the difference between this actual amount of data of this first-in first-out buffer of this credit value and this medium access control layer device; And in the time that this difference reaches the second predetermined critical, this correcting circuit is proofreaied and correct this credit value.
13. active output buffer controllers according to claim 9, is characterized in that, in the time meeting scheduled timing condition, this correcting circuit is proofreaied and correct this credit value.
Control the method for the packet data output of main buffer for 14. 1 kinds, it is characterized in that, this main buffer is arranged in network equipment, and the method for the packet data output of the main buffer of this control includes:
At least one in entry data accepting state based on this network equipment and the outlet data delivery status of this network equipment estimated credit value; And
Relatively this credit value and the first predetermined critical, to produce comparative result; And
At least control this packet data output of this main buffer according to this comparative result.
The method of the packet data output of the main buffer of 15. control according to claim 14, is characterized in that, estimates that the step of this credit value further includes:
In the time estimating this credit value, with reference to implementation specification.
The method of the packet data output of the main buffer of 16. control according to claim 15, it is characterized in that, this implementation specification includes the frequency of operation of package cell sizes, medium access control layer device and at least one in the TCM cycle of outbound port.
The method of the packet data output of the main buffer of 17. control according to claim 14, is characterized in that, this entry data accepting state includes entry data and imports at least one in rate, entrance package forwarding method and the suction line degree of depth into.
The method of the packet data output of the main buffer of 18. control according to claim 14, it is characterized in that, this outlet data delivery status includes at least one in transfer rate and the outlet package dimension modifying information of first in first out size, physical layer device of the outlet line degree of depth, medium access control layer device.
The method of the packet data output of the main buffer of 19. control according to claim 14, is characterized in that, the step of controlling this packet data output of this main buffer includes:
In the time that this comparative result shows that this credit value reaches this first predetermined critical, this packet data output of this main buffer is suspended to the border of the package cell in the package forwarding in wish.
The method of the packet data output of the main buffer of 20. control according to claim 14, is characterized in that, the step of controlling this packet data output of this main buffer includes:
In the time that this comparative result shows that this credit value reaches this first predetermined critical, this packet data output of this main buffer is suspended to the border of a part for the package cell in the package forwarding in wish.
The method of the packet data output of the main buffer of 21. control according to claim 14, is characterized in that, the step of controlling this packet data output of this main buffer includes:
In the time that this comparative result shows that this credit value does not reach this first predetermined critical, whether make back-pressure signal come into force to produce check result by inspection medium access control layer device, and control this packet data output of this main buffer according to this check result.
The method of the packet data output of the main buffer of 22. control according to claim 14, is characterized in that, further includes:
The actual amount of data of the first-in first-out buffer based on medium access control layer device is proofreaied and correct this credit value.
The method of the packet data output of the main buffer of 23. control according to claim 22, is characterized in that, the step of proofreading and correct this credit value includes:
This actual amount of data of this first-in first-out buffer by synchronous this credit value and this medium access control layer device is proofreaied and correct this credit value.
The method of the packet data output of the main buffer of 24. control according to claim 22, is characterized in that, this credit value is corrected to respond the back-pressure signal that this medium access control layer device comes into force.
The method of the packet data output of the main buffer of 25. control according to claim 22, is characterized in that, the step of proofreading and correct this credit value includes:
Monitor the difference between this actual amount of data of this first-in first-out buffer of this credit value and this medium access control layer device; And
In the time that this difference reaches the second predetermined critical, proofread and correct this credit value.
The method of the packet data output of the main buffer of 26. control according to claim 22, is characterized in that, in the time meeting scheduled timing condition, proofreaies and correct this credit value.
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| US201361816252P | 2013-04-26 | 2013-04-26 | |
| US61/816,252 | 2013-04-26 | ||
| US14/230,005 | 2014-03-31 | ||
| US14/230,005 US20140321473A1 (en) | 2013-04-26 | 2014-03-31 | Active output buffer controller for controlling packet data output of main buffer in network device and related method |
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| CN112533046A (en) * | 2019-09-18 | 2021-03-19 | 新唐科技股份有限公司 | Audio data synchronization device and method thereof |
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