CN1137505C - 制作、处理和储存表面安装倒装芯片载体的方法 - Google Patents

制作、处理和储存表面安装倒装芯片载体的方法 Download PDF

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CN1137505C
CN1137505C CNB941135357A CN94113535A CN1137505C CN 1137505 C CN1137505 C CN 1137505C CN B941135357 A CNB941135357 A CN B941135357A CN 94113535 A CN94113535 A CN 94113535A CN 1137505 C CN1137505 C CN 1137505C
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chip carrier
flip
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substrate
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CN1125356A (zh
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劳伦斯·哈罗德·怀特
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International Business Machines Corp
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Abstract

一种用来防止在沿包封剂和芯片表面之间界面或包封剂和芯片载体衬底表面之界面的倒装芯片C4连接之间形成阿米巴状焊桥的、处理和储存表面安装的包封倒装芯片体组件的工艺。在用来将组件安装到电路板上的回流加热过程中，包封剂中的自由潮气浓度保持在低于预定的安全限。

Description

制作、处理和储存表面安装倒装芯片载体的方法
本发明涉及到一种制造信息处理系统的工艺，更确切地说是涉及制造互连组件的方法，以及制作、处理和储存表面安装倒装芯片载体的方法。
自从Miller在美国专利3,401,126和3,429,040中首次加以描述以来，采用C-4(凹下可控的芯片连接)技术，焊球连接已用来安装IC(集成计算机芯片)。Dally的《封装电子系统》(McGraw-Hill1990，P113)描述了倒装芯片即C-4连接。Dally在书中提到：“在芯片表面的面阵中，芯片焊点被破坏。......在10密尔的中心上，这些焊点的直径为5密尔。在陶瓷衬底上制作了相匹配的焊点，使芯片上的焊点同陶瓷上的焊点重合。在陶瓷衬底焊点上安置直径为5密尔的焊球......而芯片相对于衬底放置和对准。对此装配进行加热直到焊球开始软化并随焊料同时润湿二个焊点而发生焊球的可控凹下。为了安装IC芯片以及为了电路的层间连接和电子封装，已提出了无数的焊接结构”。
均载于Electronic Engineering Times 1993年3月15日的Terry Costlow的“球的栅阵列：热门的新封装”和Glenda Der-man的“焊球构成连接”描述了用焊球将陶瓷或柔性芯片载体连接到电路板的情况。
美国专利3518756、3988405和4202007、以及H.D.Kaiser等人的“多层陶瓷组件的制造技术”(Solid State Technology，1972年5月，P35-40)和W、L、Clough的“厚膜多层技术中的第三方向”(Mi-croelectronics，卷13，1970年第9期，P23-30)，都描述了多层陶瓷芯片载体的制造。
美国专利3554877、3791858和3554877描述了有机电路板的制造。美国专利3791858描述了薄膜工艺。
Beckham的美国专利4604644描述了包封C-4连接的材料和结构。Itoh的美国专利4701482和Christie等人SN 493126 3/14/90公开了环氧树脂及电子应用的环氧树脂的选取指南。
D.Suryanarayana、R.Hsiao、T.P.Gall、J.M.McCreary的“用环氧树脂包封法增大倒装芯片的疲劳寿命”(IEEE Trans-actions on Components and Hybrids，and Manufacturing，14卷，No.1，PP218-223(1991))；J.Clementi、J.McCreary、T.M.Niu、J.Palomaki、J.Varcoe和G.Hill的“在陶瓷衬底上包封倒装芯片”(1993年6月IEEE在佛罗里达Orlando组织的第43届电子元件和技术会议论文集P175)；D.O.Powell和A.K.Trivedi的“FR-4集成电路封装上的倒装芯片”(同上，P182)；Y.Tsukada、Y.Mashimoto、T.Nishio和N.Mil的“包封于环氧树脂基印刷电路封装上的倒装芯片接合的可靠性和应力分析“(1992年ASME/JSME电子封装双边会议论文集第二卷，材料、工艺、可靠性、质量控制和NDE，1992，P827)；D.Wang和K.I.Papathomas的“用来增大凹下可控的芯片连接(C4)的疲劳寿命的包封剂”(第43届电子元件和技术会议论文集P780)；以及Christie等人的三个美国专利4999699、5089440和5194930；描述了采用了环氧树脂包封来增大倒装芯片连接的疲劳寿命。
具体地说，US 4,999,699公开了一种焊料互连，从而在载体衬底与半导体器件之间的焊料连接所造成的间隙中填充了一种组合物，这种组合物是通过对含有脂环族聚环氧化物和/或可固化氰酸盐酯或其预聚物的制剂进行固化而获得的，填料的最大粒度是31微米，并且至少在实质上没有α粒子发射。然而，这篇美国专利根本没有论及组合物填料中的潮气，更没有涉及各连接之间的焊料桥。
R.Lin、E.Blackshear和P.Serisky的“回熔焊工艺中潮气引起的塑料封装表面安装元件的破裂”(IEEE IRPS，1988年，P83-89)，B.K.Bhattacharyya、W.A.Huffman、W.E.Jahsman和B.Natarajan的“潮气吸收和表面安装塑料封装的机械性能”(IEEE，1988年)，B.Miles和B.Freyman的“过熔塑料焊点阵列载体(OM-PAC)中爆玉米花现象的消除”(1992年9月德克萨斯AustinIEPS会议论文集)，G.S.Springer的《复合材料的环境影响》(1981年P15-33)以及1990年12月的IPC-SM-786，描述了潮气引起塑料表面安装元件破裂的问题及其解决方法。
美国专利4681654、07/009981及5159535描述了柔性薄膜芯片载体(*即本技术领域中的ATAB)。在ATAB中，用焊球连接方法将柔性电路板芯片载体安装在电路板上。
Behun的美国专利5147084描述了结合LMP(低熔点)焊料采用HMP(高熔点)焊球的方法。该专利的图1A描述如下。“部件10将要进入到板11。部件10带有在焊点12处终止于表面的内部金相14。......将低熔点焊料16加至焊点12。......高熔点焊球18置于与低熔点焊料16相接触处，并将此系统加热以回熔低熔点焊料使其润湿未熔化的高熔点焊球。......还示出了带有终结于表面焊点17的内部金相15的板11。......将组装件10与带有焊点17和低熔点焊料13的部件11进行接触，并将二者加热到足以回流低熔点焊料但不足以回流高熔点焊球的温度。板11上附着在焊点17上的低熔点焊料13将润湿高熔点焊球从而获得连接。
上述所有资料均结合于此作为参考。
因此，本发明的目的是提供一种制作、处理和储存表面安装倒装芯片载体的方法。
本发明的另一个目的是提供一种制造互连组件的方法及制造信息处理系统的方法。
在申请人的本发明中，公开了当用低熔点掺入材料将附有C4芯片的表面安装芯片载体衬底回流焊到电路板上时，在沿包封剂和芯片或载体衬底的交界面的C4连接之间形成焊桥。根据检测，桥通常具有形成在C4焊接处周围的阿米巴的平整的不规则形状，因而此处认为是阿米巴。即使组件的温度低于C4焊料的溶点，也会形成阿米巴。还公开了在回流时使包封剂中的潮气减为最小可防止此种阿米巴的形成。
为实现上述目的，本发明提供一种制作、处理和储存表面安装倒装芯片载体的方法，包括以下步骤：
制作一个有机芯片载体衬底；
用回流焊料连接的阵列将倒装芯片直接连接到芯片载体衬底上，使芯片在连接附近与衬底分开一定距离；
用有机包封材料将倒装芯片与载体衬底之间的距离包封起来，以保护焊料连接；
其特征在于还包括以下步骤：通过减少潮气从空气向包封剂的扩散来控制倒装芯片与载体衬底之间的包封剂内的潮气，以便使随后的焊料附着不致在各连接之间形成焊料桥，
其中，控制包封剂内的潮气的步骤至少包括下列步骤之一：
将所述芯片载体储存在提高了40℃以上的温度中；
将所述芯片载体储存在气密的环境中，以及
对所述芯片载体进行烘焙。
本发明还提供一种制造互连组件的方法，包括以下步骤：
制作一个有机芯片载体衬底；
用回流焊料连接的阵列将倒装芯片直接连接到芯片载体衬底上，使芯片在连接附近与衬底分开一定距离以形成一个芯片载体；
用有机包封材料将倒装芯片与载体衬底之间的距离包封起来，以保护焊料连接；
为电路板设置一个表面触点阵列，用于芯片载体的表面安装连接；以及
将芯片载体回流焊到电路板的表面连接上；
其特征在于还包括以下步骤：通过减少潮气从空气向包封剂的扩散来控制倒装芯片与载体衬底之间的包封剂内的潮气，以便使随后的焊料附着不致在各连接之间形成焊料桥，
其中，控制包封剂内的潮气的步骤至少包括下列步骤之一：
将所述芯片载体储存在提高了40℃以上的温度中；
将所述芯片载体储存在气密的环境中，以及
对所述芯片载体进行烘焙。
本发明还提供一种制造信息处理系统的方法，包括以下步骤：
制作一个有机芯片载体衬底；
用回流焊料连接的阵列将倒装芯片直接连接到芯片载体衬底上，使芯片在连接附近与衬底分开一定距离；
用有机包封材料将倒装芯片与载体衬底之间的距离包封起来，以保护焊料连接；
为电路板设置一个表面触点阵列，用于芯片载体的表面安装连接；以及
将芯片载体回流焊到电路板的表面触点上；
其特征在于还包括以下步骤：通过减少潮气从空气向包封剂的扩散来控制倒装芯片与载体衬底之间的包封剂内的潮气，以便使随后的焊料附着不致在各连接之间形成焊料桥；
将电路板安装到机壳内；
将信号输入、输出装置连接到电路板上，以便与计算机外设通信；以及将电源装置连接到电路板，
其中，控制包封剂内的潮气的步骤至少包括下列步骤之一：
将所述芯片载体储存在提高了40℃以上的温度中；
将所述芯片载体储存在气密的环境中，以及
对所述芯片载体进行烘焙。
注意为此目的，在充分提高了的温度下烘焙足够长的时间(最好至少在100℃下至少烘焙12小时，在约125℃至少烘焙24小时更好)等效于降低扩散潮气。
其制作载体衬底包括制作一个陶瓷材料层的一种工艺。
其制作载体衬底包括叠成聚酰亚胺和铜箔的柔性层的一种工艺。
其制作载体衬底包括制作一个用纤维加固了的有机材料的坚实的板。
上述工艺中的纤维包括玻璃或聚四氟乙烯或凯夫拉尔(聚对苯二甲酰对苯二胺纤维)。
以下将参照附图对本发明作更详细的描述。
图1示出了本发明用来处理和储存芯片载体以防止阿米巴的工艺实施例。
图2示出了本发明用来制作内部连接结构的工艺的另一个实施例。
图3示出了用来制作本发明的信息处理系统的工艺。
图4是本发明一个具体实施例的局部剖面示意图，示出了一个有机芯片载体顶部带有包封的C4连接而部分电路板带有栅阵列焊球连接的倒装片芯片。
图5是图4具体实施例的局部剖面示意图，示出了一部分用包封的C4连接接装在芯片载体上的芯片。
图6是图5的倒装芯片沿6-6的剖面，示出了桥接在C4连接之间的一个阿米巴。
图7是本发明一个具体实施例的局部剖面示意图，示出了一个有机芯片载体底部带有包封的C4连接而部分电路板带有栅阵列焊球连接的倒装芯片。
图8是本发明一个具体实施例的局部剖面示意图，示出了一个陶瓷芯片载体带有包封的C4连接而部分电路板带有焊柱连接的倒装芯片。
图9是本发明另一具体实施例的局部剖面图示意图，示出了一个柔性芯片载体顶部带有包封的C4接而部分电路板带有栅阵列焊球连接的倒装芯片。
图10是本发明又一具体实施例的局部剖面示意图，示出了一个柔性芯片载体底部带有包封的C4连接而部分电路板带有栅阵列焊球连接的倒装芯片。
图11示意地示出了本发明的一个具体实施例，其中的倒装芯片附着在带有引线的芯片载体上。
图12示意地示出了本发明的信息处理系统。
图1示出了本发明用来处理和储存芯片载体以防止阿米巴的工艺实施例。在步骤101中，制作了一个载体衬底。此衬底可以是一种陶瓷衬底、一种有机衬底(它可能用聚四氟乙烯、凯夫拉尔或诸如FR-4的玻璃纤维进行了加固)或者一种柔性聚酰亚胺衬底(聚酰亚胺薄膜和图形化铜箔交替层叠而成)。衬底的二个主表面之一含有暴露金属接触(如铜焊点)的第一阵列，用来连接倒装芯片。对于衬底同一面或另一面上的其它倒装芯片和引线连接的芯片，可提供其它的倒装芯片连接阵列。衬底可以是方形平板或带有用来向电路板进行表面安装连接的侧面引线的相似封装件，衬底也可带有其上附着有金属球(如高熔点焊料)或焊柱的裸露金属接触的第二阵列，用来对电路板提供栅阵列连接。焊柱可以在倒装片之前附着上去或随后附着上去。
在步骤102中，沉积了一个诸如整平的易熔焊料块的低熔点导电连接材料，用来将倒装芯片连接到第一接触阵列以形成焊料块。连接材料可以沉积在各个接触的裸露表面上，也可以沉积在倒装芯片的高熔焊块的末梢部。
在步骤103中，带有诸如高熔点C4焊料块的连接材料的倒装芯片被连接到衬底上。芯片位于低熔点焊料块的第一栅阵列上。倘若要连接一个以上的倒装芯片，则将它们置于其它的倒装芯片连接阵列上。然后将衬底加热使芯片回流焊到衬底上。
在步骤104中，包封剂注入到芯片的下面以包围芯片和衬底之间的全部连接。包封剂保护连接免受环境损害并降低热疲劳。得到的组件即可安装到电路板上。若一个片子上批量制作多个衬底，则可将片子切成单个组件。
在步骤105中，在将组件表面安装到电路板的回流加热过程中防止了阿米巴。发现若包封剂含有足够的潮气，则高的回流温度使包封剂同芯片或衬底分离并将低熔点连接材料挤入形成在包封剂和芯片或衬底之间的边界空隙中。对于易熔焊料连接材料，当芯片连接被分开时，挤出的材料呈阿米巴状。
借助于使包封剂中自由潮气保持低浓度，可以防止这种阿米巴的形成。现有包封剂在相对湿度(RH)足够高时会从环境气氛中吸收潮气。例如，对于现有最佳的包封剂(Hysol FP4511)，当在环境温度和压力下暴露于60％的RH中，在约三天(72小时)以上则吸收的潮气足以形成阿米巴。可以使用吸水更少的不同的包封剂。将包封剂密封起来可以防止暴露于湿气(例如可为陶瓷组件提供一个铝帽)。在使用之前可以将组件一直储存在气密袋中，最好还放有干燥剂。在使用之前，可以烘焙组件以从包封剂中驱除过量的潮气。在使用之前可将组件一直储存在加热的室内以提供极低的相对湿度。对暴露于空气的时间可进行监测以防止采用已吸有过多湿气的组件。
在包封之后最好对组件进行烘焙，然后储存在带有干燥剂的气密袋中直至快要使用。开袋之后要监测暴露于潮湿条件的时间，若在当前条件下暴露时间超过了，则要对组件进行烘焙。例如已发现在提高了的温度下烘焙足够的时间可将潮气降到临界值以下。例如临使用之前在至少125℃温度下至少烘焙24小时，则即使对故意储存于高湿度下而被潮气饱和了的组件，也可以防止阿米巴形成。
图2示出了本发明用来制作内部连接结构的工艺的又一实施例。步骤201至204大体相当于图1的步骤101至104，不再赘述。
在步骤205中，提供了一个电路板用来表面安装组件。此电路板可以是诸如陶瓷或柔性卡之类的已知类型中的任何一种，但典型地是一种FR-4多层板。电路板在其表面上包括一个金属接触阵列。
在步骤206中，组件被表面安装到电路板上。在组件的接触和引线或焊球/焊柱之间放置一个低熔点连接材料，并将此结构加热使组件回流焊到电路板上。例如，可在接触上沉积易熔焊料，然后将组件连同引线或焊球/焊柱置于电路板接触上。
在步骤207中，防止了阿米巴的形成。除了上述图1中步骤105所讨论的方法，采用比用来将芯片连接到组件的材料熔点更低的连接材料来将组件连接到电路板，也可以防止阿米巴。例如，Pb∶Sn≈37∶63的易熔焊料可用来将组件的引线/焊球/焊柱连接到电路板，而Pb含量显著提高的(例如50-90％的Pb)铅锡焊料可用来将倒装片芯片的高熔点C4连接焊接到组件上。由于保持了回流温度低于用来将倒装片连接到衬底上的连接材料的熔点，这就防止了阿米巴。
倘若在包封剂的潮气含量增大到临界值之前(例如在60％RH下约72小时)不能完成内部连接结构的热处理，则必须对内部连接结构进行烘焙直至达到安全的潮气含量(例如，视情况而定于大约125℃，不超过24小时)。
图3示出了本发明制作信息处理系统工艺的另一实施例。步骤301至307大致相当于图2的步骤201至204，不再赘述。
在步骤308中，图2工艺得到的内部连接结构被安装在一个机壳中以便保护它不受环境损害。在步骤309中，信号输入/输出(I/O)电缆(电的或光的)连接在电路板和各种计算机外围设备之间，也可能连接在本发明的信息处理系统的网络之间。最后在步骤310中，将电源连接到内部连接结构上使其电子元件得以工作。
图4是本发明一个具体实施例的局部剖面示意图，示出了连接在有机芯片载体衬底404顶部的倒装芯片402。一个C4焊料连接406的栅阵列在倒装芯片的金属接触阵列和衬底顶面的金属(如铜)镜像阵列之间构成机械和电连接。C4连接406借助于包封剂408而得到加强，包封剂408填充了芯片下方C4连接周围的空间并牢固地附着在芯片和衬底上，从而保护C4连接免受环境损害并降低连接的热疲劳。
有机载体的底部是一个诸如铜焊点的接触410的第二阵列。低熔点连接材料412(诸如易熔焊料)连接于高熔点材料(诸如90-97％的Pb多半包以Sn的焊料)球414。电路板416包括同组件底部接触阵列成镜像的阵列中的接触418。连接材料420正好置于球414和接触418之间并对电路板进行回流加热以便将衬底404连接到板416上。
图5是图4具体实施例的局部剖面示意图，示出了用包封的C4连接安装在芯片载体上的部分芯片502。对于C4几何结构的细节，本技术领域的熟悉人员可参考美国专利3458925。在将组件表面安装到电路板而进行回流的过程中，包封剂408中过量的潮气会引起沿包封剂和504处钝化层502(玻璃、聚酰亚胺、氧化硅)之间的交界面发生分离。熔化了的低熔点导电连接材料506会沿着包封剂和高熔点C4焊料块406之间的交界面挤出，进入包封剂和504处纯化层之间产生的空隙。挤出的导电材料可能引起C4连接之间的电搭桥(短路)。
图6是图5沿6-6的倒装片芯片402的剖面图，示出了桥接在C4连接508和509之间的极薄的阿米巴602的轮廓。
图7是相似于图4实施例的本发明一个具体实施例的局部剖面示意图，示出了倒装芯片702，此处有机芯片载体703的底部有包封的C4连接，而部分电路板706上有栅阵列焊球连接704。组件下方的空间在表面安装之后被包封起来以保护芯片并改善热性能。
图8是本发明一个具体实施例的局部剖面示意图，示出了倒装芯片802，此处陶瓷芯片载体804上有包封的C4连接，并有将组件连接到电路板808的焊柱806。作为一种变通，带有陶瓷衬底的组件也可以用图4所示用于有机芯片载体组件的焊球来连接。如所示，可以用镀或回流焊连接材料810的方法来将焊柱连接到组件的接触焊点上。最好是在包封倒装芯片之前连接焊柱以避免形成任何阿米巴。
图9是本发明又一具体实施例的局部剖面示意图，示出了连接于二层柔性衬底904上的倒装芯片902。包封剂906填充了C4连接908的周围空间。用焊球910栅阵列使组件连接到电路板912。焊球焊在接触910上，而组件用低熔点连接材料914回流表面安装连接到电路板的接触912上。用粘合剂918固定的框架916使连接(其上要附着焊球)区保持平面状。也可以用粘合剂922将散热器920固定在框架916上。散热器也提供了几乎气密的密封，从而大大延长了组件的仓储寿命。
图10是相似于图9实施例的本发明又一具体实施例的局部剖面示意图，示出了固定在单层柔性衬底1004底面上的倒装芯片1002。包封剂1006分布在C4连接1008的周围。栅阵列焊球1010将组件连接到电路板1012。此实施例中，任选的散热器1014对阿米巴的形成不提供任何保护。
图11示意地示出了本发明的一个具体实施例，其中倒装芯片1102固定在带引线的芯片载体1104上。用再次加热低熔点连接材料1110的方法将引线1106表面安装固定到接触1108上。
图12示意地示出了本发明的信息处理系统。带有二个芯片载体组件1204和1206的内部电连接装置1202安装在机壳1208中以保护内部连接装置免受环境损害。借助于将内部连接装置连接到诸如打印机、键盘、显示器和网络中其它信息处理系统的计算机外围设备(未示出)，光缆或电缆1210用于输入/输出。电源1212连接到内部连接装置以启动其工作。
虽然根据最佳实施例已对本发明进行了描述，但显而易见，对本技术领域的熟练人员来说，可以做出工艺和结构细节的改变而不超越本发明的构思与范围。

Claims (36)

1.一种制作、处理和储存表面安装倒装芯片载体的方法，包括下列步骤：
制作一个有机芯片载体衬底；
用回流焊料连接的阵列将倒装芯片直接连接到芯片载体衬底上，使芯片在连接附近与衬底隔开一段距离；
用有机包封材料将倒装芯片与载体衬底之间的距离包封起来，以保护焊料连接，
其特征在于还包括下列步骤：通过减少潮气从空气向包封剂的扩散来控制倒装芯片和载体衬底之间的包封剂内的潮气，以便使随后的焊料附着不致在各连接之间形成焊料桥，
其中，控制包封剂内的潮气的步骤至少包括下列步骤之一：
将所述芯片载体储存在提高了40℃以上的温度中；
将所述芯片载体储存在气密的环境中，以及
对所述芯片载体进行烘焙。
2.根据权利要求1的方法，其特征在于：所述气密的环境为密封袋。
3.根据权利要求2的方法，其特征在于：所述密封袋内还包含干燥剂。
4.根据权利要求1的方法，其特征在于：所述气密的环境为管壳。
5.根据权利要求1的方法，其特征在于：所述气密的环境为用散热材料将芯片密封在两层柔性衬底内。
6.根据权利要求1的方法，其特征在于所述烘焙步骤包括：在大于等于100℃的温度下对芯片载体烘焙一段时间。
7.根据权利要求1的方法，其特征在于所述烘焙步骤包括：在125℃的温度下对所述芯片进行烘焙24小时。
8.根据权利要求1～7中任一项的方法，其特征在于：在所述控制包封剂内的潮气的步骤之后、且芯片载体已暴露于大气中长达一星期之前，将芯片载体回流焊到电路板上。
9.根据权利要求1的方法，其特征在于所述制作衬底的步骤包括：制作一层陶瓷材料。
10.根据权利要求1的方法，其特征在于所述制作衬底的步骤包括：叠加聚酰亚胺和铜箔的柔性薄层。
11.根据权利要求1的方法，其特征在于所述制作衬底的步骤包括：制作一块用纤维加固的有机材料硬板。
12.根据权利要求10的方法，其特征在于：所述纤维包括玻璃纤维。
13.一种制造互连组件的方法，包括下列步骤：
制作一个有机芯片载体衬底；
用回流焊料连接的阵列将倒装芯片直接连接到芯片载体衬底上，使芯片在连接附近与衬底隔开一段距离，以形成一个芯片载体；
用有机包封材料将倒装芯片与载体衬底之间的距离包封起来，以保护焊料连接；
为电路板设置一个表面触点阵列，用于芯片载体的表面安装连接；以及
将芯片载体回流焊到电路板的表面连接上，
其特征在于还包括下列步骤：通过减少潮气从空气向包封剂的扩散来控制倒装芯片和载体衬底之间的包封剂内的潮气，以便使随后的焊料附着不致在各连接之间形成焊料桥，
其中，控制包封剂内的潮气的步骤至少包括下列步骤之一：
将所述芯片载体储存在提高了40℃以上的温度中；
将所述芯片载体储存在气密的环境中，以及
对所述芯片载体进行烘焙。
14.根据权利要求13的方法，其特征在于：所述气密的环境为密封袋。
15.根据权利要求14的方法，其特征在于：所述密封袋内还包含干燥剂。
16.根据权利要求13的方法，其特征在于：所述气密的环境为管壳。
17.根据权利要求13的方法，其特征在于：所述气密的环境为用散热材料将芯片密封在两层柔性衬底内。
18.根据权利要求13的方法，其特征在于所述烘焙步骤包括：至少在大于等于100℃的温度下对芯片载体烘焙一段时间。
19.根据权利要求13的方法，其特征在于所述烘焙步骤包括：在125℃的温度下对所述芯片进行烘焙24小时。
20.根据权利要求13～19中任一项的方法，其特征在于：在所述控制包封剂内的潮气的步骤之后、且芯片载体已暴露于大气中长达一星期之前，将芯片载体回流焊到电路板上。
21.根据权利要求13的方法，其特征在于所述制作衬底的步骤包括：制作一层陶瓷材料。
22.根据权利要求13的方法，其特征在于所述制作衬底的步骤包括：叠加聚酰亚胺和铜箔的柔性薄层。
23.根据权利要求13的方法，其特征在于所述制作衬底的步骤包括：制作一块用纤维加固的有机材料硬板。
24.根据权利要求23的方法，其特征在于：所述纤维包括玻璃纤维。
25.一种制造信息处理系统的方法，包括下列步骤：
制作一个有机芯片载体衬底；
用回流焊料连接的阵列将倒装芯片直接连接到芯片载体衬底上，使芯片在连接附近与衬底隔开一段距离；
用有机包封材料将倒装芯片与载体衬底之间的距离包封起来，以保护焊料连接；
为电路板设置一个表面触点阵列，用于芯片载体的表面安装连接；以及
将芯片载体回流焊到电路板的表面触点上，
其特征在于还包括下列步骤：通过减少潮气从空气向包封剂的扩散来控制倒装芯片和载体衬底之间的包封剂内的潮气，以便使随后的焊料附着不致在各连接之间形成焊料桥；
将电路板安装到机壳内；
将信号输入、输出装置连接到电路板上，以便与计算机外设通信，以及将电源装置连接到电路板，
其中，控制所得到的芯片载体中的包封剂内的潮气的步骤至少包括下列步骤之一：
将所述芯片载体储存在提高了40℃以上的温度中；
将所述芯片载体储存在气密的环境中，以及
对所述芯片载体进行烘焙。
26.根据权利要求25的方法，其特征在于：所述气密的环境为密封袋。
27.根据权利要求26的方法，其特征在于：所述密封袋内还包含干燥剂。
28.根据权利要求25的方法，其特征在于：所述气密的环境为管壳。
29.根据权利要求25的方法，其特征在于：所述气密的环境为用散热材料将芯片密封在两层柔性衬底内。
30.根据权利要求25的方法，其特征在于所述烘焙步骤包括：至少在大于等于100℃的温度下对芯片载体烘焙一段时间。
31.根据权利要求25的方法，其特征在于所述烘焙步骤包括：在125℃的温度下对所述芯片进行烘焙24小时。
32.根据权利要求25～31中任一项的方法，其特征在于：在所述控制包封剂内的潮气的步骤之后、且芯片载体已暴露于大气中长达一星期之前，将芯片载体回流焊到电路板的表面触点上。
33.根据权利要求25的方法，其特征在于所述制作衬底的步骤包括：制作一层陶瓷材料。
34.根据权利要求25的方法，其特征在于所述制作衬底的步骤包括：叠加聚酰亚胺和铜箔的柔性薄层。
35.根据权利要求25的方法，其特征在于所述制作衬底的步骤包括：制作一块用纤维加固的有机材料硬板。
36.根据权利要求35的方法，其特征在于：所述纤维包括玻璃纤维。
CNB941135357A 1994-01-07 1994-12-30 制作、处理和储存表面安装倒装芯片载体的方法 Expired - Lifetime CN1137505C (zh)

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KR950024625A (ko) 1995-08-21
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US5535526A (en) 1996-07-16
US5473814A (en) 1995-12-12
MY125582A (en) 2006-08-30
CN1125356A (zh) 1996-06-26

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