CN1170465C - 印刷电路板或芯片载体中的多通道结构的制备方法 - Google Patents

印刷电路板或芯片载体中的多通道结构的制备方法 Download PDF

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CN1170465C
CN1170465C CNB981239994A CN98123999A CN1170465C CN 1170465 C CN1170465 C CN 1170465C CN B981239994 A CNB981239994 A CN B981239994A CN 98123999 A CN98123999 A CN 98123999A CN 1170465 C CN1170465 C CN 1170465C
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本杰明・V・法萨诺
本杰明·V·法萨诺
M・普雷蒂曼
凯文·M·普雷蒂曼
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Abstract

提供一种印刷电路板或芯片载体中的具有平行轴线的多通道结构的制造方法。先在器件上制备一个用金属敷镀的一次通孔；再用绝缘材料填充或覆盖所述通孔穿过和通孔端部的上下表面；形成穿过所述通孔中和其上下表面绝缘层的同轴或平行轴的多通道；用金属敷镀该通道以提供器件上、下表面间的导电通道；然后，除去部分表面绝缘层以与金属敷镀通道电接触。根据本发明可制备同轴或平行轴的多通道。电信号通道还可在同轴的电源或接地通道中被屏蔽。

Description

印刷电路板或芯片载体 中的多通道结构的制备方法
技术领域
本发明涉及在印刷电路板、芯片载体等电器件中制备的多个导电通道结构及其制造方法。
背景技术
在诸如印刷电路板和芯片载体电器件的制备过程中，人们期望提高导电通道密度以提高器件的输入/输出(I/O)容量。通道的常规制备方法是在印刷板或芯片载体上钻孔或激光割孔，然后在孔的内壁上敷镀金属，形成板和芯片载体上从上到下的导电通道。
有必要在工业上被称为有机印刷线路板(比如：纤维和/或颗粒填充剂合成的聚合物)上形成高密度的同轴连接。
美国专利4,911,796号发明公开并要求保护一种在通道内壁用金属敷镀然后覆盖印剂以制作通道的方法。在电路板截面形成单一导电通道。
美国专利5,300,911号发明公开并要求保护一种用于单体变压器上两个或多个耦合线圈的电流承载的同轴通道结构。首先，在一个烧结的陶瓷铁氧体上形成通道以制作通孔。专利权人没有公开如何形成孔。然后，在铁氧体上和通孔内壁表面镀上金属，使其表面具有金属特性。在金属上再覆上绝缘体，再在表面和内壁上镀金属层。只要需要，就可以再加上导电层形成第三或第四个同轴通道结构。虽然，专利权人公开了在磁性器件(铁氧体陶瓷上制备同轴通道的一种方法，但是，由此得到的通道是不连续的。平面层的通道常常串联成出入铁氧体的回路而充当线圈。层上通道也不是一个一个单独可连通的，或是只能提供一个连接线路平面上和下的单独的信号通道。绝缘层只能在衬底上一次形成一个整层而不允许有布线图案或其他特殊制作。这样，除了衬底边缘外，无法形成镀层的多层相互连通。
美国专利5,374,788号发明公开并要求保护一种用于印刷电路板的上、下连通的单通孔结构。环氧树脂内的金属芯和通孔用同轴金属物或钎料层包裹以提高附着力。同轴包裹层相互间不是电绝缘的。
美国专利5,541567号发明公开了一种把被用作与导电表面导通的中心导体的导线线线连接，然后在置于陶瓷或磁性材料中的伸通孔中插入一根凸出的导线形成的同轴通道。这个结构被设计作为一个类似变压器或电感线圈的东西，这对引线键合的大面积电路板的固体导体的制作是不适用的。常规制作工艺也不适合制作与成千上万排列的孔对准的成千上万的针，这样能得到的最小间距比按本发明用光刻或激光定位的通孔间距要大得多。
美国专利5,653,834号发明公开并要求保护一种通过用玻璃涂敷氧化金属板上孔的内壁，形成用于陶瓷电路板支撑基体的电馈过筛物的制作方法。然后，用金属敷镀孔，成为通过电路板横截面的单导体。
根据工业实践，电路板上单通道的制备是在载体板上钻孔或激光割孔。在大量的绝缘层、镀层和填充物用于形成电路板两边的层。
发明内容
根据本发明，通常具有平行轴或同轴的多通道是通过如下方法在印刷电路板、芯片载体之类的电器件上制作的：先在器件上提供一个一次通孔，该通孔伸展到所述器件的上、下表面；然后，用金属敷镀通孔，为该器件上、下表面之间提供一个导电通道；然后，在金属敷镀的通孔中填充绝缘材料，并在上、下表面覆盖一层绝缘材料，此绝缘材料可以是光敏聚合物；再在所述通孔中和上、下表面的绝缘层处，可能用钻孔的方法形成一个二次通孔，二次通孔内壁与一次通孔镀层内壁不接触；然后，用金属敷镀二次通孔以在第一和第二用绝缘层覆盖的表面之间提供一个导电通道；然后，用绝缘材料填充二次通孔，用第二绝缘层覆盖第二、第二表面；然后除去覆盖器件上和/或下表面的部分第一和/或第二绝缘层以允许独立地与第一和第二通孔金属镀层表面接触。二次通孔可以是一次通孔内的多轴平行的孔或一次通孔中的同轴孔。用相同的方法，可在一次通孔中依次形成彼此绝缘的多个通孔。同轴通孔数目受原始通孔的大小、在填充的绝缘层中钻孔的精确度以及随后在更小孔中敷镀金属时没有与前次敷镀金属的通孔相接触的因素限制。
理想情况下，可生产具有三重同轴通孔的器件，在器件的每个通孔中形成一套地/信号/电压组合。此结构在高导线密度和高频应用中提供优越的信号隔离。
因此，本发明的提供一种在印刷电路板或芯片载体中制作具有平行轴线的多个通道的方法，包括下列步骤：(a)在所述电路板或芯片载体上提供一个一次通孔，所述一次通孔从所述电路板或芯片载体的上表面延伸到下表面；(b)用金属敷镀该一次通孔以提供一个从所述电路板或芯片载体上表面到下表面的导电通道；(c)在所述金属敷镀的通孔中填充或覆盖绝缘材料，并在所述上、下表面覆盖第一绝缘层；(d)形成穿过所述一次通孔中的和所述上、下表面上的绝缘层的绝缘材料的至少两个二次通孔，这些二次通孔的长轴互相平行并且与所述一次通孔的长轴也平行，且这些二次通孔与所述一次通孔的金属镀层分隔开来且不接触；(e)用金属敷镀所述二次通孔以在用所述第一绝缘层覆盖的所述上表面和所述下表面之间提供多个导电通道；(f)用绝缘材料填充或涂覆所述被金属镀敷的二次通孔，并用第二绝缘层覆盖被所述第一绝缘层覆盖的所述上、下表面和所述二次通孔；以及(g)除去覆盖所述电路板或芯片载体的上、下表面之一的所述绝缘材料的一部分，以与所述被金属镀敷的一次和二次通孔进行独立的电接触。
附图说明
图1A至图1F示意地说明了本发明的工艺。
图2示意地说明了根据本发明的工艺制备的具有多个二次通孔的器件。
图3示意地说明了根据本发明的工艺制备的具有同轴通孔的器件。
具体实施方式
参考图1A，标号10为本发明制作方法中的一种合适基体。基体10可以是有机印刷电路板或陶瓷衬底等电器件。所述有机印刷电路板通常是一种纤维或颗粒填充剂合成的聚合物。
如图1A所示，通孔12用本领域中熟知的常规工艺在印刷电路板或电器件上制作。通孔12从器件10的第一或上表面14延伸到其第二或下表面16。该通孔用金属敷镀(如：镀层技术)形成一导电镀层18以提供从器件10上表面14至下表面16的导电通道。如图1所示，该金属镀层延伸到上表面14和下表面16，使通道表面具有例如在本领域熟知的环形特征。
如图1B所示，第一镀层通孔12用在本领域中熟知的绝缘材料20填充。该绝缘材料比如可以是一种陶瓷浆或涂料，或是一种聚合物。虽然图1B显示了该通孔完全填充的状态，也可能只填充孔内壁以保证绝缘层必要的厚度。
然后，如图1C所示，在器件10的上下表面(分别为14、16)分别覆盖绝缘层22、24。这些绝缘层，比如可用以薄膜或溶液形式沉积的光敏聚合物形成。同样地，陶瓷浆、涂料或未烧制的生胶带(unfired green tape)均可使用。
如图1D所示，二次通孔25钻透绝缘层22、24和一次通孔12中的绝缘材料20。图中所示的二次通孔25与一次通孔12同轴，也可能在一次通孔的绝缘材料内形成多个二次通孔，这些孔的轴与一次通孔长轴平行，并对称或非对称地分布在一次通孔轴周围。
如图1E所示，在二次通孔25中形成导电涂层或金属镀层26，该镀层从绝缘层22上表面28延伸到绝缘层24下表面30。该金属镀层延伸例如到上表面28和下表面30上，使通道表面具有在本领域熟知的环形特征。
图1F显示了用绝缘材料27填充的金属敷镀的二次通孔25和位于器件绝缘层22、24上的绝缘覆盖层上下表面32、34。然后，通道36是用光刻或激光割孔法打通覆盖层32和22以允许其与第一通孔12内的电馈通路18的金属镀层进行电接触。在覆盖层32内制备第二通道或孔38以允许其与第二通孔25的金属镀层26进行电接触。通道38和36可用本领域熟知的方法敷镀金属以实现与轴向通孔的电接触。
在器件10底部第一和第二通孔金属敷镀部分18和16的暴露可用与器件顶部金属敷镀部分的暴露相似的方式完成。
参看图2，图2示出了一个具有平行轴的多通道结构。图2中的结构与图1A-1F中相同的部分在相同的数字标号后加一字母“a”，图2显示了在通道12a内部具有平行轴的双通道20a。通道20a的表面提供金属镀层26a和电接触通道38a。
如图3所示，示出了在电路板或芯片载体上制备的三重同轴通道结构。图3中，带后缀字母“b”的数字标记部分与图1A-1F中的部分相同。一次通道12b的尺寸要足够大以容纳二次通道20b和三次通道和40及其相应的隔离绝缘层。一次通道12b、二次通道20b和三次40分别具有金属镀层18b、26b和42，相应地，分别通过通道36b、38b和44连接到表面线路。
在图2和3的器件中，可按与上述图1F的相同方式，实现与所述器件每个通道底面金属镀层的电接触。
实现或利用与单个敷镀金属层或多个通道的边沿或内部连接属于本
发明范围。
本发明的方法允许通过电子封装的绝缘层实现电接触，该电子封装可极大地提高层间输入/输出(I/O)密度。所述方法和所得结构极大地提高了信号通过绝缘层的电隔离。
得到的电馈通器件的上、下层具有类似在其平的表面间有绝缘层的多个环或堆垛环的表面特征。这些平的表面是贯穿绝缘层形成的导电金属通道的端面。对于X、Y接线，也可与这些端面直接进行连接。虽然，图1-3示出的通道(36、36a、36b和38、38a、38b)连接到各金属敷镀通道上，一些通道可以用来进行X、Y接线，而不必与载体10的外表面直接连接。
表1示出了具有相同间距的单通道和同全轴双通道的表面I/O密度/平方密耳的对比。1密耳＝0.001英寸。
表1
通道直径(密耳) 通道间距(密耳) *可能的同轴通道直径(内壁最小1密耳)(密耳) 方格尺寸(平方密耳) 单通道密度(I/O每平方密耳) 同轴通道密度(I/O每平方密耳)
 8  12  4  400  0.010  0.020
 6  12  4  324  0.012  0.025
 8  10  4  324  0.012  0.025
 6  10  4  256  0.016  0.031
 5  10  3  225  0.018  0.036
 4  10  2  196  0.020  0.041
 6  8  4  196  0.020  0.041
 5  8  3  169  0.024  0.047
 3  10  1  169  0.024  0.047
 2  10  0.5  144  0.028  0.056
 4  8  2  144  0.028  0.056
 3  8  1  121  0.033  0.066
 4  6  2  100  0.040  0.080
 2  8  0.5  100  0.040  0.080
 3  6  1  81  0.049  0.099
 2  6  0.5  64  0.063  0.125
 2  4  0.5  36  0.111  0.222
*假定在内部形成同轴通道后，剩余1密耳内壁为绝缘介质(即，不考虑外层金属敷镀层厚度)。
表1值得注意的是，比如，通道间距6密耳直径4密耳的单通道，有约0.04I/O/平方密耳的I/O密度。当通道直径为更易加工的8密耳时，通道直径分别为4和6密耳(4密耳通道位于6密耳通道中)的同轴双通道可获得与上述相同的I/O密度。如表1所示固定通道间距一定时，同轴双通道的I/O密度至少是单通道的2倍。
根据本发明，同轴通道组也提供更大的通道间隙用于通道间布线。这是使用本发明生产同轴通道的一个重要优点。
本发明解决了在高密度大有机电路板生产中遇到的另一个问题。通常，这些电路板内，有一个起加强并降低膨胀系数(TCE)作用的金属芯。为了制作从上表面到下表面的通道，需要制备直径常为2密耳那么小的许多孔。由于必须用激光工具取代钻孔设备，这是非常困难和昂贵的。本发明允许在电路板上制备数量小、直径大的孔，而得到相同的I/O密度。随后，可在大孔内填充的绝缘介质中制备同轴通道连接。这样可以提高制造自动化和降低成本。
为了提高信号隔离，信号通道通常被地和电压通道包围而形成一个电“笼”。这种屏蔽通道通常大大超过了实际对电和接地的需求，浪费空间。增加成本，又增加制备难度。根据本发明，使用单个大的同轴通道结构可以比接地通道或电压通道包围信号通道的典型电笼结构，占用更小的电路板空间并提供更好的信号隔离效果，所述结构的信号通道被一个外部接地地通道或信号通道包围。同时，还可以使用一个大的同轴三通道结构。生产更合理的同轴三通道结构，包括被电压通道(18b或26b)或接地通道(18b或26b)交替包围的信号通道42。此结构如图3所示。
虽然说明并描述了一些特定实施方案，但本发明并不局限于所述细节。以下权利要求进一步详细说明仍属本发明范围的多种变更。

Claims (4)

1.一种在印刷电路板或芯片载体中制作具有平行轴线的多个通道的方法，包括下列步骤：
(a)在所述电路板或芯片载体上提供一个一次通孔，所述一次通孔从所述电路板或芯片载体的上表面延伸到下表面；
(b)用金属敷镀该一次通孔以提供一个从所述电路板或芯片载体上表面到下表面的导电通道；
(c)在所述金属敷镀的通孔中填充或覆盖绝缘材料，并在所述上、下表面覆盖第一绝缘层；
(d)形成穿过所述一次通孔中的和所述上、下表面上的绝缘层的绝缘材料的至少两个二次通孔，这些二次通孔的长轴互相平行并且与所述一次通孔的长轴也平行，且这些二次通孔与所述一次通孔的金属镀层分隔开来且不接触；
(e)用金属敷镀所述二次通孔以在用所述第一绝缘层覆盖的所述上表面和所述下表面之间提供多个导电通道；
(f)用绝缘材料填充或涂覆所述被金属镀敷的二次通孔，并用第二绝缘层覆盖被所述第一绝缘层覆盖的所述上、下表面和所述二次通孔；以及
(g)除去覆盖所述电路板或芯片载体的上、下表面之一的所述绝缘材料的一部分，以与所述被金属镀敷的一次和二次通孔进行独立的电接触。
2.如权利要求1所述的方法，其特征在于包括，除去覆盖所述电路板或芯片载体上、下表面的绝缘材料的一部分，以与每个所述被金属镀敷的一次和二次通孔的两端面都进行独立的电接触。
3.如权利要求1所述的方法，其特征在于，所有绝缘层由聚合物材料形成。
4.如权利要求1所述的方法，其特征在于，所有绝缘层由陶瓷材料形成。
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