CN1264495A - 制备芯片-基片-连接的方法和设备 - Google Patents

制备芯片-基片-连接的方法和设备 Download PDF

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CN1264495A
CN1264495A CN98807229A CN98807229A CN1264495A CN 1264495 A CN1264495 A CN 1264495A CN 98807229 A CN98807229 A CN 98807229A CN 98807229 A CN98807229 A CN 98807229A CN 1264495 A CN1264495 A CN 1264495A
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scolder
composition
chip
ultralow
concentration
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CN1124645C (zh
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H·赖歇特
M·德克尔斯
R·詹纳
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Infineon Technologies AG
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Infineon Technologies AG
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    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
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Abstract

本发明涉及通过应用含至少二种金属成份X和Y的二组份或多组份焊料的合金或硬焊接制备一种芯片基片连接的方法和设备,其中第一成份X具有特别是金或这一类的贵金属,同时第二成份Y在焊接过程中通过反应或溶解进入应连接材料或料层中被消耗。焊料具有第二组份Y为一种超共熔的浓度。再者本发明涉及制备一种芯片基片连接的焊料,以及含一种在基片上通过制成合金或硬焊接固定的半导体芯片(1)的半导体器件。

Description

制备芯片-基片-连接的方法和设备
本发明涉及通过制成合金或使用含二种金属成份X和Y的一种焊料的硬焊制备一种芯片-基片-连接的方法和设备,其中第一种成分X特别是金或这一类的贵金属。再者本发明涉及制备一种芯片—基片-连接的一种焊料,以及在基片上通过制成合金或硬焊接固定着半导体芯片的半导体器件。
半导体芯片以其背面连接在基片上时,这些通称为芯片-或模片键合(Die-Bonding),必须按各个或共同的应用情况要求满足足够的机械强度和一个好的,热及电的传导性。芯片和基片的相容性起着一个特殊的作用,也就是说二种连接的参加者在热负荷时其膨胀系数应相适应。芯片的固定通常主要有三种不同的方法:制成合金(硬焊接),焊接(软焊接)和粘接。按所述发明优先使用的方法是制成合金或硬焊接;在Au(金)-Si(硅)-系统已知的焊接方法中在连接参加者的低熔点温度下将半导体芯片和基片制成一种低共熔的连接。这种温度下形成一种合金,此温度大大低于Au和Si单个组份的熔点。此温度不应高于会损坏半导体结构及其电性能。在合金制备过程中芯片和基片被加热到此种温度上,其时应用轻微压力,同时芯片为了改善接触在圆形的运动中受到磨擦。相应相图的液相-固相-曲线达到熔点时焊料为液态,焊接过程开始。由于费用原因加热过程一般很快,它不超过热力学的平衡状态。与此相反冷却过程即进行得慢多了。首先结晶出过剩的组份,直到凝固点时重新达到低共熔的混合比例。在低共熔的熔体凝固时二种组份分开结晶,这样凝固的低共熔物的结构显出均匀的分布着Si和Au结晶体。
芯片-基片经尽可能均匀的平整的连接和小的自身内应力,使芯片的断裂趋向最小值。连接的质量受焊料的液态性能和温差自身内应力、焊料凝固以及所需温度控制。
本发明的任务为提供制备芯片-基片连接的一种设备和一种方法,特别是通过制成合金或硬焊接以及提供适宜的焊料,使芯片断裂的危险性尽可能的小。
这些任务是由权利要求1的方法和由权利要求8的设备解决的。按本发明的焊料列于权利要求11中,应用按本发明的焊料制成半导体器件列于权利要求13中。
按本发明已规定的焊料是第二组份Y的超低共熔体的浓度。这里组份Y提供了二种或多组成焊料的组份,此组份的在焊接过程中通过反应或者熔解消耗在连接层中。此点也适用于多组份系统。
含超低共熔浓度锡的AuSn焊料提供了一种特别优越的低熔的焊料。AuSn焊料中Sn重量组份大于20%的焊料较优越。
本发明尤其具有下列优点。
-与已知的在晶片背面被蒸发的低共熔AuSi-或低共熔的AuGe-焊料比较,应用含超低共熔Sn-浓度的AuSn焊料将芯片合金化温度可缩小直到100℃,由此基本上缩小了热应力,从而缩小了芯片的断裂危险。从而本发明可使焊层有一较好的均匀性和浸润性。
-与低共熔的AuSn-焊料比较本发明突出的优点是提供了一较小的合金化温度。当涂层和安装Sn过程时低共熔的AuSn变少,因为AuSn和Si之间所需的阻挡层以及引线框表面(例如由银制成)在安装时Sn被接受。从而AuSn-焊料的熔融温度上升。特别是在溅射(工艺时),低共熔的AuSn在连接时所需的制成合金温度几乎与AuSi-制成合金的温度一样高。
-与环氧树脂-粘合比较本发明的优点是有较好的连接热传导,较好的连接均匀性和特别是安装中节约粘合剂和粘合过程。
-与预制形焊接比较本发明方法尤其是在安装中可节省费用。
优选方法是焊料沉淀在芯片背面上,特别是用溅射工艺。此点当然实现在由半导体芯片组合的晶片上,这样芯片的概念也包括组合在晶片中的芯片。
特别的优点是沉淀时应用的溅射靶具有X和Y以70∶30重量比的组成,也就是优选Au/Sn=70/30组成。焊层厚度约为1μm至约2μm,优选约1.5μm溅射在晶片背面上。
下面为本发明按图中所示实例进一步详细阐述。详情见下面示意图。
图1AuSn相图
图2A应用按本发明超低共熔的AuSn-焊料合金的半导体芯片在接线框上示意图和
图2B按图2A X-详情的放大剖面示意图。
如图1所示,AuSn系统的低共熔温度为278℃,同时Sn和Au(重量百分比)的相应组成此为20%-80%。形成合金的温度是,此温度远远低于各个组份的熔点。下列本发明的主要构思是应用一种含超低共熔浓度锡的AuSn焊料,AuSn焊料中Sn重量成份超过20%。从而在380℃下焊料是足够稀的液体用于SOT壳体的安装,由于Sn向邻近金属层扩散,AuSn在它的组成中由富锡相向低共熔点移动,从而防止了经低共熔混合物的,富金的焊料相。AuSn-混合物的熔点温度在Au-过量时上升很快,而在Sn-富有时熔点上升基本上较小。按本发明富Sn焊料通过Sn损失在焊接过程中将出现连续的熔点降低。它将有利于焊接过程。特别是在焊料-引线框(如银)接触处,这里出现贫Sn,局部出现熔点降低,它将改善焊料的流动性。由于此原因通过Sn过量供应在低温度下达到重复性好的安装条件。特别是在稀薄焊层时,如通常的在晶片背面涂层时,充分显露出此效应。
在图2A和2B中通过制成合金或硬焊接完成的一种半导体芯片1为连接提供在金属系统载体3的中心“小岛效应-Insel”2上。作为所谓的引线框的预制的金属系统载体,特别是应用塑料壳体时,提供了一种应用很广的基片形式。按2B放大的局部图进一步表示了详情。半导体芯片1的背面可见到附着的阻挡层或扩散障碍4,它优选Ti/Pt。参考数字5典型的表示薄片背面上厚度1.5μm的溅射焊层。而使芯片-基片-连接有足够低的欧姆,可能还需要一个掺杂层,例如AuAs层,或引入一种接触注入6。

Claims (13)

1.通过使用一种含至少二种金属成份X和Y的二种或多种组份焊料的合金或硬焊接制备芯片-基片-连接的方法,其中第一种成份X具有特别是金或这一类贵金属,同时第二种成份Y在焊接过程时经反应或溶解进入应连接的材料或料层中被消耗,其特征为,
焊料(5)具有第二种成份Y的一种超低共熔的浓度。
2.按权利要求1的方法,其特征为,
焊料第二种成份Y具有含一种超低共熔浓度的锡。
3.按权利要求1或2的方法,其特征为,
一种金-锡-连接(AuSn)作为含一种超低共熔的Sn浓度的焊料。
4.按权利要求3的方法,其特征为,
所使用的AuSn焊料中Sn的重量组成大于20%。
5.按权利要求1至4之一的方法,其特征为,
焊料沉淀在芯片(1)的背面上,特别是通过溅射。
6.按权利要求5的方法,其特征为,
在沉淀时所使用的溅射靶具有成份X与Y比例为70比30的重量组成。
7.按权利要求5或6的方法,其特征为,焊料涂复,特别是溅射在芯片(1)的背面上的厚度约为1μm至约为2μm,优选约1.5μm.
8.为淀积一种焊料到芯片(1)背面上作为薄层的设备,那些焊料是二组份或多组份的,并且至少含有二种金属的成份X和Y,其中第一成份X,特别是具有金或这一类的贵金属,其第二成份Y在焊接过程中通过反应或溶解被消耗在应连接的材料或料层中,其特征为,
溅射靶(Target)含有第二种成份Y的一种超低共熔的浓度。
9.按权利要求8的设备,其特征为,
焊料靶的第二种成份Y具有含有一种超低共熔的浓度的锡。
10.按权利要求9的设备,其特征为,
溅射靶具有成份X比Y为70比30的重量组成。
11.用于制备一种芯片基片连接的焊料,这种焊料是二种或多种组份的,并且至少是含二种金属成份X和Y,其中第一种成份X具有特别是金或这一类的贵金属,第二种成份Y在焊接过程中通过反应或溶解消耗到应连接材料或料层中,其特征为,
焊料具有第二成份Y的一种超低共熔浓度。
12.按权利要求10的焊料,其特征为,
焊料的第二成份Y为具有一超低共熔浓度的锡。
13.含一种在基片上通过合金或硬焊接固定的半导体芯片(1)的半导体器件,其特征为,焊料为了芯片基片连接是按权利要求11或12组成的,同时特别是以一种含有超低共熔的Sn浓度的金锡连接(AuSn)。
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US6338893B1 (en) 1998-10-28 2002-01-15 Ngk Spark Plug Co., Ltd. Conductive paste and ceramic printed circuit substrate using the same
US6245208B1 (en) 1999-04-13 2001-06-12 Governors Of The University Of Alberta Codepositing of gold-tin alloys

Cited By (4)

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CN101622706B (zh) * 2007-02-26 2011-05-18 株式会社新王材料 气密密封用盖、电子部件容纳用封装和电子部件容纳用封装的制造方法
CN103056465A (zh) * 2011-08-11 2013-04-24 西部数据(弗里蒙特)公司 焊接期间最小化零件偏移的方法
CN103056465B (zh) * 2011-08-11 2015-07-29 西部数据(弗里蒙特)公司 焊接期间最小化零件偏移的方法
CN102528199A (zh) * 2011-12-10 2012-07-04 中国振华集团永光电子有限公司 一种电子元器件密封封装的焊接方法

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US20070278279A1 (en) 2007-12-06
DE19730118A1 (de) 1999-01-21
GB0003104D0 (en) 2000-03-29
CN1124645C (zh) 2003-10-15
KR100454490B1 (ko) 2004-10-28
JP3609339B2 (ja) 2005-01-12
KR20010021856A (ko) 2001-03-15
GB2343551A (en) 2000-05-10
DE19730118B4 (de) 2006-01-12
GB2343551B (en) 2002-10-30
JP2001510941A (ja) 2001-08-07
US7442582B2 (en) 2008-10-28

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