CN1275803A - 半导体器件设计方法和装置,及存储有宏信息的存储介质 - Google Patents
半导体器件设计方法和装置,及存储有宏信息的存储介质 Download PDFInfo
- Publication number
- CN1275803A CN1275803A CN00109360A CN00109360A CN1275803A CN 1275803 A CN1275803 A CN 1275803A CN 00109360 A CN00109360 A CN 00109360A CN 00109360 A CN00109360 A CN 00109360A CN 1275803 A CN1275803 A CN 1275803A
- Authority
- CN
- China
- Prior art keywords
- grand
- circuit
- layout
- pad
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
Description
Claims (23)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15305799A JP3304920B2 (ja) | 1999-05-31 | 1999-05-31 | 半導体装置及びその設計装置と設計方法並びに半導体装置の配線情報を記憶した記憶媒体 |
JP153057/1999 | 1999-05-31 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1275803A true CN1275803A (zh) | 2000-12-06 |
CN1179409C CN1179409C (zh) | 2004-12-08 |
Family
ID=15554049
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB001093606A Expired - Fee Related CN1179409C (zh) | 1999-05-31 | 2000-05-30 | 半导体器件设计方法和装置 |
Country Status (5)
Country | Link |
---|---|
US (1) | US6505329B1 (zh) |
JP (1) | JP3304920B2 (zh) |
KR (1) | KR100376093B1 (zh) |
CN (1) | CN1179409C (zh) |
TW (1) | TW538345B (zh) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102024072A (zh) * | 2009-09-16 | 2011-04-20 | 鸿富锦精密工业(深圳)有限公司 | 高速串行信号撷取系统及方法 |
CN102831255A (zh) * | 2011-06-15 | 2012-12-19 | 扬智科技股份有限公司 | 芯片布局方法 |
CN103077272A (zh) * | 2012-12-31 | 2013-05-01 | 华为终端有限公司 | 一种屏蔽罩封装库的创建方法及装置 |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002124572A (ja) * | 2000-10-18 | 2002-04-26 | Mitsubishi Electric Corp | 自動配置配線装置及びそれを用いる配置配線方法 |
US6751783B1 (en) * | 2001-10-30 | 2004-06-15 | Lsi Logic Corporation | System and method for optimizing an integrated circuit design |
JP3887260B2 (ja) * | 2002-04-09 | 2007-02-28 | 沖電気工業株式会社 | 分圧抵抗のレイアウト方法 |
JP2004327960A (ja) * | 2003-04-11 | 2004-11-18 | Nec Electronics Corp | ハードマクロ及びこれを備える半導体集積回路 |
US20060184726A1 (en) * | 2005-02-11 | 2006-08-17 | Nokia Corporation | Flexible access and control of Dynamic Random Access Memory |
JP2008085019A (ja) * | 2006-09-27 | 2008-04-10 | Nec Electronics Corp | マクロセルブロック及び半導体装置 |
US7603642B2 (en) * | 2006-09-27 | 2009-10-13 | Cadence Design Systems, Inc. | Placer with wires for RF and analog design |
US10509757B2 (en) * | 2016-09-22 | 2019-12-17 | Altera Corporation | Integrated circuits having expandable processor memory |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62101047A (ja) | 1985-10-28 | 1987-05-11 | Toshiba Corp | ハ−ドマクロセルを有するlsi |
US4768016A (en) * | 1987-08-17 | 1988-08-30 | General Electric Company | Timing and control circuitry for flash analog to digital converters with dynamic encoders |
JPH079973B2 (ja) | 1990-11-07 | 1995-02-01 | 三菱電機株式会社 | 半導体集積回路装置 |
JPH0547973A (ja) | 1991-08-08 | 1993-02-26 | Sumitomo Electric Ind Ltd | 半導体チツプモジユール |
US5744991A (en) * | 1995-10-16 | 1998-04-28 | Altera Corporation | System for distributing clocks using a delay lock loop in a programmable logic circuit |
JPH09162661A (ja) | 1995-12-06 | 1997-06-20 | Denso Corp | 増幅回路 |
JP2968741B2 (ja) * | 1996-12-25 | 1999-11-02 | 日本電気アイシーマイコンシステム株式会社 | 半導体集積回路装置の配置方法 |
US5883814A (en) * | 1997-03-13 | 1999-03-16 | International Business Machines Corporation | System-on-chip layout compilation |
JPH10261718A (ja) | 1997-03-19 | 1998-09-29 | Hitachi Ltd | 半導体素子および設計支援装置 |
-
1999
- 1999-05-31 JP JP15305799A patent/JP3304920B2/ja not_active Expired - Fee Related
-
2000
- 2000-05-25 US US09/579,303 patent/US6505329B1/en not_active Expired - Lifetime
- 2000-05-26 TW TW089110338A patent/TW538345B/zh not_active IP Right Cessation
- 2000-05-29 KR KR10-2000-0028998A patent/KR100376093B1/ko not_active IP Right Cessation
- 2000-05-30 CN CNB001093606A patent/CN1179409C/zh not_active Expired - Fee Related
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102024072A (zh) * | 2009-09-16 | 2011-04-20 | 鸿富锦精密工业(深圳)有限公司 | 高速串行信号撷取系统及方法 |
CN102024072B (zh) * | 2009-09-16 | 2013-08-21 | 鸿富锦精密工业(深圳)有限公司 | 高速串行信号撷取系统及方法 |
CN102831255A (zh) * | 2011-06-15 | 2012-12-19 | 扬智科技股份有限公司 | 芯片布局方法 |
CN102831255B (zh) * | 2011-06-15 | 2014-12-24 | 扬智科技股份有限公司 | 芯片布局方法 |
CN103077272A (zh) * | 2012-12-31 | 2013-05-01 | 华为终端有限公司 | 一种屏蔽罩封装库的创建方法及装置 |
CN103077272B (zh) * | 2012-12-31 | 2015-11-25 | 华为终端有限公司 | 一种屏蔽罩封装库的创建方法及装置 |
Also Published As
Publication number | Publication date |
---|---|
KR20010029756A (ko) | 2001-04-16 |
JP3304920B2 (ja) | 2002-07-22 |
CN1179409C (zh) | 2004-12-08 |
US6505329B1 (en) | 2003-01-07 |
JP2000340753A (ja) | 2000-12-08 |
KR100376093B1 (ko) | 2003-03-29 |
TW538345B (en) | 2003-06-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C06 | Publication | ||
PB01 | Publication | ||
ASS | Succession or assignment of patent right |
Owner name: NEC ELECTRONICS TAIWAN LTD. Free format text: FORMER OWNER: NIPPON ELECTRIC CO., LTD. Effective date: 20030410 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20030410 Address after: Kanagawa, Japan Applicant after: NEC Corp. Address before: Tokyo, Japan Applicant before: NEC Corp. |
|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
ASS | Succession or assignment of patent right |
Owner name: ACER COMPUTER (CHINA) CO., LTD. Free format text: FORMER OWNER: BEIDA FANGZHENG SCIENCE + TECHNOLOGY COMPUTER SYSTEM CO., LTD., SHANGHAI Effective date: 20101101 |
|
C41 | Transfer of patent application or patent right or utility model | ||
COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: 200120 36/F, SHANGHAI INTERNATIONAL BUILDING, NO.360, PUDONG SOUTH ROAD, PUDONG NEW DISTRICT, SHANGHAI TO: 200001 3/F, NO.168, XIZANG MIDDLE ROAD, HUANGPU DISTRICT, SHANGHAI |
|
TR01 | Transfer of patent right |
Effective date of registration: 20101103 Address after: Kanagawa, Japan Patentee after: Renesas Electronics Corporation Address before: Kanagawa, Japan Patentee before: NEC Corp. |
|
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20041208 Termination date: 20160530 |
|
CF01 | Termination of patent right due to non-payment of annual fee |