CN1282994C - 利用铝的防止铜扩散膜的形成方法 - Google Patents

利用铝的防止铜扩散膜的形成方法 Download PDF

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CN1282994C
CN1282994C CNB021281874A CN02128187A CN1282994C CN 1282994 C CN1282994 C CN 1282994C CN B021281874 A CNB021281874 A CN B021281874A CN 02128187 A CN02128187 A CN 02128187A CN 1282994 C CN1282994 C CN 1282994C
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film
aluminium
copper
deposition
aluminum
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CN1430246A (zh
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李载皙
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DongbuAnam Semiconductor Inc
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76843Barrier, adhesion or liner layers formed in openings in a dielectric
    • H01L21/76846Layer combinations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76853Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76855After-treatment introducing at least one additional element into the layer
    • H01L21/76856After-treatment introducing at least one additional element into the layer by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53238Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

本发明提供一种利用铝的防止铜扩散膜的形成方法。本发明在绝缘体上沉积(deposition)薄的铝(Al)膜后,在上述铝膜表面上用NH3进行等离子体处理(plasmatreatment),变形为以氮化铝(AlxNy)为基础的氮化膜,在上述氮化膜表面上沉积铝(Al)膜,并在沉积后的表面膜上沉积铜(Cu)。因此,具有以下效果,由抑制铜的扩散,解决了高集成化引起的金属(metal)间的间距(pitch)越减少金属线间的铜扩散等越引起必须考虑的泄漏(leakage)问题。

Description

利用铝的防止铜扩散膜的形成方法
技术领域
本发明涉及一种利用铝的防止铜扩散膜的形成方法,尤其是涉及CMP(chemical mechanical polishing,CMP)工序过程中,在绝缘体上沉积(deposition)薄的第一铝膜后,使上述第一铝膜表面变形为以氮化铝(下面称为AlxNy)为基础的氮化膜,之后,在其上再沉积第二铝膜,并在上述第二铝膜上沉积铜来形成防止铜扩散膜的方法。
背景技术
通常,在CMP工序过程中,实际上在半导体布线材料中利用铜(copper)来作为电传导率低以减少电阻电容(RC)延迟的金属化(metalization)材料。
这种铜经镶嵌(damascene)法沉积后经过CMP工序,图1a至图1b是图示按照现有技术形成防止铜扩散膜的方法,其中铜通过电镀沉积,接着进行传统的CMP工艺,其未在图中示出。若形成绝缘体(dirlectric)(S1)图案,则利用等离子体沉积(plasma deposition),由钛(Ti)、氮化钛(TiN)、钽(Ta)、氮化钽(TaN)(S2)等覆盖防止铜膜后,用电镀法沉积铜(S3)后进行处理CMP工序过程。
但是,由于铜在半导体中利用的基本所有材料中,扩散系数高而变为使晶体管特性降低的主要原因,因此为了抑制了铜的扩散,研究使用了各种各样的防止扩散膜,另外,还存在因高集成化引起的金属间(metal)的间距(pitch)越减少金属线间的铜扩散等越引起必须考虑的泄漏(leakage)问题。
发明内容
本发明是为解决上述问题而提出的,其目的在于提供一种在绝缘体上沉积(deposition)第一铝膜后,在所述第一铝膜表面上用NH3或N2进行等离子体处理(plasma treatment),使所述第一铝膜表面变形为AlxNy基础的氮化膜,之后,在其上再沉积第二铝膜,并在所述第二铝膜上沉积铜来形成防止铜扩散膜的利用铝的防止铜扩散膜的形成方法。
为了实现上述目的,本发明中,利用铝的防止铜扩散膜的形成方法包括:在绝缘体上沉积(deposition)薄的铝(Al)膜的第一阶段;在通过第一阶段沉积的铝膜表面上用NH3或N2进行等离子体处理(plasma treatment),使所述铝膜的表面变形为AlxNy基础的氮化膜的第二阶段;在所述氮化膜表面上沉积铝(Al)膜的第三阶段;和在通过第三阶段沉积的表面膜上沉积铜(Cu)的第四阶段。
下面,根据从参照本发明最佳实施例的下述说明可明确以上本发明的目的和其它特征及优点。
附图说明
图1是图示按照现有技术形成防止铜扩散膜的方法,其中铜通过电镀沉积,接着进行传统的CMP工艺,其未在图中示出;及
图2是图示按照本发明利用铝形成防止铜扩散膜的方法,其中可在沉积铜后进行传统的CMP工序,这未在图中示出。
具体实施方式
下面,参照附图来详细说明本发明的实施例。
图2a至图2d是图示按照本发明利用铝形成防止铜扩散膜的方法,其中可在沉积铜后进行传统的CMP工序,这未在图中示出。该过程包括:在绝缘体(S1)上沉积(deposition)薄的铝膜(Al)(S4)的过程;在上述铝膜(S4)表面上用NH3或N2进行等离子体处理(plasma treatment),使上述铝膜(S4)的表面变形为AlxNy基础的氮化膜(S5)的过程;在变形为氮化膜的表面上沉积铝(Al)(S6)膜的过程;和在用铝膜(S6)沉积的表面膜上沉积铜(Cu)(S7)的过程。
以上述工序过程为基础,更详细说明本发明利用铝形成铜(Cu)防止扩散膜的过程。
首先,如图2a所示,在绝缘体(Dielectric)(S1)上沉积(deposition)薄的铝膜(Al)(S4)。在此,铝膜(S4)是通过溅射(sputtering)法或CVD(chemical vapordeposition)法沉积的小于100的薄膜。
接着,如图2b所示,在上述铝膜(S4)的表面上用NH3(S5)或N2进行等离子体处理(plasma treatment)并将上述铝膜(S4)的表面变形为AlxNy基础的氮化膜(S5)。
接着,如图2c所示,在上述氮化膜(S5)的表面上沉积铝(Al)(S6)膜。在此,上述铝(S6)膜是通过溅射(sputtering)法或CVD(chemical vapor deposition)法沉积的小于100的薄膜。
最后,如图2d所示,在沉积铝(S6)膜的表面膜上沉积铜(Cu)S7来形成防止铜扩散膜。
因此,本发明的效果在于:通过在绝缘体上沉积(deposition)薄的铝膜后,在上述第一铝膜表面上用NH3或N2进行等离子体处理(plasma treatment),使上述第一铝膜的表面变形为AlxNy基础的氮化膜,之后,在其上沉积第二铝膜并在上述第二铝膜表面上沉积铜(Cu),由抑制铜的扩散解决高集成化引起的金属(metal)间的间距(pitch)越减少金属线间的铜扩散等越引起必须考虑的泄漏(leakage)问题。
上面通过实施例详细说明了本发明,但本发明不限于实施例,具有本发明所属技术领域基本常识的人员不脱离本发明的思想和精神就可修正或变更本发明。

Claims (2)

1、一种利用铝的防止铜扩散膜的形成方法,通过化学机械抛光工序过程形成防止铜扩散膜,其特征在于:包括:
在绝缘体上沉积第一铝膜的第一阶段;
在所述第一铝膜表面上用NH3或N2进行等离子体处理,使所述第一铝膜的表面变形为氮化铝基础的氮化膜的第二阶段;
在所述氮化膜表面上沉积第二铝膜的第三阶段;和
在所述第二铝膜表面上沉积铜的第四阶段。
2、如权利要求1所述的利用铝的防止铜扩散膜的形成方法,其特征在于:所述铝膜是通过溅射法或化学气相沉积法沉积,其厚度小于100。
CNB021281874A 2001-11-28 2002-11-28 利用铝的防止铜扩散膜的形成方法 Expired - Fee Related CN1282994C (zh)

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Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7420275B1 (en) 2003-09-24 2008-09-02 Novellus Systems, Inc. Boron-doped SIC copper diffusion barrier films
US6967405B1 (en) * 2003-09-24 2005-11-22 Yongsik Yu Film for copper diffusion barrier
US7282438B1 (en) 2004-06-15 2007-10-16 Novellus Systems, Inc. Low-k SiC copper diffusion barrier films
KR20060081470A (ko) * 2005-01-07 2006-07-13 삼성전자주식회사 박막트랜지스터 기판과 그 제조방법
CN100392145C (zh) * 2005-12-21 2008-06-04 上海工程技术大学 真空蒸镀制备铝-铜-铁准晶涂层的方法
US7915166B1 (en) 2007-02-22 2011-03-29 Novellus Systems, Inc. Diffusion barrier and etch stop films
US8173537B1 (en) 2007-03-29 2012-05-08 Novellus Systems, Inc. Methods for reducing UV and dielectric diffusion barrier interaction
US8124522B1 (en) 2008-04-11 2012-02-28 Novellus Systems, Inc. Reducing UV and dielectric diffusion barrier interaction through the modulation of optical properties
US8247332B2 (en) * 2009-12-04 2012-08-21 Novellus Systems, Inc. Hardmask materials
US10832904B2 (en) 2012-06-12 2020-11-10 Lam Research Corporation Remote plasma based deposition of oxygen doped silicon carbide films
US10325773B2 (en) 2012-06-12 2019-06-18 Novellus Systems, Inc. Conformal deposition of silicon carbide films
US9234276B2 (en) 2013-05-31 2016-01-12 Novellus Systems, Inc. Method to obtain SiC class of films of desired composition and film properties
US10211310B2 (en) 2012-06-12 2019-02-19 Novellus Systems, Inc. Remote plasma based deposition of SiOC class of films
US9337068B2 (en) 2012-12-18 2016-05-10 Lam Research Corporation Oxygen-containing ceramic hard masks and associated wet-cleans
KR101366367B1 (ko) * 2013-01-25 2014-02-24 박종익 전력용 반도체 모듈의 구리층 형성방법
US10297442B2 (en) 2013-05-31 2019-05-21 Lam Research Corporation Remote plasma based deposition of graded or multi-layered silicon carbide film
US20160314964A1 (en) 2015-04-21 2016-10-27 Lam Research Corporation Gap fill using carbon-based films
CN106898582B (zh) * 2015-12-18 2019-05-31 株洲南车时代电气股份有限公司 一种半导体器件金属薄膜结构及其制作方法
US9806018B1 (en) 2016-06-20 2017-10-31 International Business Machines Corporation Copper interconnect structures
US10002787B2 (en) 2016-11-23 2018-06-19 Lam Research Corporation Staircase encapsulation in 3D NAND fabrication
US9837270B1 (en) 2016-12-16 2017-12-05 Lam Research Corporation Densification of silicon carbide film using remote plasma treatment

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR960030372A (ko) * 1995-01-05 1996-08-17 김주용 반도체 소자의 금속배선 형성방법
US5892282A (en) * 1995-05-31 1999-04-06 Texas Instruments Incorporated Barrier-less plug structure
KR100336655B1 (ko) * 1995-12-15 2002-11-07 주식회사 하이닉스반도체 반도체 소자의 금속 배선 형성방법
US5892281A (en) * 1996-06-10 1999-04-06 Micron Technology, Inc. Tantalum-aluminum-nitrogen material for semiconductor devices
KR100269878B1 (ko) * 1997-08-22 2000-12-01 윤종용 반도체소자의금속배선형성방법
KR19990031430A (ko) * 1997-10-10 1999-05-06 구본준 반도체 소자의 제조 방법
US6391769B1 (en) * 1998-08-19 2002-05-21 Samsung Electronics Co., Ltd. Method for forming metal interconnection in semiconductor device and interconnection structure fabricated thereby
US6362526B1 (en) 1998-10-08 2002-03-26 Advanced Micro Devices, Inc. Alloy barrier layers for semiconductors
KR20000043059A (ko) * 1998-12-28 2000-07-15 김영환 반도체 소자의 금속 배선 형성 방법
EP1075019A4 (en) * 1999-02-15 2003-01-29 Asahi Glass Co Ltd INTEGRATED CIRCUIT DEVICE AND MANUFACTURING METHOD
KR20010009022A (ko) * 1999-07-01 2001-02-05 최시영 차세대 집적회로 배선공정용 동박막의 일렉트로마이그레이션향
US6441492B1 (en) 1999-09-10 2002-08-27 James A. Cunningham Diffusion barriers for copper interconnect systems
US6271136B1 (en) 2000-04-04 2001-08-07 Taiwan Semiconductor Manufacturing Company Multi-step plasma process for forming TiSiN barrier
KR100398038B1 (ko) * 2000-12-18 2003-09-19 주식회사 하이닉스반도체 반도체 소자의 금속 배선 형성 방법
KR20020053190A (ko) * 2000-12-27 2002-07-05 박종섭 반도체 제조 공정의 확산 방지막 형성 방법

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CN1430246A (zh) 2003-07-16
TW200409186A (en) 2004-06-01
JP2003297836A (ja) 2003-10-17
US6790767B2 (en) 2004-09-14
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