CN1348570A - 通过滚压制造无触点卡的方法及用该方法制造的无触点卡 - Google Patents
通过滚压制造无触点卡的方法及用该方法制造的无触点卡 Download PDFInfo
- Publication number
- CN1348570A CN1348570A CN00806628A CN00806628A CN1348570A CN 1348570 A CN1348570 A CN 1348570A CN 00806628 A CN00806628 A CN 00806628A CN 00806628 A CN00806628 A CN 00806628A CN 1348570 A CN1348570 A CN 1348570A
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- CN
- China
- Prior art keywords
- sheet material
- cover sheets
- chip
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- sheet
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/0772—Physical layout of the record carrier
- G06K19/07722—Physical layout of the record carrier the record carrier being multilayered, e.g. laminated sheets
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07745—Mounting details of integrated circuit chips
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05571—Disposition the external layer being disposed in a recess of the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05573—Single external layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
Abstract
Description
Claims (6)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR99/05479 | 1999-04-29 | ||
FR9905479A FR2793054B1 (fr) | 1999-04-29 | 1999-04-29 | Procede de fabrication de cartes sans contact par laminage et carte sans contact fabriquee selon un tel procede |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1348570A true CN1348570A (zh) | 2002-05-08 |
CN1204529C CN1204529C (zh) | 2005-06-01 |
Family
ID=9545055
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB008066280A Expired - Lifetime CN1204529C (zh) | 1999-04-29 | 2000-04-28 | 通过滚压制造无触点卡的方法及用该方法制造的无触点卡 |
Country Status (10)
Country | Link |
---|---|
US (1) | US6745945B1 (zh) |
EP (1) | EP1185955B1 (zh) |
JP (1) | JP2002543537A (zh) |
CN (1) | CN1204529C (zh) |
AT (1) | ATE250785T1 (zh) |
BR (1) | BRPI0010010B1 (zh) |
DE (1) | DE60005511T2 (zh) |
ES (1) | ES2208314T3 (zh) |
FR (1) | FR2793054B1 (zh) |
WO (1) | WO2000067199A1 (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100447969C (zh) * | 2003-12-26 | 2008-12-31 | 神钢电机株式会社 | Ic芯片安装体的制造方法以及制造装置 |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1582515A (zh) | 2001-12-10 | 2005-02-16 | 弗拉克托斯股份有限公司 | 无触点识别装置 |
AU2002340506A1 (en) | 2002-11-07 | 2004-06-07 | Fractus, S.A. | Integrated circuit package including miniature antenna |
JP3739752B2 (ja) * | 2003-02-07 | 2006-01-25 | 株式会社 ハリーズ | ランダム周期変速可能な小片移載装置 |
JP4512389B2 (ja) * | 2004-03-15 | 2010-07-28 | 株式会社岩田レーベル | 薬液容器用分割ラベル |
JP2005258350A (ja) * | 2004-03-15 | 2005-09-22 | Iwata Label Co Ltd | 分割ラベル |
US7573390B2 (en) * | 2004-03-15 | 2009-08-11 | Iwata Label Co., Ltd. | Split-able label |
GB0405844D0 (en) * | 2004-03-16 | 2004-04-21 | Advanced Micropackaging Techno | "Microelectronic and optoelectronic device packaging" |
EP1771919A1 (en) | 2004-07-23 | 2007-04-11 | Fractus, S.A. | Antenna in package with reduced electromagnetic interaction with on chip elements |
DE602005024861D1 (de) * | 2004-12-03 | 2010-12-30 | Hallys Corp | Zwischenglied-bondierungseinrichtung |
WO2006059731A1 (ja) * | 2004-12-03 | 2006-06-08 | Hallys Corporation | 電子部品の製造方法、及び電子部品の製造装置 |
WO2006109678A1 (ja) | 2005-04-06 | 2006-10-19 | Hallys Corporation | 電子部品の製造装置 |
US20090166431A1 (en) * | 2005-04-18 | 2009-07-02 | Hallys Corporation | Electronic component and manufacturing method thereof |
US8196829B2 (en) * | 2006-06-23 | 2012-06-12 | Fractus, S.A. | Chip module, sim card, wireless device and wireless communication method |
DE102008035522A1 (de) | 2008-07-30 | 2010-02-04 | Mühlbauer Ag | Verfahren zur Herstellung einer Vorrichtung zur drahtlosen Kommunikation bzw. eines Prelaminats für eine solche Vorrichtung |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE59502482D1 (de) * | 1994-11-03 | 1998-07-16 | Fela Holding Ag | Basis Folie für Chip Karte |
JP2814477B2 (ja) * | 1995-04-13 | 1998-10-22 | ソニーケミカル株式会社 | 非接触式icカード及びその製造方法 |
FR2756955B1 (fr) * | 1996-12-11 | 1999-01-08 | Schlumberger Ind Sa | Procede de realisation d'un circuit electronique pour une carte a memoire sans contact |
-
1999
- 1999-04-29 FR FR9905479A patent/FR2793054B1/fr not_active Expired - Fee Related
-
2000
- 2000-04-28 ES ES00922778T patent/ES2208314T3/es not_active Expired - Lifetime
- 2000-04-28 WO PCT/FR2000/001136 patent/WO2000067199A1/fr active IP Right Grant
- 2000-04-28 BR BRPI0010010A patent/BRPI0010010B1/pt active IP Right Grant
- 2000-04-28 US US10/030,322 patent/US6745945B1/en not_active Expired - Fee Related
- 2000-04-28 CN CNB008066280A patent/CN1204529C/zh not_active Expired - Lifetime
- 2000-04-28 EP EP00922778A patent/EP1185955B1/fr not_active Expired - Lifetime
- 2000-04-28 DE DE60005511T patent/DE60005511T2/de not_active Expired - Fee Related
- 2000-04-28 AT AT00922778T patent/ATE250785T1/de not_active IP Right Cessation
- 2000-04-28 JP JP2000615964A patent/JP2002543537A/ja not_active Abandoned
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100447969C (zh) * | 2003-12-26 | 2008-12-31 | 神钢电机株式会社 | Ic芯片安装体的制造方法以及制造装置 |
Also Published As
Publication number | Publication date |
---|---|
CN1204529C (zh) | 2005-06-01 |
ES2208314T3 (es) | 2004-06-16 |
ATE250785T1 (de) | 2003-10-15 |
BRPI0010010B1 (pt) | 2016-09-06 |
EP1185955B1 (fr) | 2003-09-24 |
US6745945B1 (en) | 2004-06-08 |
JP2002543537A (ja) | 2002-12-17 |
DE60005511T2 (de) | 2004-06-17 |
WO2000067199A1 (fr) | 2000-11-09 |
FR2793054B1 (fr) | 2001-06-29 |
DE60005511D1 (de) | 2003-10-30 |
BR0010010A (pt) | 2002-04-09 |
EP1185955A1 (fr) | 2002-03-13 |
FR2793054A1 (fr) | 2000-11-03 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C56 | Change in the name or address of the patentee |
Owner name: AXALTO CO., LTD. Free format text: FORMER NAME OR ADDRESS: SCHLUMBERGER SYSTEMS |
|
CP03 | Change of name, title or address |
Address after: Monte Carlo, France Patentee after: Axalto S. A. Address before: Monte Carlo, France Patentee before: Schlumberger Industries |
|
C56 | Change in the name or address of the patentee |
Owner name: SETEC OY Free format text: FORMER NAME: AXALTO SA |
|
CP03 | Change of name, title or address |
Address after: East France Patentee after: Gemalto Sa Address before: Monte Carlo, France Patentee before: Axalto S. A. |
|
CX01 | Expiry of patent term |
Granted publication date: 20050601 |
|
CX01 | Expiry of patent term |