CN1489788A - 用于半导体器件的非铸模封装 - Google Patents

用于半导体器件的非铸模封装 Download PDF

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CN1489788A
CN1489788A CNA028044363A CN02804436A CN1489788A CN 1489788 A CN1489788 A CN 1489788A CN A028044363 A CNA028044363 A CN A028044363A CN 02804436 A CN02804436 A CN 02804436A CN 1489788 A CN1489788 A CN 1489788A
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substrate
pier
semiconductor device
soldered ball
basic layer
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CN100352047C (zh
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R・乔希
R·乔希
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Fairchild Semiconductor Corp
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Abstract

一种不包括铸模体即封装的半导体器件。该半导体器件包括基片(12)和连接到基片的墩台(11)。在设想为MOS场效应晶体管类型时，该墩台是这样连接到基片的，使得墩台的源极如栅极区被连接到基中。焊球(13)是这样被连接到与墩台相邻的，使得当半导体器件被连接到印刷电路板时，墩台的曝露表面用作漏极的连接，而焊球则用作源极和栅极的连接。

Description

用于半导体器件的非铸模封装
技术领域
本发明涉及一种半导体器件封装，具体地说，涉及一种用于不需要铸模体的半导体器件封装。
背景技术
一般，半导体器件，特别是MOS场效应晶体管，需要有具有良好热性能的非常低的封装电阻(RDSon)。通常，它还需要有简单、快速而又有效的方法来封装半导体器件。因此，在现有的技术中，已经发展了许多封装想法和方法。
一种这样的封装设想的一个例子包含有球栅极阵列(ball grid arrayBGA)。这样一种想法包含源极栅极阵列和直接连接到印刷电路板(PCB)上的栅极漏极焊球。这就需要一个凸出墩台和用来便于漏极接触的引线框，另一封装想法是一般被称之为导入铸模封装中的反装晶片(Flip chip in beadedMolded Package，FLMP)，它包括铸模的导入表面安装封装，在这封装上把凸出的墩台连接到框架的栅极和源极的漏极点。在墩台背侧的漏极从铸模综合体即本体上曝露出来，并通过标准线路板安装工艺过程中的焊料回流被连接到PCB。另外的封装想法使用铜带和/或金属线焊接技术。
这些现有技术的想法牵涉到各种组成部分，并可能导致复杂的制作(封装)工艺。
发明内容
本发明提供一种半导体器件，它包括基片和连接到基片的墩台，又把多个焊球连接到与墩台相邻的基片。当半导体器件连接到印刷电路板时，焊球与墩台的表面基本上是共面的。因此，在半导体器件是MOS场效应晶体管的情况下，当半导体器件被连接到PCB时，不与基片连接的墩台表面用作直接的漏极连接，而基片和焊球用作源极和栅极的连接。
按照本发明的一个方面，基片包括基本层金属层和在基本层和金属之间的绝缘层。
按照本发明的另一个方面，该基本层包括金属化的图形，而该金属层包括另一金属化的图形用作热播散器。
按照本发明的还有一个方面，基本层是金属化的陶瓷片。
按照本发明的另一个方面，该基片包括两层金属化的陶瓷片，这两层可便于把两个墩台(硅)附着在相对的面上。
本发明也提供一种包括提供基片和墩台的封装半导体器件的方法。在MOS场效应晶体管中的焊料或任何适合的导电性内部连接至少被放在基片和墩台中的一个上，而该墩台是被反装到基片上的。然后把该焊球放在与墩台相邻的基片上。
本发明的特点和优点将通过结合参考附图，在阅读并理解列于下文的较佳示范性实施例的详细描述后理解。在附图中，相同数字代表相同的元件。
附图说明
图1是根据本发明半导体器件的平面图；
图2是示于图1半导体器件的沿直线A-A所见到的侧截面图；
图3是根据本发明另一个半导体器件的平面图；
图4是示于图3半导体器件的沿直线B-B所见到的侧截面图；
图5是根据本发明替换实施例的侧截面图。
具体实施方式
图1示出半导体器件的一个MOS场效应晶体管10，它包括墩台11，基片12和焊球13。该基片包括栅极区14。
正如在图2中见到的，该基中较佳地包括基本层20，和顶部金属层21。基本层和顶部金属层由绝缘层22所分开，较佳的是把这两层连接起来的绝缘外延层。基本材料较佳的是包括金属化图形，而顶部金属层较佳的是包括另一金属化图形，金属层也可用作热播散器。
墩台较佳的是用高温焊浆连接到基片，但是也可用在本技术领域中知道的任何合适的导电性内连来连接。把焊球放在墩台对面的侧面上与墩台邻近，其中至少把一个焊球放在基片的栅极区上。
因此，在使用时，把半导体器件放在印刷电路板上并用焊浆或合适的导电性内连把墩台的表面直接连接到PCB，从而用作漏极连接。连接到基片的墩台表面包括墩台的栅极区和源极区。因此，在基片栅极区中的焊球用来把墩台的栅极区连接到PCB而余下的焊球通过基片把墩台的源极区连接到PCB。从而，基片的栅极区与基片的其余部分是电绝缘的。
制作即封装这样一种半导体器件的方法包括把焊浆放在基片和墩台中的一个并把墩台附着于基片的反装晶片上。然后，较佳的是要测试这种组合。于是平整该半导体器件并对该半导体器件再测试。
要把焊球放到这样的高度，使得当把半导体器件连接到PCB时，该焊球基本上与墩台漏极表面是共面的，从而，使半导体器件能嵌平在PCB上。
在一替换的实施例上，不把焊球放在半导体器件上，而宁可是在PCB上，于是半导体器件就向该向被连接。
参考图3，示出了根据本发明半导体器件的一替换实施例。在这实施例中，基片包括金属化的陶瓷片。用于该基片的材料例子包括被绝缘的金属基片。
在这样的实施例中，墩台的曝露表面用作到PCB的漏极连接，而焊球则用作到PCB的栅极和源极的连接。
示于图3和图4的器件是用参考示于图1和2的半导体器件在上面描述的类似方式制作的。
因此，本发明提供一种半导体器件，这种器件提供改良的器件散热，由于墩台的背面直接焊接到PCB，而MOS场效应晶体管的源极和栅极较佳的是通过高温焊浆焊到基片上。因此，墩台不需要凸出的墩台，而宁可说是需要象，例如具有金属外层的化学镀镍(或电解镍)的可焊的顶部金属层表面。而且，由于它不涉及象金属丝焊接，铸模，去除模锻毛边，整平和形成以及电镀的专用操作的形成因素，所以组装工艺被显著地简化。此外，由于焊球在设计过程中是可移动的，所以对于半导体布置的迹印现在是可变换。
正如在图5中所见到的，本发明也可在高密度封装方案中(在基片12的每个侧面上有多于一个墩台能容易地组合多于两个墩台11a，b。在这样做的时候，可以在不用表面安装封装制造的常规方法下获得一个高密度集成的简易方法，而它是与诸如铸模，去除模锻毛边，整平和形成加工无关的形成因素。基片包括两层金属化的陶瓷片，用绝缘层把它们分开或相反用电的方法来隔离。因此，焊球的位置决定于每个墩台的源极和栅极的连接。如果要想把墩台11b的漏极连接到PCB，则可采用诸如金属焊接的已知技术。
虽然本发明已经引用专门的实施例作了描述，但要体会到，本发明在附加权利要求书的范围内覆盖了所有的修改和等价技术方案。

Claims (10)

1.一种半导体器件，其特征在于，包括：
基片；
连接到基片的墩台；以及
连接到基片的，与墩台相邻的多个焊球，当该半导体器件连接到印刷电路板时，该焊球与墩台的一个平面基本上是共面的。
2.如权利要求1所述的半导体器件，其特征在于，其中基片包括基本层、金属层和在该基本层和金属层之间的绝缘层。
3.如权利要求2所述的半导体器件，其特征在于，其中基本层包括金属化的图形，而金属层包括第二金属化图形。
4.如权利要求1所述的半导体器件，其特征在于，其中基本层包括金属化的陶瓷片。
5.如权利要求4所述的半导体器件，其特征在于，其中金属化陶瓷片包括至少一层金属层。
6.一种封装半导体器件的方法，其特征在于，该方法包括：
提供基片；
提供墩台，
把焊料放在基片和墩台中的至少一个上；
把墩台反装到基片上；以及
把焊球放在与墩台相邻的基片上。
7.如权利要求6所述的方法，其特征在于，还包括：
测试该墩台，基片和焊球的组合；
整平基片，以及
再测试该墩台、基片和焊球的组合。
8.如权利要求6所述的方法，其特征在于，还包括提供第二墩台，把焊料放在基片和第二墩台中的一个上，并把第二墩台连接到基片上。
9.如权利要求1所述的半导体器件，其特征在于，还包括在连接第一墩台表面的对面表面上的连接到基片的第二墩台。
10.一种封装半导体器件的方法，其特征在于，该方法包括：
提供基片；提供墩台；同时用焊料把墩台连接到基片并把焊球放在与墩台相邻的基片上；以及使焊料和焊球回流。
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CN100352047C (zh) 2007-11-28
CN101154607A (zh) 2008-04-02
JP2004521493A (ja) 2004-07-15
US20050280161A1 (en) 2005-12-22

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