CN1494739A - 制造包括硅和低温共烧陶瓷的电子学器件的方法和用该方法产生的器件 - Google Patents

制造包括硅和低温共烧陶瓷的电子学器件的方法和用该方法产生的器件 Download PDF

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CN1494739A
CN1494739A CNA018221300A CN01822130A CN1494739A CN 1494739 A CN1494739 A CN 1494739A CN A018221300 A CNA018221300 A CN A018221300A CN 01822130 A CN01822130 A CN 01822130A CN 1494739 A CN1494739 A CN 1494739A
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parts
cooling structure
electronics device
anodic bonding
microfluid
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���ϡ�T���ɿ�
兰迪·T·派克
��M��ţ��
查尔斯·M·牛顿
÷
卡罗尔·格梅伦
C����ķ�߿���˹
雷蒙德·C·拉姆弗
贝蒂·奥多德
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Harrier Inc
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Harrier Inc
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Abstract

制造一种电子学器件的方法，包括把第一和第二部件位置放好以使其对应表面互相接触，该第一部件包含硅而该第二部件包含一种低温共烧陶瓷(LTCC)材料。该方法还包括把第一和第二部件的相对表面阳极接合在一起以在其间形成密封封接。该阳极接合在二个部件之间提供一种可靠及强的结合而没有用粘结剂。该方法还包括在第一和第二部件的至少一个部件内形成至少一个冷却结构。该至少一个冷却结构包含在第一部件内的至少一个第一微流体冷却结构，以及第二部件内和该至少第一微流体冷却结构对齐的至少一个第二微流体冷却结构。

Description

制造包括硅和低温共烧陶瓷的电 子学器件的方法和用该方法产生的器件
本发明的领域
本发明涉及电子学器件和制造方法的领域，更具体地讲，涉及诸如包括封装集成电路这样的制造方法和器件。
本发明的背景
集成电路在许多种电子学设备中被广泛应用。一个集成电路可以包括一片硅衬底，其中形成诸如晶体管等许多有源器件。通常也要求在一个提供保护并允许外部电连接的封装内支持一个或更多个这样的集成电路。
因为在典型的集成电路上有源器件的密度已经增加，所产生热量的消散已变得日益重要。设计者已在微机电(MEMS)技术的基础上发展了用于集成电路的各种冷却技术。
例如，如图1所示，一种已有技术的电子学器件10包括一个封装组件11，它包括包含硅的第一部件12和包含低温共烧陶瓷(lowtemperature co-fired ceramic)(LTCC)材料的第二部件14。第一部件12可以包括12层堆叠的硅衬底12a，12b，其中形成微流体冷却器的各种元件。例如，如图中实施方案所示，可以有一个蒸发器16和一个冷凝器17，它们通过在硅衬底12a，12b之间形成的一个或更多微流体沟槽或通道21相互连接起来。用一个或更多个微机电泵(这在图中没有画出)使冷却流体循环。
第二部件14也可以包括几个LTCC层14a，14b，它们如在图中实施方案所示那样叠合起来。该第二部件14还示例性地承载着一个集成电路22，如一个绝缘栅双极晶体管(IGBT)或其他通常要产生可观多余热量的集成电路。第二部件14还包括外部连接23，它通过图中的导线25连接到集成电路22的电连接24上。
如图2的放大图中所示，集成电路22被安装在第二部件14的安装凹口27内。邻近集成电路22可以有一系列通过LTCC部件14的微流体通道30，向集成电路提供冷却流体。
LTCC部件14和硅部件12通常用如图所示的粘结层31把它们粘结在一起。通常用热塑的和/或热固的粘结剂。也可以用金属层，遗憾的是粘结剂层31有很多缺点。粘结剂层31通常不能提供在硅和LTCC之间界面处密封的封接，因而冷却流体可以被流失。另外，粘结剂层31还可以形成另外一层热量必须通过的层。当然，可能难于提供这么一层粘结剂层31，它是均匀的，它没有伸入界面，从而没有堵住或限制冷却液体的流动。换言之，这样一层粘结剂层31遗憾地只提供了部件之间非密封和非均匀的结合。
给Ohman的美国专利号5,443,890，公布了一种对两个相邻部件之间形成的微射流沟槽的抗漏密封。用一个密封槽，其中充以液态密封材料，把它压入相对部件的邻近表面部分。提供这样一种密封结构需要附加的制造步骤，因而对于许多应用可能是不合适的。
发明概述
根据上述背景，因而本发明的一个目的是提供一种方法和相关的电子学器件，其中LTCC部件和硅部件是接合在一起以形成具有均匀结合的密封封接。
按照本发明的此目的和其他目的，特征和优点是用这样一种制造电子学器件的方法所提供的，该方法包含把第一部件和第二部件的位置得使其相对的表面互相接触，第一部件包括硅而第二部件包含低温共烧陶瓷(LTCC)材料。该方法还包括把第一部件和第二部件相对表面阳极接合在一起以在其间形成密封的封接。该阳极接合提供一种在部件之间安全和均匀的结合。
第一和第二部件可以有基本上平的主相对表面。阳极接合在这些表面之间提供了均匀的结合，以减小由于两种不同材料热膨胀系数的差别而引起的可能的应力效应，否则这种应力效应是可以产生的。
阳极接合可以包含在第一和第二部件之间加上一个电压，在第一和第二部件的相对表面加上压力，和/或加热第一和第二部件。该方法可以还包括在对部件进行阳极接合之前清洗第一和第二部件的相对表面。
该方法可以还包括在第一和第二部件的至少一个部件内形成至少一个冷却结构。更具体地讲，该至少的一个冷却结构可以包括在第一部件内的至少一个第一微流体冷却结构和在第二部件上的至少一个第二微流体冷却结构，该结构和至少一个第一微流体冷却结构对准。该至少一个第一微流体冷却结构可以包括一个蒸发器，而该至少一个第二微流体冷却结构可以包括至少一个微流体通道。阳极接合允许在两个部件之间的一个密封的封接，从而大大减小或消除否则将会发生的冷却流体在两个部件之间界面上的流失。
该方法还可以也包括至少一个集成电路置于该至少一个冷却结构附近，诸如置于在第二部件内至少一个微流体冷却通道附近。该至少一个集成电路可以包括电连接，而该第二部件可以带有连接到至少一个集成电路的电连接的外部电连接端。
对于通常的电子学器件，阳极接合可以包括以在约500至1000伏范围内的一个电压加在第一和第二部件之间，同样，该阳极接合可以包括以在约1到20psi范围内的压力加在第一和第二部件的相对表面。沿着这些思路继续下去，阳极接合可以包括把第一和第二部件加热到约100到150C范围内的某一温度。
本发明的另一个方面涉及一种电子学器件，例如一个多芯片组件(MCM)或其他相同封装的集成电路。该电子学器件可以包含一个包含硅的第一部件和包含低温共烧陶瓷(LTCC)材料的第二部件。另外，第一和第二部件有互相对着的表面，这两个表面被阳极接合在一起以在其间形成一密封的封接。第一和第二部件可以有例如相互面对的、基本上平的主表面。
第一和第二部件中至少有一个部件可以包含至少一个冷却结构。例如，第一部件可以在其内包含至少一个第一微流体冷却结构，诸如一个蒸发器。另外，第二部件可以进一步包含至少一个第二微流体冷却结构，它与第一部件的该至少一个第一微流体冷却结构对准。例如，该至少一个第二微流体冷却结构可以包含至少一个微流体通道。
该电子学器件可以还包括至少一个集成电路，该电路邻近第二部件的该至少一个第二微流体冷却结构。该至少一个集成电路可以还包括电连接。相应地，第二部件可以包含连接到该至少一个集成电路的电连接上的外部电连接。
附图的简要描述
图1是按照已有技术的一个电子学器件的一张示意截面图。
图2是图1中所示电子学器件一部分的一张放大的图。
图3是按照本发明的一个电子学器件的一张示意截面图。
图4是图3所示电子学器件一部分的一张放大的图。
图5是图3中所示的电子学器件在按照本发明的装置中正在制作的一张示意图。
图6是如在图3所示的电子学器件中阳极接合界面的一张示意图。
图7是说明按照本发明的方法的一张流程图。
优选实施方案的详细叙述
下面将参照附图更充分地叙述本发明，而附图中给出了本发明的优选实施方案。然而本发明可以赋予许多不同的形式，因而不能解释为只限于在此处给出的实施方案。提供这些实施方案是为了使得本发明内容周到和完整，并向本领域的技术人员充分表达本发明的范围。全文中用相同的数字表示相同的元件。
现在先参照图3-7来叙述按照本发明的电子学器件和制造该器件的方法。具体讲，如图3和4所示，给出了按照本发明一个电子学器件110的一个图示实施方案。该电子学器件110与图1和2中所示的已有技术的不同之处在于常规的粘结层31被阳极接合的界面135所代替，这将在此详细叙述。
该电子学器件110示意性地在其封装111中装有单一的集成电路122，虽然本领域的技术人员将认识到本发明也适用于其他电子学器件。例如，该电子学器件也可以是一个MCM，或装在类似的封装中的包含一个或多个集成电路122的其他类似器件。该电子学器件110示意性地包括包含硅的第一部件112和包含低温共烧陶瓷(LTCC)材料的第二部件114。该第一和第二部件112、114有相对的表面，它们被阳极接合在一起以在它们之间的界面135上形成一密封的封接。
如图中实施方案所示，第一和第二部件112、114有相对的，大体上平的被阳极接合在一起的主表面，第一和第二部件112、114中至少有一个部件可以在其内包含至少一个冷却结构，如同本领域的技术人员理解的那样。例如，如图中电子学器件110所示，第一部件112在其内至少包含一个第一微流体冷却结构，诸如图中的蒸发器116。
第二部件114可以包括至少一个第二微流体，冷却结构，它与第一部件112该至少一个第一微流体冷却结构对准。例如，如在电子学器件110图中实施方案所示的那样，该至少一个第二微流体冷却结构可以包括至少一个微流体通道130。
该电子学器件110还示意性地包括一个集成电路122，它位于第二部件114的微流体通道130的邻近。当然，在其他实施方案中，在封装111内，也可以装上不止一个集成电路。另外，也可安装一光学/电子学器件并用像这里所描述的那样冷却，如同本领域的技术人员将理解的那样。该集成电路122还示意性地包括电连接124，它被用常规的技术引向外部电连接123，如同本领域的技术人员将明白的那样。
如同本领域技术人员也将理解的那样，在本发明的其他实施方案中，集成电路122可以包括一个背接触层，这在图中没有画出，它也连接到第二部件所述的外部电连接器上。另外，在其他实施方案中集成电路122也可以用倒装芯片结合技术来安装。
本发明的图示的电子学器件110的其他元件用这样的参照数字来表示，比起图1和2中所示的电子学器件同样的元件的参照数字，要加上100。相应地，这些共同的元件在此处就不需进一步讨论。
现更具体地参照图5-7来更详细地叙述本发明的方法方面。本方法是用来制造诸如前面所述的电子学器件110。如在图7流程中所示的那样，从起始(方框150)出发，本方法在方框152可以包括对第一和第二部件112和114的相对的表面进行清洗和准备。准备可以包括抛光或其他工艺以保证各个相对表面的表面粗糙度是在所要求的范围内。
在方框154，该方法包括把第一和第二部件112、114的位置放好以使其相对的表面是互相接触着。如前所述，第一部件112包含硅，第二个组件114包含一种LTCC材料。在方框156，第一和第二部件112、114的相对表面被阳极接合在一起。
现在再简要的参阅图5中示意画出的装置140，其中进一步描述了阳极接合的一个实施方案。第一和第二部件112、114可以在装置140的顶电极142和底电极141之间被对准。底电极141由一个加热支座144承载着。一个电压源143连接到顶电极和底电极142、141。装置140能提供所必须的电压，压力和温度范围，以使第一和第二部件112、114有效的阳极接合。
对于像图中的电子学器件110或例如MCMS这样典型的电子学器件，电压源143可以在第一和第二部件112、114之间加上一个在以500到1000伏的范围内的电压。同样，该装置也可以加上一个力，使得在相对表面之间的压力在约1到20psi的范围内。另外，加热支座可以把第一和第二部件112、114加热到约100到150℃范围内的一个温度。当然，本发明也考虑其他的电压，压力和温度，这些电压，压力和温度也可用于其他器件，这对于本领域的技术人员是明白的，在阳极接合(方框156)以后，结合在一起的第一和第二部件112和114在结束(方框160)以前可能要清洗和进一步处理。
如前所述，第一和第二部件112、114可以有基本平的主相对平面，以使阳极接合沿着这些表面提供一个均匀的结合以减小可能的应力效应，否则，由于二种不同材料的热膨胀系数不同，这种应力效应是可以产生的。这种阳极接合提供了一种在部件112、114之间安全的和均匀的密封封接，克服了前面所述的用粘结剂所导致的缺点。
该方法可以还包括在第一和第二部件112、114中的至少一个部件内形成至少一个冷却结构。这些可以在阳极接合之前或在之后形成，也可以又在阳极接合之前又在阳极接合之后形成。本方法也可以包括把至少一个集成电路122置于至少一个冷却结构邻近，诸如置于第二部件或LTCC部件114中至少一个微流体冷却通道130邻近。
阳极接合有利地在两个部件之间提供一种密封封接，并大大地减少或消除了在两个部件之间界面上冷却流体的损失，否则这种损失是要发生的。申请人相信(但并不想限制于这种理由)阳极接合引起在第一和第二部件之间的界面上形成可能如在图6的示意图中最佳地显示那样的配位共价阵列。
借助于前面的叙述和附图所给出的教导，在本领域中的技术人员可以想出对本发明的许多修改和其他实施方案。因而应当理解到，本发明不限于这些公开的实施方案，本发明要求其他的修改和实施方案被包括在所附权利要求书的范围内。

Claims (34)

1.制造电子学器件的一种方法，包括：
放置第一和第二部件，使得其相对的表面互相接触，第一部件包含硅，而第二部件包含低温共烧陶瓷(LTCC)材料；以及
对第一和第二部件的相对表面进行阳极接合，以在其间形成密封的封接。
2.按照权利要求1的方法，其中所述第一和第二部件有基本平的主相对表面。
3.按照权利要求1的方法，其中阳极接合包含在第一和第二部件之间加上一电压。
4.按照权利要求3的方法，其中阳极接合还包含对第一和第二部件的相对表面加上压力。
5.按照权利要求4的方法，其中阳极接合还包含加热第一和第二部件。
6.按照权利要求3的方法，还包含在阳极接合之前，清洗第一和第二部件的相对表面。
7.按照权利要求3的方法，还包含在第一和第二部件的至少一个部件内形成至少一个冷却结构。
8.按照权利要求7的方法，其中该至少一个冷却结构包含至少一个微流体冷却结构。
9.按照权利要求7的方法，还包含把至少一个集成电路邻近置于该至少一个冷却结构。
10.按照权利要求9的方法，其中该至少一个集成电路包含电连接；而其中第二部件载有外部电连接，该外部电连接连接到该至少一个集成电路的电连接上。
11.按照权利要求1的方法，其中阳极接合包含在第一和第二部件之间加上在约500到1000伏范围内的电压。
12.按照权利要求1的方法，其中阳极接合包含对第一和第二部件的相对表面加上约1到20psi范围内的压力。
13.按照权利要求1的方法，其中阳极接合包含对第一和第二部件加热到约100到150℃范围内的温度。
14.一种制造电子学器件的方法，包含：
位置第一和第二部件，使得其相对的基本平的主表面互相接触，第一部件包含硅，而第二部件包含低温度烧陶瓷(LTCC)材料，第一部件还有至少一个第一微流体结构，以及第二部件也有至少一个第二微流体冷却结构，它和该至少一个第一微流体冷却结构对准；以及
把第一和第二部件的相对的基本平的主表面阳极接合在一起以在其间形成一密封的封接。
15.按照权利要求14的方法，其中阳极接合包含在第一和第二部件之间加上一电压。
16.按照权利要求15的方法，其中阳极接合还包含对第一和第二部件的相对表面加上压力。
17.按照权利要求16的方法，其中阳极接合还包含对第一和第二部件加热。
18.按照权利要求14的方法，还包含在阳极接合之前，清洗第一和第二部件的相对表面。
19.按照权利要求14的方法，还包含把至少一个集成电路置于与该至少一个第一微流体冷却结构邻近。
20.按照权利要求19的方法，其中该至少一个集成电路包含电连接；而其中第二部件载有外部电连接，该外部电连接连接到该至少一个集成电路的电连接上。
21.一种电子学器件，包含：
一个包含硅的第一部件；以及
一个包含低温共烧陶瓷(LTCC)材料的第二部件；
所述第一和第二部件有相对的，被阳极接合在一起的表面以在其间形成一密封的封接。
22.按照权利要求21的一种电子学器件，其中所述第一和第二部件有相对的基本上平的主相对表面。
23.按照权利要求21的一种电子学器件，其中所述第一和第二部件的至少之一在其中包含至少一个冷却结构。
24.按照权利要求21的一种电子学器件，其中所述第一部件还包含至少一个第一微流体冷却结构。
25.按照权利要求24的一种电子学器件，其中所述至少一个第一微流体冷却结构包含一个蒸发器。
26.按照权利要求24的一种电子学器件，其中所述第二部件还包含至少一个第二微流体冷却结构，它与该至少一个第一微流体冷却结构对准。
27.按照权利要求26的一种电子学器件，其中所述至少一个第二微流体冷却结构包含至少一个微流体通道。
28.按照权利要求26的一种电子学器件，还包含至少一个集成电路，它邻近所述至少一个第二微流体冷却结构。
29.按照权利要求28的一种电子学器件，其中所述至少一个集成电路包含电连接；以及其中第二部件包含连接到所述至少一个集成电路的电连接上去的外部电连接。
30.一种电子学器件，包括：
一个包含硅的第一部件，其内有至少一个第一微流体冷却结构；
一个包含低温共烧陶瓷(LTCC)材料的第二部件，它有至少一个第二微流体冷却结构，该结构与所述第一部件的至少一个第一微流体冷却结构对准；
所述第一和第二部件有相对的表面，它们被阳极接合在一起以在其间形成一密封的封接；以及
至少一个集成电路，邻近所述至少一个第二微流体冷却结构。
31.按照权利要求30的一种电子学器件，其中所述第一和第二部件具有相对的基本平的主相对表面。
32.按照权利要求30的一种电子学器件，其中所述至少一个第一微流体冷却结构包含一个蒸发器。
33.按照权利要求30的一种电子学器件，其中所述至少一个第二微流体冷却结构包含至少一个微流体通道。
34.按照权利要求30的一种电子学器件，其中所述至少一个集成电路包含电连接；并且其中第二部件包含连接到所述至少一个集成电路电连接上去的外部电连接。
CNA018221300A 2000-12-19 2001-12-10 制造包括硅和低温共烧陶瓷的电子学器件的方法和用该方法产生的器件 Pending CN1494739A (zh)

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